DATA SHEET GENERAL PURPOSE CHIP RESISTORS RC0603 (Pb Free) 5%; 1% Product specification – Aug 19, 2004 V.2 Product specification 2 10 RC SERIES 0603 (Pb Free) Chip Resistor Surface Mount SCOPE This specification describes RC0603 series chip resistors with lead-free terminations made by thick film process. ORDERING INFORMATION Part number is identified by the series, size, tolerance, packing type, temperature coefficient, taping reel and resistance value. YAGEO ORDERING CODE YAGEO ORDERING CODE CTC CODE ORDERING EXAMPLE The ordering code of a RC0603 chip resistor, value RC0603 X X X XX XXXX L (1) (2) (3) (4) (5) (6) 56 X with ±1% tolerance, supplied in 7-inch tape reel is: RC0603FR-0756RL. ( ) 1 TOLERANCE NOTE F = ±1% 1. The “L” at the end of the code is only for ordering. On the reel J = ±5% label, the standard CTC will be mentioned an additional stamp ( ) 2 PACKAGING TYPE “LFP”= lead free production. 2. Products with lead in terminations fulfil the same requirements R = Paper/PE taping reel as mentioned in this datasheet. ( ) 3 TEMPERATURE COEFFICIENT OF RESISTANCE 3. Products with lead in terminations will be phased out in the coming months (before July 1st, 2006) – = Base on spec ( ) 4 TAPING REEL 07 = 7 inch dia. Reel 10 = 10 inch dia. Reel (not preferred) 13 = 13 inch dia. Reel ( ) 5 RESISTANCE VALUE 5R6, 56R, 560R, 5K6, 56K, 22M. (6) RESISTOR TERMINATIONS L = Lead free terminations (pure Tin) www.yageo.com Aug 19, 2004 V.2 MBE940_a Product specification 3 10 RC SERIES 0603 (Pb Free) Chip Resistor Surface Mount MARKING RC0603 E-24 series: 3 digits First two digits for significant figure and 3rd digit ynsc001 for number of zeros Fig. 1 Value=10 KΩ E-96 series: 3 digits for 0603 ±1% EIA-96 marking method ynsc002 ynsc003 For 0603 ±1% E-24 series, one short bar under Fig. 2 Value=12.4 KΩ Fig. 3 E-24 1% Value=56 K marking letter For marking codes, please see EIA-marking code rules in data sheet “Chip resistors instruction”. CONSTRUCTION The resistors are constructed out of protective coat a high-grade ceramic body. Internal handbook, 4 columns resistor layer metal electrodes are added at each inner electrode end and connected by a resistive H paste. The composition of the paste end termination is adjusted to give the approximate ceramic substrate MBE940_a I 2 required resistance and laser cutting of this resistive layer that achieves Fig. 4 Chip resistor construction tolerance trims the value. The resistive layer is covered with a protective coat and printed with the resistance value. Finally, the two external terminations (pure Tin) are added. See Fig. 4. DIMENSIONS Table 1 protective coat TYPE RC0603 I 1 L (mm) 1.60 ±0.1 W (mm) 0.80 ±0.10 H (mm) 0.45 ±0.10 W I (mm) 1 0.25 ±0.15 I (mm) 2 0.25 ±0.15 L Fig. 5 Chip resistor dimension For dimension see Table 1 www.yageo.com Aug 19, 2004 V.2 Product specification 4 10 RC SERIES 0603 (Pb Free) Chip Resistor Surface Mount ELECTRICAL CHARACTERISTICS FOOTPRINT AND SOLDERING PROFILES Table 2 RC0603 1/10 W For recommended footprint and CHARACTERISTICS soldering profiles, please see the Operating Temperature Range –55 °C to +155 °C special data sheet “Chip resistors Maximum Working Voltage 50 V mounting”. Maximum Overload Voltage 100 V Dielectric Withstanding Voltage 100 V ENVIRONMENTAL DATA 5% (E24) 1 Ω to 22 MΩ For material declaration Resistance Range 1% (E96) 1 Ω to 10 MΩ information (IMDS-data) of the Zero Ohm Jumper < 0.05 Ω products, please see the separated info “Environmental 10 Ω < R ≤ 10 MΩ ±100 ppm/°C Temperature Coefficient data”. R ≤ 10 Ω; R > 10 MΩ ±200 ppm/°C Rated Current 1.0 A Jumper Criteria Maximum Current 2.0 A PACKING STYLE AND PACKAGING QUANTITY Table 3 Packing style and packaging quantity PRODUCT TYPE PACKING STYLE REEL DIMENSION QUANTITY PER REEL RC0603 Paper / PE Taping Reel (R) 7" (178 mm) 5,000 units 10" (254 mm) / not preferred 10,000 units 13" (330 mm) 20,000 units NOTE 1. For Paper/PE tape and reel specification/dimensions, please see the special data sheet “Packing” document. www.yageo.com Aug 19, 2004 V.2 Product specification 5 10 RC SERIES 0603 (Pb Free) Chip Resistor Surface Mount FUNCTIONAL DESCRIPTION P PO OW WE ER R R RA AT TIIN NG G MRA632 P max RC0603 rated power at 70°C is 1/10 W (%P ) rated 100 RATED VOLTAGE The DC or AC (rms) continuous working voltage corresponding to the rated power is determined by 50 the following formula: 0 V=√(P X R) −55 0 50 70 100 155 T (°C) Where amb V=Continuous rated DC or Fig. 6 Maximum dissipation (P ) in percentage of rated power max AC (rms) working voltage (V) as a function of the operating ambient temperature (T ) amb P=Rated power (W) R=Resistance value (X) PULSE LOADING CAPABILITIES PULSE LOADING CAPABILITIES MBD590 4 10 V max (V) 3 10 1.2/50 µs 10/700 µs 2 10 10 2 3 4 5 6 7 10 10 10 10 10 10 10 R (Ω) n Fig. 7 Maximum permissible peak pulse voltage without failing to open circuit’ in accordance with DIN IEC 60040 (CO) 533 for type: RC0603 www.yageo.com Aug 19, 2004 V.2 Product specification 6 10 RC SERIES 0603 (Pb Free) Chip Resistor Surface Mount MBD591 2 10 P max (W) 10 single pulse t /t =1000 pi 1 1 10 2 10 6 5 4 3 2 1 10 10 10 10 10 10 1 t (s) i Fig. 8 Pulse on a regular basis for type: RC0603; maximum permissible peak pulse power as a function of pulse duration for single pulse and repetitive pulse tp/ti = 1000 MBD592 300 V max (V) 200 100 0 6 5 4 3 2 1 10 10 10 10 10 10 1 t (s) i Fig. 9 Pulse on a regular basis for type: RC0603; maximum permissible peak pulse voltage as a function of pulse duration www.yageo.com Aug 19, 2004 V.2 Product specification 7 10 RC SERIES 0603 (Pb Free) Chip Resistor Surface Mount TESTS AND REQUIREMENTS Table 4 Test condition, procedure and requirements TEST TEST METHOD PROCEDURE REQUIREMENTS Temperature MIL-STD-202F-method 304; At +25/–55 °C and +25/+125 °C Refer to table 2 Coefficient of JIS C 5202-4.8 Resistance Formula: (T.C.R.) R –R 2 1 6 T.C.R= ------------------------- ×10 (ppm/°C) R (t –t ) 1 2 1 Where t =+25 °C or specified room temperature 1 t =–55 °C or +125 °C test temperature 2 R =resistance at reference temperature in ohms 1 R =resistance at test temperature in ohms 2 MIL-STD-202F-method 107G; Thermal Shock At –65 (+0/–10) °C for 2 minutes and at +155 ±(0.5%+0.05 Ω) for 1% tol. (+10/–0) °C for 2 minutes; 25 cycles IEC 60115-1 4.19 ±(1.0%+0.05 Ω) for 5% tol. MIL-R-55342D-Para 4.7.4 Low At –65 (+0/–5) °C for 1 hour; RCWV applied ±(0.5%+0.05 Ω) for 1% tol . Temperature for 45 (+5/–0) minutes ±(1.0%+0.05 Ω) for 5% tol. Operation No visible damage MIL-R-55342D-Para 4.7.5; Short Time 2.5 × RCWV applied for 5 seconds at room ±(1.0%+0.05 Ω) for 1% tol. Overload temperature IEC 60115-1 4.13 ±(2.0%+0.05 Ω) for 5% tol. No visible damage MIL-STD-202F-method 302; Insulation RCOV for 1 minute ≥10 GΩ Resistance IEC 60115-1 4.6.1.1 Type RC0603 Voltage (DC) 100 V MIL-STD-202F-method 301; Dielectric Maximun voltage (V ) applied for 1 minute No breakdown or flashover rms Withstand IEC 60115-1 4.6.1.1 Type RC0603 Voltage Voltage (AC) 100 V rms MIL-STD-202F-method 210C; Resistance to Unmounted chips; 260 ±5 °C for 10 ±1 ±(0.5%+0.05 Ω) for 1% tol. Soldering seconds IEC 60115-1 4.18 ±(1.0%+0.05 Ω) for 5% tol. Heat No visible damage MIL-STD-202F-method 108A; Life At 70±2 °C for 1,000 hours; RCWV applied for ±(1%+0.05 Ω) for 1% tol. 1.5 hours on and 0.5 hour off IEC 60115-1 4.25.1 ±(3%+0.05 Ω) for 5% tol. www.yageo.com Aug 19, 2004 V.2 Product specification 8 10 RC SERIES 0603 (Pb Free) Chip Resistor Surface Mount TEST TEST METHOD PROCEDURE REQUIREMENTS MIL-STD-202F-method 208A; Solderability Solder bath at 245±3 °C Well tinned (≥95% covered) IEC 60115-1 4.17 Dipping time: 2±0.5 seconds No visible damage JIS C 5202.6.14; Bending ±(1.0%+0.05 Ω) for 1% tol. Resistors mounted on a 90 mm glass epoxy Strength IEC 60115-1 4.15 resin PCB (FR4) ±(1.0%+0.05 Ω) for 5% tol. Bending: 5 mm No visible damage MIL-STD-202F-method 215; Resistance to lsopropylalcohol (C H OH) or dichloromethane No smeared 3 7 Solvent (CH Cl ) followed by brushing 2 2 IEC 60115-1 4.29 JIS C 5202 5.9; Noise Maximum voltage (V ) applied. Value Resistors range rms IEC 60115-1 4.12 R < 100 Ω 10 dB 100 Ω ≤ R < 1 KΩ 20 dB 1 KΩ ≤ R < 10 KΩ 30 dB 10 KΩ ≤ R < 100 KΩ 40 dB 100 KΩ ≤ R < 1 MΩ 46 dB 1 MΩ ≤ R ≤ 22 MΩ 48 dB JIS C 5202 7.5; Humidity 1,000 hours; 40±2 °C; 93(+2/–3)% RH ±(0.5%+0.05 Ω) for 1% tol. (steady state) IEC 60115-8 4.24.8 RCWV applied for 1.5 hours on and 0.5 hour off ±(2.0%+0.05 Ω) for 5% tol. EIA/IS 4.13B; Leaching Solder bath at 260±5 °C No visible damage IEC 60115-8 4.18 Dipping time: 30±1 seconds JIS C 5202 5.8 Intermittent At room temperature; 2.5 × RCWV applied for ±(1.0%+0.05 Ω) for 1% tol. Overload 1 second on and 25 seconds off; total 10,000 ±(2.0%+0.05 Ω) for 5% tol. cycles Resistance to On request On request Vibration MIL-STD-202F-method 106F; Moisture 42 cycles; total 1,000 hours ±(0.5%+0.05Ω) for 1% tol. Resistance IEC 60115-1 4.24.2 Shown as Fig. 10 ±(2.0%+0.05Ω) for 5% tol. Heat No visible damage www.yageo.com Aug 19, 2004 V.2 Product specification 9 10 RC SERIES 0603 (Pb Free) Chip Resistor Surface Mount 80 − 98% 80 − 98% 75 90 − 98% RH RH 90 − 98% RH RH 90 − 98% RH temperature initial drying [°C] 24 hours rate of change of temperature is unspecified, 50 however, specimens shall not be subjected to radiant heating from chamber conditioning processes end of final cycle; measurements as specified in 2.7 +10 °C (+18 °F) 25 −2 °C (−3.6 °F) initial measurements circulation of conditioning air shall be at a optional sub-cycle if specified as specified in 2.2 minimum cubic rate per minute equivalent to (2.3); sub-cycle performed during 10 times the volume of the chamber any 5 of the first 9 cycles; humidity 0 uncontrolled during sub-cycle temperature tolerance ±2 °C (±3.6 °F) voltage applied as specified in 2.4 unless otherwise specified STEP1 STEP2 STEP3 STEP4 STEP5 STEP6 STEP7 prior to first one cycle 24 hours; repeat as specified in 2.5 cycle only HBK073 0 510 15 20 25 time [h] Fig. 10 Moisture resistance test requirements www.yageo.com Aug 19, 2004 V.2 Product specification 10 10 RC SERIES 0603 (Pb Free) Chip Resistor Surface Mount REVISION HISTORY REVISION DATE CHANGE NOTIFICATION DESCRIPTION Version 0 Nov. 07, 2003 - - First issue of this specification Version 1 Aug 02, 2004 - - Test method and procedure updated - PE tape added (paper tape will be replaced by PE tape) Version 2 Aug 19, 2004 - - www.yageo.com Aug 19, 2004 V.2