W24L257A 32K × 8 HIGH-SPEED CMOS STATIC RAM GENERAL DESCRIPTION The W24L257A is a high-speed, low-power CMOS static RAM organized as 32768 × 8 bits that operates on a single 3.3-volt power supply. This device is manufactured using Winbond's high performance CMOS technology. FEATURES • High-speed access time: 12/15/20 nS (max.) • All inputs and outputs directly TTL compatible • Low-power consumption: • Three-state outputs − Active: 200 mW (typ.) • Available packages: 28-pin 300 mil SOJ, skinny DIP and standard type one TSOP • Single +3.3V power supply (8 mm × 13.4 mm) • Fully static operation PIN CONFIGURATION BLOCK DIAGRAM VDD SS A14 V 1 28 VDD A12 2 27 WE A0 A7 3 26 A13 . DECODER . CORE A6 4 25 A8 ARRAY A14 ARRAY A5 5 24 A9 A4 6 23 A11 A3 OE 7 22 28-DIP CS A2 8 21 A10 I/O1 . CONTROL OE DATA I/O . A1 9 20 CS I/O8 WE A0 10 19 I/O8 I/O1 11 18 I/O7 I/O2 12 17 I/O6 I/O3 13 I/O5 16 PIN DESCRIPTION V SS 14 15 I/O4 SYMBOL DESCRIPTION Address Inputs A0−A14 A10 OE 1 28 A11 2 CS 27 3 I/O8 I/O1−I/O8 Data Inputs/Outputs A9 26 4 A8 I/O7 25 A13 5 I/O6 24 Chip Select Input 6 I/O5 WE 23 CS 28-pin VDD 7 22 I/O4 TSOP A14 8 V 21 SS Write Enable Input A12 9 WE 20 I/O3 A7 10 19 I/O2 A6 11 18 I/O1 Output Enable Input A5 12 A0 OE 17 13 A4 A1 16 A3 14 A2 15 VDD Power Supply VSS Ground Publication Release Date: December 1996 - 1 - Revision A5 W24L257A TRUTH TABLE CS OE WE MODE VDD CURRENT I/O1−I/O8 H X X Not Selected High Z ISB, ISB1 L H H Output Disable High Z IDD L L H Read Data Out IDD L X L Write Data In IDD DC CHARACTERISTICS Absolute Maximum Ratings PARAMETER RATING UNIT Supply Voltage to VSS Potential -0.5 to +4.6 V Input/Output to VSS Potential -0.5 to VDD +0.5 V Allowable Power Dissipation 1.0 W Storage Temperature -65 to +150 °C Operating Temperature 0 to +70 °C Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. Operating Characteristics (VDD = 3.3V ± 5%, VSS = 0V, Ta = 0 to 70° C) PARAMETER SYM TEST CONDITIONS MIN TYP MAX. UNIT . . . Input Low Voltage VIL - -0.5 - +0.8 V Input High Voltage VIH - +2.0 - VDD +0.3 V Input Leakage Current ILI VIN = VSS to VDD -10 - +10 µA Output Leakage ILO -10 - + 10 µA VI/O = VSS to VDD, CS = VIH (min.) Current or OE = VIH (min.) or WE = VIL (max.) Output Low Voltage VOL IOL = +8.0 mA - - 0.4 V Output High Voltage VOH IOH = -4.0 mA 2.4 - - V Operating Power IDD 12 - - 150 mA CS = VIL (max.), I/O = 0 mA Supply Current Cycle = min. 15 - - 120 mA Duty = 100% 20 - - 100 mA Standby Power ISB -- 20 mA CS = VIH (min.), Cycle = min. Supply Current Duty = 100% ISB1 - - 200 µA CS ≥ VDD -0.2V Note: Typical characteristics are at VDD = 3.3V, Ta = 25° C. - 2 - W24L257A CAPACITANCE (VDD = 3.3V, Ta = 25° C, f = 1 MHz) PARAMETER SYM. CONDITIONS MAX. UNIT Input Capacitance CIN VIN = 0V 6 pF Input/Output Capacitance CI/O VOUT = 0V 8 pF Note: These parameters are sampled but not 100% tested. AC CHARACTERISTICS AC Test Conditions PARAMETER CONDITIONS Input Pulse Levels 0V to 3V Input Rise and Fall Times 3 nS Input and Output Timing Reference Level 1.5V Output Load CL = 30 pF, IOH/IOL = -4 mA/8 mA AC Test Loads and Waveform R1 320 ohm R1 320 ohm 3.3V 3.3V OUTPUT OUTPUT 5 pF 30 pF R2 R2 350 ohm 350 ohm Including Including Jig and Jig and Scope Scope (For T T T , TOHZ, WHZ, CLZ, OLZ, CHZ T TOW) 3.0V 90% 90% 10% 10% 0V 3 nS 3 nS Publication Release Date: December 1996 - 3 - Revision A5 W24L257A AC Characteristics, continued (VDD = 3.3V ± 5%, VSS = 0V, Ta = 0 to 70° C) (1) Read Cycle PARAMETER SYM. W24L257A-12 W24L257A-15 W24L257A-20 UNIT MIN. MAX. MIN. MAX. MIN. MAX. Read Cycle Time TRC 12 - 15 - 20 - nS Address Access Time TAA -12 - 15 - 20 nS Chip Select Access Time TACS -12 - 15 - 20 nS Output Enable to Output Valid TAOE -6 - 8 - 10 nS Chip Selection to Output in Low Z TCLZ*4 - 4 -4 - nS Output Enable to Output in Low Z TOLZ*0 - 0 - 0 - nS Chip Deselection to Output in High Z TCHZ*- 6 - 7 - 10 nS Output Disable to Output in High Z TOHZ*- 6 - 7 - 10 nS Output Hold from Address Change TOH 3- 3 - 3 - nS ∗These parameters are sampled but not 100% tested (2) Write Cycle PARAMETER SYM. W24L257A-12 W24L257A-15 W24L257A-20 UNIT MIN. MAX. MIN. MAX. MIN. MAX. Write Cycle Time TWC 12 - 15 - 20 - nS Chip Selection to End of Write TCW 10 - 13 - 17 - nS Address Valid to End of Write TAW 10 - 13 - 17 - nS Address Setup Time TAS 0 - 0- 0- nS Write Pulse Width TWP 10 - 10 - 12 - nS Write Recovery Time TWR 1 - 1- 1- nS CS , WE Data Valid to End of Write TDW 7- 9 - 10 - nS Data Hold from End of Write TDH 0 - 0- 0- nS Write to Output in High Z TWHZ*- 7 - 8 - 10 nS Output Disable to Output in High Z TOHZ*- 7 - 8 - 10 nS Output Active from End of Write TOW 0 - 0- 0- nS ∗These parameters are sampled but not 100% tested - 4 - W24L257A TIMING WAVEFORMS Read Cycle 1 (Address Controlled) T RC Address TAA T OH TOH DOUT Read Cycle 2 (Chip Select Controlled) CS TACS TCHZ D OUT TCLZ Read Cycle 3 (Output Enable Controlled) T RC Address TAA OE TAOE TOH TOLZ CS TOHZ TACS CHZ T TCLZ DOUT Publication Release Date: December 1996 - 5 - Revision A5 W24L257A Timing Waveforms, continued Write Cycle 1 (OE Clock) WC T Address TWR OE TCW CS TAW WP WE T TAS OHZ T (1,4) D OUT TDW TDH DIN Write Cycle 2 (OE = VIL Fixed) T WC Address T TWR CW CS TAW WE TWP TOH TAS (2) (3) TWHZ TOW (1, 4) D OUT TDW TDH DIN Notes: 1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied. 2. The data output from DOUT are the same as the data written to DIN during the write cycle. 3. DOUT provides the read data for the next address. 4. Transition is measured ±500 mV from steady state with CL = 5 pF. This parameter is guaranteed but not 100% tested. - 6 - W24L257A ORDERING INFORMATION PART NO. ACCESS TIME OPERATING STANDBY PACKAGE (nS) CURRENT CURRENT MAX. (mA) MAX. (µA) W24L257AK-12 12 150 200 300 mil Skinny W24L257AK-15 15 120 200 300 mil Skinny W24L257AK-20 20 100 200 300 mil Skinny W24L257AJ-12 12 150 200 300 mil SOJ W24L257AJ-15 15 120 200 300 mil SOJ W24L257AJ-20 20 100 200 300 mil SOJ W24L257AQ-12 12 150 200 Standard type one TSOP W24L257AQ-15 15 120 200 Standard type one TSOP W24L257AQ-20 20 100 200 Standard type one TSOP Notes: 1. Winbond reserves the right to make changes to its products without prior notice. 2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure. Publication Release Date: December 1996 - 7 - Revision A5 W24L257A PACKAGE DIMENSIONS 28-pin P-DIP Skinny Dimension in Inches Dimension in mm Symbol Min. Nom. Max. Min. Nom. Max. 0.175 4.45 A 0.010 0.25 A1 0.125 0.130 0.135 3.18 3.30 3.43 A2 0.016 0.018 0.022 0.41 0.46 0.56 B 0.060 1.47 1.52 1.63 0.058 0.064 B1 0.010 0.014 0.20 0.25 0.36 0.008 c D 28 15 1.388 1.400 35.26 35.56 D 8.13 0.300 0.310 0.320 7.62 7.87 E 1 0.283 0.288 0.293 7.19 7.32 7.44 E E1 0.090 0.100 0.110 2.29 2.54 2.79 e 1 3.05 0.120 0.130 0.140 3.30 3.56 L 015 0 15 1 14 a 0.330 0.350 0.370 8.38 8.89 9.40 e A 0.055 1.40 S Notes: 1. Dimensions D Max. & S include mold flash or tie bar burrs. 2. Dimension E1 does not include interlead flash. 3. Dimensions D & E1 include mold mismatch and E S are determined at the mold parting line. c 4. Dimension B1 does not include dambar Base Plane protrusion/intrusion. A A 2 A 1 5. Controlling dimension: Inches. 6. General appearance spec. should be based on L Mounting Plane final visual inspection spec. B e 1 e a A B 1 28-pin Small Outline J Band Dimension in Inches Dimension in mm Symbol Min. Nom. Max. Min. Nom. Max. 0.140 3.56 A 0.027 0.69 A1 2 0.095 0.100 0.105 2.41 2.54 2.67 A 0.026 0.028 0.032 0.66 0.71 0.81 b 1 0.016 0.018 0.41 0.46 0.56 0.022 b 28 15 0.010 0.25 c 0.008 0.014 0.20 0.36 18.54 D 0.710 0.730 18.03 0.300 0.305 7.49 7.62 7.75 E 0.295 E H E 0.044 0.050 0.056 1.12 1.27 1.42 e e 1 0.245 0.265 0.285 6.22 6.73 7.24 0.327 0.337 0.347 8.31 8.56 8.81 HE 0.097 1.96 2.21 L 0.077 0.087 2.46 1 14 0.045 1.14 S 0.004 0.10 y 10 10 θ 0 0 Notes: 1. Dimensions D Max. & S include mold flash D or tie bar burrs. 2. Dimension b does not include dambar protrusion/intrusion. c A 3. Dimensions D & E include mold mismatch 2 A and are determined at the mold parting line. L 4. Controlling dimension: Inches. £c s b e 5. General appearance spec. should be based e 1 b 1 A 1 on final visual inspection spec. Seating Plane y - 8 - W24L257A Package Dimensions, continued 28-pin Standard Type One TSOP D H Dimension In Inches Dimension In mm Symbol Min. Nom. Max. Min. Nom. Max. D 0.047 1.20 c A 0.002 0.006 1 0.05 0.15 A 1 0.040 A2 0.035 0.041 0.95 1.00 1.05 0.007 0.008 0.011 0.17 0.20 0.27 e b E 0.004 0.006 0.008 0.10 0.15 0.21 c 0.461 0.465 0.469 11.70 11.90 11.80 D 0.311 0.315 0.319 7.90 8.00 8.10 E b 0.520 0.528 0.536 13.40 13.60 13.20 HD 0.022 0.55 e 0.020 0.024 0.028 0.50 0.60 0.70 L 0.010 0.25 1 L 0.000 0.004 0.10 0.00 Y 03 5 0 35 θ A θ A1 Controlling dimension: Millimeters L Y A 2 L 1 Headquarters Winbond Electronics (H.K.) Ltd. Winbond Electronics North America Corp. No. 4, Creation Rd. III, Rm. 803, World Trade Square, Tower II, Winbond Memory Lab. Science-Based Industrial Park, 123 Hoi Bun Rd., Kwun Tong, Winbond Microelectronics Corp. Kowloon, Hong Kong Hsinchu, Taiwan Winbond Systems Lab. TEL: 852-27513100 TEL: 886-3-5770066 2730 Orchard Parkway, San Jose, FAX: 852-27552064 FAX: 886-3-5792647 CA 95134, U.S.A. http://www.winbond.com.tw/ TEL: 1-408-9436666 Voice & Fax-on-demand: 886-2-7197006 FAX: 1-408-9436668 Taipei Office 11F, No. 115, Sec. 3, Min-Sheng East Rd., Taipei, Taiwan TEL: 886-2-7190505 FAX: 886-2-7197502 Note: All data and specifications are subject to change without notice. Publication Release Date: December 1996 - 9 - Revision A5