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VMIC VMIVME-2511

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Description

VMIC VMIVME-2511 48-Bit Digital Parallel Input/Output Board

Part Number

VMIVME-2511

Price

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Manufacturer

VMIC

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Category

DIGITAL INPUT/OUTPUT BOARDS

Features

Datasheet

pdf file

VMIC-VMIVME-2511-48-bit-Digital-Parallel-Input-Output-Board-datasheet1-1277756361.pdf

158 KiB

Extracted Text

VMIVME-2511 48-bit Digital Parallel Input/Output Board • 48 bit of TTL I/O • Programmable modes — Unidirectional 8- and 16-bit — Bidirectional 8- and 16-bit — Double-buffered I/O modes — Programmable handshake options (interlocked or pulsed) — Status/interrupt inputs • Two 24-bit programmable timers — Periodic interrupt generator • I/O options — 64 mA sink capability — Square wave generator — Interrupt after timeout — Elapsed time measurement — External clock — Device watchdog • Utilizes two MC68230 parallel interface/timers GENERAL DESCRIPTION — The VMIVME-2511 is designed utilizing two Motorola MC68230 Parallel Interface/Timers (PI/Ts) and one MC68153 Bus Interrupter Module (BIM) to support all board functions as shown in H1 TO H4 — Handshake Pins (I/O depending on the Figure 1. mode and submode). Handshake pins H1 to H4 are multipurpose pins that (depending on the operational mode) The VMIVME-2511 is capable of handling four interrupt may provide an interlocked handshake, a pulsed handshake, an requests. Each PI/T module is capable of two requests: a port interrupt input (independent of data transfers), or simple I/O interrupt request and a timer interrupt request. The four pins. For stabilization during system power up, H2 and H4 interrupt request signals (two from PI/T No. 1 and two from have internal pull-up resistors to V . Their sense (active high PI/T No. 2) are connected to the BIM giving full interrupt CC or low) may be programmed in the port general Control support for both PI/T modules. Each PI/T module has two Register bits 3 to 0. The instantaneous level of the handshake on-board Interrupt Vector Registers programmable by the pins can be read from the port Status Register independent of user. Table 1 provides a summary of operational modes for the mode. the PI/T. Port C — (PC0 to PC7/Alternate Function). This port can The MC68230 Parallel Interface/Timer provides a be used as eight general-purpose I/O pins (PC0 to PC7), or any versatile, double-buffered, parallel interface, and an operating combination of six special function pins and two system-oriented timer to VMEbus systems. The parallel general-purpose I/O pins (PC0 to PC1). (Each dual function interfaces operate in unidirectional or bidirectional modes, pin can be standard I/O or a special function independent of the either 8- or 16-bit wide. In the unidirectional mode, an other Port “C” pins.) The dual function pins are deŢned in the associated Data Direction Register determines whether the following paragraphs. When used as Port “C” pin, these pins port pins are inputs or outputs. In the bidirectional mode, the are active high. They may be individually programmed as Data Direction Registers are ignored and the direction is inputs or outputs by the Port “C” Data Direction Register. determined dynamically by the state of four handshake pins. These programmable handshake pins provide an interface ţexible enough for connection to a wide variety of low, medium, or high-speed peripherals or the other computer Ordering Options systems. The PI/T ports allow use of vectored or March 11, 1998 800-022511-000 D ABC – D E F autovectored interrupts. It can generate periodic interrupts, a VMIVME-2511 –00– square wave, or a single interrupt after a programmed time A = Input/Output Type; Low/High Current period. Also, it can be used for elapsed time measurement, or 2 = TTL/TTL; Low Current as a device watchdog. MC68230 I/O pins available to the 4 = TTL/TTL; High Current 6 = TTL/OC; Low Current user are shown in Figure 3. 8 = TTL/OC; High Current BC = 00 (Options reserved for future use) PA0 TO PA7 AND PB0 TO PB7 (Port “A” and Port Connector Data “B”) — Ports “A” and “B” are 8-bit ports that may be Compatible Cable Connector Panduit No. 120-964-435 Strain Relief Panduit No. 100-000-032 concatenated to form a 16-bit port in certain modes. The PC Board Connector Panduit No. 120-964-033A ports may be controlled in conjunction with the handshake For Ordering Information, Call: pins H1 to H4. For stabilization during system power up, 1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859 E-mail: info@vmic.com Web Address: www.vmic.com Ports “A” and “B” have internal pull-up resistors to V . All CC Copyright © April 1989 by VMIC port pins are active high. Specifications subject to change without notice. VMIC ¥ 12090 South Memorial Parkway ¥ Huntsville, Alabama 35803-3308 1 VMIVME-2511 programmable timer. The VMIVME-2511 may be The alternate functions (TIN, TOUT, AND TIACK) are ordered with a buffered I/O option that provides up to timer I/O pins, TIN may be used as a rising-edge triggered 64 mA sink capability; however, the bidirectional external clock input or an external run/halt control pin (the modes are not supported with this option. timer is in the run state if run/halt is high and in the halt state if run/halt is low). TOUT may provide an active low timer Addressing Scheme: One eight-position DIP interrupt request output or a general-purpose square wave switch is provided to select the board’s base address. output, initially high. TIACK is an active low/high The VMIVME-2511 is conŢgured at the factory to impedance input used for timer interrupt acknowledge. respond to short supervisory I/O access; however, the Ports “A” and “B” functions have an independent pair user may change the jumper to enable short of active low interrupt request (PIRQ) and interrupt nonprivileged access. The VMIVME-2511 registers acknowledge (PIACK) pins. are accessed at ODD addresses. PORT CONTROL STRUCTURE — The primary ELECTRICAL SPECIFICATIONS focus of most applications will be on Ports “A” and “B,” the I/O Buffers Low Current Option: handshake pins, and the port interrupt pins. They are VIH = 2 V minimum controlled in the following way: the port general Control VIL = 0.8 V maximum Register contains a 2-bit Ţeld that speciŢes a set of four IOH = -15 mA operation modes. These modes govern the overall IOL = 24 mA operation of the ports and determine their interrelationships. Some modes require additional information from each I/O Buffers (5.25 V £ VCC ‡ 4.75 V) port’s Control Register to further deŢne its operation. In High Current Option: each port Control Register, there is a 2-bit submode Ţeld VIH = 2 V minimum that serves this purpose. Each port mode/submode VIL = 0.8 maximum combination speciŢes a set of programmable characteristics IOH = -15 mA that fully deŢne the behavior of that port and the behavior IOL = 64 mA of two of the handshake pins. This structure is summarized in Table 2 and Figure 4. PHYSICAL/ENVIRONMENTAL FUNCTIONAL CHARACTERISTICS Temperature: 0 to 55 °C, operating Compliance: This product complies with the -20 to 85 °C, storage VMEbus speciŢcation Rev. C. 1 with the following mnemonics: Humidity: 20 to 80 percent, noncondensing A16: D16, D08 (O) :29, 2D: Slave Interrupt levels: I(1) - I (7):ROAK Cooling: Convection Interrupt vector: D08 (O) 6U form factor Power Requirements: +5 V at 2.51 A I/O Connector Type: 64-pin connector - DIN 41612 MTBF: 82,200 hours (stress) I/O Organization: The VMIVME-2511 board TRADEMARKS utilizes two Motorola MC68230 Parallel Interface/Timers that provide a wide variety of The VMIC logo is a registered trademark of VMIC. programmable I/O features, including unidirectional 8- Other registered trademarks are the property of their and 16-bit I/O, bidirectional 8- and 16-bit I/O, respective owners. selectable handshake options, and a 24-bit 2 For Ordering Information, Call: 1-800-322-3616 or 1-256-880-0444 ¥ FAX (256) 882-0859 VMIVME-2511 Table 1. PI/T I/O Channel DeŢnitions (PB0 to PB7) All eight bits, input or output depending on jumper conŢguration chosen (PC4 to PC7) All four bits, input or output depending on jumper conŢguration chosen H1 Input only H2 ConŢgured as input or output H3 Input only H4 ConŢgured as input or output PC0 ConŢgured as input or output PC1 ConŢgured as input or output PC2/TIN Input only PC3/TOUT Output only Table 2. Port Mode Control Summary Mode 0 (Unidirectional 8-bit Mode) Port A Submode 00 Double-buffered input H1 Latches input data H2 Status/interrupt generating input, general-purpose output, or operation with H1 in the interlocked or pulsed input handshake protocols Submode 01 Double-buffered output H1 Indicates data received by peripheral H2 Status/interrupt generating input, general-purpose output, or operation with H1 in the interlocked or pulsed output handshake protocols Submode 1X bit I/O* H1 Status/interrupt generating input H2 Status/interrupt generating input or general-purpose output Port B, H3, and H4 Identical to Port “A”, H1, and H2 *This mode of operation is not supported by the VMIVME-2511. Mode 1 (Unidirectional 16-bit Mode) Port A Double-buffered data (Most SigniŢcant) Submode XX (not used) H1 Status/interrupt generating input H2 Status/interrupt generating input or general-purpose output Port B Double-buffered data (Least SigniŢcant) Submode X0 Unidirectional 16-bit input H3 Latches input data H4 Status/interrupt generating input, general-purpose output or operation with H43 in the interlocked or pulsed input handshake protocols Submode X1 Unidirectional 16-bit output H3 Indicates data received by peripheral H4 Status/interrupt generating input, general-purpose output, or operation with H3 in the interlocked or pulsed output handshake protocol Mode 2 (Bidirectional 8-bit Mode) Port A bit I/O (with no handshaking pins) Submode XX (not used) VMIC ¥ 12090 South Memorial Parkway ¥ Huntsville, Alabama 35803-3308 3 VMIVME-2511 Port B Bidirectional 8-bit data (double buffered) Submode XX (not used) H1 Indicates output data received by peripheral H2 Operation with H1 in the interlocked or pulsed output handshake protocols H3 Latches input data H4 Operation with H3 in the interlocked or pulsed input handshake protocols Mode 3 (Bidirectional 16-bit Mode) Port A Double-buffered data (Most SigniŢcant) Submode XX (not used) Port B Double-buffered data (Least SigniŢcant) Submode XX (not used) H1 Indicates output data received by peripheral H2 Operation with H1 in the interlocked or pulsed output handshake protocols H3 Latches input data H4 Operation with H3 in the interlocked or pulsed input handshake protocols 4 For Ordering Information, Call: 1-800-322-3616 or 1-256-880-0444 ¥ FAX (256) 882-0859 VMIVME-2511 ADDRESS ADDRESS DECODE SELECTION CONTROL LOGIC PA0 to 7 PB0 to 7 V H1 16 ADDRESS H2 OPTIONAL M MC68230 BUFFERS I/O PI/T H3 BUFFERS E H4 b PC0 to 7 u 8 s DATA TRANSCEIVERS PA0 to 7 PB0 to 7 H1 OPTIONAL H2 MC68230 7 I/O PI/T H3 BUFFERS VMEbus H4 INTERRUPTER PC0 to 7 Figure 1. Functional Block Diagram INPUT/OUTPUT DRIVERS (OPTIONAL) MC68230 * P4 CONNECTOR PA0 TO 7 PI/T NO. 2 PA0 TO PA7 8 8 PB0 TO 7 DIR J38 5 V H1 J42 * H2 PB0 TO PB7 8 8 H3 DIR J39 5 V H4 J43 MC68230 PC7/TIACK* PC4 TO PC7 PI/T 4 4 EN PC6/PIACK* J19 5 V PC5/PIRQ* PC0 J26 J34 PC4/DMAREQ* PC1 PC3/TOUT* J27 J35 PC2/TIN* H2 J24 J32 PC1 H4 PC0 J25 J33 PC3/TOUT PC2/TIN H1 H3 * Individually programmable dual function pin. *Optional I/O Buffers. Figure 3. I/O Pin Assignments Figure 2. I/O and Jumper Block Diagram for PI/T No. 2 VMIC ¥ 12090 South Memorial Parkway ¥ Huntsville, Alabama 35803-3308 5 VMIVME-2511 MODE 0 SUBMODE 00 MODE 0 SUBMODE 01 MODE 0 SUBMODE 1X* A (B) A (B) A (B) 8 8 8 LATCHED, DOUBLE- DOUBLE-BUFFERED BIT I/O BUFFERED INPUT OUTPUT H1 (H3) H1 (H3) H1 (H3) H2 (H4) H2 (H4) H2 (H4) * THIS MODE IS NOT SUPPORTED BY THE VMIVME-2511. MODE 1 PORT B SUBMODE X1 MODE 1 PORT B SUBMODE X0 H1 H1 H2 H2 A and B A and B (16) (16) DOUBLE-BUFFERED LATCHED, DOUBLE- OUTPUT BUFFERED INPUT H3 H3 H4 H4 MODE 3 MODE 2 A and B A (B) (16) BIT I/O BIDIRECTIONAL 16-bit H1 OUTPUT TRANSFERS H2 B (8) H3 INPUT TRANSFERS H4 BIDIRECTIONAL 8-bit H1 OUTPUT TRANSFERS H2 H3 INPUT TRANSFERS H4 Figure 4. Port Mode Layout 6 For Ordering Information, Call: 1-800-322-3616 or 1-256-880-0444 ¥ FAX (256) 882-0859

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