VMIVME-5588 High-Speed Reflective Memory with Interrupts • High-speed, easy-to-use network (1.2 Gbaud serially) • Data written to memory in one node is also written to memory in all nodes on the network • Up to 1,000 ft between nodes with multimode fiber, 10 km with single mode, 30 m with twinax • Supports up to 256 nodes • Data transferred at 29.5 Mbyte/s without redundant transfer • Data transferred at 14.8 Mbyte/s with redundant transfer • Any node on the network can generate an interrupt in any other node on the network or in all network nodes with a single command • Error detection • Redundant transmission mode for suppressing errors • No processor overhead • No processor involvement in the operation of the network • Up to 16 Mbyte of Reflective Memory • A24:A32:D32:D16:D8 memory access • Two-slot 6U VMEbus board • Any node may reset any or all other nodes • Software compatible with VMIVME-5578 • Software-addressable digital output bit (available at front panel and P2 connector) for interfacing with the VMIVME-5599 optical switch board or any accessing an on-board register. In some applications, this user-defined purpose node number would be useful in establishing the function of • Multimode or single-mode fiber-optic or twinax cable options the node. INTRODUCTION — VMIVME-5588 is a In order to achieve an aggregate throughput of high-performance, daisy-chained VME-to-VME network. 29.5 Mbyte/s, nodes capable of writing to the Reflective Data is transferred by writing to on-board global RAM. The Memory network at an aggregate rate of 29.5 Mbyte/s must data is automatically sent to the location in memory on all be present. Note that workstation-to-VME adapters may limit Reflective Memory boards on the network. the data transfer rate between the workstation and the PRODUCT OVERVIEW — The Reflective Memory Reflective Memory network. concept provides a very fast and efficient way of sharing data LINK ARBITRATION — The VMIVME-5588 system across distributed computer systems. is a daisy-chain ring as shown in Figure 1. Each transfer is VMIC’s VMIVME-5588 Reflective Memory interface passed from node-to-node until it has gone all the way around allows data to be shared between up to 256 independent the ring and reaches the originating node. Each node systems (nodes) at rates up to 29.5 Mbyte/s. Each Reflective retransmits all transfers that it receives except those that it Memory board may be configured with 256 Kbyte to originated. Nodes are allowed to insert transfers between 16 Mbyte of on-board SRAM. The local SRAM provides fast transfers passing through. Read access times to stored data. Writes are stored in local INTERRUPT TRANSFERS — In addition to SRAM and broadcast over a high-speed data path to other transferring data between nodes, the VMIVME-5588 will Reflective Memory nodes. The transfer of data between allow any processor in any node to generate an interrupt on nodes is software transparent, so no I/O overhead is required. any other node. These interrupts would generally be used to Transmit and Receive FIFOs buffer data during peak data indicate to the receiving node that new data has been sent and rates to optimize CPU and bus performance to maintain high is ready for processing. These interrupts are also used to data throughput. indicate that processing of old data is completed and the The Reflective Memory also allows interrupts to one or receiving node is ready for new data. more nodes by writing to a byte register. These interrupt Three interrupts are available. The user may define the (three levels, each user definable) signals may be used to function, priority, and vector for each interrupt. Any synchronize a system process, or used to follow any data. The processor can generate an interrupt on any other node on the interrupt always follows the data to ensure the reception of network. In addition, any processor on the network can the data before the interrupt is acknowledged. generate an interrupt on all nodes on the network. Interrupts The VMIVME-5588 requires no initialization unless are generated by simply writing to a VMIVME-5588 register. interrupts are being used. If interrupts are used, vectors and All data and interrupt command transfers contain the interrupt levels must be written to on-board registers and the node number of the node that originated the transfer. This interrupts enabled. information is used primarily so the originating node can Each node on the system has a unique identification remove the transfer from the network after the transfer has number between 0 and 255. The node number is established traversed the ring. The node identification is also used by during hardware system integration by placement of jumpers nodes receiving interrupt commands. When a node receives on the board. This node number can be read by software by an interrupt command for itself, it places the identification VMIC • 12090 South Memorial Parkway • Huntsville, Alabama 35803-3308 1 VME Microsystems Intl. Corp. 12090 South Memorial Parkway, Huntsville, AL 35803-3308 USA VMIVME-5588 number of the originating node in a FIFO. Up to 512 interrupts can be stacked in the FIFO. During the interrupt service routine, the identification of the interrupting node can Ordering Options be read from the FIFO. June 16, 1999 800-005588-000 D ABC – D E F ERROR MANAGEMENT — Errors are detected by the VMIVME-5588 – – VMIVME-5588 with the use of the error detection facilities A = Memory Options 0 = 256 Kbyte of the Fiber Channel encoder/decoder and additional 1 = 512 Kbyte interlaced parity encoding and checking. The error rate of the 2 = 1 Mbyte VMIVME-5588 is a function of the rate of errors produced in 3 = 2 Mbyte 4 = 4 Mbyte the cable portion of the system. This optical error rate 5 = 8 Mbyte depends on the length and type of fiber-optic cable. Assuming 6 = 16 Mbyte -12 B = FIFO Option an optical error rate of 10 , the error rate of the 0 = 512 Transfer FIFO -10 VMIVME-5588 is 1.3 x 10 transfers/transfer. 1 = 4 Kbyte Transfer FIFO C = Transmission Mode Transmit Receive However, the rate of undetectable errors is less than 0 = mm Fiber mm Fiber -20 1.64 x 10 transfers/transfer. When a node detects an error, 1 = Reserved the erroneous transfer is removed from the system and a 2 = sm Fiber sm Fiber 3 = mm Fiber sm Fiber VMEbus interrupt is generated, if enabled. 4 = sm Fiber mm Fiber 5 = Twinax Twinax The VMIVME-5588 can be operated in a redundant 6 = Twinax mm Fiber 7 = Twinax sm Fiber transfer mode in which each transfer is transmitted twice. In 8 = mm Fiber Twinax this mode of operation, the first of the two transfers is used 9 = sm Fiber Twinax unless an error is detected in which case the second transfer Multimode Fiber-Optic Cable Assemblies is used. In the event that an error is detected in both transfers, ABC – D E F the node removes the transfer from the system. The VMICBL-000-F3 –0 – probability of both transfers containing an error is 1.64 x A = Fiber-Optic Connector Type -20 10 , or about one error every 317,855 years at maximum 0 = Ceramic Ferrule ST Connector 1 = Stainless Steel Ferrule ST Connector data rate. BC = Cable Lengths 00 = Not Used PROTECTION AGAINST LOST DATA — Data 01 = 5 ft (1.5 m) received by the node from the fiber-optic cable is error 02 = 25 ft (7.6 m) 03 = 50 ft (15.2 m) checked and placed in a receive FIFO. Arbitration with 04 = 100 ft (30.4 m) accesses from the VMEbus then takes place and the data is 05 = 150 ft (45.7 m) 06 = 200 ft (60.9 m) written to the node’s SRAM and to the node’s transmit FIFO. 07 = 350 ft (106.7 m) Data written to the board from the VMEbus is placed directly 08 = 500 ft (152.4 m) 09 = 1,000 ft (304.8 m) into SRAM and into the transmit FIFO. Data in the transmit Twinax Cable Assemblies FIFO is transmitted by the node over the cable to the next node. Data could be lost if either FIFO were allowed to ABC – D E F become full. VMICBL-001-33 –0 – A = 0 (Option reserved for future use) The product is designed to prevent either FIFO from BC = Cable Lengths 00 = Not Used becoming full and overflowing. It is important to note the 01 = 0.5 m only way that data can start to accumulate in FIFOs is for data 02 = 1 m to enter the node at a rate greater than 29.5 Mbyte/s or 03 = 3 m 04 = 5 m 14.8 Mbyte/s in redundant mode. Since data can enter from 05 = 7 m the fiber and from the VMEbus, it is possible to exceed these 06 = 10 m 07 = 15 m rates. If the transmit FIFO becomes half-full, a bit in the 08 = 20 m Status Register is set and, if enabled, an interrupt is generated. 09 = 25 m 10 = 30 m This is an indication to the node’s software that subsequent For Ordering Information, Call: WRITEs to the Reflective Memory should be suspended until 1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859 the FIFO is less than half-full. If the half-full indication is E-mail: info@vmic.com Web Address: www.vmic.com ignored and the transmit FIFO becomes full, then writes to Copyright © July 1993 by VMIC Specifications subject to change without notice. the Reflective Memory will not be acknowledged until access is granted or the CPU times out with a Bus Error. 2 For Ordering Information, Call: 1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859 VMIVME-5588 If the transmit FIFO is allowed to become over half-full, Addressable on 8 Mbyte boundaries for 8 Mbyte option there is a danger the receiver FIFO may overflow resulting in Addressable on 16 Mbyte boundaries for 16 Mbyte data loss. In order to prevent this situation, a VMEbus throttle option mode will become active when the transmitter is over half-full. Instead of a 200 ns VMEbus response time, the INTERCONNECTION VMEbus response time extends to 3.2 ms per access to allow the receiver time to move data from the receive FIFO to the Cable Requirements: Two fiber-optic or twinax transmit FIFO. cables If the receive FIFO becomes over half-full, VME access Configuration: Daisy-chain ring up to 256 nodes is held off until the receive FIFO is less than half-full. Power Requirements: 5.0 A maximum at +5 VDC NETWORK MONITOR — There is a bit in a Status Register that can be used to verify that data is traversing the CABLES ring (that is, the ring is not broken). This can also be used to measure network latency. VMIC offers the following cable assemblies that are compatible with the VMIVME-5588. VMIC offers multimode fiber-optic cables and twinax cables. VMIC does not offer single-mode fiber-optic cables. Multimode Fiber Cable: ST connectors SPECIFICATIONS 1,000 feet maximum Memory Size: 256 Kbyte, 512 Kbyte, 1 Mbyte, 62.5 micron core 2 Mbyte, 4 Mbyte, 8 Mbyte, or 16 Mbyte 10 dB maximum attenuation between nodes Wavelength = 860 nm Access Time: 100 ns Write 400 ns Read (worst-case arbitration) Twinax Cable: 200 ns Read (best-case arbitration) 9-pin D-type connector Equalized, 30 m maximum VME Cycle Time: 200 ns Write (20 Mbyte/s) 320 ns Read (12.5 Mbyte/s) (best-case arbitration) The VMIVME-5588 is compatible with single-mode 520 ns Read (7.7 Mbyte/s) (worst-case arbitration) fiber with SC connectors and a maximum of 10 km. VMIC does not supply single-mode fiber cable. TRANSFER SPECIFICATION Transfer Rate: 29.5 Mbyte/s (longword accesses) PHYSICAL/ENVIRONMENTAL without redundant transfer Temperature Range: 0 to 65 °C, operating with forced 14.8 Mbyte/s (longword accesses) with redundant air cooling. -40 to 85 °C, storage. transfer COMPATIBILITY Relative Humidity: 20 to 80 percent, noncondensing VMEbus: This product complies with the VMEbus MTBF: 88,005 hours (217F) specification (ANSI/IEEE STD 1014-1987, IEC 821 and 297), with the following mnemonics: DATA TRANSFERS A32:A24:D32/D16/D08 (EO): Slave: 39/3D:09/0D Form factor: 6U Data written into the Reflective Memory is broadcast to all nodes on the network without further involvement of Memory: Addressable on 256 Kbyte boundaries for the sending or receiving nodes. Data is transferred from 256 Kbyte memory option memory locations on the sending nodes to corresponding memory locations on the receiving nodes. Addressable on 512 Kbyte boundaries for 512 Kbyte memory option A functional block diagram of the VMIVME-5588 is shown in Figure 2. Addressable on 1 Mbyte boundary for 1 Mbyte memory option TRADEMARKS Addressable on 2 Mbyte boundaries for 2 Mbyte option The VMIC logo is a registered trademark of VMIC. Other Addressable on 4 Mbyte boundaries for 4 Mbyte option registered trademarks are the property of their respective owners. VMIC • 12090 South Memorial Parkway • Huntsville, Alabama 35803-3308 3 VME Microsystems Intl. Corp. 12090 South Memorial Parkway, Huntsville, AL 35803-3308 USA VMIVME-5588 C 5 P 5 U 8 VMEbus CHASSIS 8 WITH CPU AND NODE 0 VMIVME-5588 VME COMPUTER Nodes can be VMEbus-based computers or computers with 5 VMEbus I/O channels, such as NODE 1 5 Sun, Harris Night Hawk, 8 Concurrent, Silicon Graphics, 8 Data General, Motorola Delta Series, Encore 91 Series, any VMEbus Chassis, etc. PCI bus NODE 255 WORKSTATION PCI bus CHASSIS Up to 1,000 ft Between Nodes Figure 1. Network Example Using Reflective Memory System CABLE CABLE REC'D TX RECEIVER TRANSMITTER ENDEC 4 Kbyte/ 4 Kbyte/ INT1 512 DEEP 512 DEEP BIM 7 LINES IN FIFO OUT FIFO • INT • INT7 CTRL 5 LINES CTRL CTRL IACK ADDR BIM CTRL IACK* CS FIFO/RCV CTRL 17 IACK IN* RAM CTRL VMEbus WR IACK OUT* DECODE LOGIC RAM CONTROL AND CONTROL SIGNALS SELECT LINES ADDR LATCH 31 LINES VME ADDR A1 TO A31 16 Mbyte RAM MAXIMUM 22 LINES ENABLE/DIR 32 LINES VME VME 32 LINES DATA BUS DATA D31 TO D0 BUS BUFFER Figure 2. VMIVME-5588 Functional Block Diagram 4 For Ordering Information, Call: 1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859