VMIVME-5576 Fiber-Optic Reţective Memory with Interrupts • High-speed, easy-to-use Ţber-optic network (170 Mbaud serially) • Data written to memory in one node is also written to memory in all nodes on the network • Up to 2,000 m between nodes and up to 256 nodes • Data transferred at 6.2 Mbyte/s without redundant transfer • Data transferred at 3.2 Mbyte/s with redundant transfer • Any node on the network can generate an interrupt in any other node on the network or in all network nodes with a single command • Error detection • Redundant transmission mode for suppressing errors • No processor overhead • No processor involvement in the operation of the network • Up to 1 Mbyte of Reţective Memory • A24:A32:D32:D16:D8 memory access • Single 6U VMEbus board INTRODUCTION — VMIVME-5576 is a high-performance, multidrop VME-to-VME network. Data is transferred by writing to on-board global RAM. The data is automatically sent to the location in memory on all Reflective Memory boards on the network. Ordering Options July 29, 1999 800-005576-000 E ABC – D E F PRODUCT OVERVIEW — The Reflective Memory VMIVME-5576 –0– concept provides a very fast and efficient way of sharing data A = Memory Options across distributed computer systems. 0 = 256 Kbyte 1 = 512 Kbyte VMIC’s VMIVME-5576 Reflective Memory interface 2 = 1 Mbyte allows data to be shared between up to 256 independent B = FIFO Options 0 = 512 Transfer FIFO systems (nodes) at rates up to 6.2 Mbyte/s. Each Reflective 1 = 4 k Transfer FIFO Memory board may be configured with 256 Kbyte to 1 Mbyte C = 0 (Option reserved for future use) of on-board SRAM. The local SRAM provides fast Read Connector Data access times to stored data. Writes are stored in local SRAM Compatible Connector ST Connector PC Board Fiber-Optic Fiber-Optic Receiver HFBR-2100 and broadcast over a high-speed fiber-optic data path to other Transmitter/Receiver (Hewlett-Packard) Reflective Memory nodes. The transfer of data between nodes Fiber-Optic Transmitter HFBR-1100 (Hewlett-Packard) is software transparent, so no I/O overhead is required. Cable Specification Transmit and Receive FIFOs buffer data during peak data Fiber-Optic Cable - Multimode; 62.5 Micron core. rates to optimize CPU and bus performance to maintain high Transmitters operate at 1,300 nm at 170 Mbaud. Maximum attenuation between nodes is 9 dB. data throughput. Minimum attenuation between nodes is .5 dB. Fiber-Optic Cable Assemblies ABC – D E F The Reflective Memory also allows interrupts to one or VMICBL-000-F3 – – more nodes by writing to a byte register. These interrupt (three A = Fiber-Optic Connector Type level, user definable) signals may be used to synchronize a 0 = Ceramic Ferrule ST Connector system process, or used to follow any data that may have 1 = Stainless Steel Ferrule ST Connector B = Cable Lengths preceded it. The interrupt always follows the data to ensure the 00 = Not Used 09 = 1,000 ft (304.8 m) reception of the data before the interrupt is acknowledged. 01 = 5 ft (1.5 m) 10 = 1,500 ft (457.3 m) 02 = 25 ft (7.6 m) 11 = 2,000 ft (609.7 m) The VMIVME-5576 requires no initialization unless 03 = 50 ft (15.2 m) 12 = 2,460 ft (750.0 m) 04 = 100 ft (30.4 m) 13 = 3,280 ft (1,000 m) interrupts are being used. If interrupts are used, vectors and 05 = 150 ft (45.7 m) 14 = 4,100 ft (1,250 m) interrupt levels must be written to on-board registers and the 06 = 200 ft (60.9 m) 15 = 4,920 ft (1,500 m) 07 = 350 ft (106.7 m) 16 = 5,740 ft (1,750 m) interrupts armed. 08 = 500 ft (152.4 m) 17 = 6,560 ft (2,000 m) Note Each node on the system has a unique identification VMIC offers single fiber cable assemblies that are compatible with the VMIVME-5576 in number between 0 and 255. The node number is established length ranging from 1.5 to 2,000 m. These cable assemblies are U.L./NEC-rated OFNP and during hardware system integration by placement of jumpers have a 2.5 mm ST-style bayonet connector on each end. on the board. This node number can be read by software by For Ordering Information, Call: 1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859 accessing an on-board register. In some applications, this node E-mail: info@vmic.com Web Address: www.vmic.com number would be useful in establishing the function of the Copyright © April 1990 by VMIC Specifications subject to change without notice. node. VMIC ¥ 12090 South Memorial Parkway ¥ Huntsville, Alabama 35803-3308 1 VMIVME-5576 LINK ARBITRATION — The VMIVME-5576 system is used. In the event that an error is detected in both transfers, is a fiber-optic daisy chain ring as shown in Figure 2. Each the node removes the transfer from the system. The -20 transfer is passed from node to node until it has gone all the probability of both transfers containing an error is 10 , or way around the ring and reaches the originating node. Each about one error every 372,000 years at maximum data rate. node retransmits all transfers that it receives except those that PROTECTION AGAINST LOST DATA — Data it had originated. Nodes are allowed to insert transfers received by the node from the fiber-optic cable is error between transfers passing through. checked and placed in a receive FIFO. Arbitration with INTERRUPT TRANSFERS — In addition to accesses from the VMEbus then takes place and the data is transferring data between nodes, the VMIVME-5576 will written to the node’s SRAM and to the node’s transmit FIFO. allow any processor in any node to generate an interrupt on Data written to the board from the VMEbus is placed directly any other node. These interrupts would generally be used to into SRAM and into the transmit FIFO. Data in the transmit indicate to the receiving node that new data has been sent and FIFO is transmitted by the node over the fiber-optic cable to is ready for processing. These interrupts are also used to the next node. Data could be lost if either FIFO were allowed indicate that processing of old data is completed and the to become full. receiving node is ready for new data. The product is designed to prevent either FIFO becoming Three interrupts are available. The user may define the full and overflowing. It is important to note the only way that function, priority, and vector for each interrupt. Any data can start to accumulate in FIFOs is for data to enter the processor can generate an interrupt on any other node on the node at a rate greater than 6.2 or 3.2 Mbyte/s in redundant network. In addition, any processor on the network can mode. Since data can enter from the fiber and from the generate an interrupt on all nodes on the network. Interrupts VMEbus, it is possible to exceed these rates. If the transmit are generated by simply writing to a single VMIVME-5576 FIFO becomes half-full, a bit in the Status Register is set and, register. if armed, an interrupt is generated. This condition is an indication to the software in the node that writes to the All data and interrupt command transfers contain the Reflective Memory should be suspended until the FIFO node number of the node that originated the transfer. This becomes less than half-full. If the half-full indication is information is used primarily so the originating node can ignored and the transmit FIFO becomes full, then writes to the remove the transfer from the network after the transfer has Reflective Memory will be acknowledged with a bus error. traversed the ring. The node identification is also used by With VMEbus writes being blocked by the bus error, data nodes receiving interrupt commands. When a node receives cannot overflow in the receive FIFO. an interrupt command for itself, it places the identification number of the originating node in a FIFO. Up to 512 NETWORK MONITOR — There is a bit in a Status interrupts can be stacked in the FIFO. During the interrupt Register that can be used to verify that data is traversing the service routine, the identification of the interrupting node can ring (that is, the ring is not broken). This can also be used to be read from the FIFO. measure network latency. ERROR MANAGEMENT — Errors are detected by SPECIFICATIONS the VMIVME-5576 with the use of the error detection Memory Size: 256 Kbyte, 512 Kbyte, or 1 Mbyte facilities of the TAXI chipset and additional parity encoding and checking. The error rate of the VMIVME-5576 is a Access Time: function of the rate of errors produced in the optical portion 400 ns (worst-case arbitration) of the system. This optical error rate depends on the length 200 ns (best-case arbitration) and type of fiber-optic cable. TRANSFER SPECIFICATION -12 Assuming an optical error rate of 10 , the error rate of Transfer Rate: -10 the VMIVME-5576 is 10 transfers/transfer. However, the 6.2 Mbyte/s (longword accesses) without redundant -20 rate of undetectable errors is less than 10 transfers/transfer. transfer When a node detects an error, the erroneous transfer is 3.2 Mbyte/s (longword accesses) with redundant transfer removed from the system and a VMEbus interrupt is COMPATIBILITY generated, if armed. VMEbus: This product complies with the VMEbus The VMIVME-5576 can be operated in a redundant specification (ANSI/IEEE STD 1014-1987, IEC 821 and transfer mode in which each transfer is transmitted twice. In 297), with the following mnemonics: this mode of operation, the first of the two transfers is used A32: A24: D32/D16/D08 (EO): Slave: 39/3D:09/0D unless an error is detected in which case the second transfer Form factor: 6U 2 For Ordering Information, Call: 1-800-322-3616 or 1-256-880-0444 ¥ FAX (256) 882-0859 VMIVME-5576 Memory: Addressable on 256 Kbyte boundaries for DATA TRANSFERS 256 Kbyte memory option Data written into the Reflective Memory is broadcast to Addressable on 512 Kbyte boundaries for 512 Kbyte all nodes on the network without further involvement of the memory option sending or receiving nodes. Data is transferred from memory locations on the sending nodes to corresponding memory Addressable on 1 Mbyte boundary for 1 Mbyte memory locations on the receiving nodes. option A functional block diagram of the VMIVME-5576 is INTERCONNECTION shown in Figure 1. Cable Requirements: Two fiber-optic cables TRADEMARKS Cable Length: 2,000 m maximum between nodes The VMIC logo is a registered trademark of VMIC. Configuration: Daisy chain ring up to 256 nodes Other registered trademarks are the property of their respective owners. PHYSICAL/ENVIRONMENTAL Temperature Range: 0 to 55 °C, operating -40 to 85 °C, storage Relative Humidity: 20 to 80 percent, noncondensing Power Requirements: 5.0 A maximum at +5 VDC MTBF: 142,400 hours (217F) FIBER-OPTIC FIBER-OPTIC CABLE CABLE FO REC'D FO TX TAXI CHIP TAXI CHIP 4 Kbyte 4 Kbyte INT1 BIM DEEP IN FIFO DEEP OUT FIFO 7 LINES • • INT CTRL CTRL INT7 5 LINES CTRL IACK ADDR BIM CTRL IACK* FIFO/RCV CTRL CS 17 IACK IN* RAM CTRL LOGIC WR VMEbus DECODE AND IACK OUT* CONTROL SIGNALS CONTROL ADDR LATCH RAM VME ADDR A1 TO A31 SELECT LINES 31 LINES (256 Kbyte x 8) 22 LINES VME ENABLE/DIR DATA BUS 32 LINES VME DATA BUS D31 TO D0 32 LINES BUFFER 1 Mbyte TOTAL RAM Figure 1. VMIVME-5576 Functional Block Diagram VMIC ¥ 12090 South Memorial Parkway ¥ Huntsville, Alabama 35803-3308 3 VMIVME-5576 Host Chassis Host Board PMC 5576XL NODE 0 5 C P 5 U 7 VMEbus chassis 6 with CPU and NODE 1 VMIVME-5576 C 5 P 5 U 7 Multibus chassis 6 with CPU and NODE 2 VMIMB1-5576 5 VME Computer 5 Nodes can be VMEbus-based 7 6 computers or computers with VMEbus I/O channels such as NODE 3 Sun, Harris Night Hawk, Concurrent, Silicon Graphics, Data General, Motorola Delta Series, Encore 91 Series, any VMEbus chassis, etc. PCI bus NODE 255 WORKSTATION PCI bus chassis UP TO 2,000 m with VMIPCI-5576 BETWEEN NODES Figure 2. Network Example Using Reflective Memory System 4 For Ordering Information, Call: 1-800-322-3616 or 1-256-880-0444 ¥ FAX (256) 882-0859