10/26/2009 16:20 PD2-MF PowerDAQ II PCI Multifunction Boards .................................................................................................................................................................. • 16/64 single-ended or 8/32 differential A/D channels • 150 kS/s − 2.2 MS/s sampling rate • 12-, 14-, 16-bit resolution • Gains 1,10,100,1000 or 1,2,4,8 • Two 12-bit analog outputs; 32 digital I/O lines; three 16-bit counter/timers • Simultaneous operation of all subsystems • Stream-to-disk capability (PD2-MF-64-2M/14H Shown) • Multiple boards operate in one PC • Full PCI-bus implementation Supports UEIDaq Framework Data Acquisition Software Library for Windows. Linux and QNX drivers available. Visit our website for more details. General Description: When you know you’ll be setting up a stimulus/response test, when you know you’ll be implementing a closed-loop system or if you just want to be ready for any kind of testing situation, a multifunction board is the logical choice. Our PD2-MF Series boards pack everything you’ll likely need: as many as 64 single-ended/32 differential analog inputs running at speeds to 2.2 MS/s, dual analog outputs, 32 digital I/O lines plus three counter/timers available to users. To allow all these I/O subsystems to run simultaneously without loading down the host CPU, MF Series cards run under control of a Motorola DSP. Thus you can collect analog samples while generating waveforms yet have the resources to perform digital I/O and run the counter/ timers – all at the same time. Operating in this fashion presents no constraints on setup parameters, either: a custom PGIA (programmable-gain instrumentation amplifier) design runs any or all channels at different gains without the need to trade off peak throughput rate or accuracy. Block Diagram: We supply a complete set of drivers for all popular programming languages and third-party applications including LabVIEW and Agilent VEE -- and at no additional charge! The support package also comes with example programs, complete with source code, that are so extensive that some of them might be enough to solve your problem straight out of the box. To achieve optimum performance under Windows, we wrote the boards’ 32-bit driver from scratch without relying on any legacy code. This advanced protocol-based driver works with shareable buffers in system RAM and makes obsolete traditional register- based drivers and double-buffering schemes. MF Series boards can stream data to disk continuously, gapfree, at the hardware?s peak acquisition rates! United Electronic Industries, Inc. 1 http://www.ueidaq.com Tel: (781) 821-2890 Fax: (781) 821-2891 PowerDAQ II Multifunction Boards Technical Specifications: Model: PD2-MFS-xx- 2M/14H 1M/12x 500/16x 400/16x 333/16x 150/16x 14 bits 12 bits 16 bits 14 bits 16 bits 16 bits Resolution 16 or 64 16 Number of Channels Single- 8 or 32 8 Ended Differential Maximum Sampling Rate 2.2 MS/s 1 MS/s 800 kS/s 500 kS/s 500 kS/s 300 kS/s (multiple channels) 4k samples 2k samples 1k samples Onboard FIFO Size (upgradeable to 16k, 32k, 64k) 0-5 V, ±5 V, 0-5 V, 0-10 V Input Ranges 0-8 V, ±8 V @ ±5 V, ±10 V 10 V ranges (software selectable) 256 entries Channel-Gain List H=1, 2, 4, 8 L=1,10,100,1000 Programmable Gains (by channel) H=1, 2, 4, 8 Drift ±30 µV/°C Zero Gain ±30 ppm/°C 10 MΩ Input Impedance ±20 nA Input Bias Current ±20V,2000V ESD ±35V cont. Input Overvoltage 10 mA max A/D Conversion Time 0.45 µs 0.8 µs 2 µs 2.5 µs 2.0 µs 6 µs 0.37 µs 0.6 µs 1.2 µs 2.0 µs 1.2 µs 5 µs A/D Settling Time DC Accuracy ±2 LSB ±0.5 LSB ±1 LSB ±0.5 LSB ±1 LSB ±1 LSB Nonlinearity (no missing codes) 1.2 LSB 0.3 LSB 1.3 LSB 0.8 LSB 1.3 LSB 1.2 LSB System Noise AC Accuracy 12.2 11.63 14.5 13.1 14.5 14.8 Effective Number of Bits 76 dB 71.8 dB 88 dB 81 dB 89 dB 91 dB Total Harmonic Distortion + Nonliearity + Noise Channel Crosstalk -80 dB @ 1 kS/s Clocking and Trigger Input 2200 kS/s @ 1 ch, 1250 kS/s 500 kS/s 400 kS/s 333 kS/s 150 kS/s Maximum A/D Pacer Clock 1800 kS/s @ all 2200 kS/s @ 1 ch, 1250 kS/s External A/D Sample Clock 500 kS/s 400 kS/s 333 kS/s 150 kS/s 1800 kS/s @ all Maximum Frequency 20 ns Minimum Pulse Width External Digital (TTL)Trigger High-level Input Voltage 2.0V min 0.8V min Low-level Input Voltage 20 ns Minimum Pulse Width 2 United Electronic Industries, Inc. http://www.ueidaq.com Tel: (781) 821-2890 Fax: (781) 821-2891 PowerDAQ II Multifunction Boards Pinout Diagrams: J1 J1 AIN1 Return 48 96 AIN0 Return AIN9 48 96 AIN8 AGND AIN2 Return AGND AIN10 47 95 47 95 AIN4 Return 46 94 AIN3 Return AIN12 46 94 AIN11 AIN6 Return 45 93 AIN5 Return AIN14 45 93 AIN13 AIN16 Return 44 92 AIN7 Return AIN24 44 92 AIN15 AIN17 Return 43 91 AGND AIN25 43 91 AGND AIN19 Return 42 90 AIN18 Return AIN27 42 90 AGND AIN21 Return 41 89 AIN20 Return AIN29 41 89 AIN26 AGND 40 88 AIN22 Return AGND 40 88 AIN28 AIN32 Return 39 87 AIN23 Return AIN40 39 87 AIN30 AIN34 Return 38 86 AIN33 Return AIN42 38 86 AIN31 AIN36 Return 37 85 AIN35 Return AIN44 37 85 AIN41 AGND 36 84 AIN37 Return AGND 36 84 AIN45 AIN39 Return 35 83 AIN38 Return AIN47 35 83 AIN46 AIN49 Return 34 82 AIN48 Return AIN57 34 82 AIN56 AIN51 Return 33 81 AIN50 Return AIN59 33 81 AIN58 AIN52 Return 32 80 AGND AIN60 32 80 AGND AIN54 Return 31 79 AIN53 Return AIN62 31 79 AIN61 ADC Channel List Start Input/ Burst Clock 30 78 AIN55 Return ADC Channel List Start Input/ Burst Clock 30 78 AIN63 AGND 29 77 N/C AGND 29 77 N/C 76 N/C 28 76 AGND N/C 28 AGND ADC Conversion Start Out/ Pacer Clock Out 27 75 ADC Conversion Start Input/ Pacer Clock ADC Conversion Start Out/ Pacer Clock Out 27 75 ADC Conversion Start Input/ Pacer Clock DSP Trigger Input/AO External Clock 26 74 +5V (100 mA max) DSP Trigger Input/AO External Clock 26 74 +5V (100 mA max) AGND 25 73 AGND AGND 25 73 AGND AIN1 24 72 AIN0 AIN1 24 72 AIN0 AIN3 23 71 AIN2 AIN3 23 71 AIN2 AIN5 22 70 AIN4 AIN5 22 70 AIN4 AIN6 21 69 AGND AIN6 21 69 AGND AIN16 20 68 AIN7 AIN16 20 68 AIN7 AIN18 19 67 AIN17 AIN18 19 67 AIN17 AGND 18 66 AIN19 AGND 18 66 AIN19 AIN21 17 65 AIN20 AIN21 17 65 AIN20 J4 J2 AIN23 16 64 AIN22 AIN23 16 64 AIN22 AIN33 15 63 AIN32 AIN33 15 63 AIN32 AIN34 14 62 AGND AIN34 14 62 AGND DGND 1 2 DGND CTR0-IN 1 2 CTR2-IN DGND 3 4 DGND CTR0-OUT 3 4 CTR2-OUT AIN36 13 61 AIN35 AIN36 13 61 AIN35 AIN38 12 60 AIN37 AIN38 12 60 AIN37 DGND 5 6 DGND CTR0-GATE 5 6 CTR2-GATE AGND 11 59 AIN39 AGND 11 59 AIN48 DGND 7 8 DGND CTR1-IN 7 8 CTR1-GATE AIN49 10 58 AIN48 AIN49 10 58 AIN50 DGND 9 10 +5 V (100 mA max) CTR1-OUT 9 10 +5 V (100 mA max) DGND DIN8 11 12 DGND DIN0 11 12 DGND AIN51 9 57 AIN50 AIN51 9 57 AIN50 AIN53 8 56 AIN52 AIN53 8 56 AIN52 DGND DIN9 13 14 DOUT8 DIN1 13 14 DOUT0 DGND AIN55 7 55 AIN54 AIN55 7 55 AIN54 DIN10 15 16 DOUT9 DIN2 15 16 DOUT1 DGND AGND 6 54 AGND AGND 6 54 AGND DIN11 17 18 DOUT10 DIN3 17 18 DOUT2 2 4 6 8 DIN12 19 20 DOUT11 DIN4 19 20 DOUT3 DGND 5 53 AGND DGND 5 53 AGND AGND 4 52 AOUT1 AGND 4 52 AOUT1 J6 DIN13 21 22 DOUT12 DIN5 21 22 DOUT4 AGND 3 51 AGND AGND 3 51 AGND DIN14 23 24 DOUT13 DIN6 23 24 DOUT5 AGND 2 50 AOUT0 AGND 2 50 AOUT0 DIN15 25 26 DOUT14 DIN7 25 26 DOUT6 DGND 27 28 DOUT15 Burst Clock /ADC Channel List Start Input 27 28 DOUT7 AGND 1 49 AGND AGND 1 49 AGND 1 3 5 7 DGND 29 30 DGND DSP Trigger Input/AO External Clock 29 30 DGND CV_START_OUT DGND 31 32 DGND Pacer Clock / ADC Conversion Start Input 31 32 ADC Conversion Start Output/ Pacer Clock Cl_START_OUT CV_START_IN DGND 33 34 DGND DGND 33 34 DGND DGND 35 36 DGND Burst Clock / ADC Channel List Start Output 35 36 Channel List Done Output CL_START_IN Analog Connector Analog Connector Synchronization Digital Connector Digital Connector (male | differential mode) (male | single-ended mode) (male) (male) (male) Connection Schemes: Connector Cable Target Description On The Board Required Panel Carries analog output lines to 16-channel terminal panel J1 PD-CBL-96 PD2-AO-STP-16 J2 PD-CBL-37 PD2-AO-STP-16 Carries 8 digital input and 8 digital output lines to 16-channel terminal panel J1 PD-CBL-96 PD-BNC-64* Carries analog output lines to 64-channel BNC terminal panel Carries 8 digital input and 8 digital output lines to 64-channel BNC terminal panel J2 PD-CBL-37 PD-BNC-64 J2 PD-CBL-3650-8/8 PD2-DIO-BPLANE16 Carries digital lines to digital isolation panel for adding relays to the DIO lines J1 PD-CBL-96 PD-AO-AMP-100 Amplifies analog outputs to ±100V per channel Amplifies analog outputs to ±115V per channel J1 PD-CBL-96 PD-AO-AMP-115 * PD-BNC-64 was initially designed for analog input subsytem of UEI’s multifunction boards. Thus the analog output signals transfered via PD-CBL-96 will not match the signal designations on PD-BNC-64’s J1 connector. See PowerDAQ Analog Output Manual for more details and remapping diagram. 3 United Electronic Industries, Inc. http://www.ueidaq.com Tel: (781) 821-2890 Fax: (781) 821-2891 PowerDAQ II Multifunction Boards Specifications: (PD2-MF-all models) Digital I/O Analog Outputs Input Bits 16 Number of channels 2 (8 can generate IRQ) Resolution 12 bits Output Bits 16 Update Rate 200 kS/s each Inputs Onboard FIFO Size 2k samples (on DSP) High-level Input Voltage 2.0 V (min) Analog Output Range ±10 V Low-level Input Voltage 0.8 V (max) Error High-level Input Current 20 µA Gain ±1 LSB Low-level Input Current -20 µA Zero Calibrated to 0 Outputs Current Output ±20 mA max Output Driver High Voltage 2.5 V min, 3.0 V typ Output Impedance 0.3Ω typ Output Driver Low voltage: (I = -32 mA) OH Capacitive Drive Capability 1000 pF 0.55V max (I = 64 mA) OL Nonlinearity ±1 LSB Current Sink -32/64 mA max, Protection Short circuit to analog ground 250 mA per port Power-on Voltage 0 V ±10 mV Pulse Width 20 ns min, interrupt bit latched on rising, falling or Setting Time to 0.01% of FSR 10 µs, 20 V step either edge 1 µs, 100 mV step Power-on Voltage Logic Zero Slew Rate 30 V/µs Counter/Timer General Specifications Number of channels 3 available to user Power Requirements +5V or +3.3V (Intel 82C54) Physical Dimensions 10.5 x 3.8" (262 x 98 mm) Resolution 16 bits on each counter Environmental Clock Inputs Operating Temperature Range 0 to 70 °C Software configurable Internal 1 MS/s, External ≤ 10 MS/s Storage Temperature Range -25 to 85 °C Relative Humidity to 95%, noncondensing High-level Input voltage 2.0V min Connector J1 96-pin high-density Fujitsu connector (male) Low-level Input voltage 0.8V max High-level Input current 20 µA (Fujitsu PN#FCN-245P096-G/U) Low-level Input current -20 µA Connector J2 36-pin header connector (male) Gate Inputs (Thomas and Betts PN#609-3627) Maximum Pulse Width 100 ns (High) 100 ns (Low) Connector J4 36-pin header connector (male) Counter Outputs Inverted (Thomas and Betts PN#609-3627) Output Driver High Voltage 2.5V min (I = 24 mA) OH Connector J6 8-pin male connector Output Driver Low Voltage 0.55V max (I = 48 mA) OH (Adam-Tech PN#PH2-SMT-8-SGA Ordering Guide: Part Number Description PD2-MF-16-2M/14H 2.2 MS/s, 14-bit, 16SE/8DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 digital I/O PD2-MF-64-2M/14H 2.2 MS/s, 14-bit, 64SE/32DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 digital I/O PD2-MF-16-1M/12L 1.25 MS/s, 12-bit, 16SE/8DI A/D, gains: 1,10,100,1000; two 12-bit D/As; 3 counter/timers; 32 digital I/O PD2-MF-16-1M/12H 1.25 MS/s, 12-bit, 16SE/8DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 Digital I/O PD2-MF-64-1M/12L 1.25 MS/s, 12-bit, 64SE/32DI A/D, gains: 1,10,100,1000; two 12-bit D/As; 3 counter/timers; 32 digital I/O PD2-MF-64-1M/12H 1.25 MS/s, 12-bit, 64SE/32DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 digital I/O PD2-MF-16-500/16L 500 kS/s, 16-bit, 16SE/8DI A/D, gains: 1,10,100,1000; two 12-bit D/As; 3 counter/timers; 32 digital I/O PD2-MF-16-500/16H 500 kS/s, 16-bit, 16SE/8DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 digital I/O PD2-MF-64-500/16L 500 kS/s, 16-bit, 64SE/32DI A/D, gains: 1,10,100,1000; two 12-bit D/As; 3 counter/timers; 32 digital I/O PD2-MF-64-500/16H 500 kS/s, 16-bit, 64SE/32DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 digital I/O PD2-MF-16-400/14L 400 kS/s, 14-bit, 16SE/8DI A/D, gains: 1,10,100,1000; two 12-bit D/As; 3 counter/timers; 32 digital I/O PD2-MF-16-400/14H 400 kS/s, 14-bit, 16SE/8DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 digital I/O PD2-MF-64-400/14L 400 kS/s, 14-bit, 64SE/32DI A/D, gains: 1,10,100,1000; two 12-bit D/As; 3 counter/timers; 32 digital I/O PD2-MF-64-400/14H 400 kS/s, 14-bit, 64SE/32DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 digital I/O PD2-MF-16-333/16L 333 kS/s, 16-bit, 16SE/8DI A/D, gains: 1,10,100,1000; two 12-bit D/As; 3 counter/timers; 32 digital I/O PD2-MF-16-333/16H 333 kS/s, 16-bit, 16SE/8DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 digital I/O PD2-MF-64-333/16L 333 kS/s, 16-bit, 64SE/32DI A/D, gains: 1,10,100,1000; two 12-bit D/As; 3 counter/timers; 32 digital I/O PD2-MF-64-333/16H 333 kS/s, 16-bit, 64SE/32DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 digital I/O PD2-MF-16-150/16L 150 kS/s, 16-bit, 16SE/8DI A/D, gains: 1,10,100,1000; two 12-bit D/As; 3 counter/timers; 32 digital I/O PD2-MF-16-50/16H 150 kS/s, 16-bit, 16SE/8DI A/D, gains: 1,2,4,8; two 12-bit D/As; 3 counter/timers; 32 digital I/O Upgrade FIFO PD-16KFIFO Upgrade 1K FIFO to 16K FIFO PD-32KFIFO Upgrade 1K FIFO to 32K FIFO PD-64KFIFO Upgrade 1K FIFO to 64K FIFO 4 United Electronic Industries, Inc. http://www.ueidaq.com Tel: (781) 821-2890 Fax: (781) 821-2891