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MURATA DTL4A

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Murata DTL4A DC/DC Converter

Part Number

DTL4A

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MURATA

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NYC

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Datasheet

pdf file

Murata-DTL4A-datasheet1-634119033.pdf

107 KiB

Extracted Text

DTL Series DTL4A Model Digitally Programmable, 10A/150V 100 Watt, Electronic Loads DATEL’s new DTL4A is an optically isolated, digitally programmable, serial-input, Features electronic load. It is essentially a digitally controlled current source that can sink ■12-bit, optically isolated (500Vdc), currents from 0 to 10 Amps, at loading voltages from 2.5 to 150 Volts, up to a maximum CMOS/TTL-compatible serial input power of 100 Watts. The DTL4A is packaged in a thermally ef cient, 2" x 2" x 0.5" ■0-10 Amp output in 2.44mA increments metal package that incorporates an aluminum baseplate with through-hole spacers ■10MΩ minimum output impedance for easy pcb mounting and/or external heat-sink attachment. The DTL4A accepts a serialized, 12-bit, CMOS/TTL-compatible, digital input word ■Output voltage to 150 Volts easily generated by any standard digital I/O card. The DTL4A buffers and then ■Output power to 100 Watts optically isolates (500Vdc) the digital input data before storing it in a register and ■±3mA offset error; ±0.1% gain error presenting it to an on-board, 12-bit, digital-to-analog (D/A) converter. The D/A output ■100µsec full-scale step response drives a near-ideal (10MΩ minimum output impedance), voltage-controlled current source. One LSB (least signi cant bit) of the D/A converter corresponds to a 2.4mA ■Update rates to 20kHz increment (0.024% of 10A) in load current. ■Operate in parallel for higher power The DTL4A features a max. ±3mA offset error and a max. ±0.1% gain error. It ■Miniature, 2" x 2" metal package has an impressive full-scale step response time of 100µsec and can be operated dynamically at update rates up to 20kHz. Powered by a single +5V supply, the DTL4A Applications draws a mere 150mA (maximum). ■Static/dynamic power-supply burn-in While operating in the constant-current mode up to 10 Amps (100W max. power), ■the output compliance voltage of the DTL4A is 2.5 to 150 Volts. Should the output/load Power-supply test and characterization voltage drop below the 2.5V minimum required for proper biasing, an internal monitoring ■Battery capacity testing circuit activates the DTL4A's output Fault line. See DATEL’s DTL2A-LC for compliance ■Current-source testing voltages as low as 0.6V. ■Capacitor discharge testing DTL4A’s and other electronic loads, controller boards, and software from DATEL ■Real-time load simulation are outstanding building-block components for power-supply burn-in and test systems. They are an extremely reliable, cost-effective solution that enables you to quickly con gure impressively accurate systems. INPUT OPTO BUFFERS ISOLATORS CONTROL STROBE (CS) +LOAD +LOAD CLOCK (CLK) AMPLIFIER AND POWER DEVICE DATA 12-BIT LATCH CURRENT UNDER TEST D/A SERIAL DATA INPUT (SDI) SENSOR –LOAD LATCH DATA (LD) –LOAD FAULT UNDERVOLTAGE DETECTION ISOLATED +5V SUPPLY DC/DC GROUND CONVERTER Figure 1. SimpliŢ ed Schematic DTL Series 100 WATT, SERIAL-INPUT ELECTR ONIC LOADS ➀Performance SpeciŢ cations and Ordering Guide Input Output Compliance Resolution Logic Current Resolution Voltage Power Package Model (Bits) Compatibility (Amps) (mA) ➁ (Volts) ➂ (Watts) (Case, Pinout) DTL4A 12 CMOS/TTL ➃ 0-10 2.44 2.5-150 0-100 C24, P31 ➀ Typical at TA = +25°C with nominal +5V supply voltage unless noted. ➁ The smallest increment/decrement in output current is defi ned by one LSB (least signifi cant bit) of the 12-bit digital input word. One LSB is equal to full scale (FS) divided by 4096 which corresponds to 0.0244% of 10A or 2.44mA. ➂ For proper operation, the unit's output/load voltage must remain within this range. Voltages greater than the listed maximum can damage the device. Voltages less than the minimum provide insuffi cient bias for the output stage and will result in unpredictable or no operation. See Output Compliance Voltage and the Fault Line for details. ➃ See Performance/Functional Specifi cations for details. PART NUMBER STRUCTURE MECHANICAL SPECIFICATIONS 2.00 DTL 4 A (50.80) ALUMINUM BASEPLATE DATEL A-Series METAL CASE 0.50 Case C24 Electronic Load High Reliability (12.70) Voltage Range: 4 = 2.5 to 150V 0.060 ±0.002 DIA. 0.040 ±0.002 DIA. (1.524 ±0.051) (1.016 ±0.051) 0.20 MIN 1.800 0.10 (5.08) (45.72) (2.54) 1.640 0.08 (41.66) (2.03) TEMPERATURE DERATIN 8 7 100 6 5 9 90 1.20 2.00 (30.48) 4 1.640 6 EQ. SP. @ (41.66) (50.80) 80 3 10 0.200 (5.08) 2 70 1 11 60 0.40 (10.16) 50 BOTTOM VIEW 0.22 #4-40 CLEAR THRU 40 (5.59) (TYP. 4 PL) 30 I/O Connections 20 Pin Function P31 Pin Function P31 10 1 Fault 7 Control Strobe (CS) 2 Ground 8 –Load 0 10 2030 40 5060 708090 100 3 +5 Volt Supply 9 –Load Baseplate Temperature (°C) 4 Latch Data (LD) 10 +Load 5 Serial Data In (SDI) 11 +Load The horizontal axis of the above chart references the temperature of the DTL4A’s alumi- 6 Clock (CLK) num baseplate. The device can continually dissipate up to 100 Watts if the baseplate is maintained at or below +50°C. At +25°C ambient temperature, with no heat sink or supplemental air fl ow, the DTL4A can reliably dissipate a continuous 10 Watts. Contact DATEL for Heat Sink information. 2 Output Power/Load (Watts) 100 WATT, SERIAL-INPUT ELECTRONIC LOADS DTL4A Model Performance/Functional SpeciŢ cations Typical @ TA = +25°C with nominal +5V supply voltage, unless noted. ➀ The smallest increment/decrement in output current is defi ned by one LSB (least signifi cant bit) of the 12-bit digital input word. One LSB is equal to full scale (FS) divided by 4096 which Digital Inputs/Outputs corresponds to 0.0244% of 10A or 2.44mA. Logic Compatibility (Pins 1, 4-7) CMOS/TTL ➁ For proper operation, the unit's output/load voltage must remain within this range. Voltages greater than the listed maximum can damage the device. Voltages less than the minimum Input Logic Levels: provide insuffi cient bias for the output stage and will result in unpredictable or no operation. Logic "1" +2 Volts, minimum See Output Compliance Voltage and the Fault Line for details. Logic "0" +0.8 Volts, maximum ➂ Offset error is defi ned as the current sunk/sourced by the DTL4A’s output, under any output voltage conditions, when the digital input word is all "0's." Input Logic Loading: ➃ Full scale step (10 Amps) settling to within ±2.44mA of its fi nal value. Logic "1" (IIH @ VIH = 5 Volts) 20µA, maximum ➄ See Temperature Derating. Logic "0" (IIL @ VIL = 0 Volts) –0.6mA, maximum ➅ Applies over all specifi ed ranges/combinations of load voltage/current, operating temperature, Output Logic Levels: and VCC. Logic "1" (@ 150µA) +3.5 Volts, minimum Logic "0" (@ 1.6mA) +0.4 Volts, maximum Absolute Maximum Ratings Timing See Timing Diagram Power Supply Voltage (+VCC, Pin 3) –0.5 to +5.5 Volts Output Digital Input Voltage (Pins 4-7) –0.5 to +5.5 Volts Current: Range 0-10 Amps Output Reverse-Polarity Protection No protection Resolution ➀ 0.024%FS (2.44mA) Output Overvoltage Protection No protection Accuracy ➅ ±1%, maximum Voltage Range ➁ 2.5-150 Volts Output Undervoltage Protection Yes (See Fault Line) Power Range 0-100 Watts Case Temperature +105°C Impedance 10MΩ, minimum Storage Temperature (Ambient) –40 to +125°C Offset Error ➂ ±3mA, maximum Lead Temperature (soldering, 10 sec.) +300°C Gain Error ±0.1%, maximum These are stress ratings. Exposure of devices to any of these conditions may adversely Isolation Voltage: affect long-term reliability. Proper operation under conditions other than those listed in the Digital Inputs/Output to ±Load 500Vdc, minimum Performance/Functional Specifi cations Table is not implied. Any Pin to Case 500Vdc, minimum Isolation Resistance 100MΩ, minimum Dynamic Performance TECHNICAL NOTES Output Slew Rate ±10A/µsec, minimum Output Settling Time ➃ 100µsec Overview Digital Input Update Rate to 20kHz The DTL4A is a digitally programmable, CMOS/TTL-compatible, serial-input Power Requirements current sink. It’s output/load current range is 0 to 10 Amps (in 2.44mA Power Supply Range (+VCC, Pin 3) +4.75-5.25 Volts (+5V nominal) increments), over a compliance voltage range of 2.5 to 150 Volts and an output/ Power Supply Current 110mA typ., 150mA max. load power range of 0 to 100 Watts. The device’s digital I/O coding is straight Environmental binary (see table below). A digital input of all "0’s" forces a load current of 0 Operating Temperature ➄ –40 to +100°C (Case) Amps. A digital input of all "1’s" forces a load current of 9.99756 Amps. Storage Temperature –40 to +125°C (Ambient) In a typical power-supply test or burn-in application, the output pins of the Humidity (Non-condensing) to 95% device under test (DUT) are connected to the DTL4A’s +Load (pins 10 and 11) Altitude Above Sea Level 10,000 feet and –Load (pins 8 and 9) outputs. The DTL4A’s operation is controlled by its Physical four digital input lines (Serial Data In, Clock, Latch Data and Control Strobe). Dimensions 2" x 2" x 0.5" (51 x 51 x 12.7mm) Shielding 6-sided (Connected to pin 2) Serial Input Data Word Load Current (Amps) Case Material Tin-plated steel shell with MSB LSB DTL4A aluminum baseplate 1111 1111 1111 9.9976 Pin Material Brass, solder coated 1100 0000 0000 7.5000 Mounting Holes Through-hole spacers, #4-40 clearance 1000 0000 0000 5.0000 Weight 1.9 ounces (54 grams) 0111 1111 1111 4.9976 0100 0000 0000 2.5000 0010 0000 0000 1.2500 0000 0000 0001 0.0024 0000 0000 0000 0.0000 Mapping of the Serial-Input Data to Load Current 3 DTL Series 100 WATT, SERIAL-INPUT ELECTR ONIC LOADS Initialization Output Compliance Voltage and the Fault Line For proper operation, the DTL4A’s output/load voltage must Preparing the DTL4A to accept new digital data is accomplished by applying always be between 2.5 and 150 Volts. The device cannot be used logic "1's" to Control Strobe (CS, pin 7), Latch Data (LD, pin 4) and Clock to directly load low-voltage, e.g. 1.8V or 2.5V, power components or (CLK, pin 6) with all signals present and stable for a minimum of 1µsec. to simulate a true short circuit (0 Volts). Voltages greater than 150V During this interval, it does not matter whether or not data is present on the can damage the device. Voltages <2.5V will result in insuffi cient Serial Data In (SDI, pin 5) line. biasing of the output current source and consequently unpredict- able or no operation. Accordingly, we have installed an internal Serial Data output/load-voltage monitoring circuit. If the output/load voltage drops below 2.5V and the DTL4A’s output is at risk of becoming Following initialization, the 12-bit digital word representing the desired output disabled, the Fault line activates. current is applied to the SDI pin. The serial data should appear starting with The Fault line is an optically isolated, active-low function with the most signifi cant bit (MSB, bit 1, D11) and ending with the least signifi cant an open-collector output (internal 10kΩ pull-up resistor to +5V). bit (LSB, bit 12, D0). With each data bit present and stable on the SDI line, Under normal conditions, its output is high (logic "1"). Under fault the CLK must be toggled through a low-to-high transition to register that bit. conditions (VOUT < 2.5V), its output drops to a logic "0." There is Twelve rising clock edges, at rates up to 500kHz, are required to clock all 12 no output/load-voltage monitoring circuit for voltages greater than digital bits into the DTL4A’s input register. 150V, and operation above 150V can damage the device. An "offset supply" can be inserted between the DTL4A’s –Load Latching Data and Presenting It to the D/A output (pins 8 and 9) and the power device under test (DUT) After loading the LSB, the serial data word is latched by bringing the Control to "translate" the DTL4A’s 147.5V output/load voltage range. The Strobe (pin 7) high and then toggling the Latch Data pin (pin 4) through a offset supply must have adequate current capabilities and be con- high-low-high sequence. Approximately 100µsec later, the output current will nected with the polarities indicated in Figure 2 below. Under no settle to its fi nal desired value. circumstances should the voltage across the DTL4A’s output be allowed to experience a polarity reversal. Software: C Language If a 5V/20A offset supply is inserted as shown, the range of DUT voltages will be –2.5 to +145 Volts. Such a confi guration The following steps describe a typical timing sequence when using the can be used for true short-circuit testing. A mechanical relay can DTL4A’s 4 digital inputs and a programming language such as C. Using 4 bits be used to short the outputs of the DUT while the offset supply of a typical 8-bit port, assign BIT_0 to the Control Strobe (CS, pin 7), BIT_1 ensures the DTL4A always sees at least 5 Volts across its outputs. to Latch Data (LD, pin 4), BIT_2 to Serial Data In (SDI, pin 5), and BIT_3 to the Clock (CLK, pin 6). 1. Initialize with Control Strobe, Latch Data, and Clock high: 11 +LOAD BIT_0 = 1, BIT_1 = 1, BIT_2 = X (don’t care), BIT_3 = 1 10 + 2. Bring the Control Strobe low. SHORT DTL4A DUT CIRCUIT BIT_0 = 0 RELAY 5V 3. Apply the MSB (D11) of the serial data word to Serial Data In. – + 9 – –LOAD BIT_2 = 0 or 1 8 4. Toggle the Clock high-low-high. BIT_3 = 1 to 0 to 1 Figure 2. An "Offset Supply" Enables 5. Apply D10 of the serial data word to Serial Data In. True Short-Circuit Testing BIT_2 = 0 or 1 6. Toggle the Clock high-low-high. Thermal Considerations BIT_3 = 1 to 0 to 1 The DTL4A can reliably handle 100W loads if its case temperature is 7. Repeat the process for remaining data bits D9 through D0. maintained at or below +50°C. With no heat sinking or auxiliary cooling, the 8. Drive the Control Strobe high. device can only handle loads up to 10 Watts. Please refer to the Temperature BIT_0 = 1 Derating Curve for additional information. DATEL’s Electronic Load Applica- tions Engineers can assist you in developing heat-sink solutions for your 9. Toggle the Latch Data input high-low-high. higher-power DTL4A applications. Please contact us for details. BIT_1 = 1 to 0 to 1. 4 100 WATT, SERIAL-INPUT ELECTRONIC LOADS DTL4A Model tdh SDI D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 tds tin CLK tcss tcl tcsh tch CS tld1 tld2 LD tldw Timing Min. Typ. Max. Units CLK – – 200 kHz tin 1 – – µsec tcl = tch 1 – – µsec tcss 1 – – µsec tcsh 1 – – µsec tld1 2 – – µsec tld2 2 – – µsec tldw 2 – – µsec tds 0.5 – – µsec tdh 0.5 – – µsec Figure 3. DTL4A Timing Diagram 5

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