® ® NEW INNOVATION and EXC ELLE N C E DTL Series DTL2A-LC Model 100 Watt, Digitally Programmable Low-Voltage, Electronic Loads DATEL’s new DTL2A-LC is an optically isolated, digitally programmable, serial- Features input electronic load designed for use in burn-in, characterization and test of today’s � 12-bit, optically isolated (500Vdc), low-voltage power supplies and power components. The DTL2A-LC is essentially a CMOS/TTL-compatible serial input digitally controlled current source that can sink currents from 0 to 20 Amps, at loading � Output load voltages as low as 0.6 Volts voltages as low as 0.6 Volts, up to a maximum power of 100 Watts. � Output current 0-20A in 5mA increments The DTL2A-LC accepts a serialized, 12-bit, CMOS/TTL-compatible, digital input word easily supplied by any standard digital I/O card. The DTL2A-LC optically isolates � Output power to 100 Watts (500Vdc) the digital data, latches it, and presents it to an on-board, 12-bit, digital- � 10MΩ minimum output impedance to-analog (D/A) converter. The D/A output drives a near-ideal (10MΩ min. output � ±10mA offset error; ±0.4% gain error impedance), voltage-controlled current source. One LSB (least signiŢ cant bit) of the � 100µsec full-scale step response D/A corresponds to a 5mA increment (0.025% of 20A) in load current. The DTL2A-LC guarantees a ±10mA max. offset error and a ±0.4% max. gain error. It has an impressive � Operate in parallel for higher power full-scale step response time of 100µsec and can be updated at rates to 20kHz. � Miniature, 2" x 2" metal package The DTL2A-LC operates from a single +5V and draws a mere 150mA. It is housed in a thermally efŢ cient, 2" x 2" x 0.5" metal package that has an aluminum baseplate Applications with through-hole spacers for easy pcb mounting and/or heat-sink attachment. � Static/dynamic power-supply burn-in When operating with constant currents up to 20 Amps, the DTL2A-LC has an � Power-supply test and characterization output compliance voltage of 0.6 to 50 Volts. Should the output/load voltage drop below � the 0.6V minimum required for proper biasing, an internal monitoring circuit activates the Battery capacity testing DTL2A-LC's output Fault line. � Current-source testing DATEL’s electronic loads and their companion controller boards and software are � Capacitor discharge testing outstanding building-block components for power-supply (AC/DC and DC/DC convert- � Real-time load simulation ers) and power-component (diodes, FET’s, etc.) burn-in and test systems. They are an extremely reliable, cost-effective solution that enables you to quickly conŢ gure ţ exible, impressively accurate systems. INPUT OPTO BUFFERS ISOLATORS CONTROL STROBE (CS) +LOAD +LOAD CLOCK (CLK) AMPLIFIER AND POWER DEVICE DATA 12-BIT LATCH CURRENT UNDER TEST D/A SERIAL DATA INPUT (SDI) SENSOR –LOAD LATCH DATA (LD) –LOAD FAULT UNDERVOLTAGE DETECTION ISOLATED +5V SUPPLY DC/DC GROUND CONVERTER Figure 1. SimpliŢ ed Schematic DATEL, Inc., MansŢ eld, MA 02048 (USA) · Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 · Email: sales@datel.com · Internet: www.datel.com DTL Series 100 WATT, LOW- VO LTAGE ELECTRONIC LOADS ➀ Performance SpeciŢ cations and Ordering Guide Input Output Compliance Resolution Logic Current Resolution Voltage Power Package Model (Bits) Compatibility (Amps) (mA) ➁ (Volts) ➂ (Watts) (Case, Pinout) DTL2A-LC 12 CMOS/TTL ➃ 0-20 5 0.6-50 0-100 C24, P31 ➀ Typical at TA = +25°C with nominal +5V supply voltage unless noted. ➁ The smallest increment/decrement in output current is deŢ ned by one LSB (least signiŢ cant bit) of the 12-bit digital input word. One LSB is equal to full scale (FS) divided by 4096 which corresponds to 0.0244% of 20A or 4.88mA. ➂ For proper operation, the unit's output/load voltage must remain within this range. Voltages greater than the listed maximum can damage the device. Voltages less than the minimum provide insufŢ cient bias for the output stage and will result in unpredictable or no operation. See Output Compliance Voltage and the Fault Line for details. ➃ See Performance/Functional SpeciŢ cations for details. PA RT NUMBER STRUCTURE MECHANICAL SPECIFICATIONS 2.00 DTL 2 A - LC (50.80) ALUMINUM BASEPLATE DATEL Low Compliance Voltage METAL CASE 0.50 Case C24 Electronic Load (12.70) A-Series High Reliability 0.060 ±0.002 DIA. 0.040 ±0.002 DIA. Voltage Range: (1.524 ±0.051) (1.016 ±0.051) 2 = 0.6 to 50V 0.20 MIN 1.800 0.10 (5.08) (45.72) (2.54) 1.640 0.08 (41.66) (2.03) TEMPERATURE DERATIN 8 7 100 6 5 9 90 1.20 2.00 (30.48) 4 1.640 6 EQ. SP. @ (41.66) (50.80) 80 3 10 0.200 (5.08) 2 70 1 11 60 0.40 (10.16) 50 BOTTOM VIEW 0.22 #4-40 CLEAR THRU 40 (5.59) (TYP. 4 PL) 30 I/O Connections 20 Pin Function P31 Pin Function P31 10 1 Fault 7 Control Strobe (CS) 2 Ground 8 –Load 0 10 2030 40 5060 708090 100 3 +5 Volt Supply 9 –Load Baseplate Temperature (°C) 4 Latch Data (LD) 10 +Load 5 Serial Data In (SDI) 11 +Load The horizontal axis of the above chart references the temperature of the DTL2A-LC’s 6 Clock (CLK) aluminum baseplate. The device can continually dissipate up to 100 Watts if the baseplate is maintained at or below +50°C. At +25°C ambient temperature, with no heat sink or supplemental air ţ ow, the DTL2A can reliably dissipate a continuous 10 Watts. Contact DATEL for Heat Sink information. 2 Output Power/Load (Watts) 100 WATT, LOW- VO LTAG E ELECTRONIC LOADS DTL2A-LC Model Performance/Functional SpeciŢ cations Typical @ TA = +25°C with nominal +5V supply voltage, unless noted. ➀ The smallest increment/decrement in output current is deŢ ned by one LSB (least signiŢ cant bit) of the 12-bit digital input word. One LSB is equal to full scale (FS) divided by 4096 which Digital Inputs/Outputs corresponds to 0.0244% of 20A or 4.88mA. Logic Compatibility (Pins 1, 4-7) CMOS/TTL ➁ For proper operation, the unit's output/load voltage must remain within this range. Voltages greater than the listed maximum can damage the device. Voltages less than than the Input Logic Levels: minimum provide insufŢ cient bias for the output stage and will result in unpredictable or no Logic "1" +2 Volts, minimum operation. See Output Compliance Voltage and the Fault Line for details. Logic "0" +0.8 Volts, maximum ➂ Offset error is deŢ ned as the current sunk/sourced by the DTL2A’s output, under any output voltage conditions, when the digital input word is all "0's." Input Logic Loading: ➃ Full scale step (20 Amps) settling to within ±5mA of its Ţ nal value. Logic "1" (IIH @ VIH = 5 Volts) 20µA, maximum ➄ See Temperature Derating. Logic "0" (IIL @ VIL = 0 Volts) –0.6mA, maximum ➅ Applies over all speciŢ ed ranges/combinations of load voltage/current, operating temperature, Output Logic Levels: and VCC. Logic "1" (@ 150µA) +3.5 Volts, minimum Logic "0" (@ 1.6mA) +0.4 Volts, maximum Absolute Maximum Ratings Timing See Timing Diagram Power Supply Voltage (+VCC, Pin 3) –0.5 to +5.5 Volts Output Digital Input Voltage (Pins 4-7) –0.5 to +5.5 Volts Current: Range 0-20 Amps Output Reverse-Polarity Protection No protection Resolution ➀ 0.024%FS (4.88mA) Output Overvoltage Protection No protection Accuracy ➅ ±3%, maximum Voltage Range ➁ 0.6-50 Volts Output Undervoltage Protection Yes (See Fault Line) Power Range 0-100 Watts Case Temperature +105°C Impedance 10MΩ, minimum Storage Temperature (Ambient) –40 to +125°C Offset Error ➂ ±10mA, maximum Lead Temperature (Soldering, 10 sec.) +300°C Gain Error ±0.4%, maximum These are stress ratings. Exposure of devices to any of these conditions may adversely Isolation Voltage: affect long-term reliability. Proper operation under conditions other than those listed in the Digital Inputs/Output to ±Load 500Vdc, minimum Performance/Functional SpeciŢ cations Table is not implied. Any Pin to Case 500Vdc, minimum Isolation Resistance 100MΩ, minimum Dynamic Performance TECHNICAL NOTES Output Slew Rate ±10A/µsec, minimum Output Settling Time ➃ 100µsec Overview Digital Input Update Rate to 20kHz The DTL2A-LC is a digitally programmable, CMOS/TTL-compatible, serial- Power Requirements input current sink. It’s output/load current range is 0 to 20 Amps (in 4.88mA Power Supply Range (+VCC, Pin 3) +4.75-5.25 Volts (+5V nominal) increments), over a compliance voltage range of 0.6 to 50 Volts and an output/ Power Supply Current 110mA typ., 150mA max. load power range of 0 to 100 Watts. The device’s digital I/O coding is straight Environmental binary (see table below). A digital input of all "0’s" forces a load current of 0 Operating Temperature ➄ –40 to +100°C (Case) Amps. A digital input of all "1’s" forces a load current of 19.995 Amps. Storage Temperature –40 to +125°C (Ambient) In a typical power-supply test or burn-in application, the output pins of the Humidity (Non-condensing) to 95% device under test (DUT) are connected to the DTL2A-LC’s +Load (pins 10 and 11) Altitude Above Sea Level 10,000 feet and –Load (pins 8 and 9) outputs. The DTL2A-LC's operation is controlled by its Physical four digital input lines (Serial Data In, Clock, Latch Data and Control Strobe). Dimensions 2" x 2" x 0.5" (51 x 51 x 12.7mm) Shielding 6-sided (Connected to pin 2) Serial Input Data Word Load Current (Amps) Case Material Tin-plated steel shell with MSB LSB DTL2A aluminum baseplate 1111 1111 1111 19.995 Pin Material Brass, solder coated 1100 0000 0000 15.000 Mounting Holes Through-hole spacers, #4-40 clearance 1000 0000 0000 10.000 Weight 1.9 ounces (54 grams) 0111 1111 1111 9.995 0100 0000 0000 5.000 0010 0000 0000 2.500 0000 0000 0001 0.005 0000 0000 0000 0.000 Mapping of the Serial-Input Data to Load Current 3 DTL Series 100 WATT, LOW- VO LTAGE ELECTRONIC LOADS Initialization Output Compliance Voltage and the Fault Line Preparing the DTL2A-LC to accept new digital data is accomplished by applying For proper operation, the DTL2A-LC’s output/load voltage must always be between 0.6 and 50 Volts. The device cannot be used to directly load logic "1's" to Control Strobe (CS, pin 7), Latch Data (LD, pin 4) and Clock (CLK, pin 6) with all signals present and stable for a minimum of 1µsec. extremely low-voltage (<0.6V) power components or to simulate a true short circuit (0 Volts). Voltages greater than 50V can damage the device. Voltages During this interval, it does not matter whether or not data is present on the Serial Data In (SDI, pin 5) line. <0.6V will result in insufŢ cient biasing of the output current source and consequently unpredictable or no operation. Accordingly, we have installed Serial Data an internal output/load-voltage monitoring circuit. If the output/load voltage drops below 0.6V and the DTL2A-LC’s output is at risk of becoming disabled, Following initialization, the 12-bit digital word representing the desired output the Fault line activates. current is applied to the SDI pin. The serial data should appear starting with the most signiŢ cant bit (MSB, bit 1, D11) and ending with the least signiŢ cant The Fault line is an optically isolated, active-low function with an open- bit (LSB, bit 12, D0). With each data bit present and stable on the SDI line, collector output (internal 10kΩ pull-up resistor to +5V). Under normal condi- the CLK must be toggled through a low-to-high transition to register that bit. tions, its output is high (logic "1"). Under fault conditions (VOUT < 2.5V), its Twelve rising clock edges, at rates up to 500kHz, are required to clock all 12 output drops to a logic "0." There is no output/load-voltage monitoring circuit digital bits into the DTL2A-LC’s input register. for voltages greater than 50V, and operation above 50V can damage the device. Latching Data and Presenting It to the D/A An "offset supply" can be inserted between the DTL2A-LC’s –Load output After loading the LSB, the serial data word is latched by bringing the Control (pins 8 and 9) and the power device under test (DUT) to "translate" the Strobe (pin 7) high and then toggling the Latch Data pin (pin 4) through a DTL2A-LC’s 49.4V output/load voltage range. The offset supply must have high-low-high sequence. Approximately 100µsec later, the output current will adequate current capabilities and be connected with the polarities indicated settle to its Ţ nal desired value. in Figure 2 below. Under no circumstances should the voltage across the DTL2A-LC’s output be allowed to experience a polarity reversal. Software: C Language If a 5V/20A offset supply is inserted as shown, the range of DUT voltages will The following steps describe a typical timing sequence when using the DTL2A- be –4.4 to +45 Volts. Such a conŢ guration can be used for true short-circuit LC’s 4 digital inputs and a programming language such as C. Using 4 bits of testing. A mechanical relay can be used to short the outputs of the DUT a typical 8-bit port, assign BIT_0 to the Control Strobe (CS, pin 7), BIT_1 to while the offset supply ensures the DTL2A-LC always sees at least 5 Volts Latch Data (LD, pin 4), BIT_2 to Serial Data In (SDI, pin 5), and BIT_3 to across its outputs. the Clock (CLK, pin 6). 1. Initialize with Control Strobe, Latch Data, and Clock high: BIT_0 = 1, BIT_1 = 1, BIT_2 = X (don’t care), BIT_3 = 1 11 +LOAD 10 + 2. Bring the Control Strobe low. BIT_0 = 0 SHORT DTL2A-LC DUT CIRCUIT 3. Apply the MSB (D11) of the serial data word to Serial Data In. RELAY 5V – BIT_2 = 0 or 1 + 9 – –LOAD 8 4. Toggle the Clock high-low-high. BIT_3 = 1 to 0 to 1 5. Apply D10 of the serial data word to Serial Data In. Figure 2. An "Offset Supply" Enables BIT_2 = 0 or 1 True Short-Circuit Testing 6. Toggle the Clock high-low-high. BIT_3 = 1 to 0 to 1 Thermal Considerations 7. Repeat the process for remaining data bits D9 through D0. The DTL2A-LC can reliably handle 100W loads if its case temperature is 8. Drive the Control Strobe high. maintained at or below +50°C. With no heat sinking or auxiliary cooling, the BIT_0 = 1 device can only handle loads up to 10 Watts. Please refer to the Temperature Derating Curve for additional information. DATEL’s Electronic Load Applica- 9. Toggle the Latch Data input high-low-high. tions Engineers can assist you in developing heat-sink solutions for your BIT_1 = 1 to 0 to 1. higher-power DTL2A-LC applications. Please contact us for details. 4 100 WATT, LOW- VO LTAG E ELECTRONIC LOADS DTL2A-LC Model tdh SDI D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 tds tin CLK tcss tcl tcsh tch CS tld1 tld2 LD tldw Timing Min. Typ. Max. Units CLK – – 500 kHz tin 1 – – µsec tcl = tch 1 – – µsec tcss 1 – – µsec tcsh 1 – – µsec tld1 2 – – µsec tld2 2 – – µsec tldw 2 – – µsec tds 0.5 – – µsec tdh 0.5 – – µsec Figure 3. DTL2A-LC Timing Diagram ® ® INNOVATION and EXC ELLE N C E ISO 9001 REGISTERED DS-0474A 9/00 DATEL (UK) LTD. Tadley, England Tel: (01256)-880444 DATEL, Inc. 11 Cabot Boulevard, MansŢ eld, MA 02048-1151 DATEL S.A.R.L. Montigny Le Bretonneux, France Tel: 01-34-60-01-01 Tel: (508) 339-3000 (800) 233-2765 Fax: (508) 339-6356 DATEL GmbH München, Germany Tel: 89-544334-0 Internet: www.datel.com Email: sales@datel.com DATEL KK Tokyo, Japan Tel: 3-3779-1031, Osaka Tel: 6-354-2025 DATEL makes no representation that the use of its products in the circuits described herein, or the use of other technical information contained herein, will not infringe upon existing or future patent rights. The descriptions contained herein do not imply the granting of licenses to make, use, or sell equipment constructed in accordance therewith. SpeciŢ cations are subject to change without notice. The DATEL logo is a registered DATEL, Inc. trademark. 5