ANALOG DEVICES ADA4856-3

Single-Supply, High Speed, Fixed G = +2, Rail-to-Rail Output Video Amplifier ADA4856-3 FEATURES CONNECTION DIAGRAM Voltage feedback architecture Rail-to-rail output swing: 0.1 V to 4.9 V 16 15 14 13 High speed amplifier −3 dB bandwidth: 225 MHz 0.1 dB flatness at 2 V p-p: 74 MHz NC 1 12 +V S Slew rate: 800 V/μs +IN2 2 11 OUT2 Settling time to 0.1% with 2 V step: 5 ns ADA4856-3 NC 3 10 –IN2 High input common-mode voltage range −V − 0.2 V to +V − 1 V S S PD 4 9 +V S Supply range: 3 V to 5.5 V Differential gain error: 0.01% 56 7 8 Differential phase error: 0.01° Low power 7.8 mA/amplifier typical supply current NOTES Power-down feature 1. NC = NO CONNECT. 2. EXPOSED PAD CONNECTED TO –V . S Available in 16-lead LFCSP Figure 1. APPLICATIONS Professional video Consumer video Imaging Instrumentation Base stations Active filters Buffers 7 GENERAL DESCRIPTION V = 5V, V = 1.4V p-p S OUT V = 3.3V, V = 1.4V p-p S OUT The ADA4856-3 (triple) is a fixed gain of +2, single-supply, rail- 6 V = 3.3V, V = 2V p-p to-rail output video amplifier. It provides excellent video S OUT 5 performance with 225 MHz, −3 dB bandwidth, 800 V/μs slew rate, V = 5V, V = 2V p-p S OUT and 74 MHz, 0.1 dB flatness into a 150 Ω load. It has a wide 4 input common-mode voltage range that extends 0.2 V below ground and 1 V below the positive rail. In addition, the output 3 voltage swings within 200 mV of either supply, making this video 2 amplifier easy to use on single-supply voltages as low as 3.3 V. The ADA4856-3 offers a typical low power of 7.8 mA per amplifier, 1 while being capable of delivering up to 52 mA of load current. R = 150Ω L 0 It also features a power-down function for power sensitive 1 10 100 1000 applications that reduces the supply current to 1 mA. FREQUENCY (MHz) Figure 2. Large Signal Frequency Response The ADA4856-3 is available in a 16-lead LFCSP and is designed to work over the extended industrial temperature range of −40°C to +105°C. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ©2008–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. CLOSED-LOOP GAIN (dB) +IN3 +IN1 –IN3 –IN1 OUT3 OUT1 –V –V S S 07686-001 07686-058 ADA4856-3 TABLE OF CONTENTS Features .............................................................................................. 1  Theory of Operation ...................................................................... 12  Applications ....................................................................................... 1  Applications Information .............................................................. 13  Connection Diagram ....................................................................... 1  Using the ADA4856-3 in Gains Equal to +1, −1 ........................ 13  General Description ......................................................................... 1  Using the ADA4856-3 in Gains Equal to +3, +4, and +5 ..... 14  Revision History ............................................................................... 2  20 MHz Active Low-Pass Filter ................................................ 15  Specif ica t ions ..................................................................................... 3  Video Line Driver ....................................................................... 15  5 V Operation ............................................................................... 3  Single-Supply Operation ........................................................... 16  3.3 V Operation ............................................................................ 4  Power Down ................................................................................ 16  Absolute Maximum Ratings ............................................................ 5  Layout Considerations ............................................................... 16  Thermal Resistance ...................................................................... 5  Power Supply Bypassing ............................................................ 16  Maximum Power Dissipation ..................................................... 5  Outline Dimensions ....................................................................... 17  ESD Caution .................................................................................. 5  Ordering Guide .......................................................................... 17  Pin Configuration and Function Descriptions ............................. 6  Typical Performance Characteristics ............................................. 7  REVISION HISTORY 1/09—Rev. 0 to Rev. A Changes to Figure 9 ........................................................................... 7 Changes to Figure 13, Figure 15, and Figure 16 ............................ 8 Added Figure 17 and Figure 20; Renumbered Sequentially ........ 9 10/08—Revision 0: Initial Version Rev. A | Page 2 of 20 ADA4856-3 SPECIFICATIONS 5 V OPERATION T = 25°C, +V = 5 V, −V = 0 V, G = +2, R = 150 Ω to midsupply, unless otherwise noted. A S S L Table 1. Parameter Test Conditions Min Typ Max Unit DYNAMIC PERFORMANCE −3 dB Bandwidth VO = 0.1 V p-p 370 MHz V = 1.4 V p-p 225 MHz O V = 2 V p-p 200 MHz O Bandwidth for 0.1 dB Flatness VO = 1.4 V p-p 90 MHz VO = 2 V p-p 74 MHz Slew Rate VO = 2 V step 800 V/μs Settling Time to 0.1% (Rise/Fall) V = 2 V step 4.8/5.2 ns O NOISE/DISTORTION PERFORMANCE Harmonic Distortion (HD2/HD3) fC = 5 MHz, VO = 2 V p-p, RL = 1 kΩ −92/−110 dBc f = 20 MHz, V = 2 V p-p, R = 1 kΩ −68/−71 dBc C O L Crosstalk, Output to Output f = 5 MHz −80 dB Input Voltage Noise f = 100 kHz 14 nV/√Hz Input Current Noise f = 100 kHz 2 pA/√Hz Differential Gain Error 0.01 % Differential Phase Error 0.01 Degrees DC PERFORMANCE Input Offset Voltage 1.3 3.4 mV Input Offset Voltage Drift 5.5 μV/°C Input Bias Current −3.8 μA Input Offset Current ±0.05 μA Closed-Loop Gain 1.95 2 2.05 V/V Open-Loop Gain 90 dB INPUT CHARACTERISTICS Input Resistance 3.2 MΩ Input Capacitance 0.5 pF Input Common-Mode Voltage Range −VS − 0.2 +VS − 1 V Common-Mode Rejection Ratio V = −0.2 V to +4 V 94 dB CM OUTPUT CHARACTERISTICS Output Voltage Swing 0.1 to 4.9 V Linear Output Current Per Amplifier HD2 ≤ −60 dBc, R = 10 Ω 52 mA L POWER-DOWN Turn-On Time 78 ns Turn-Off Time 950 ns Input Bias Current Enabled 0.2 μA Powered down −125 μA Turn-On Voltage 3.75 V POWER SUPPLY Operating Range 3 5.5 V Quiescent Current per Amplifier 7.8 mA Supply Current When Disabled 1.1 mA Power Supply Rejection Ratio ∆V = 4.5 V to 5.5 V 96 dB S Rev. A | Page 3 of 20 ADA4856-3 3.3 V OPERATION TA = 25°C, +VS = 3.3 V, −VS = 0 V, G = +2, RL = 150 Ω to midsupply, unless otherwise noted. Table 2. Parameter Test Conditions Min Typ Max Unit DYNAMIC PERFORMANCE −3 dB Bandwidth VO = 0.1 V p-p 370 MHz VO = 2 V p-p 225 MHz Bandwidth for 0.1 dB Flatness VO = 2 V p-p 77 MHz Slew Rate V = 2 V step 800 V/μs O Settling Time to 0.1% (Rise/Fall) V = 2 V step 4.8/7 ns O NOISE/DISTORTION PERFORMANCE Harmonic Distortion (HD2/HD3) f = 5 MHz, V = 1 V p-p, R = 1 kΩ −95/−128 dBc C O L f = 20 MHz, V = 1 V p-p, R = 1 kΩ −74/−101 dBc C O L Crosstalk, Output to Output f = 5 MHz −78 dB Input Voltage Noise f = 100 kHz 14 nV/√Hz Input Current Noise f = 100 kHz 2 pA/√Hz Differential Gain Error 0.01 % Differential Phase Error 0.01 Degrees DC PERFORMANCE Input Offset Voltage 1.2 3 mV Input Offset Voltage Drift 5.5 μV/°C Input Bias Current −3.8 μA Input Offset Current ±0.05 μA Closed-Loop Gain 1.95 2 2.05 V/V Open-Loop Gain 90 dB INPUT CHARACTERISTICS Input Resistance 3.2 MΩ Input Capacitance 0.5 pF Input Common-Mode Voltage Range −V − 0.2 +V − 1 V S S Common-Mode Rejection Ratio V = −0.2 V to +2.3 V 94 dB CM OUTPUT CHARACTERISTICS Output Voltage Swing 0.1 to 3.22 V Linear Output Current Per Amplifier HD2 ≤ −60 dBc, R = 10 Ω 49 mA L POWER-DOWN Turn-On Time 78 ns Turn-Off Time 950 ns Turn-On Voltage 2.05 V POWER SUPPLY Operating Range 3 5.5 V Quiescent Current per Amplifier 7.5 mA Quiescent Current When Powered Down 0.98 mA Power Supply Rejection Ratio ∆V = 2.97 V to 3.63 V 94 dB S Rev. A | Page 4 of 20 ADA4856-3 ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION Table 3. The maximum power that can be safely dissipated by the Parameter Rating ADA4856-3 is limited by the associated rise in junction Supply Voltage 6 V temperature. The maximum safe junction temperature for 1 Internal Power Dissipation See Figure 3 plastic encapsulated devices is determined by the glass transition Common-Mode Input Voltage (−V − 0.2 V) to (+V − 1 V) S S temperature of the plastic, approximately 150°C. Temporarily Differential Input Voltage ±VS exceeding this limit may cause a shift in parametric performance Output Short-Circuit Duration Observe power curves due to a change in the stresses exerted on the die by the package. Storage Temperature Range −65°C to +125°C Exceeding a junction temperature of 175°C for an extended Operating Temperature Range −40°C to +105°C period can result in device failure. Lead Temperature (Soldering, 10 sec) 300°C To ensure proper operation, it is necessary to observe the 1 Specification is for device in free air. maximum power derating curves. Stresses above those listed under Absolute Maximum Ratings 3.0 may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any 2.5 other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute 2.0 maximum rating conditions for extended periods may affect device reliability. 1.5 THERMAL RESISTANCE 1.0 θJA is specified for the worst-case conditions, that is, θJA is specified for a device soldered in a circuit board for surface-mount packages. 0.5 Table 4. 0 Package Type θ θ Unit JA JC 16-Lead LFCSP 67 17.5 °C/W AMBIENT TEMPERATURE (°C) Figure 3. Maximum Power Dissipation vs. Ambient Temperature ESD CAUTION Rev. A | Page 5 of 20 MAXIMUM POWER DISSIPATION (W) –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 07686-103 ADA4856-3 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 16 15 14 13 NC 1 12 +V S ADA4856-3 +IN2 2 11 OUT2 TOP VIEW (Not to Scale) NC 3 10 –IN2 +V PD 4 9 S 56 7 8 NOTES 1. NC = NO CONNECT. 2. EXPOSED PAD CONNECTED TO –V . S Figure 4. Pin Configuration Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 NC No Connect. 2 +IN2 Noninverting Input 2. 3 NC No Connect. 4 PD Power Down. 5 +IN3 Noninverting Input 3. 6 −IN3 Inverting Input 3. 7 OUT3 Output 3. 8 −V Negative Supply. S 9 +VS Positive Supply. 10 −IN2 Inverting Input 2. 11 OUT2 Output 2. 12 +V Positive Supply. S 13 −V Negative Supply. S 14 OUT1 Output 1. 15 −IN1 Inverting Input 1. 16 +IN1 Noninverting Input 1. 17 (EPAD) Exposed Pad (EPAD) The exposed pad must be connected to −VS. Rev. A | Page 6 of 20 +IN3 +IN1 –IN3 –IN1 OUT3 OUT1 –V –V S S 07686-003 ADA4856-3 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, +VS = 5 V, G = +2, RL = 150 Ω, large signal VOUT = 2 V p-p, small signal VOUT = 100 mV p-p, unless otherwise noted. 7 7 V = 5V, V = 1.4V p-p S OUT V = 3.3V V = 3.3V, V = 1.4V p-p S S OUT 6 6 V = 3.3V, V = 2V p-p S OUT V = 5V S 5 5 = 5V, V = 2V p-p V S OUT 4 4 3 3 2 2 1 1 0 0 1 10 100 1000 1 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 5. Small Signal Frequency Response vs. Supply Voltage Figure 8. Large Signal Frequency Response vs. Supply Voltage 6.2 2 T = +25°C A T = +105°C A 0 6.1 T = –40°C A V = 3.3V, V = 1.4V p-p T = +25°C S OUT A T = +85°C A V = 5V, V = 1.4V p-p S OUT –2 T = +105°C A T = –40°C A 6.0 T = +85°C A V = 3.3V, V = 2V p-p S OUT –4 V = 5V, V = 2V p-p S OUT 5.9 –6 5.8 –8 1 10 100 1000 1 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 6. Large Signal 0.1 dB Flatness vs. Supply Voltage Figure 9. Small Signal Frequency Response vs. Temperature 7 C = 4.4pF L C =6.6pF L 6 R = 1kΩ 6 L C =2.2pF L 4 R = 150Ω L 5 2 4 0 3 –2 2 –4 1 –6 0 1 10 100 1000 1 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 7. Small Signal Frequency Response vs. Load Resistance Figure 10. Small Signal Frequency Response vs. Capacitive Load Rev. A | Page 7 of 20 CLOSED-LOOP GAIN (dB) CLOSED-LOOP GAIN (dB) CLOSED-LOOP GAIN (dB) 07686-007 07686-005 07686-006 CLOSED-LOOP GAIN (dB) CLOSED-LOOP GAIN (dB) CLOSED-LOOP GAIN (dB) 07686-008 07686-009 07686-010 ADA4856-3 –50 –50 R = 1kΩ R = 1kΩ L L –60 –60 V = 2V p-p V = 1V p-p OUT OUT V = 3.3V –70 –70 S –80 –80 –90 –90 HD3 –100 –100 HD3 HD2 –110 –110 HD2 –120 –120 –130 –130 –140 –140 0.1110 100 0.1 1 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 11. Harmonic Distortion vs. Frequency Figure 14. Harmonic Distortion vs. Frequency 0 –10 –20 –20 –30 –40 IN1, IN3, OUT2 –40 –50 –60 OUT3 OUT1 –60 –70 IN1, IN2, OUT3 –80 –80 IN2, IN3, OUT1 OUT2 –90 –100 –100 –110 –120 –120 0.1 1 10 100 1000 1 10 100 500 FREQUENCY (MHz) FREQUENCY (MHz) Figure 12. Forward Isolation vs. Frequency Figure 15. Crosstalk vs. Frequency 0 0.5 –10 0.4 –20 0.3 INPUT –30 0.2 OUTPUT –40 0.1 –50 0 +PSRR ERROR –PSRR –60 –0.1 –70 –0.2 –80 –0.3 –90 –0.4 –100 –0.5 0.01 0.1 1 10 100 600 TIME (2ns/DIV) FREQUENCY (MHz) Figure 13. Power Supply Rejection Ratio (PSRR) vs. Frequency Figure 16. Settling Time Rev. A | Page 8 of 20 PSRR (dB) FORWARD ISOLATION (dB) DISTORTION (dBc) 07686-011 07686-013 07686-012 SETTLING TIME (%) ALL HOSTILE CROSSTALK (dB) DISTORTION (dBc) 07686-015 07686-014 07685-024 ADA4856-3 1k 100 100 10 10 1 10 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 17. Output Voltage Noise vs. Frequency Figure 20. Output Current Noise vs. Frequency 0.06 1.5 V = 5V V = 5V S S V = 3.3V V = 3.3V S S 0.04 1.0 0.02 0.5 0 0 –0.02 –0.5 –0.04 –1.0 –0.06 –1.5 TIME (10ns/DIV) TIME (10ns/DIV) Figure 18. Small Signal Transient Response vs. Supply Voltage Figure 21. Large Signal Transient Response vs. Supply Voltage 0.08 1.5 0.06 1.0 0.04 C = 2.2pF C = 2.2pF L 0.5 L C = 4.4pF C = 4.4pF L 0.02 L C = 6.6pF C = 6.6pF L L 0 0 –0.02 –0.5 –0.04 –1.0 –0.06 –0.08 –1.5 TIME (10ns/DIV) TIME (10ns/DIV) Figure 19. Small Signal Transient Response vs. Capacitive Load Figure 22. Large Signal Transient Response vs. Capacitive Load Rev. A | Page 9 of 20 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) VOLTAGE NOISE (nV/√Hz) 07686-018 07686-117 07686-019 OUTPUT VOLTAGE (V) CURRENT NOISE (pA/√Hz) OUTPUT VOLTAGE (V) 07686-021 07686-022 07686-120 ADA4856-3 0.08 1.5 0.06 1.0 0.04 C = 2.2pF C = 2.2pF L L 0.5 C = 4.4pF C = 4.4pF 0.02 L L C = 6.6pF C = 6.6pF L L 0 0 –0.02 –0.5 –0.04 –1.0 –0.06 V = 3.3V S V = 3.3V S –0.08 –1.5 TIME (10ns/DIV) TIME (10ns/DIV) Figure 23. Small Signal Transient Response vs. Capacitive Load Figure 26. Large Signal Transient Response vs. Capacitive Load 4 2.5 2 × V 2 × V IN IN 2.0 3 1.5 2 V V OUT OUT 1.0 1 0.5 0 0 –0.5 –1 –1.0 –2 –1.5 –3 –2.0 V = 3.3V S –4 –2.5 TIME (50ns/DIV) TIME (50ns/DIV) Figure 24. Output Overdrive Recovery Figure 27. Output Overdrive Recovery 3.0 23.6 V V = 5V PD S 2.5 23.4 2.0 23.2 1.5 23.0 V OUT 1.0 22.8 0.5 22.6 V = 3.3V S 0 22.4 –0.5 22.2 –1.0 22.0 –1.5 21.8 –40 –25 –10 5 20 35 50 65 80 95 110 125 TIME (1us/DIV) TEMPERATURE (°C) Figure 25. Turn-On/Turn-Off Time Figure 28. Quiescent Current vs. Temperature Rev. A | Page 10 of 20 VOLTAGE (V) VOLTAGE (V) OUTPUT VOLTAGE (V) 07686-056 07686-025 07686-023 QUIESCENT CURRENT (mA) VOLTAGE (V) OUTPUT VOLTAGE (V) 07686-132 07686-028 07686-026 ADA4856-3 1.8 5.00 1.7 4.95 1.6 4.90 1.5 4.85 1.4 1.3 4.80 1.2 4.75 1.1 4.70 1.0 4.65 0.9 0.8 4.60 –40 –20 0 20 40 60 80 100 120 0.01 0.1 1 10 100 TEMPERATURE (°C) LOAD CURRENT (mA) Figure 29. Offset Drift vs. Temperature Figure 31. Output Saturation Voltage vs. Load Current 100 25.0 24.5 10 24.0 23.5 1 23.0 0.1 22.5 22.0 0.01 2.7 3.0 3.3 3.6 3.9 4.2 4.5 4.8 5.1 5.4 100k 1M 10M 100M 1G FREQUENCY (Hz) SUPPLY VOLTAGE (V) Figure 30. Output Impedance vs. Frequency Figure 32. Quiescent Current vs. Supply Voltage Rev. A | Page 11 of 20 OFFSET VOLTAGE (mV) OUTPUT IMPEDENCE (Ω) 07686-135 07686-034 QUIESCENT CURRENT (mA) SATURATION VOLTAGE (mV) 07686-057 07686-038 ADA4856-3 THEORY OF OPERATION The ADA4856-3 comes in a 16-lead LFCSP that has an exposed The ADA4856-3 is a voltage feedback op amp that employs a thermal pad for lower operating temperature. This pad is connected new input stage that achieves a high slew rate while maintaining internally to the negative rail. To avoid printed circuit board (PCB) a wide common-mode input range. The input common-mode layout problems, the ADA4856-3 features a new pinout flow that range of the ADA4856-3 extends from 200 mV below the negative is optimized for video applications. As shown in Figure 4, the rail to about 1 V from the positive rail. This feature makes the feedback and gain resistors are on-chip, which minimizes the ADA4856-3 ideal for low voltage single-supply applications. In number of components needed and improves the design layout. addition, this new input stage does not sacrifice noise performance The ADA4856-3 is fabricated in Analog Devices dielectrically for slew rate. At 14 nV/√Hz, the ADA4856-3 is one of the isolated eXtra Fast Complementary Bipolar 3 (XFCB3) process, lowest noise rail-to-rail output video amplifiers in the market. which results in the outstanding speed and dynamic range Besides a novel input stage, the ADA4856-3 employs the Analog displayed by the amplifier. Devices, Inc., patented rail-to-rail output stage. This output +V S stage makes an efficient use of the power supplies, allowing the C 1 op amp to drive up to three video loads to within 300 mV from both rails. In addition, this output stage provides the amplifier G OUT with very fast overdrive characteristics, an important property m2 +IN G in video applications. m1 –IN R C –V S Figure 33. High Level Design Schematic Rev. A | Page 12 of 20 07686-147 ADA4856-3 APPLICATIONS INFORMATION +V S USING THE ADA4856-3 IN GAINS EQUAL TO +1, −1 10µF The ADA4856-3 was designed to offer outstanding video performance, simplify applications, and minimize board area. 0.1µF R The ADA4856-3 is a triple amplifier with on-chip feedback F R and gain set resistors. The gain is fixed internally at G = +2. The G inclusion of the on-chip resistors not only simplifies the design of V OUT V IN the application but also eliminates six surface-mount resistors, R T saving valuable board space and lowering assembly costs. 0.1µF Whereas the ADA4856-3 has a fixed gain of G = +2, it can be used in other gain configurations, such as G = −1 and G = +1. 10µF –V S Unity-Gain Operation GAIN OF +1 Option 1 Figure 35. Unity Gain of Option 2 There are two options for obtaining unity gain (G = +1). The Inverting Unity-Gain Operation first is shown in Figure 34. In this configuration, the –IN input In this configuration, the noninverting input is tied to ground pin is tied to the output (feedback is now provided with the two and the input signal is applied to the inverting input. The noise internal 402 Ω resistors in parallel), and the input is applied to gain for this configuration is +2, see Figure 36. the noninverting input. The noise gain for this configuration is 1. +V +V S S 10µF 10µF 0.1µF 0.1µF V IN V OUT R T V OUT V IN R 0.1µF T 0.1µF 10µF –V 10µF S –V S GAIN OF +1 GAIN OF –1 Figure 34. Unity Gain of Option 1 Figure 36. Inverting Configuration (G = −1) Figure 37 shows the small signal frequency response for both Option 2 gain of +1 (Option 1 and Option 2) and gain of −1 configurations. Another option exists for running the ADA4856-3 as a unity- It is clear that G = +1, Option 2 has better flatness and no peaking gain amplifier. In this configuration, the noise gain is +2, see compared to Option 1. Figure 35. The frequency response and transient response for 6 this configuration closely match the gain of +2 plots because the V = 5V OPTION 1 S R = 100Ω G = +1 noise gains are equal. This method does have twice the noise gain L V = 100mV p-p 3 OUT of Option 1; however, in applications that do not require low noise, Option 2 offers less peaking and ringing. By tying the inputs G = –1 0 together, the net gain of the amplifier becomes 1. Equation 1 shows OPTION 2 G = +1 the transfer characteristic for the schematic shown in Figure 35. –3 ⎛ ⎞ ⎛ ⎞ − R R + R F F G ⎜ ⎟ ⎜ ⎟ V = V +V (1) OUT IN IN ⎜ ⎟ ⎜ ⎟ –6 R R G G ⎝ ⎠ ⎝ ⎠ which simplifies to VOUT = VIN. –9 –12 1 10 100 1000 FREQUENCY (MHz) Figure 37. G = +1 and G = −1 Rev. A | Page 13 of 20 07686-032 MAGNITUDE (dB) 07686-030 07686-031 07686-044 ADA4856-3 As shown in Figure 41, the large signal frequency response USING THE ADA4856-3 IN GAINS EQUAL TO +3, for G = +4 is also flat out to 65 MHz, and it has a bandwidth +4, AND +5 of 180 MHz. Depending on certain applications, it might be useful to have a Gain of +5 Configuration fixed gain amplifier that can provide various gains. The advantage of having a fixed gain amplifier is the ease of layout, the reduced The gain of +5 is very similar to the G = +3 configuration but with number of components needed, and the matching of the gain U2 set to a gain of −1, which ends up being added to twice the and feedback resistors. output of U1 to generate V with G = +5. OUT –V Gain of +3 Configuration S Figure 38 shows the ADA4856-3 used as an amplifier with a 10µF 0.1µF fixed gain of +3. No external resistors are required, just a simple 16 15 14 13 0.1µF trace connecting certain inputs and outputs. Connect VIN to U1, which is set to a gain of +2, and U2, which is set to unity. U3 then 12 1 +V S V IN takes the output of U1 and gains it up by +2 and subtracts the 2 11 V OUT output of U2 to produce V . As shown in Figure 41, the large ADA4856-3 OUT 3 10 signal frequency response for G = +3 is flat out to 65 MHz, with a 4 9 +V PD S bandwidth of 165 MHz, a 2 V p-p output voltage, and a 100 Ω load. –V S + 10µF 56 7 8 0.1µF 10µF 0.1µF 0.1µF 16 15 14 13 –V S 0.1µF Figure 40. Gain of +5 1 12 +V S V IN 2 V 11 Figure 41 shows the large signal frequency response of the three OUT ADA4856-3 closed-loop gain sets (+3, +4, and +5) with flatness that extends 3 10 to 65 MHz and a −3 dB bandwidth of 190 MHz. 4 9 +V PD S 15 G = +5 G = +4 + 12 10µF 567 8 G = +3 0.1µF 9 0.1µF 6 –V S 3 Figure 38. Gain of +3 0 Gain of +4 Configuration –3 To get a gain of +4, set one amplifier to a gain of +1 and set the –6 going in other two amplifiers to a gain of +2. Figure 39 shows VIN –9 R = 100Ω L U2 at unity, then U1 takes the output of U2 and gains it by +2, and –12 V = 5V S then feeds it to U3, which also gains it by +2 to produce VOUT. –15 V = 2V p-p OUT –V S –18 1 10 100 1000 10µF FREQUENCY (MHz) 0.1µF 16 15 14 13 Figure 41. Large Signal Frequency Response for All Three Gains 0.1µF 1 12 +V S 2 11 V OUT ADA4856-3 3 10 4 9 PD +V S + 10µF 567 8 0.1µF V IN 0.1µF –V S Figure 39. Gain of +4 Rev. A | Page 14 of 20 07686-046 07686-045 CLOSED-LOOP GAIN (dB) 07686-047 07686-048 + + + ADA4856-3 20 MHz ACTIVE LOW-PASS FILTER VIDEO LINE DRIVER The ADA4856-3 triple amplifier lends itself to higher order The ADA4856-3 was designed to excel in video driver applications. active filters. Figure 42 shows a 20 MHz, 6-pole, Sallen-Key Figure 44 shows a typical schematic for a video driver operating low-pass filter. on bipolar supplies. 75Ω V (R) OUT – V (R) IN –V S OUT1 75Ω U1 R1 R2 OP AMP 93.1Ω 604Ω 0.1µF 10µF V + IN 0.1µF 16 15 14 13 C1 C2 0.1µF 33pF 22pF 1 12 +V S 75Ω V (G) 2 IN 11 V (G) OUT ADA4856-3 75Ω 3 10 +V – PD 4 9 S OUT2 U2 R3 R4 OP AMP 113Ω 732Ω + 0.1µF 10µF + 56 7 8 0.1µF V (B) IN C3 C4 33pF 15pF 0.1µF 75Ω –V S 75Ω V (B) OUT Figure 44. Video Driver Schematic – In applications that require multiple video loads be driven OUT3 U3 R5 R6 V OP AMP OUT simultaneously, the ADA4856-3 can deliver. Figure 45 shows 121Ω 475Ω + the ADA4856-3 configured with triple video loads. Figure 46 C5 C6 shows the triple video load performance. 47pF 15pF 75Ω CABLE 10µF +V 75Ω S Figure 42. 20 MHz, 6-Pole Low-Pass Filter V 1 OUT 75Ω 0.1µF The filter has a gain of approximately 18 dB, which is set by 75Ω three fixed gain of 2 stages, and a flat frequency response out to – CABLE 75Ω 14 MHz. This type of filter is commonly used at the output of a V 2 ADA4856-3 OUT 0.1µF 75Ω video DAC as a reconstruction filter. The frequency response of + 75Ω 75Ω the filter is shown in Figure 43. CABLE 0.1µF CABLE 75Ω V 20 IN V 3 OUT SIX POLES 10µF 75Ω 75Ω –V S 10 FOUR POLES TWO POLES Figure 45. Video Driver Schematic for Triple Video Loads 0 6.5 –10 6.0 –20 R = 150Ω L 5.5 R = 75Ω L –30 R = 50Ω L 5.0 –40 4.5 –50 4.0 –60 1 10 100 200 3.5 FREQUENCY (MHz) V = 5V S V = 1V p-p OUT Figure 43. 20 MHz, Low-Pass Filter Frequency Response 3.0 2.5 1 10 100 200 FREQUENCY (MHz) Figure 46. Large Signal Frequency Response for Various Loads Rev. A | Page 15 of 20 MAGNITUDE (dB) 07686-050 07686-049 MAGNITUDE (dB) 07686-053 07686-051 07686-052 + ADA4856-3 SINGLE-SUPPLY OPERATION POWER DOWN The ADA4856-3 can operate in single-supply applications. The ADA4856-3 is equipped with a PD (power-down) pin for Figure 47 shows the schematic for a single 5 V supply video all three amplifiers. This allows the user to reduce the quiescent driver. Resistors R2 and R4 establish the midsupply reference. supply current when an amplifier is inactive. The power-down Capacitor C2 is the bypass capacitor for the midsupply reference. threshold levels are derived from the voltage applied to the +VS Capacitor C1 is the input coupling capacitor, and C6 is the output pin. When used in single-supply applications, this is especially coupling capacitor. Capacitor C5 prevents constant current from useful with conventional logic levels. The amplifier is enabled being drawn through the internal gain set resistor. Resistor R3 when the voltage applied to the PD pin is greater than +VS − 1.25 V. sets the ac input impedance of the circuit. In a 5 V single-supply application, the typical threshold voltage is +3.75 V, and in a 3.3 V dual-supply application, the typical For more information on single-supply operation of op amps, threshold voltage is +2 V. The amplifier is also enabled when the see “Avoiding Op-Amp Instability Problems In Single-Supply PD pin is left floating (not connected). However, the amplifier is Applications”, Analog Dialogue, Volume 35, Number 2, March- May, 2001, at www.analog.com. powered down when the voltage on the pin is lower than 2.5 V PD +5V from +VS. If the PD pin is not used, it is best to connect it to the C2 C3 1µF 2.2µF positive supply Table 6. Power-Down Voltage Control R2 R4 C4 50kΩ 50kΩ 0.01µF +5V PD Pin 5 V ±2.5 V 3.3 V R3 Not Active >3.75 V >1.25 V >2.05 V 1kΩ C6 Active <2 V <0 V <1.3 V V IN 220µF C1 R1 V OUT 22µF 50Ω R5 R6 75Ω 75Ω LAYOUT CONSIDERATIONS As is the case with all high speed applications, careful attention ADA4856-3 to printed circuit board (PCB) layout details prevents associated C5 board parasitics from becoming problematic. Proper RF design 22µF –V S technique is mandatory. The PCB should have a ground plane Figure 47. AC-Coupled, Single-Supply Video Driver Schematic covering all unused portions of the component side of the board to provide a low impedance return path. Removing the In addition, the ADA4856-3 can be configured in dc-coupled, ground plane on all layers from the area near the input and output single-supply operation. The common-mode input voltage pins reduces stray capacitance. Locate termination resistors and can go about 200 mV below ground, which makes it a true single- loads as close as possible to their respective inputs and outputs. supply part. However, in video applications, the black level is set Keep input and output traces as far apart as possible to minimize at 0 V, which means that the output of the amplifier must go to coupling (crosstalk) though the board. Adherence to microstrip the ground level as well. This part has a rail-to-rail output stage; or stripline design techniques for long signal traces (greater than it can go as close as 100 mV from either rail. Figure 48 shows about 1 inch) is recommended. the schematic for adding 50 mV dc offset to the input signal so that the output is not clipped while still properly terminating POWER SUPPLY BYPASSING the input with 75 Ω. Careful attention must be paid to bypassing the power supply pins 5V C1 of the ADA4856-3. Use high quality capacitors with low equivalent 10µF C2 series resistance (ESR), such as multilayer ceramic capacitors 5V 0.1µF (MLCCs), to minimize supply voltage ripple and power dissipation. R1 3.74kΩ A large, usually tantalum, 10 μF to 47 μF capacitor located in V proximity to the ADA4856-3 is required to provide good IN R2 U1 V OUT decoupling for lower frequency signals. In addition, locate 0.1 μF 76.8Ω R3 R4 75Ω 75Ω MLCC decoupling capacitors as close to each of the power supply pins as is physically possible, no more than 1/8 inch away. The ground returns should terminate immediately into the ground ADA4856-3 –V S plane. Locating the bypass capacitor return close to the load return minimizes ground loops and improves performance. Figure 48. DC-Coupled Single Supply Video Driver Schematic Rev. A | Page 16 of 20 07686-156 07686-035 2.25 2.10 SQ 1.95 ADA4856-3 OUTLINE DIMENSIONS 4.00 0.60 MAX BSC SQ (BOTTOM VIEW) 0.60 MAX PIN 1 INDICATOR 13 16 1 12 PIN 1 0.65 BSC INDICATOR TOP 3.75 VIEW BSC SQ 0.75 9 0.60 4 8 5 0.50 0.25 MIN 0.80 MAX 12° MAX 1.95 BSC 0.65 TYP 0.05 MAX FOR PROPER CONNECTION OF 1.00 0.02 NOM THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND 0.85 0.35 FUNCTION DESCRIPTIONS 0.80 0.20 REF 0.30 COPLANARITY SECTION OF THIS DATA SHEET. SEATING 0.08 0.25 PLANE COMPLIANT TO JEDEC STANDARDS MO-220-VGGC Figure 49.16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 4 mm × 4 mm Body, Very Thin Quad (CP-16-4) Dimensions shown in millimeters ORDERING GUIDE Model Temperature Range Package Description Package Option Ordering Quantity 1 ADA4856-3YCPZ-R2 –40°C to +105°C 16-Lead LFCSP_VQ CP-16-4 250 1 ADA4856-3YCPZ-R7 –40°C to +105°C 16-Lead LFCSP_VQ CP-16-4 1,500 1 ADA4856-3YCPZ-RL –40°C to +105°C 16-Lead LFCSP_VQ CP-16-4 5,000 1 Z = RoHS Compliant Part. Rev. A | Page 17 of 20 072808-A ADA4856-3 NOTES Rev. A | Page 18 of 20 ADA4856-3 NOTES Rev. A | Page 19 of 20 ADA4856-3 NOTES ©2008–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07686-0-1/09(A) Rev. A | Page 20 of 20