ANALOG DEVICES ADA4855-3

Single Supply, High Speed, Rail-to-Rail Output, Triple Op Amp ADA4855-3 FEATURES CONNECTION DIAGRAM Voltage feedback architecture Rail-to-rail output swing: 0.1 V to 4.9 V 16 15 14 13 High speed amplifiers 410 MHz, −3 dB bandwidth, G = 1 12 +V NC 1 S 210 MHz, −3 dB bandwidth, G = 2 11 OUT2 +IN2 2 ADA4855-3 Slew rate: 870 V/μs NC 3 –IN2 10 53 MHz, 0.1 dB large signal flatness PD 4 9 +V S 5.3 ns settling time to 0.1% with 2 V step High input common-mode voltage range 56 7 8 −V − 0.2 V to +V − 1 V S S Supply range: 3 V to 5.5 V Differential gain error: 0.01% Differential phase error: 0.01° NOTES Low power 1. NC = NO CONNECT. 2. EXPOSED PAD CONNECTED TO –V . S 7.8 mA/amplifier typical supply current Figure 1. Power-down feature Available in 16-lead LFCSP APPLICATIONS Professional video Consumer video Imaging Instrumentation Base stations Active filters 1 GENERAL DESCRIPTION The ADA4855-3 (triple) is a single-supply, rail-to-rail output 0 G = 1 operational amplifier. It provides excellent high speed performance –1 with 410 MHz, −3 dB bandwidth and a slew rate of 870 V/μs. It G = 2 has a wide input common-mode voltage range that extends from G = 5 –2 0.2 V below ground to 1 V below the positive rail.In addition, the output voltage swings within 100 mV of either supply rail, –3 making this rail-to-rail operational amplifier easy to use on single- –4 supply voltages as low as 3.3 V. The ADA4855-3 offers a typical low power of 7.8 mA per amplifier –5 and is capable of delivering up to 57 mA of load current. It also –6 features a power-down function for power sensitive applications 110 100 1000 that reduces the supply current down to 1 mA. FREQUENCY (MHz) Figure 2. Frequency Response The ADA4855-3 is available in a 16-lead LFCSP and is designed to work over the extended industrial temperature range of −40°C to +105°C. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. NORMALIZED CLOSED-LOOP GAIN (dB) +IN3 +IN1 –IN1 –IN3 OUT1 OUT3 –V –V S S 07685-001 07685-004 ADA4855-3 TABLE OF CONTENTS Features .............................................................................................. 1  Theory of Operation ...................................................................... 14  Applications ....................................................................................... 1  Applications Information .............................................................. 15  Connection Diagram ....................................................................... 1  Gain Configurations .................................................................. 15  General Description ......................................................................... 1  20 MHz Active Low-Pass Filter ................................................ 15  Revision History ............................................................................... 2  RGB Video Driver ...................................................................... 16  Specif ica t ions ..................................................................................... 3  Driving Multiple Video Loads .................................................. 16  5 V Operation ............................................................................... 3  (Power-Down) Pin .............................................................. 16  PD 3.3 V Operation ............................................................................ 4  Single-Supply Operation ........................................................... 17  Absolute Maximum Ratings ............................................................ 5  Power Supply Bypassing ............................................................ 17  Thermal Resistance ...................................................................... 5  Layout .......................................................................................... 17  Maximum Power Dissipation ..................................................... 5  Outline Dimensions ....................................................................... 18  ESD Caution .................................................................................. 5  Ordering Guide .......................................................................... 18  Pin Configuration and Function Descriptions ............................. 6  Typical Performance Characteristics ............................................. 7  Test Circuits ..................................................................................... 13  REVISION HISTORY 11/08—Revision 0: Initial Version Rev. 0 | Page 2 of 20 ADA4855-3 SPECIFICATIONS 5 V OPERATION T = 25°C, V = 5 V, G = 1, R = 150 Ω, unless otherwise noted. A S L Table 1. Parameter Test Conditions Min Typ Max Unit DYNAMIC PERFORMANCE −3 dB Bandwidth VO = 0.1 V p-p 410 MHz V = 2 V p-p 200 MHz O V = 0.1 V p-p, G = 2 210 MHz O VO = 2 V p-p, G = 2 120 MHz Bandwidth for 0.1 dB Flatness VO = 2 V p-p 53 MHz VO = 2 V p-p, G = 2 50 MHz Slew Rate V = 2 V step 870 V/μs O Settling Time to 0.1% V = 2 V step (rise/fall) 5.3/9.5 ns O V = 2 V step (rise/fall), G = 2 7.4/7 ns O NOISE/DISTORTION PERFORMANCE Harmonic Distortion (HD2/HD3) f = 5 MHz, V = 2 V p-p, R = 1 kΩ −84/−105 dBc C O L fC = 20 MHz, VO = 2 V p-p, RL = 1 kΩ −60/−66 dBc Crosstalk, Output to Output f = 5 MHz, G = 2 −90 dBc Input Voltage Noise f = 100 kHz 6.8 nV/√Hz Input Current Noise f = 100 kHz 2 pA/√Hz Differential Gain Error G = 2 0.01 % Differential Phase Error G = 2 0.01 Degrees DC PERFORMANCE Input Offset Voltage 1.3 3 mV Input Offset Voltage Drift 5.5 μV/°C Input Bias Current −3.8 μA Input Offset Current ±0.05 μA Open-Loop Gain VO = 0.5 V to 4.5 V 92 dB INPUT CHARACTERISTICS Input Resistance 6.4 MΩ Input Capacitance 0.5 pF Input Common-Mode Voltage Range −V − 0.2 +V − 1 V S S Common-Mode Rejection Ratio V = –0.2 V to +4 V 94 dB CM OUTPUT CHARACTERISTICS Output Voltage Swing 0.1 to 4.9 V Linear Output Current per Amplifier HD2 ≤ −60 dBc, R = 10 Ω 57 mA L POWER-DOWN Turn-On Time 78 ns Turn-Off Time 1.2 μs Bias Current On 0.3 μA Off −125 μA Turn-On Voltage +VS − 1.25 V POWER SUPPLY Operating Range 3 5.5 V Quiescent Current per Amplifier 7.8 mA Supply Current When Powered Down 1.1 mA Power Supply Rejection Ratio ∆V = 4.5 V to 5.5 V 96 dB S Rev. 0 | Page 3 of 20 ADA4855-3 3.3 V OPERATION TA = 25°C, VS = 3.3 V, G = 1, RL = 150 Ω, unless otherwise noted. Table 2. Parameter Test Conditions Min Typ Max Unit DYNAMIC PERFORMANCE −3 dB Bandwidth VO = 0.1 V p-p 430 MHz VO = 1.4 V p-p 210 MHz VO = 0.1 V p-p, G = 2 210 MHz V = 2 V p-p, G = 2 125 MHz O Bandwidth for 0.1 dB Flatness V = 1.4 V p-p, G = 2 55 MHz O Slew Rate VO = 2 V step, G = 2 870 V/μs Settling Time to 0.1% VO = 2 V step (rise/fall), G = 2 7.4/7.1 ns NOISE/DISTORTION PERFORMANCE Harmonic Distortion (HD2/HD3) fC = 5 MHz, VO = 2 V p-p, RL = 1 kΩ −76/−76 dBc fC = 20 MHz, VO = 2 V p-p, RL = 1 kΩ −68/−75 dBc Crosstalk, Output to Output f = 5 MHz, G = 2 −88 dBc Input Voltage Noise f = 100 kHz 6.8 nV/√Hz Input Current Noise f = 100 kHz 2 pA/√Hz Differential Gain Error G = 2 0.01 % Differential Phase Error G = 2 0.01 Degrees DC PERFORMANCE Input Offset Voltage 1.3 mV Input Offset Voltage Drift 5.5 μV/°C Input Bias Current −3.8 μA Input Offset Current 0.05 μA Open-Loop Gain V = 0.5 V to 4.5 V 92 dB O INPUT CHARACTERISTICS Input Resistance 6.4 MΩ Input Capacitance 0.5 pF Input Common-Mode Voltage Range −V − 0.2 +V − 1 V S S Common-Mode Rejection Ratio VCM = –0.2 V to +3.2 V 94 dB OUTPUT CHARACTERISTICS Output Voltage Swing 0.1 to 3.22 V Linear Output Current per Amplifier HD2 ≤ −60 dBc, RL = 10 Ω 40 mA POWER-DOWN Turn-On Time 78 ns Turn-Off Time 1.2 μs Turn-On Voltage +VS − 1.25 V POWER SUPPLY Operating Range 3 5.5 V Quiescent Current per Amplifier 7.5 mA Supply Current When Powered Down 0.95 mA Power Supply Rejection Ratio ∆V = 2.97 V to 3.63 V 94 dB S Rev. 0 | Page 4 of 20 ADA4855-3 ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION Table 3. The maximum power that can be safely dissipated by the Parameter Rating ADA4855-3 is limited by the associated rise in junction Supply Voltage 6 V temperature. The maximum safe junction temperature for 1 Internal Power Dissipation See Figure 3 plastic encapsulated devices is determined by the glass Common-Mode Input Voltage (−V − 0.2 V) to (+V − 1 V) S S transition temperature of the plastic, approximately 150°C. Differential Input Voltage ±VS Temporarily exceeding this limit may cause a shift in parametric Output Short-Circuit Duration Observe power curves performance due to a change in the stresses exerted on the die Storage Temperature Range −65°C to +125°C by the package. Exceeding a junction temperature of 175°C for Operating Temperature Range −40°C to +105°C an extended period can result in device failure. Lead Temperature (Soldering, 10 sec) 300°C To ensure proper operation, it is necessary to observe the 1 Specification is for device in free air. maximum power derating curves. Stresses above those listed under Absolute Maximum Ratings 3.0 may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any 2.5 other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute 2.0 maximum rating conditions for extended periods may affect device reliability. 1.5 THERMAL RESISTANCE 1.0 θJA is specified for the worst-case conditions, that is, θJA is specified for a device soldered in a circuit board for surface-mount packages. 0.5 Table 4. 0 Package Type θ θ Unit JA JC 16-Lead LFCSP 67 17.5 °C/W AMBIENT TEMPERATURE (°C) Figure 3. Maximum Power Dissipation vs. Ambient Temperature ESD CAUTION Rev. 0 | Page 5 of 20 MAXIMUM POWER DISSIPATION (W) –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 07685-103 ADA4855-3 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS NC 1 12 +V S +IN2 2 ADA4855-3 11 OUT2 TOP VIEW NC 3 10 –IN2 (Not to Scale) PD 4 9+V S NOTES 1. NC = NO CONNECT. 2. EXPOSED PAD CONNECTED TO –V . S Figure 4. Pin Configuration Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 NC No Connect. 2 +IN2 Noninverting Input 2. 3 NC No Connect. 4 PD Power Down. 5 +IN3 Noninverting Input 3. 6 −IN3 Inverting Input 3. 7 OUT3 Output 3. 8 −VS Negative Supply. 9 +V Positive Supply. S 10 −IN2 Inverting Input 2. 11 OUT2 Output 2. 12 +VS Positive Supply. 13 −VS Negative Supply. 14 OUT1 Output 1. 15 −IN1 Inverting Input 1. 16 +IN1 Noninverting Input 1. 17 (EPAD) Exposed Pad (EPAD) The exposed pad must be connected to −V . S Rev. 0 | Page 6 of 20 07685-003 +IN3 5 16 +IN1 –IN3 6 15 –IN1 14 OUT1 OUT3 7 –V 8 13 –V S S ADA4855-3 TYPICAL PERFORMANCE CHARACTERISTICS T = 25°C, VS = 5V, G = 1, RF = 1 kΩ for G > 1, RL = 150 Ω, small signal VOUT = 100 mV p-p, and large signal VOUT = 2 V p-p, unless otherwise noted. 1 1 0 0 G = 1 G = 1 G = 2 –1 –1 G = 2 G = 5 –2 –2 G = 5 –3 –3 –4 –4 –5 –5 –6 –6 110 100 1000 110 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 5. Small Signal Frequency Response vs. Gain Figure 8. Large Signal Frequency Response vs. Gain 1 1 G = 2 V = 2V p-p OUT G = 1 0 0 G = 1 V = 1.4V p-p OUT –1 –1 G = 5 G = 2 –2 –2 –3 –3 G = 5 V = 2V p-p OUT –4 –4 –5 –5 V = 3.3V V = 3.3V S S –6 –6 110 100 1000 110 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 6. Small Signal Frequency Response vs. Gain Figure 9. Large Signal Frequency Response vs. Gain 1 1 C = 6.6pF C = 4.4pF F F R = 1kΩ L 0 0 C = 2.2pF F –1 –1 R = 150Ω L –2 –2 –3 –3 –4 –4 –5 –5 –6 –6 110 100 1000 110 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 7. Small Signal Frequency Response vs. Load Figure 10. Small Signal Frequency Response vs. Capacitive Load Rev. 0 | Page 7 of 20 CLOSED-LOOP GAIN (dB) NORMALIZED CLOSED-LOOP GAIN (dB) NORMALIZED CLOSED-LOOP GAIN (dB) 07685-006 07685-005 07685-004 CLOSED-LOOP GAIN (dB) NORMALIZED CLOSED-LOOP GAIN (dB) NORMALIZED CLOSED-LOOP GAIN (dB) 07685-009 07685-008 07685-007 ADA4855-3 0.2 6.2 0.1 6.1 V = 5V S V = 3.3V, V = 1.4V p-p S OUT 0 6.0 V = 3.3V S –0.1 5.9 V = 5V, V = 2V p-p S OUT –0.2 5.8 –0.3 5.7 –0.4 5.6 G= 2 –0.5 5.5 1 10 100 1000 1 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 11. 0.1 dB Flatness vs. Supply Voltage Figure 14. 0.1 dB Flatness vs. Supply Voltage 1 100 0 T = +85°C A T = +105°C A 0 75 –50 T = –40°C A T = +25°C A PHASE –1 50 –100 –2 GAIN 25 –150 –3 0 –200 –4 –25 –250 –5 –50 –300 –6 1 10 100 1000 10 100 1k 10k 100k 1M 10M 100M 1G 10G FREQUENCY (MHz) FREQUENCY (Hz) Figure 12. Small Signal Frequency Response vs. Temperature Figure 15. Open-Loop Gain and Phase vs. Frequency –50 –50 V = 1V p-p V = 1V p-p OUT OUT V = 3.3V S R = 1kΩ L –55 –60 R = 1kΩ L –60 –70 –65 –80 –70 –90 HD2 –75 –100 HD2 HD3 –80 –110 HD3 –85 –120 –90 –130 0.1 1 10 40 0.1 1 10 40 FREQUENCY (MHz) FREQUENCY (MHz) Figure 13. Harmonic Distortion vs. Frequency Figure 16. Harmonic Distortion vs. Frequency Rev. 0 | Page 8 of 20 DISTORTION (dBc) CLOSED-LOOP GAIN (dB) CLOSED-LOOP GAIN (dB) 07685-038 07685-014 07685-037 GAIN (dB) DISTORTION (dBc) CLOSED-LOOP GAIN (dB) 07685-040 07685-011 PHASE (Degrees) 07685-035 ADA4855-3 0 –40 –50 –20 –60 IN2, IN3, OUT1 –40 –70 IN1, IN2, OUT3 OUT3 –60 –80 OUT1 –90 –80 IN1, IN3, OUT2 –100 OUT2 –100 –110 –120 –120 0.1 1 10 100 1000 110 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 17. Forward Isolation vs. Frequency Figure 20. Crosstalk vs. Frequency 0 –30 –10 –40 –20 –50 –30 –40 –60 –PSRR –50 +PSRR –70 –60 –70 –80 –80 –90 –90 –100 –100 0.01 0.1 1 10 100 0.01 0.1 1 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 18. Power Supply Rejection Ratio (PSRR) vs. Frequency Figure 21. Common-Mode Rejection Ratio (CMRR) vs. Frequency 100 100 V = 5V S V = 3.3V S 10 10 1 1 10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 22. Input Voltage Noise vs. Frequency Figure 19. Input Current Noise vs. Frequency Rev. 0 | Page 9 of 20 FORWARD ISOLATION (dB) CURRENT NOISE (pA/√Hz) PSRR (dB) 07685-020 07685-013 07685-012 CROSSTALK (dB) VOLTAGE NOISE (nV/√Hz) CMRR (dB) 07685-017 07685-016 07685-015 ADA4855-3 0.08 1.5 V = 3.3V S V = 5V S C = 2.2pF L 0.06 C = 4.4pF 1.0 L C = 6.6pF L 0.04 0.5 0.02 0 0 –0.02 –0.5 –0.04 –1.0 –0.06 –1.5 –0.08 TIME (10ns/DIV) TIME (10ns/DIV) Figure 23. Small Signal Transient Response vs. Supply Voltage Figure 26. Large Signal Transient Response vs. Capacitive Load 0.08 0.08 0.06 0.06 C = 2.2pF L 0.04 C = 4.4pF 0.04 L C = 2.2pF L C = 6.6pF L C = 4.4pF L C = 6.6pF 0.02 0.02 L 0 0 –0.02 –0.02 –0.04 –0.04 –0.06 –0.06 V = 3.3V S –0.08 –0.08 TIME (10ns/DIV) TIME (10ns/DIV) Figure 27. Small Signal Transient Response vs. Capacitive Load Figure 24. Small Signal Transient Response vs. Capacitive Load 23.7 1.5 R = 150Ω L R = 1kΩ L 1.0 23.2 0.5 22.7 0 –0.5 22.2 –1.0 –1.5 21.7 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 TIME (10ns/DIV) SUPPLY VOLTAGE (V) Figure 28. Quiescent Current vs. Supply Voltage Figure 25. Large Signal Transient Response vs. Load Resistance Rev. 0 | Page 10 of 20 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 07685-021 07685-019 07685-018 QUIESCENT CURRENT (mA) OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 07685-022 07685-023 07685-029 ADA4855-3 4 2.5 2 × V IN 2.0 2 × V IN 3 1.5 2 V V OUT OUT 1.0 1 0.5 0 0 –0.5 –1 –1.0 –2 –1.5 –3 G = 2 –2.0 V = 3.3V IN G = 2 –4 –2.5 TIME (50ns/DIV) TIME (50ns/DIV) Figure 29. Output Overdrive Recovery Figure 32. Output Overdrive Recovery 0.6 2.0 3 V = 1V p-p OUT V = 3.3V V PD S C = 2.2pF L 1.5 V OUT 0.4 2 C = 4.4pF L C = 6.6pF L 1.0 0.2 1 0.5 0 0 0 –0.5 –0.2 –1 –1.0 –0.4 –2 –1.5 –0.6 –3 –2.0 TIME (1µs/DIV) TIME (10ns/DIV) Figure 30. Large Signal Transient Response vs. Capacitive Load Figure 33. Turn-On/Turn-Off Time 0.5 0.5 0.4 0.4 INPUT 0.3 0.3 0.2 0.2 INPUT 0.1 0.1 0 0 ERROR –0.1 –0.1 ERROR –0.2 –0.2 –0.3 –0.3 –0.4 –0.4 V = 3.3V S –0.5 –0.5 TIME (2ns/DIV) TIME (2ns/DIV) Figure 34. Settling Time Figure 31. Settling Time Rev. 0 | Page 11 of 20 OUTPUT VOLTAGE (V) SETTLING TIME (%) VOLTAGE (V) 07685-025 07685-024 07685-026 OUTPUT VOLTAGE (V) SETTLING TIME (%) VOLTAGE (V) 07685-028 07685-027 POWER-DOWN VOLTAGE (V) 07685-129 ADA4855-3 0 100 –10 10 –20 –30 V = 3.3V 1 S –40 V = 5V 0.1 S –50 0.01 –60 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0.1 1 10 100 1000 COMMON-MODE VOLTAGE (V) FREQUENCY (MHz) Figure 35. Input Offset Voltage vs. Common-Mode Voltage Figure 38. Output Impedance vs. Frequency 23.6 5.00 V = 5V S 23.4 4.95 23.2 4.90 23.0 4.85 22.8 4.80 22.6 4.75 V = 3.3V S 22.4 4.70 22.2 4.65 22.0 21.8 4.60 –40 –25 –10 5 20 35 50 65 80 95 110 125 0.01 0.1 1 10 100 LOAD CURRENT (mA) TEMPERATURE (°C) Figure 36. Quiescent Current vs. Temperature Figure 39. Output Saturation Voltage vs. Load Current 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 –40 –20 0 20 40 60 80 100 TEMPERATURE (°C) Figure 37. Offset Drift vs. Temperature Rev. 0 | Page 12 of 20 QUIESCENT CURRENT (mA) OFFSET VOLTAGE (mV) OFFSET VOLTAGE (mV) 07685-034 07685-031 07685-032 SATURATION VOLTAGE (mV) OUTPUT IMPEDANCE (Ω) 07685-036 07685-039 + + + + + + ADA4855-3 TEST CIRCUITS +V S 10µF +V S 10µF 1kΩ 0.1µF 0.1µF 0.1µF 0.1µF 1kΩ V V V OUT IN 1kΩ OUT V IN R R L L 49.9Ω 53.6Ω 1kΩ 10µF 10µF 0.1µF 0.1µF –V –V S S Figure 40. Noninverting Load Configuration Figure 43. Common-Mode Rejection +V +V S S 10µF AC 49.9Ω 0.1µF V V OUT OUT R R L L 49.9Ω 10µF AC 0.1µF –V –V S S Figure 41. Positive Power Supply Rejection Figure 44. Negative Power Supply Rejection +V +V S S 10µF 10µF R R R R G F G F 0.1µF 0.1µF 0.1µF 0.1µF V V OUT OUT V V IN IN C R L L R L 49.9Ω 49.9Ω 10µF 10µF 0.1µF 0.1µF –V –V S S Figure 42. Typical Capacitive Load Configuration Figure 45. Typical Noninverting Gain Configuration Rev. 0 | Page 13 of 20 + + 07685-042 07685-041 07685-043 + + 07685-045 07685-046 07685-044 ADA4855-3 THEORY OF OPERATION The ADA4855 comes in a 16-lead LFCSP that has an exposed The ADA4855 is a voltage feedback op amp that employs a new thermal pad for lower operating temperature. This pad is internally input stage that achieves a high slew rate while maintaining a connected to the negative rail. To avoid printed circuit board (PCB) wide common-mode input range. The input common-mode layout problems, the ADA4855 features a new pinout flow that range of the ADA4855 extends from 200 mV below the negative is optimized for video applications. As shown in Figure 4, the rail to 1 V below the positive rail. This feature makes the ADA4855 noninverting input and output pins of each amplifier are ideal for single-supply applications. In addition, this new input adjacent to each other for ease of layout. stage does not sacrifice noise performance for slew rate. At 6.8 nV/√Hz, the ADA4855 is one of the lowest noise rail-to- The ADA4855 is fabricated in Analog Devices dielectrically rail output video amplifiers in the market. isolated eXtra Fast Complementary Bipolar 3 (XFCB3) process, which results in the outstanding speed and dynamic range Besides a novel input stage, the ADA4855 employs the Analog displayed by the amplifier. Devices, Inc., patented rail-to-rail output stage. This output +V S stage makes efficient use of the power supplies, allowing the op C 1 amp to drive up to three video loads to within 350 mV of the positive power rail. In addition, this output stage provides the amplifier with very fast overdrive characteristics, which is an G OUT m2 +IN important property in video applications. G m1 –IN R C –V S Figure 46. High Level Design Schematic Rev. 0 | Page 14 of 20 07685-147 ADA4855-3 APPLICATIONS INFORMATION GAIN CONFIGURATIONS 20 MHz ACTIVE LOW-PASS FILTER The ADA4855-3 is a single-supply, high speed, voltage feedback The ADA4855-3 triple amplifier lends itself to higher order amplifier. Table 6 provides a convenient reference for quickly active filters. Figure 49 shows a 20 MHz, 6-pole, Sallen-Key determining the feedback and gain set resistor values and low-pass filter. bandwidth for common gain configurations. R7 R8 1kΩ 261Ω 1 Table 6. Recommended Values and Frequency Performance – −3 dB SS Large Signal 0.1 dB OUT1 U1 R1 R2 OP AMP Gain RF RG BW (MHz) Flatness (MHz) 232Ω 1.69kΩ V + IN 1 0 Ω N/A 200 53 C1 C2 2 1 kΩ 1 kΩ 120 50 15pF 6.6pF 5 1 kΩ 200 Ω 45 6 1 Conditions: VS = 5 V, TA = 25°C, RL = 150 Ω. R9 R10 Figure 47 and Figure 48 show the typical noninverting and 1kΩ 261Ω inverting configurations and recommended bypass capacitor values. – OUT2 U2 R3 R4 +V S OP AMP 10µF 309Ω 1.87kΩ + 0.1µF C3 C4 15pF 4.3pF V + IN R11 R12 V ADA4855-3 OUT 1kΩ 261Ω 0.1µF – – 0.1µF OUT3 U3 R5 R6 V OP AMP OUT 261Ω 1.43kΩ 10µF + C5 C6 R –V F S 33pF 3pF R G Figure 49. 20 MHz, 6-Pole Low-Pass Filter Figure 47. Noninverting Gain Configuration The filter has a gain of approximately 6 dB and flat frequency response out to 14 MHz. This type of filter is commonly used at R F the output of a video DAC as a reconstruction filter. The frequency +V S response of the filter is shown in Figure 50. 10µF 10 0.1µF OUT3 0 R G V – OUT2 IN –10 OUT1 V ADA4855-3 OUT –20 0.1µF + 0.1µF –30 10µF –40 –V S –50 –60 –70 Figure 48. Inverting Gain Configuration 1 10 100 200 FREQUENCY (MHz) Figure 50. 20 MHz, Low-Pass Filter Frequency Response Rev. 0 | Page 15 of 20 07685-047 07685-048 MAGNITUDE (dB) 07685-050 07685-049 ADA4855-3 6.5 RGB VIDEO DRIVER 6.0 Figure 51 shows a typical RGB driver application using dual R =150Ω L 5.5 supplies. The gain of the amplifier is set at +2, where RF = RG = R =75Ω L R =50Ω L 1 kΩ. The amplifier inputs are terminated with shunt 75 Ω 5.0 resistors, and the outputs have series 75 Ω resistors for proper 4.5 video matching. In Figure 51, the pin is not shown connected PD to any signal source for simplicity. If the power-down function 4.0 is not used, it is recommended that the PD pin be tied to the V =2V p-p OUT 3.5 G = 2 positive supply or be left floating (not connected). 3.0 75Ω 1kΩ 75Ω 2.5 V (R) 1kΩ OUT 110 100 200 V (R) IN –V S FREQUENCY (MHz) Figure 53. Large Signal Frequency Response vs. Loads 10µF 0.1µF 0.1µF 16 15 14 13 PD (POWER-DOWN) PIN 0.1µF 1 12 The ADA4855-3 is equipped with a PD (power-down) pin +V S 75Ω for all three amplifiers. This allows the user to reduce the V (G) 2 11 IN V (G) OUT ADA4855-3 1kΩ 1kΩ 75Ω quiescent supply current when an amplifier is inactive. The 3 10 power-down threshold levels are derived from the voltage +V 4 9 PD S applied to the +VS pin. When used in single-supply applications, + 0.1µF 10µF 5 6 7 8 this is especially useful with conventional logic levels. The 0.1µF amplifier is enabled when the voltage applied to the PD pin is 0.1µF –V 1kΩ greater than +VS − 1.25 V. In a single-supply application, the S V (B) IN 75Ω voltage threshold is typically +3.75 V, and in a ±2.5 V dual- V (B) OUT 75Ω 1kΩ supply application, the voltage threshold is typically +1.25 V. The amplifier is also enabled when the PD pin is left floating (not Figure 51. RGB Video Driver connected). However, the amplifier is powered down when the DRIVING MULTIPLE VIDEO LOADS voltage on the PD pin is lower than 2.5 V from +VS. If the PD pin is not used, it is best to connect it to the positive supply. Each amplifier in the ADA4855-3 can drive up to three video loads simultaneously, as shown in Figure 52. When driving Table 7. Power-Down Voltage Control three video loads, the ADA4855-3 maintains its excellent PD Pin 5 V ±2.5 V 3 V performance for 0.1 dB flatness and 3 dB bandwidth. Figure 53 Not Active >3.75 V >1.25 V >1.75 V shows the large signal frequency response of the ADA4855-3 Active <2 V <0 V <1 V with three different load configurations: 150 Ω, 75 Ω and 50 Ω. R F 1kΩ 75Ω CABLE 10µF +V S 75Ω V 1 OUT 75Ω 0.1µF R G 1kΩ 75Ω – CABLE 75Ω V 2 ADA4855-3 OUT 0.1µF 75Ω + 75Ω 75Ω CABLE 0.1µF CABLE 75Ω V IN V 3 OUT 10µF 75Ω 75Ω –V S Figure 52. Video Driver Schematic for Triple Video Loads Rev. 0 | Page 16 of 20 07685-051 07685-052 MAGNITUDE (dB) 07685-153 + ADA4855-3 SINGLE-SUPPLY OPERATION POWER SUPPLY BYPASSING The ADA4855-3 is designed for a single power supply. Figure 54 Careful attention must be paid to bypassing the power supply shows the schematic for a single 5 V supply video driver. The pins of the ADA4855-3. High quality capacitors with low input signal is ac-coupled into the amplifier via C1. Resistor R2 equivalent series resistance (ESR), such as multilayer ceramic and Resistor R4 establish the input midsupply reference for the capacitors (MLCCs), should be used to minimize supply voltage amplifier. C5 prevents constant current from being drawn ripple and power dissipation. A large, usually tantalum, 2.2 μF through the gain set resistor. C6 is the output coupling capacitor. to 47 μF capacitor located in close proximity to the ADA4855-3 For more information on ac-coupled single-supply operation of is required to provide good decoupling for lower frequency op amps, see Avoiding Op-Amp Instability Problems in Single- signals. The actual value is determined by the circuit transient Supply Applications, Analog Dialogue, Volume 35, Number 2, and frequency requirements. In addition, 0.1 μF MLCC decoupling March-May, 2001, at www.analog.com. capacitors should be located as close to each of the power supply pins and across both supplies as is physically possible, no more 5V C2 C3 than 1/8-inch away. The ground returns should terminate 1µF 10µF immediately into the ground plane. Locating the bypass capacitor R4 return close to the load return minimizes ground loops and R2 C4 50kΩ 50kΩ 0.01µF 5V improves performance. R3 1kΩ LAYOUT C6 V IN 220µF As is the case with all high speed applications, careful attention R1 C1 V U1 OUT 75Ω 22µF R7 to printed circuit board (PCB) layout details prevents associated R8 75Ω 75Ω board parasitics from becoming problematic. The ADA4855-3 R6 R5 can operate at up to 410 MHz; therefore, proper RF design 1kΩ 1kΩ –V ADA4855-3 S techniques must be employed. The PCB should have a ground C5 22µF plane covering all unused portions of the component side of the board to provide a low impedance return path. Removing the Figure 54. AC-Coupled, Single-Supply Video Driver Schematic ground plane on all layers from the area near and under the input and output pins reduces stray capacitance. Signal lines Another way to configure the ADA4855-3 in single-supply operation is dc-coupled. The common-mode input voltage can connecting the feedback and gain resistors should be kept as short go ~200 mV below ground, which makes it a true single-supply as possible to minimize the inductance and stray capacitance amplifier. However, in video applications, the black level is set at associated with these traces. Termination resistors and loads 0 V, which means that the output of the amplifier must go to should be located as close as possible to their respective inputs ground level as well. The ADA4855-3 has a rail-to-rail output and outputs. Input and output traces should be kept as far apart as possible to minimize coupling (crosstalk) through the board. that can swing to within 100 mV from either rail. Figure 55 Adherence to microstrip or stripline design techniques for long shows the schematic for adding 50 mV dc offset to the input signal traces (greater than 1 inch) is recommended. For more signal so that the output is not clipped while still properly terminating the input with 75 Ω. information on high speed board layout, see A Practical Guide 5V to High-Speed Printed-Circuit-Board Layout, Analog Dialogue, C1 10µF Volume 39, September 2005, at www.analog.com. C2 5V 0.1µF R1 3.74kΩ V IN R2 V U1 OUT 76.8Ω R5 R6 75Ω 75Ω R4 R3 1kΩ 1kΩ ADA4855-3 –V S Figure 55. DC-Coupled, Single-Supply Video Driver Schematic Rev. 0 | Page 17 of 20 07685-156 07685-155 2.25 2.10 SQ 1.95 ADA4855-3 OUTLINE DIMENSIONS 4.00 0.60 MAX BSC SQ (BOTTOM VIEW) 0.60 MAX PIN 1 INDICATOR 13 16 1 12 PIN 1 0.65 BSC INDICATOR TOP 3.75 VIEW BSC SQ 0.75 9 0.60 4 8 5 0.50 0.25 MIN 0.80 MAX 12° MAX 1.95 BSC 0.65 TYP 0.05 MAX FOR PROPER CONNECTION OF 1.00 0.02 NOM THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND 0.85 0.35 FUNCTION DESCRIPTIONS 0.80 0.20 REF 0.30 COPLANARITY SECTION OF THIS DATA SHEET. SEATING 0.08 0.25 PLANE COMPLIANT TO JEDEC STANDARDS MO-220-VGGC Figure 56.16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 4 mm × 4 mm Body, Very Thin Quad (CP-16-4) Dimensions shown in millimeters ORDERING GUIDE Model Temperature Range Package Description Package Option Ordering Quantity 1 ADA4855-3YCPZ-R2 –40°C to +105°C 16-Lead LFCSP_VQ CP-16-4 250 1 ADA4855-3YCPZ-R7 –40°C to +105°C 16-Lead LFCSP_VQ CP-16-4 1,500 1 ADA4855-3YCPZ-RL –40°C to +105°C 16-Lead LFCSP_VQ CP-16-4 5,000 1 Z = RoHS Compliant Part. Rev. 0 | Page 18 of 20 072808-A ADA4855-3 NOTES Rev. 0 | Page 19 of 20 ADA4855-3 NOTES ©2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07685-0-11/08(0) Rev. 0 | Page 20 of 20