ANALOG DEVICES ADA4800

Low Power, High Speed CCD Buffer Amplifier ADA4800 FEATURES FUNCTIONAL BLOCK DIAGRAM Integrated active load and gain of 1 buffer ADA4800 Very low buffer power consumption 1 6 IN ISF I As low as 20 mW on chip ISF Power save feature to reduce active load current by GPO I I AL BUFF I control CC 2 5 VEE VCC High buffer speed +1 400 MHz, −3 dB bandwidth 415 V/μs slew rate I IDRV Fast settling time to 1%, 2 V step: 5 ns 3 4 OUT IDRV Adjustable buffer bandwidth Push-pull output stage Figure 1. Adjustable active load current Small package: 1.6 mm × 1.6 mm × 0.55 mm APPLICATIONS CCD image sensor output buffer Digital still cameras Camcorders GENERAL DESCRIPTION The ADA4800 is voltage buffer integrated with an active load. The versatility of the ADA4800 allows for seamless interfacing The buffer is a low power, high speed, low noise, high slew rate, with many CCD sensors from various manufacturers. fast settling, fixed gain of 1 monolithic amplifier for charge- The ADA4800 is designed to operate at supply voltages as low coupled device (CCD) applications. For CCD applications, the as 4 V and up to 17 V. It is available in a 1.6 mm × 1.6 mm × active load current source (I ) can load the open source CCD AL 0.55 mm, 6-lead LFCSP package and is rated to operate over the sensor outputs and the buffer can drive the AFE load. The active o o industrial temperature range of −40 C to +85 C. current load can also be switched off, to use the ADA4800 as just V ISF a unity gain buffer. The buffer consumes only 20 mW of static + R R ISF IDRV 3V 0.1µF 10µF 15V power. In applications where power savings is critical, the 10kΩ 249kΩ ADA4800 features a power save mode (see the Power Save ISF VCC IDRV 6 5 4 Mode section), which further reduces the total current I IDRV I ISF consumption. The bandwidth of the ADA4800 buffer is also I BUFF ADA4800 fully adjustable through the IDRV pin. +1 The buffer of the ADA4800 employs a push-pull output stage architecture, providing drive current and maximum slew I AL 1 2 3 capability for both rising and falling signal transitions. At a IN VEE OUT 5 mA quiescent current setting, it provides 400 MHz, −3 dB 10Ω 1kΩ 49.9Ω bandwidth, which makes this buffer well suited for CCD 22pF sensors from machine vision to digital still camera applications. 7.5V 7.5V The ADA4800 is ideal for driving the input of the Analog Devices, Inc., 12-bit and 14-bit high resolution analog Figure 2. Typical Test Circuit front ends (AFE) such as the AD9928, AD9990, AD9920A, AD9923A, and AD997x family. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 09162-001 09162-102 ADA4800 TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................6 Applications ....................................................................................... 1 Test Circuit .........................................................................................9 Functional Block Diagram .............................................................. 1 Theory of Operation ...................................................................... 10 General Description ......................................................................... 1 Setting Active Load Current with Pin 6 (ISF) ........................ 10 Revision History ............................................................................... 2 Setting Bandwidth with Pin 4 (IDRV)..................................... 10 Specif ica t ions ..................................................................................... 3 Applications Information .............................................................. 11 Buffer Electrical Characteristics ................................................. 3 Open Source CCD Output Buffer ............................................ 11 Active Current Load Electrical Characteristics ........................ 3 Power Save Mode ....................................................................... 11 Absolute Maximum Ratings ............................................................ 4 Power Supply Bypassing ............................................................ 12 Thermal Resistance ...................................................................... 4 Power Sequencing ...................................................................... 12 ESD Caution .................................................................................. 4 Outline Dimensions ....................................................................... 13 Pin Configuration and Function Descriptions ............................. 5 Ordering Guide .......................................................................... 13 REVISION HISTORY 7/10—Rev. 0 to Rev. A Deleted Figure 15 .............................................................................. 7 Changes to Setting Active Load Current with Pin 6 ISF Section and Setting Bandwidth with Pin 4 (IDRV) Section ................... 10 6/10—Revision 0: Initial Version Rev. A | Page 2 of 16 ADA4800 SPECIFICATIONS BUFFER ELECTRICAL CHARACTERISTICS T = 25°C, V = 15 V, V = 0 V, R = 249 kΩ connected to V , R = 1 kΩ in parallel with 22 pF in series with 10 Ω, V = 7.5 V, A CC EE IDRV IDRV LOAD IN unless otherwise noted (see Figure 2 for a test circuit). Table 1. Parameter Condition Min Typ Max Unit GAIN Voltage Gain V = 6.5 V to 8.5 V, R = 0 Ω 0.995 0.998 1.005 V/V IN ISF INPUT/OUTPUT CHARACTERISTICS I/O Offset Voltage 30 41 mV IDRV Current R = 249 kΩ, V = 15 V 52 59 μA IDRV IDRV Input/Output Voltage Range V + 1.4 V − 1.4 V EE CC Input Bias Current (IBUFF) 1 μA DYNAMIC PERFORMANCE −3 dB Bandwidth R = 300 kΩ (I = 1.1 mA), V = 0.1 V p-p 182 MHz IDRV CC OUT RIDRV = 150 kΩ (ICC = 2.1 mA), VOUT = 0.1 V p-p 288 MHz RIDRV = 50 kΩ (ICC = 4.7 mA), VOUT = 0.1 V p-p 400 MHz Slew Rate VOUT = 2 V step 415 V/μs Rise Time V = 7.5 V to 8.5 V, 10% to 90% 2.2 ns IN Fall Time V = 8.5 V to 7.5 V, 10% to 90% 1.8 ns IN 1% Settling Time V = 9.5 V to 7.5 V (falling edge) 5 ns IN VIN = 7.5 V to 9.5 V (rising edge) 4.5 ns VIN = 8.5 V to 7.5 V (falling edge) 4.5 ns V = 7.5 V to 8.5 V (rising edge) 4 ns IN I/O Delay Time V = 8.5 V to 7.5 V (falling edge) 0.4 ns IN V = 7.5 V to 8.5 V (rising edge) 0.35 ns IN Output Voltage Noise @ 20 MHz 1.5 nV/√Hz POWER SUPPLY Supply Voltage Range 4 15 17 V Supply Current (ICC) 1.4 1.8 mA OPERATING TEMPERATURE RANGE −40 +85 °C ACTIVE CURRENT LOAD ELECTRICAL CHARACTERISTICS TA = 25°C, VEE = 0 V, VISF = 3 V, RISF = 10 kΩ connected to VISF, VIN = 7.5 V, unless otherwise noted (see Figure 2 for a test circuit). Table 2. Parameter Condition Min Typ Max Unit INPUT/OUTPUT CHARACTERISTICS Active Load Current (I ) V = 0 V 1 μA AL ISF VISF = 3 V 3 mA VISF = 7.5 V 12.7 mA ISF Current (I) R = 10 kΩ 111 120 μA ISF ISF Input Voltage Range V + 1.7 V V EE CC OPERATING TEMPERATURE RANGE −40 +85 °C Rev. A | Page 3 of 16 ADA4800 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE TA = 25°C, unless otherwise noted. θ is specified for the worst-case conditions, that is, a device JA Table 2. soldered in a circuit board for surface-mount packages. Parameter Rating Table 3. Thermal Resistance Supply Voltage 18 V Input Voltage V to V Package Type θ Unit EE CC JA ISF Pin VEE to VCC 6-Lead LFCSP 160 °C/W IDRV Pin VEE to VCC Storage Temperature Range −65°C to +150°C ESD CAUTION Operating Temperature Range −40°C to +85°C Junction Temperature Range −65°C to +150°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. A | Page 4 of 16 ADA4800 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ADA4800 IN 1 6 ISF EPAD VEE 2 5 VCC OUT 3 4 IDRV NOTES 1. EXPOSED PAD IS NOT INTERNALLY CONNECTED TO DIE. CONNECT TO ANY LOW IMPEDANCE NODE OR LEAVE FLOATING. Figure 3. Pin Configuration Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1 IN Input. Connect this pin to the CCD sensor output. 2 VEE Negative Power Supply Voltage. 3 OUT Output. Connect this pin to the AFE input. 4 IDRV Bandwidth Adjustment Pin. Connect this pin to VCC or an external voltage with an external resistor. This pin allows bandwidth to be controlled by adjusting I . This pin can also be used to power down the buffer. CC 5 VCC Positive Power Supply Voltage. 6 ISF Active Load Current Adjustment Pin. Connect to VCC or an external voltage with an external resistor. This pin can also be connected to the microcontroller logic output through an external resistor for power save mode. This pin can also be used to power down the active current load. EPAD EPAD Exposed Pad. Not internally connected to die. Connect to any low impedance node or leave floating. Rev. A | Page 5 of 16 09162-002 ADA4800 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VCC = 7.5 V, VEE = −7.5 V, RIDRV = 249 kΩ connected to VIDRV, VISF = −4.5 V, RISF = 10 kΩ connected to VISF, VIN shunt terminated with 49.9 Ω to 0 V, RLOAD = 1 kΩ in parallel with 22 pF in series with 10 Ω to 0 V. 1 3 R = 50kΩ IDRV R = 50kΩ IDRV 0 0 –3 –1 –6 –2 R = 150kΩ IDRV –9 R = 150kΩ –3 IDRV –12 –4 –15 R = 200kΩ IDRV R = 200kΩ IDRV –5 –18 –6 –21 R = 300kΩ IDRV R = 300kΩ IDRV –7 –24 –8 –27 V = 100mV p-p V = 2V p-p OUT OUT –9 –30 1M 10M 100M 1G 1M 10M 100M 1G FREQUENCY (Hz) FREQUENCY (Hz) Figure 4. Small Signal Frequency Response with Various IDRV Resistances Figure 7. Large Signal Frequency Response with Various IDRV Resistances 3 1.5 2.4 T = –40°C A 0 1.0 2.0 –3 0.5 1.6 T = +25°C A T = +85°C A –6 01.2 V – V IN OUT V OUT –9 –0.5 0.8 –12 –1.0 0.4 V = 100mV p-p OUT –15 –1.5 0 1M 10M 100M 1G 036 147 258 910 FREQUENCY (Hz) TIME (ns) Figure 5. Small Signal Frequency Response at Various Temperatures Figure 8. Settling Time, 2 V to 0 V Output Transition 2.0 1.4 2.0 1.4 1.5 1.2 1.5 1.2 1.0 1.0 1.0 1.0 0.5 0.8 0.5 0.8 0 0.6 0 0.6 V – V IN OUT –0.5 0.4 –0.5 0.4 V – V IN OUT –1.0 0.2 –1.0 0.2 V OUT V OUT –1.5 0 –1.5 0 –2.0 –0.2 –2.0 –0.2 0369 142587 0369 142587 TIME (ns) TIME (ns) Figure 9. Settling Time, 0 V to 1 V Output Transition Figure 6. Settling Time, 1 V to 0 V Output Transition Rev. A | Page 6 of 16 % SETTLING ERROR GAIN (dB) GAIN (dB) V (V) OUT 09162-004 09162-003 09162-005 % SETTLING ERROR % SETTLING ERROR GAIN (dB) V (V) V (V) OUT OUT 09162-006 09162-008 09162-007 ADA4800 800 1.2 1.0 700 0.8 600 1V TO 0V PULSE 0.6 INPUT OUTPUT 500 0.5V TO 0V PULSE 0.4 400 0V TO 0.5V PULSE 0.2 300 0 0V TO 1V PULSE 200 –0.2 11 12 13 14 15 16 01 1 2 3 4 5 6 7 8 90 SUPPLY VOLTAGE (V) TIME (ns) Figure 10. Input to Output Delay Time vs. Supply Voltage Figure 13. Negative Pulse Response, 1 V to 0 V 1.2 2.5 1.0 2.0 INPUT 0.8 1.5 INPUT 0.6 OUTPUT 1.0 OUTPUT 0.4 0.5 0.2 0 0 –0.2 –0.5 01 129 3 4 5 6 7 80 13 15 17 19 21 23 25 27 TIME (ns) TIME (ns) Figure 11. Positive Pulse Response, 0 V to 1 V Figure 14. Negative Pulse Response, 2 V to 0 V 2.5 30 R = 10kΩ ISF 2.0 25 1.5 20 INPUT 1.0 15 OUTPUT 0.5 10 0 5 –0.5 0 01 2 4 6 8 10 124 –7.5 –5.5 –3.5 –1.5 0.5 2.5 4.5 6.5 TIME (ns) V (V) ISF Figure 12. Positive Pulse Response, 0 V to 2 V Figure 15. Input Current vs. Voltage on ISF Pin (VISF) Rev. A | Page 7 of 16 PULSE RESPONSE (V) PULSE RESPONSE (V) INPUT TO OUTPUT DELAY TIME (ps) 09162-011 09162-010 09162-009 PULSE RESPONSE (V) PULSE RESPONSE (V) ACTIVE LOAD CURRENT, I (mA) AL 09162-018 09162-014 09162-013 ADA4800 0.14 1.6 0.12 1.4 I ISF 0.10 1.2 1.0 0.08 0.8 0.06 I 0.6 IDRV 0.04 0.4 0.02 0.2 0 0 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 –7.5 –5.5 –3.5 –1.5 0.5 2.5 4.5 6.5 TEMPERATURE (°C) V (V) IDRV Figure 16. ISF and IDRV Currents vs. Temperature Figure 18. I vs. Voltage on IDRV Pin (V ) CC IDRV 0 700 600 –5 500 400 –10 300 200 –15 100 –20 0 –100 –25 –200 –300 –30 –400 –500 –35 –600 –40 –700 –40 –15 10 35 60 85 02 46 8 10 12 14 TEMPERATURE (°C) V (V) IN Figure 17. VOS vs. Temperature Figure 19. Output Offset Voltage vs. Input Voltage Rev. A | Page 8 of 16 V (mV) OS CURRENT (mA) 09162-019 09162-020 V (mV) I (mA) OS CC 09162-022 09162-021 ADA4800 TEST CIRCUIT V ISF 0.1µF + R R 3V ISF IDRV 15V 10µF 10kΩ 249kΩ ISF VCC IDRV 6 5 4 I DRV I SF I BUFF ADA4800 +1 I AL 1 2 3 IN VEE OUT 10Ω 1kΩ 49.9Ω 22pF 7.5V 7.5V Figure 20. Typical Current Flow Rev. A | Page 9 of 16 2.96mA 0.11mA 1.41mA 4.68mA 0.05mA 09162-026 ADA4800 THEORY OF OPERATION The ADA4800 is a buffer integrated with an active load. Each Figure 22 illustrates an ADA4800 application configuration for element (the active load and the buffer) operates independently, using this power save feature. as described in the following sections. An external resistor connected between the ISF and the microcontroller GPO pin determines the amount of current SETTING ACTIVE LOAD CURRENT WITH PIN 6 (ISF) that flows into the input pin. This current can be calculated The ISF pin is used to establish the value of the active current by using Equation 1 and Equation 2. load (IAL). Set the ISF current using Equation 1. SETTING BANDWIDTH WITH PIN 4 (IDRV) V −1.55 V ISF I = (1) ISF The IDRV pin establishes the buffer’s ICC quiescent current. R + 3 kΩ ISF As I is increased, power dissipation and bandwidth both CC where: increase. Set the current using Equation 3. V is referenced to Pin 2. V can be an external voltage source, ISF ISF V − 0.8V IDRV VCC, or a GPO output as explained in the following paragraphs. I = (3) IDRV R + 28 kΩ RISF is the external resistor between the ISF pin and VISF. IDRV The active load current (into the IN pin) is directly proportional where: to IISF and can be calculated by Equation 2. VIDRV is referenced to Pin 2. VIDRV can be an external voltage source or V . CC I = I × 27 (2) AL ISF R is the external resistor between the IDRV pin and V . IDRV IDRV The ADA4800 allows for additional power savings by reducing The I current is directly proportional to I and can be CC IDRV the active load current. The active load current can be logically calculated by Equation 4. controlled by connecting the ISF pin to any general-purpose output (GPO) pin of a system microcontroller through an ICC = IIDRV × 26 (4) external resistor. A GPO logic high enables the flow of the Applying –VS to the IDRV pin shuts down the buffer. active load current. Appling –VS or connecting a high-Z to the ISF pin places the ADA4800 into power save mode by shutting down the active load current. Rev. A | Page 10 of 16 ADA4800 APPLICATIONS INFORMATION ADA4800 as an open source CCD buffer configured for using OPEN SOURCE CCD OUTPUT BUFFER this power save feature. Power save mode allows IAL current to With low power, high slew rate, and fast settling time, the be logically controlled by connecting the ISF pin to any general- ADA4800 is the ideal solution for an output buffer for CCD purpose output (GPO) pin of the system microcontroller through sensors with an open source output configuration. Figure 21 an external resistor. A GPO logic high enables the flow of input shows a typical application circuit for the ADA4800 as a CCD sink current, while a logic low disables the input sink current sensor output buffer. and asserts the power save mode. The output of the CCD is connected directly to the IN pin V ISF of the ADA4800, whose OUT pin is then ac-coupled into 0V TO 3V + R R ISF IDRV 47µF 15V GPO PIN 0.1µF the input of the analog front end. 10kΩ 249kΩ 0.1µF V ISF ISF VCC IDRV 6 5 4 0.1µF + I R R IDRV ISF IDRV 15V 47µF 15V 0.1µF I ISF 120kΩ 249kΩ 0.1µF I BUFF ADA4800 ISF VCC IDRV +1 6 5 4 0.1µF I IDRV I ISF I BUFF ADA4800 I AL +1 1 2 3 IN VEE OUT CCD AFE I AL 1 2 3 IN VEE OUT Figure 22. Using GPO to Drive ISF Voltage CCD AFE Figure 23 shows an example of the ADA4800 power save feature. Figure 21. Typical Application Block Diagram 20kΩ GPO1 To help reduce the effects of power supply noise coupling into AFE 20kΩ ISF GPO2 the ISF and IDRV pins, use 0.1 μF ceramic bypass decoupling ADA4800 capacitors. For best performance, place these capacitors as MAIN BOARD FPC close to each of these pins as is physically possible. Figure 23. Example Block Diagram for Sink Current Selection POWER SAVE MODE Three combinations of IAL are provided with Figure 23. Selection of the IAL is controlled by the logic signals applied to The buffer of the ADA4800 consumes only 20 mW of static the GPO1 and GPO2 pins. Table 5 summarizes the IAL selections. power. To achieve even more power savings, the ADA4800 active load current can be switched off during standby mode or reduced during monitoring mode. Figure 22 illustrates the Table 5. Input Sink Current Selection Mode GPO1 GPO2 Resistance (kΩ) Active Load Current, IAL (mA) Standby High-Z High-Z High-Z 0 0 0 N/A Sleep High-Z 1 20 1.90 1 High-Z 20 Active 1 1 10 3.36 Rev. A | Page 11 of 16 09162-027 09162-029 09162-028 ADA4800 POWER SEQUENCING POWER SUPPLY BYPASSING All I/O pins are ESD protected with internal back-to-back Attention must be paid to bypassing the power supply pin of diodes connected to VCC and GND as shown in Figure 24. the ADA4800. Use high quality capacitors with low equivalent With the ADA4800 supply turned off (VCC = 0 V), a voltage on series resistance (ESR), such as multilayer ceramic capacitors an I/O pin can turn on the protection diodes and cause permanent (MLCCs), to minimize supply voltage ripple and power dissipa- damage or destroy the IC. To prevent this condition during tion. A large, usually tantalum, 2.2 μF to 47 μF capacitor located power-on, no voltages should be applied to any I/O pins until in close proximity to the ADA4800 is required to provide good VCC is fully on and settled. During power-off, I/O pin voltages decoupling for lower frequency signals. The actual value is should be removed or reduced to 0 V before VCC is turned off. determined by the circuit transient and frequency requirements. In VCC addition, 0.1 μF MLCC decoupling capacitors should be located as close to the power supply pin as is physically possible, no more than ⅛ inch away. The ground returns should terminate imme- EXTERNAL ADA4800 PIN diately into the ground plane. Locating the bypass capacitor return close to the load return minimizes ground loops and improves performance. Figure 24. Simplified Input/Output Circuitry In the presence of a voltage on an I/O pin with V = 0 V, the CC current should be limited to 5 mA or less by the source or by adding a series resistor. Rev. A | Page 12 of 16 09162-030 ADA4800 OUTLINE DIMENSIONS 1.15 1.05 1.65 0.95 1.60 SQ 1.55 0.50 BSC 4 6 PIN 1 INDEX EXPOSED 0.60 PAD AREA 0.50 0.375 0.40 0.300 0.225 3 1 TOP VIEW BOTTOM VIEW FOR PROPER CONNECTION OF 0.60 THE EXPOSED PAD, REFER TO 0.05 MAX 0.55 THE PIN CONFIGURATION AND 0.02 NOM 0.50 FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. SEATING 0.30 PLANE 0.152 REF 0.25 0.20 Figure 25. 6-Lead Lead Frame Chip Scale Package [LFCSP_UD] 1.60 mm × 1.60 mm Body, Ultra Thin, Dual Lead (CP-6-4) Dimensions shown in millimeters ORDERING GUIDE 1 Model Temperature Range Package Description Package Option Branding ADA4800ACPZ-R2 −40°C to +85°C 6-Lead Lead Frame Chip Scale Package [LFCSP_UD] CP-6-4 H2E ADA4800ACPZ-R7 −40°C to +85°C 6-Lead Lead Frame Chip Scale Package [LFCSP_UD] CP-6-4 H2E ADA4800ACPZ-RL −40°C to +85°C 6-Lead Lead Frame Chip Scale Package [LFCSP_UD] CP-6-4 H2E 1 Z = RoHS Compliant Part. Rev. A | Page 13 of 16 PIN 1 INDICATOR (R 0.15) 101409-A ADA4800 NOTES Rev. A | Page 14 of 16 ADA4800 NOTES Rev. A | Page 15 of 16 ADA4800 NOTES ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09162-0-7/10(A) Rev. A | Page 16 of 16