ANALOG DEVICES ADA4692-2

Low Power, 3.6 MHz, Low Noise, Rail-to- Rail Output, Operational Amplifiers ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 The ADA4691/ADA4692 family is fully specified over the extended FEATURES industrial temperature range (−40°C to +125°C). The ADA4691-2 Low power: 180 μA typical is available in a 10-lead LFCSP and a 9-ball WLCSP. The ADA4692-2 Very low input bias currents: 0.5 pA typical is available in an 8-lead SOIC and 8-lead LFCSP. The ADA4691-4 is Low noise: 16 nV/√Hz typical available in a 16-lead LFCSP. The ADA4692-4 is available in a 14-lead 3.6 MHz bandwidth TSSOP. For pin configurations, see the Pin Configurations section. Offset voltage: 500 μV typical Low offset voltage drift: 4 μV/°C maximum Low distortion: 0.003% THD + N 2.7 V to 5 V single supply or ±1.35 V to ±2.5 V dual supply 1 Available in very small 2 mm × 2 mm LFCSP packages ADA4692-2 V = ±2.5V SY A = –1 V APPLICATIONS T = 25°C A Photodiode amplifiers 0.1 Sensor amplifiers Portable medical and instrumentation R = 600Ω L Portable audio: MP3s, PDAs, and smartphones Communications R = 2kΩ L 0.01 Low-side current sense ADC drivers Active filters Sample-and-hold 0.001 GENERAL DESCRIPTION 10 100 1k 10k 20k FREQUENCY (Hz) The ADA4691-2/ADA4692-2 are dual and the ADA4691-4/ Figure 1. THD + Noise vs. Frequency ADA4692-4 are the quad rail-to-rail output, single-supply –80 amplifiers featuring low power, wide bandwidth, and low noise. ADA4692-2 The ADA4691-2 has two independent shutdown pins, allowing V = ±2.5V SY V = 2.8V p-p IN –90 further reduction in supply current. The ADA4691-4 is a quad A = +1 V T = 25°C A with dual shutdown pins each controlling a pair of amplifiers –100 and is available in the 16-lead LFCSP. The ADA4692-4 is a quad version without shutdown. –110 These amplifiers are ideal for a wide variety of applications. Audio, filters, photodiode amplifiers, and charge amplifiers, all –120 benefit from this combination of performance and features. Additional applications for these amplifiers include portable –130 consumer audio players with low noise and low distortion that provide high gain and slew rate response over the audio band at –140 low power. Industrial applications with high impedance sensors, 100 1k 10k 100k FREQUENCY (Hz) such as pyroelectric and IR sensors, benefit from the high Figure 2. Channel Separation vs. Frequency impedance and low 0.5 pA input bias, low offset drift, and enough bandwidth and response for low gain applications. Table 1. Micropower Low Power Low Power with Shutdown Standard Op Amp With Shutdown High Bandwidth Single AD8613 AD8591 AD8691 Dual AD8617 ADA4692-2 ADA4691-2 AD8592 AD8692 Quad AD8619 ADA4692-4 ADA4691-4 AD8594 AD8694 Rev. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ©2009–2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. CHANNEL SEPARATION (dB) THD + N (%) 07950-141 07950-142 ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 TABLE OF CONTENTS Features .............................................................................................. 1  ESD Caution...................................................................................6  Applications....................................................................................... 1  Pin Configurations............................................................................7  General Description ......................................................................... 1  Typical Performance Characteristics ..............................................8  Revision History ............................................................................... 2  Shutdown Operation...................................................................... 16  Specifications..................................................................................... 3  Input Pin Characteristics........................................................... 16  Electrical Characteristics—2.7 V Operation ............................ 3  Input Threshold.......................................................................... 16  Electrical Characteristics—5 V Operation................................ 4  Outline Dimensions....................................................................... 17  Absolute Maximum Ratings............................................................ 6  Ordering Guide .......................................................................... 20  Thermal Resistance ...................................................................... 6  REVISION HISTORY 11/10—Rev. C to Rev. D 6/09—Rev. 0 to Rev. A Changed 5 V to 6 V in Endnote 2, Table 4.................................... 6 Added ADA4691-2, 10 Lead LFCSP........................... Throughout Changes to Table 1.............................................................................3 12/09—Rev. B to Rev. C Changes to Table 2.............................................................................4 Added ADA4691-4, 16-Lead LFCSP .......................... Throughout Changes to Captions for Figure 40, Figure 41, Figure 43, and Added Figure 1, Figure 2, and Table 1; Renumbered Figure 44 .......................................................................................... 13 Sequentially ....................................................................................... 1 Added Shutdown Operations Section ......................................... 15 Changes to Applications Section and General Description Updated Outline Dimensions....................................................... 16 Section................................................................................................ 1 Changes to Ordering Guide .......................................................... 16 Changes to Table 1............................................................................ 3 Changes to Table 2............................................................................ 4 3/09—Revision 0: Initial Version Changes to Table 4............................................................................ 6 Updated Outline Dimensions ....................................................... 17 Changes to Ordering Guide .......................................................... 20 9/09—Rev. A to Rev. B Added ADA4691-2, 9-Ball WLCSP; ADA4692-2, 8-Lead LFCSP; and ADA4692-4, 14-Lead TSSOP................. Throughout Changes to General Description .................................................... 1 Updated Outline Dimensions ....................................................... 16 Changes to Ordering Guide .......................................................... 17 Rev. D | Page 2 of 20 ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 SPECIFICATIONS ELECTRICAL CHARACTERISTICS—2.7 V OPERATION V = 2.7 V, V = V /2, T = 25°C, unless otherwise specified. SY CM SY A Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage V V = −0.3 V to +1.6 V 0.5 2.5 mV OS CM Dual (ADA469x-2) V = −0.1 V to +1.6 V; −40°C < T < +125°C 3.5 mV CM A Quad (ADA469x-4) V = −0.1 V to +1.6 V; −40°C < T < +125°C 4.0 mV CM A Offset Voltage Drift ΔVOS/ΔT −40°C < TA < +125°C 1 4 μV/°C Input Bias Current IB 0.5 5 pA −40°C < T < +125°C 360 pA A Input Offset Current I 1 8 pA OS −40°C < T < +125°C 225 pA A Input Voltage Range −40°C < TA < +125°C −0.3 +1.6 V Common-Mode Rejection Ratio CMRR VCM = −0.3 V to +1.6 V 70 90 dB VCM = −0.1 V to +1.6 V; −40°C < TA < +125°C 62 dB Large Signal Voltage Gain A R = 2 kΩ, V = 0.5 V to 2.2 V 90 100 dB VO L OUT −40°C < T < +85°C 80 dB A −40°C < TA < +125°C 63 dB RL = 600 Ω, VOUT = 0.5 V to 2.2 V 85 95 dB Input Capacitance CIN Differential Mode C 2.5 pF INDM Common Mode C 7 pF INCM Logic High Voltage (Enabled) V −40°C < T < +125°C 1.6 V IH A Logic Low Voltage (Power-Down) VIL −40°C < TA < +125°C 0.5 V Logic Input Current (Per Pin) IIN −40°C < TA < +125°C, 0 V ≤ VSD ≤ 2.7 V 1 μA OUTPUT CHARACTERISTICS Output Voltage High VOH RL = 2 kΩ to GND 2.65 2.67 V −40°C < TA < +125°C 2.6 V RL = 600 Ω to GND 2.55 2.59 V −40°C < T < +125°C 2.5 V A Output Voltage Low V R = 2 kΩ to V 24 30 mV OL L SY −40°C < TA < +125°C 40 mV RL = 600 Ω to VSY 78 95 mV −40°C < TA < +125°C 130 mV Short-Circuit Current I V = V or GND ±15 mA SC OUT SY Closed-Loop Output Impedance Z f = 1 MHz, A = −100 372 Ω OUT V Output Pin Leakage Current −40°C < T < +125°C, shutdown active, V = V 10 nA A SD SS POWER SUPPLY Power Supply Rejection Ratio PSRR V = 2.7 V to 5.5 V 80 90 dB S −40°C < T < +125°C 75 dB A Supply Current Per Amplifier ISY VOUT = VSY/2 165 200 μA −40°C < TA < +125°C 240 μA Supply Current Shutdown Mode ISD All amplifiers shut down, VSD = VSS 10 nA −40°C < T < +125°C 2 μA A Rev. D | Page 3 of 20 ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 Parameter Symbol Test Conditions/Comments Min Typ Max Unit DYNAMIC PERFORMANCE Slew Rate SR RL = 600 Ω, CL = 20 pF, AV = +1 1.1 V/μs RL = 2 kΩ, CL = 20 pF, AV = +1 1.4 V/μs Settling Time to 0.1% t Step = 0.5 V, R = 2 kΩ, 600 Ω 1 μs S L Gain Bandwidth Product GBP R = 1 MΩ, C = 35 pF, A = +1 3.6 MHz L L V Phase Margin Φ R = 1 MΩ, C = 35 pF, A = +1 49 Degrees M L L V Turn-On/Turn-Off Time RL = 600 Ω 1 μs NOISE PERFORMANCE Distortion THD + N AV = −1, RL = 2 kΩ, f = 1 kHz, VIN rms = 0.15 V rms 0.009 % = −1, R = 600 Ω, f = 1 kHz, V rms = 0.15 V rms 0.01 % AV L IN AV = +1, RL = 2 kΩ, f = 1 kHz, VIN rms = 0.15 V rms 0.006 % AV = +1, RL = 600 Ω, f = 1 kHz, VIN rms = 0.15 V rms 0.009 % Voltage Noise en p-p f = 0.1 Hz to 10 Hz 3.1 μV p-p Voltage Noise Density e f = 1 kHz 16 nV/√Hz n f = 10 kHz 13 nV/√Hz ELECTRICAL CHARACTERISTICS—5 V OPERATION VSY = 5 V, VCM = VSY/2, TA = 25°C, unless otherwise specified. Table 3. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage VOS VCM = −0.3 V to +3.9 V 0.5 2.5 mV Dual (ADA469x-2) VCM = −0.1 V to +3.9 V; −40°C < TA < +125°C 3.5 mV Quad (ADA469x-4) VCM = −0.1 V to +3.9 V; −40°C < TA < +125°C 4.0 mV Offset Voltage Drift ΔV/ΔT −40°C < T < +125°C 1 4 μV/°C OS A Input Bias Current I 0.5 5 pA B −40°C < TA < +125°C 360 pA Input Offset Current IOS 1 8 pA −40°C < TA < +125°C 260 pA Input Voltage Range −40°C < T < +125°C −0.3 +3.9 V A Common-Mode Rejection Ratio CMRR V = −0.3 V to +3.9 V 75 98 dB CM V = −0.1 V to +3.9 V; −40°C < T < +125°C 68 dB CM A Large Signal Voltage Gain AVO RL = 2 kΩ, VO = 0.5 V to 4.5 V, VCM = 0 V 95 110 dB −40°C < TA < +85°C 80 dB −40°C < T < +125°C 70 dB A R = 600 Ω, V = 0.5 V to 4.5 V, V = 0 V 90 100 dB L O CM Input Capacitance Differential Mode CINDM 2.5 pF Common Mode CINCM 7 pF Logic High Voltage (Enabled) VIH −40°C < TA < +125°C 2.0 V Logic Low Voltage (Power-Down) V −40°C < T < +125°C 0.8 V IL A Logic Input Current (Per Pin) I −40°C < T < +125°C, 0 V ≤ V ≤ 2.7 V 1 μA IN A SD Rev. D | Page 4 of 20 ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 Parameter Symbol Test Conditions/Comments Min Typ Max Unit OUTPUT CHARACTERISTICS Output Voltage High VOH RL = 2 kΩ 4.95 4.97 V −40°C ≤ TA ≤ +125°C 4.90 V R = 600 Ω to GND 4.85 4.88 V L −40°C ≤ T ≤ +125°C 4.80 V A Output Voltage Low V R = 2 kΩ 30 35 mV OL L −40°C ≤ TA ≤ +125°C 50 mV RL = 600 Ω 100 110 mV −40°C ≤ T ≤ +125°C 155 mV A Short-Circuit Limit I V = V or GND ±55 mA SC OUT SY Closed-Loop Output Impedance Z ADA4691-2, f = 1 MHz, A = −100 364 Ω OUT V ADA4691-2, f = 1 MHz, AV = −100 246 Ω Output Pin Leakage Current −40°C < TA < +125°C, shutdown active, VSD = VSS 10 nA POWER SUPPLY Power Supply Rejection Ratio PSRR VSY = 2.7 V to 5.5 V 80 90 dB −40°C ≤ TA ≤ +125°C 75 dB Supply Current Per Amplifier ISY VOUT = VSY/2 180 225 μA −40°C ≤ T ≤ +125°C 275 μA A Supply Current Shutdown Mode I All amplifiers shut down, V = V 10 nA SD SD SS −40°C ≤ T ≤ +125°C 2 μA A DYNAMIC PERFORMANCE Slew Rate SR R = 2 kΩ, 600 Ω, C = 20 pF, A = +1 1.3 V/μs L L V Settling Time to 0.1% tS VIN = 2 V step, RL = 2 kΩ or 600 Ω 1.5 μs Gain Bandwidth Product GBP RL = 1 MΩ, CL = 35 pF, AV = +1 3.6 MHz Phase Margin ΦM RL = 1 MΩ, CL = 35 pF, AV = +1 52 Degrees Turn-On/Turn-Off Time R = 600 Ω 1 μs L NOISE PERFORMANCE Distortion THD + N AV = −1, RL = 2 kΩ, f = 1 kHz, VIN rms = 0.8 V rms 0.006 % AV = −1, RL = 600 Ω, f = 1 kHz, VIN rms = 0.8 V rms 0.008 % A = +1, R = 2 kΩ, f = 1 kHz, V rms = 0.8 V rms 0.001 % V L IN A = +1, R = 600 Ω, f = 1 kHz, V rms = 0.8 V rms 0.003 % V L IN Voltage Noise e p-p f = 0.1 Hz to 10 Hz 3.2 μV p-p n Voltage Noise Density en f = 1 kHz 16 nV/√Hz en f = 10 kHz 13 nV/√Hz Rev. D | Page 5 of 20 ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 4. θ is specified for the worst-case conditions, that is, a device Parameter Rating JA soldered in a circuit board for surface-mount packages and Supply Voltage 6 V measured using a standard 4-layer board, unless otherwise Input Voltage V − 0.3 V to V + 0.3 V SS DD 1 specified. Input Current ±10 mA Shutdown Pin Rise/Fall Times 50 μs maximum Table 5. Thermal Resistance 2 Differential Input Voltage ±VSY Package Type θJA θJC Unit Output Short-Circuit Duration to GND Indefinite 8-Lead SOIC_N (R-8) 120 45 °C/W Temperature 8-Lead LFCSP (CP-8-6) 125 40 °C/W Storage Temperature Range −65°C to +150°C 1 9-Ball WLCSP (CB-9-3) 77 N/A °C/W Operating Temperature Range −40°C to +125°C 10-Lead LFCSP (CP-10-11) 115 40 °C/W Junction Temperature Range −65°C to +150°C 16-Lead LFCSP (CP-16-22) 75 12 °C/W Lead Temperature (Soldering, 60 sec) 300°C 14-Lead TSSOP (RU-14) 112 35 °C/W 1 Input pins have clamp diodes to the supply pins. Limit the input current to 1 10 mA or less whenever the input signal exceeds the power supply rail by 0.3 V. N/A = not applicable. 2 Differential input voltage is limited to 6 V or the supply voltage, whichever is less. ESD CAUTION Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. D | Page 6 of 20 ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 PIN CONFIGURATIONS BALL A1 OUT A 1 8V+ CORNER ADA4692-2 7OUT B OUT B V+ OUT A –IN A 2 TOP VIEW A1 A2 A3 (Not to Scale) 6 –IN B +IN A 3 –IN B SD A/B –IN A 5 +IN B V– 4 B1 B2 B3 Figure 6. 8-Lead, 2 mm × 2 mm LFCSP (CP-8-6) +IN B V– +IN A C1 C2 C3 OUT A 1 8 V+ ADA4692-2 –IN 2 7 OUT B ADA4691-2 TOP VIEW +IN 3 TOP VIEW 6 –IN B (BALL SIDE DOWN) (Not to Scale) V– 4 5 +IN B Not to Scale Figure 3. 9-Ball Wafer Level Chip Scale WLCSP (CB-9-3) Figure 7. 8-Lead SOIC_N (R-8) 1 1 OUT A 14 14 OUT D 2 2 13 13 –IN A –IN D +IN A 3 3 12 12 +IN D ADA4692-4 TO TOP P V VIIE EW W –IN A 1 8 OUT B V+ 4 4 11 11 V– ADA4691-2 (N (Not ot t to o S Sc ca alle) e) +IN A 2 7 –IN B TOP VIEW +IN B 5 5 10 10 +IN C (Not to Scale) V– 3 6 +IN B –IN B 6 6 9 9 –IN C OUT B 7 7 8 8 OUT C Figure 4. 10-Lead, 2 mm × 2 mm LFCSP (CP-10-11) Figure 8. 14-Lead TSSOP (RU-14) +IN A 1 12 +IN D V+ 2 11 V– ADA4691-4 +IN B 3 10 +IN C –IN B 4 9 –IN C TOP VIEW (Not to Scale) NOTES 1. IT IS RECOMMENDED THAT THE EXPOSED PAD BE CONNCECTED TO V–. Figure 5. 16-Lead, 3 mm × 3 mm LFCSP (CP-16-22) Rev. D | Page 7 of 20 07950-058 07950-002 07950-060 07950-059 07950-001 07950-016 OUT B 5 16 –IN A SD A/B 6 15 OUT A SD A 4 10 OUT A 14 OUT D SD C/D 7 9 V+ SD B 5 OUT C 8 13 –IN D ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 TYPICAL PERFORMANCE CHARACTERISTICS T = 25°C, unless otherwise noted. A 350 700 ADA4692-2 ADA4692-2 V = 2.7V V = 5V SY SY T = 25°C T = 25°C 300 A 600 A –0.3V ≤ V ≤ +1.6V –0.3V ≤ V ≤ +3.9V CM CM SIGNIFIES CENTER SIGNIFIES CENTER 250 OF BIN 500 OF BIN 200 400 150 300 100 200 50 100 0 0 –2.0 –1.6 –1.2 –0.8 –0.4 0 0.4 0.8 1.2 1.6 2.0 –2.0 –1.6 –1.2 –0.8 –0.4 0 0.4 0.8 1.2 1.6 2.0 V (mV) V (mV) OS OS Figure 9. Input Offset Voltage Distribution Figure 12. Input Offset Voltage Distribution 30 30 ADA4692-2 ADA4692-2 V = ±1.35V V = ±2.5V SY SY –40°C < T < +125°C –40°C < T < +125°C A A 25 25 SIGNIFIES CENTER SIGNIFIES CENTER OF BIN OF BIN 20 20 15 15 10 10 5 5 0 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 TCV (µV/°C) TCV (µV/°C) OS OS Figure 10. Input Offset Voltage Drift Distribution Figure 13. Input Offset Voltage Drift Distribution 2.0 2.0 ADA4692-2 ADA4692-2 V = 2.7V V = 5V SY SY 1.5 1.5 T = 25°C T = 25°C A A 1.0 1.0 0.5 0.5 0 0 –0.5 –0.5 –1.0 –1.0 –1.5 –1.5 –2.0 –2.0 –0.5 0 0.5 1.0 1.5 2.0 2.5 –0.5 0 0.5 1.0 1.5 2.02.53.03.54.04.5 5.0 V (V) V (V) CM CM Figure 11. Input Offset Voltage vs. Common-Mode Voltage Figure 14. Input Offset Voltage vs. Common-Mode Voltage Rev. D | Page 8 of 20 V (mV) NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS OS 07950-004 07950-003 07950-005 V (mV) NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS OS 07950-007 07950-006 07950-008 ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 1k 1k ADA4692-2 ADA4692-2 V = ±1.35V V = ±2.5V SY SY T = 25°C T = 25°C A A AVERAGE 20 CHANNELS AVERAGE 20 CHANNELS 100 100 10 10 1 1 0.1 0.1 0.01 0.01 25 35 45 55 65 75 85 95 105 115 125 25 35 45 55 65 75 85 95 105 115 125 TEMPERATURE (°C) TEMPERATURE (°C) Figure 15. Input Bias Current vs. Temperature Figure 18. Input Bias Current vs. Temperature 1k 1k T = 125°C A T = 125°C A 100 100 ADA4692-2 V = 5V SY AVERAGE 20 CHANNELS 10 T = 85°C A 10 T = 85°C A 1 1 T = 25°C A 0.1 T = 25°C 0.1 A 0.01 ADA4692-2 V = 2.7V SY AVERAGE 20 CHANNELS 0.001 0.01 02 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4.7 05 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5.0 V (V) V (V) CM CM Figure 16. Input Bias Current vs. Common-Mode Voltage Figure 19. Input Bias Current vs. Common-Mode Voltage 10k 10k ADA4692-2 ADA4692-2 V = ±1.35V V = ±2.5V SY SY V = (V+) – V V = (V+) – V OH OUT OH OUT 1k 1k (SOURCING) (SOURCING) T = +125°C A T = +125°C A 100 100 T = +85°C A T = +85°C A 10 10 T = +25°C A T = +25°C A 1 T = –40°C 1 A T = –40°C A 0.1 0.1 0.01 0.01 0.001 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 I (mA) I (mA) LOAD LOAD Figure 17. Output Voltage (V ) to Supply Rail vs. Load Current Figure 20. Output Voltage (V ) to Supply Rail vs. Load Current OH OH Rev. D | Page 9 of 20 OUTPUT SATURATION VOLTAGE (mV) I (pA) I (pA) B B 07950-011 07950-010 07950-009 OUTPUT SATURATION VOLTAGE (mV) I (pA) I (pA) B B 07950-014 07950-013 07950-012 ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 10k 10k ADA4692-2 ADA4692-2 V = ±1.35V V = ±2.5V SY SY V = V – (V–) V = V – (V–) OL OUT OL OUT 1k 1k (SINKING) (SINKING) T = +125°C A T = +125°C A 100 100 T = +85°C A T = +85°C A 10 10 T = +25°C A T = +25°C A 1 1 T = –40°C A T = –40°C A 0.1 0.1 0.01 0.01 0.001 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 I (mA) I (mA) LOAD LOAD Figure 21. Output Voltage (V ) to Supply Rail vs. Load Current Figure 24. Output Voltage (V ) to Supply Rail vs. Load Current OL OL 120 120 120 120 100 100 100 100 80 80 80 80 60 60 60 60 C = 20pF C = 20pF L L 40 40 40 40 20 20 20 20 0 0 0 0 –20 –20 –20 –20 C = 200pF C = 200pF L L ADA4692-2 ADA4692-2 V = ±1.35V V = ±2.5V SY SY –40 –40 –40 –40 T = 25°C T = 25°C A A A = –1 A = –1 V V –60 –60 –60 –60 1k 10k 100k 1M 10M 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 22. Open-Loop Gain and Phase vs. Frequency Figure 25. Open-Loop Gain and Phase vs. Frequency 50 50 A = +100 A = +100 V V 40 40 30 30 A = +10 A = +10 V V 20 20 10 10 A = +1 A = +1 V V 0 0 –10 –10 ADA4692-2 ADA4692-2 V = ±1.35V V = ±2.5V –20 SY –20 SY T = 25°C T = 25°C A A R = 600Ω R = 600Ω L L –30 –30 10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 23. Closed-Loop Gain vs. Frequency Figure 26. Closed-Loop Gain vs. Frequency Rev. D | Page 10 of 20 GAIN (dB) OUTPUT SATURATION VOLTAGE (mV) GAIN (dB) PHASE (Degrees) 07950-022 07950-015 07950-021 GAIN (dB) OUTPUT SATURATION VOLTAGE (mV) GAIN (dB) PHASE (Degrees) 07950-025 07950-018 07950-024 ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 1k 1k 100 100 A = –100 A = –100 V V 10 10 A = –10 V A = –10 V 1 1 A = –1 V A = –1 V 0.1 0.1 ADA4692-2 ADA4692-2 V = ±1.35V V = ±2.5V SY SY T = 25°C T = 25°C A A 0.01 0.01 100 1k 10k 100k 1M 10M 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 27. Output Impedance vs. Frequency Figure 30. Output Impedance vs. Frequency 120 120 100 100 80 80 60 60 40 40 20 20 ADA4692-2 ADA4692-2 V = ±1.35V V = ±2.5V SY SY T = 25°C T = 25°C A A 0 0 100 1k 10k 100k 1M 10M 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 28. CMRR vs. Frequency Figure 31. CMRR vs. Frequency 100 100 PSRR– PSRR+ 80 80 PSRR– PSRR+ 60 60 40 40 20 20 0 0 ADA4692-2 ADA4692-2 V = ±1.35V V = ±2.5V SY SY T = 25°C T = 25°C A A –20 –20 100 1k 10k 100k 1M 10M 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 29. PSRR vs. Frequency Figure 32. PSRR vs. Frequency Rev. D | Page 11 of 20 PSRR (dB) CMRR (dB) Z (Ω) OUT 07950-028 07950-027 07950-023 PSRR (dB) CMRR (dB) Z (Ω) OUT 07950-031 07950-030 07950-026 ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 1k 1k 100 100 ADA4692-2 ADA4692-2 V = ±1.35V V = ±2.5V SY SY T = 25°C T = 25°C A A 10 10 0.1 1 10 100 1k 10k 0.1 1 10 100 1k 10k FREQUENCY (Hz) FREQUENCY (Hz) Figure 33. Voltage Noise Density vs. Frequency Figure 36. Voltage Noise Density vs. Frequency 50 45 ADA4692-2 ADA4692-2 V = ±1.35V V = ±2.5V SY SY 45 40 V = 100mV p-p V = 100mV p-p IN IN A = +1 A = +1 V V 40 35 R = 2kΩ R = 2kΩ L L T = 25°C T = 25°C A A 35 30 OVERSHOOT+ 30 25 OVERSHOOT+ 25 OVERSHOOT– 20 20 OVERSHOOT– 15 15 10 10 5 5 0 0 10 100 1k 10 100 1k CAPACITANCE (pF) CAPACITANCE (pF) Figure 34. Small Signal Overshoot vs. Load Capacitance Figure 37. Small Signal Overshoot vs. Load Capacitance ADA4692-2 ADA4692-2 V = ±1.35V V = ±2.5V SY SY GAIN = +1 GAIN = +1 R = 2kΩ R = 2kΩ, L L C = 300pF C = 300pF L L T = 25°C T = 25°C A A TIME (2µs/DIV) TIME (2µs/DIV) Figure 35. Large Signal Transient Response Figure 38. Large Signal Transient Response Rev. D | Page 12 of 20 OVERSHOOT (%) VOLTAGE NOISE DENSITY (nV/ Hz) OUTPUT (500mV/DIV) 07950-034 07950-029 07950-033 OVERSHOOT (%) VOLTAGE NOISE DENSITY (nV/ Hz) OUTPUT (500mV/DIV) 07950-037 07950-032 07950-036 ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 T ADA4692-2 ADA4692-2 V = ±1.35V V = ±2.5V SY SY GAIN = +1 GAIN = +1 R = 2kΩ R = 2kΩ L L C = 200pF C = 200pF L L T = 25°C T = 25°C A A TIME (2µs/DIV) TIME (2µs/DIV) Figure 42. Small Signal Transient Response Figure 39. Small Signal Transient Response ADA4692-2 ADA4692-2 V = ±2.5V V = ±1.35V SY SY GAIN = +1M GAIN = +1M T = 25°C T = 25°C A A TIME (1s/DIV) TIME (1s/DIV) Figure 43. 0.1 Hz to 10 Hz Noise Figure 40. 0.1 Hz to 10 Hz Noise 250 250 ADA4692-2 ADA4692-2 T = +125°C A T = +85°C A 225 200 T = +25°C A 200 150 T = –40°C V = ±2.5V SY A 100 175 V = ±1.35V SY 150 50 125 0 05 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5.0 –40 –25 –10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) V (V) SY Figure 44. Supply Current per Channel vs. Temperature Figure 41. Supply Current per Amplifier vs. Supply Voltage Rev. D | Page 13 of 20 I /CHANNEL (µA) SY OUTPUT (1µV/DIV) OUTPUT (20mV/DIV) 07950-035 07950-040 07950-135 I /AMPLIFIER (µA) SY OUTPUT (1µV/DIV) OUTPUT (20mV/DIV) 07950-043 07950-038 07950-138 ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 1 1 ADA4692-2 ADA4692-2 V = ±1.35V V = ±2.5V SY SY A = –1 A = –1 V V T = 25°C T = 25°C A A 0.1 0.1 R = 600Ω R = 600Ω L L R = 2kΩ R = 2kΩ L L 0.01 0.01 0.001 0.001 10 100 1k 10k 20k 10 100 1k 10k 20k FREQUENCY (Hz) FREQUENCY (Hz) Figure 45. THD + Noise vs. Frequency Figure 48. THD + Noise vs. Frequency 50mV/DIV 50mV/DIV 1V/DIV 1V/DIV ADA4692-2 ADA4692-2 V = ±2.5V SY V = ±1.35V A = –100 SY V T = 25°C T = 25°C A A TIME (4µs/DIV) TIME (4µs/DIV) Figure 46. Positive Overload Recovery Figure 49. Positive Overload Recovery 50mV/DIV 50mV/DIV 1V/DIV 1V/DIV ADA4692-2 ADA4692-2 V = ±2.5V SY V = ±1.35V SY A = –100 V T = 25°C A T = 25°C A TIME (4µs/DIV) TIME (4µs/DIV) Figure 47. Negative Overload Recovery Figure 50. Negative Overload Recovery Rev. D | Page 14 of 20 THD + N (%) 07950-052 07950-050 07950-042 THD + N (%) 07950-053 07950-051 07950-045 ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 1V/DIV 200mV/DIV 10mV/DIV 20mV/DIV ADA4692-2 ADA4692-2 V = ±1.35V V = ±2.5V SY SY ERROR BAND R = 2kΩ R = 2kΩ L L ERROR BAND T = 25°C T = 25°C A A TIME (1µs/DIV) TIME (1µs/DIV) Figure 51. Positive Settling Time to 0.1% Figure 54. Positive Settling Time to 0.1% 200mV/DIV 1V/DIV ERROR BAND ERROR BAND 20mV/DIV 10mV/DIV ADA4692-2 ADA4692-2 V = ±1.35V V = ±2.5V SY SY R = 2kΩ R = 2kΩ L L T = 25°C T = 25°C A A TIME (1µs/DIV) TIME (1µs/DIV) Figure 52. Negative Settling Time to 0.1% Figure 55. Negative Settling Time to 0.1% –80 R1 CS (dB) = 20 log (V /100 = V ) OUT IN 100kΩ V+ V– R2 –90 1kΩ 3 U2 6 U1 5 + V+ V– V IN 2 V– V+ 7 R3 0 –100 – 600Ω 0 0 V– V+ 0 –110 –120 ADA4692-2 V = ±2.5V SY –130 V = 2.8V p-p IN A = +1 V T = 25°C A –140 100 1k 10k 100k FREQUENCY (Hz) Figure 53. Channel Separation (CS) vs. Frequency Rev. D | Page 15 of 20 CHANNEL SEPARATION (dB) 07950-056 07950-054 07950-140 07950-057 07950-055 ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 SHUTDOWN OPERATION INPUT PIN CHARACTERISTICS The ADA4691-2 has a classic CMOS logic inverter input for each shutdown pin, as shown in Figure 56. SD A, SD B V DD P-CHANNEL OUTPUT INPUT N-CHANNEL I = 724mV/1k = 724µA SY Figure 56. CMOS Inverter DUT OUTPUT With slowly changing inputs, the top transistor and bottom transistor may be slightly on at the same time, increasing the TIME (400µs/DIV) supply current. This can be avoided by driving the input with Figure 59. Shutdown Pin Rise Time = 1 ms a digital logic output having fast rise and fall times. Figure 57 INPUT THRESHOLD through Figure 59 show the supply current for both sections The input threshold is approximately 1.2 V above the V− pin when switching simultaneously with rise times of 1 μs, 10 μs, and 1 ms. operating on ground and 5 V and 0.9 V when operating on 2.7 V Clearly, the rise and fall times should be faster than 10 μs. (see Figure 60 and Figure 61). The threshold is relatively stable Using an RC time constant to enable/disable shutdown is not over temperature. For operation on split supplies, the logic swing recommended. may have to be level shifted. 500 ADA4691-2 T = 25°C 450 A V = 5V SY 400 I = 196mV/1k = 196µA SY 350 T = +125°C 300 A T = +85°C A 250 SD A, SD B 200 150 DUT OUTPUT T = +25°C A T = –40°C A 100 50 TIME (400µs/DIV) 0 Figure 57. Shutdown Pin Rise Time = 1 μs 05 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5.0 SD VOLTAGE (V) Figure 60. Supply Current vs. Temperature, V = 5 V SY 300 ADA4691-2 V = 2.7V SY I = 192mV/1k = 196µA SY 250 200 T = +125°C A T = +85°C A 150 SD A, SD B DUT OUTPUT 100 T = +25°C A T = –40°C A 50 TIME (400µs/DIV) Figure 58. Shutdown Pin Rise Time = 10 μs 0 02 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4.7 SD VOLTAGE (V) Figure 61. Supply Current vs. Temperature, VSY = 2.7 V Rev. D | Page 16 of 20 07950-149 07950-151 07950-150 I (µA) I (µA) SY SY 07950-152 07950-156 07950-155 ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 OUTLINE DIMENSIONS 3.10 0.30 3.00 SQ 0.23 2.90 PIN 1 0.18 INDICATOR 13 16 0.50 12 1 BSC EXPOSED 1.75 PAD 1.60 SQ 1.45 9 4 8 5 0.50 0.25 MIN TOP VIEW BOTTOM VIEW 0.40 0.30 FOR PROPER CONNECTION OF 0.80 THE EXPOSED PAD, REFER TO 0.75 0.05 MAX THE PIN CONFIGURATION AND 0.70 FUNCTION DESCRIPTIONS 0.02 NOM SECTION OF THIS DATA SHEET. COPLANARITY SEATING 0.08 PLANE 0.20 REF COMPLIANT TO JEDEC STANDARDS MO-220-WEED-6. Figure 62. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 3 mm × 3 mm Body, Very Very Thin Quad (CP-16-22) Dimensions shown in millimeters 0.645 0.600 1.250 0.415 0.555 1.210 0.400 SEATING 1.170 0.385 3 2 1 PLANE A 0.287 BALL A1 1.260 IDENTIFIER 0.267 1.220 0.247 B 1.180 0.40 BSC C TOP VIEW BOTTOM VIEW 0.05 NOM (BALL SIDE DOWN) (BALL SIDE UP) 0.230 COPLANARITY 0.200 0.170 Figure 63. 9-Ball Wafer Level Chip Scale Package [WLCSP] (CB-9-3) Dimensions shown in millimeters Rev. D | Page 17 of 20 PIN 1 INDICATOR 08-16-2010-E 091709-A ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 0.50 0.45 2.00 BSC SQ PIN 1 INDEX 0.40 AREA 9 10 8 1 0.30 0.25 0.18 6 3 5 4 TOP VIEW BOTTOM VIEW 0.60 0.05 MAX 0.55 0.02 NOM 0.50 COPLANARITY 0.05 SEATING 0.50 0.20 REF PLANE BSC Figure 64. 10-Lead Lead Frame Chip Scale Package [LFCSP_UQ] 2 mm × 2 mm Body, Ultra Thin Quad (CP-10-11) Dimensions shown in millimeters 0.30 2.00 0.25 0.50 BSC BSC SQ 0.18 8 5 0.65 0.60 PIN 1 INDEX 4 1 AREA 0.55 TOP VIEW BOTTOM VIEW 0.60 0.05 MAX 0.55 0.02 NOM 0.50 SEATING PLANE 0.20 REF Figure 65. 8-Lead Lead Frame Chip Scale Package [LFCSP_UD] 2 mm × 2 mm Body, Ultra Thin, Dual Lead (CP-8-6) Dimensions shown in millimeters Rev. D | Page 18 of 20 PIN 1 INDICATOR PIN 1 INDICATOR 062409-A 081308-D ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 5.00 (0.1968) 4.80 (0.1890) 85 6.20 (0.2441) 4.00 (0.1574) 1 5.80 (0.2284) 3.80 (0.1497) 4 0.50 (0.0196) 1.27 (0.0500) 45° BSC 1.75 (0.0688) 0.25 (0.0099) 1.35 (0.0532) 0.25 (0.0098) 8° 0.10 (0.0040) 0° COPLANARITY 0.51 (0.0201) 1.27 (0.0500) 0.10 0.31 (0.0122) 0.25 (0.0098) SEATING 0.40 (0.0157) PLANE 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 66. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 5.10 5.00 4.90 14 8 4.50 6.40 4.40 BSC 4.30 1 7 PIN 1 0.65 BSC 1.05 1.20 1.00 0.20 MAX 0.80 0.09 0.75 0.15 8° 0.60 SEATING 0° 0.05 0.45 0.30 PLANE COPLANARITY 0.19 0.10 COMPLIANT TO JEDEC STANDARDS MO-153-AB-1 Figure 67. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters Rev. D | Page 19 of 20 012407-A 061908-A ADA4691-2/ADA4691-4/ADA4692-2/ADA4692-4 ORDERING GUIDE 1 Model Temperature Range Package Description Package Option Branding ADA4691-2ACBZ-R7 −40°C to +125°C 9-Ball WLCSP CB-9-3 A2C ADA4691-2ACBZ-RL −40°C to +125°C 9-Ball WLCSP CB-9-3 A2C ADA4691-2ACPZ-R7 −40°C to +125°C 10-Lead LFCSP_UQ CP-10-11 A2 ADA4691-2ACPZ-RL −40°C to +125°C 10-Lead LFCSP_UQ CP-10-11 A2 ADA4691-4ACPZ-R2 −40°C to +125°C 16-Lead LFCSP_WQ CP-16-22 A2P ADA4691-4ACPZ-R7 −40°C to +125°C 16-Lead LFCSP_WQ CP-16-22 A2P ADA4691-4ACPZ-RL −40°C to +125°C 16-Lead LFCSP_WQ CP-16-22 A2P ADA4692-2ACPZ-R7 −40°C to +125°C 8-Lead LFCSP_UD CP-8-6 A3 ADA4692-2ACPZ-RL −40°C to +125°C 8-Lead LFCSP_UD CP-8-6 A3 ADA4692-2ARZ −40°C to +125°C 8-Lead SOIC_N R-8 ADA4692-2ARZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8 ADA4692-2ARZ-RL −40°C to +125°C 8-Lead SOIC_N R-8 ADA4692-4ARUZ −40°C to +125°C 14-Lead TSSOP RU-14 ADA4692-4ARUZ-RL −40°C to +125°C 14-Lead TSSOP RU-14 1 Z = RoHS Compliant Part. ©2009–2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07950-0-11/10(D) Rev. D | Page 20 of 20