ANALOG DEVICES ADA4665-2

16 V, 1 MHz, CMOS Rail-to-Rail Input/Output Operational Amplifier ADA4665-2 FEATURES PIN CONFIGURATIONS Lower power at high voltage: 290 μA per amplifier typical OUT A 1 8 V+ Low input bias current: 1 pA maximum ADA4665-2 –IN A 2 7 OUT B TOP VIEW Wide bandwidth: 1.2 MHz typical +IN A 3 6 –IN B (Not to Scale) V– 4 5 +IN B Slew rate: 1 V/μs typical Offset voltage drift: 3 μV/°C typical Single-supply operation: 5 V to 16 V Figure 1. 8-Lead SOIC Dual-supply operation: ±2.5 V to ±8 V Unity gain stable OUT A 1 8 V+ ADA4665-2 –IN A 2 7 OUT B TOP VIEW APPLICATIONS +IN A 3 6 –IN B (Not to Scale) V– 4 5 +IN B Portable systems High density power budget systems Figure 2. 8-Lead MSOP Medical equipment Physiological measurement Precision references Multipole filters Sensors Transimpedance amplifiers Buffer/level shifting GENERAL DESCRIPTION The ADA4665-2 is a rail-to-rail input/output dual amplifier Table 1. Low Cost Rail-to-Rail Input/Output Op Amps optimized for lower power budget designs. The ADA4665-2 Supply 5 V 16 V offers a low supply current of 400 μA maximum per amplifier Single AD8541 at 25°C and 600 μA maximum per amplifier over the extended Dual AD8542 ADA4665-2 industrial temperature range. This feature makes the ADA4665-2 Quad AD8544 well suited for low power applications. In addition, the ADA4665-2 has a very low bias current of 1 pA maximum, low offset voltage drift of 3 μV/°C, and bandwidth of 1.2 MHz. The combination of Table 2. Other Rail-to-Rail Input/Output Op Amps these features, together with a wide supply voltage range from Supply 5 V 16 V 36 V 5 V to 16 V, allows the device to be used in a wide variety of Single AD8603 AD8663 other applications, including process control, instrumentation Dual AD8607 AD8667 ADA4091-2 equipment, buffering, and sensor front ends. Furthermore, its Quad AD8609 AD8669 rail-to-rail input and output swing adds to its versatility. The ADA4665-2 is specified from −40°C to +125°C and is available in standard SOIC and MSOP packages. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 07650-002 07650-001 ADA4665-2 TABLE OF CONTENTS Features .............................................................................................. 1  Thermal Resistance .......................................................................5  Applications ....................................................................................... 1  ESD Caution...................................................................................5  Pin Configurations ........................................................................... 1  Typical Performance Characteristics ..............................................6  General Description ......................................................................... 1  Applications Information .............................................................. 15  Revision History ............................................................................... 2  Rail-to-Rail Input Operation .................................................... 15  Specif ica t ions ..................................................................................... 3  Current Shunt Sensor ................................................................ 15  Electrical Characteristics—16 V Operation ............................. 3  Active Filters ............................................................................... 15  Electrical Characteristics—5 V Operation................................ 4  Outline Dimensions ....................................................................... 17  Absolute Maximum Ratings ............................................................ 5  Ordering Guide .......................................................................... 17  REVISION HISTORY 1/09—Revision 0: Initial Version Rev. 0 | Page 2 of 20 ADA4665-2 SPECIFICATIONS ELECTRICAL CHARACTERISTICS—16 V OPERATION V = 16 V, V = V /2, T = 25°C, unless otherwise noted. SY CM SY A Table 3. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage VOS VCM = 16 V 1 4 mV V = 0 V to 16 V 1 6 mV CM −40°C ≤ T ≤ +125°C 9 mV A Offset Voltage Drift ∆VOS/∆T −40°C ≤ TA ≤ +125°C 3 μV/°C Input Bias Current IB 0.1 1 pA −40°C ≤ TA ≤ +125°C 200 pA Input Offset Current I 0.1 1 pA OS −40°C ≤ T ≤ +125°C 40 pA A Input Voltage Range −40°C ≤ T ≤ +125°C 0 16 V A Common-Mode Rejection Ratio CMRR VCM = 0 V to 16 V 55 75 dB −40°C ≤ TA ≤ +125°C 50 dB Large Signal Voltage Gain AVO RL = 10 kΩ, VO = 0.5 V to 15 V 85 100 dB −40°C ≤ T ≤ +125°C 75 dB A Input Resistance R 4 GΩ IN Input Capacitance, Differential Mode CINDM 2 pF Input Capacitance, Common Mode CINCM 7 pF OUTPUT CHARACTERISTICS Output Voltage High VOH RL = 100 kΩ to VCM 15.95 15.99 V −40°C ≤ TA ≤ +125°C 15.9 V RL = 10 kΩ to VCM 15.9 15.95 V −40°C ≤ T ≤ +125°C 15.8 V A Output Voltage Low V R = 100 kΩ to V 4 7.5 mV OL L CM −40°C ≤ T ≤ +125°C 15 mV A RL = 10 kΩ to VCM 40 75 mV −40°C ≤ TA ≤ +125°C 150 mV Short-Circuit Current ISC ±30 mA Closed-Loop Output Impedance Z f = 100 kHz, A = 1 100 Ω OUT V POWER SUPPLY Power Supply Rejection Ratio PSRR V = 5 V to 16 V 70 95 dB SY −40°C ≤ T ≤ +125°C 65 dB A Supply Current per Amplifier I I = 0 mA 290 400 μA SY O −40°C ≤ TA ≤ +125°C 600 μA DYNAMIC PERFORMANCE Slew Rate SR R = 10 kΩ, C = 50 pF, A = 1 1 V/μs L L V Settling Time to 0.1% tS VIN = 1 V step, RL = 2 kΩ, CL = 50 pF 6.5 μs Gain Bandwidth Product GBP RL = 10 kΩ, CL = 50 pF, AV = 1 1.2 MHz Phase Margin ΦM RL = 10 kΩ, CL = 50 pF, AV = 1 50 Degrees NOISE PERFORMANCE Voltage Noise en p-p f = 0.1 Hz to 10 Hz 3 μV p-p Voltage Noise Density en f = 1 kHz 32 nV/√Hz f = 10 kHz 27 nV/√Hz Current Noise Density i f = 1 kHz 50 fA/√Hz n Rev. 0 | Page 3 of 20 ADA4665-2 ELECTRICAL CHARACTERISTICS—5 V OPERATION VSY = 5 V, VCM = VSY/2, TA = 25°C, unless otherwise noted. Table 4. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage VOS VCM = 5 V 1 4 mV VCM = 0 V to 5 V 1 6 mV −40°C ≤ TA ≤ +125°C 9 mV Offset Voltage Drift ∆V/∆T −40°C ≤ T ≤ +125°C 3 μV/°C OS A Input Bias Current I 0.1 1 pA B −40°C ≤ TA ≤ +125°C 100 pA Input Offset Current IOS 0.1 1 pA −40°C ≤ TA ≤ +125°C 10 pA Input Voltage Range −40°C ≤ T ≤ +125°C 0 5 V A Common-Mode Rejection Ratio CMRR V = 0 V to 5 V 55 75 dB CM −40°C ≤ T ≤ +125°C 50 dB A Large Signal Voltage Gain AVO RL = 10 kΩ, VO = 0.5 V to 4.5 V 85 100 dB −40°C ≤ TA ≤ +125°C 75 dB Input Resistance RIN 1 GΩ Input Capacitance, Differential Mode C 2 pF INDM Input Capacitance, Common Mode C 7 pF INCM OUTPUT CHARACTERISTICS Output Voltage High V R = 100 kΩ to V 4.95 4.99 V OH L CM −40°C ≤ T ≤ +125°C 4.9 V A RL = 10 kΩ to VCM 4.9 4.96 V −40°C ≤ TA ≤ +125°C 4.8 V Output Voltage Low VOL RL = 100 kΩ to VCM 3 5 mV −40°C ≤ T ≤ +125°C 10 mV A R = 10 kΩ to V 30 50 mV L CM −40°C ≤ T ≤ +125°C 100 mV A Short-Circuit Current ISC ±8 mA Closed-Loop Output Impedance ZOUT f = 100 kHz, AV = 1 100 Ω POWER SUPPLY Power Supply Rejection Ratio PSRR VSY = 5 V to 16 V 70 95 dB −40°C ≤ TA ≤ +125°C 65 dB Supply Current per Amplifier ISY IO = 0 mA 270 350 μA −40°C ≤ T ≤ +125°C 600 μA A DYNAMIC PERFORMANCE Slew Rate SR R = 10 kΩ, C = 50 pF, A = 1 1 V/μs L L V Settling Time to 0.1% t V = 1 V step, R = 2 kΩ, C = 50 pF 6.5 μs S IN L L Gain Bandwidth Product GBP R = 10 kΩ, C = 50 pF, A = 1 1.2 MHz L L V Phase Margin ΦM RL = 10 kΩ, CL = 50 pF, AV = 1 50 Degrees NOISE PERFORMANCE Voltage Noise e p-p f = 0.1 Hz to 10 Hz 3 μV p-p n Voltage Noise Density en f = 1 kHz 32 nV/√Hz f = 10 kHz 27 nV/√Hz Current Noise Density in f = 1 kHz 50 fA/√Hz Rev. 0 | Page 4 of 20 ADA4665-2 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 5. θ is specified for the worst-case conditions, that is, a device JA Parameter Rating soldered in a circuit board for surface-mount packages. This Supply Voltage 16.5 V value was measured using a 4-layer JEDEC standard printed 1 Input Voltage GND − 0.3 V to V + 0.3 V SY circuit board. Input Current ±10 mA Differential Input Voltage ±VSY Table 6. Thermal Resistance Output Short-Circuit Duration to GND Indefinite Package Type θJA θJC Unit Storage Temperature Range −65°C to +150°C 8-Lead SOIC_N (R-8) 158 43 °C/W Operating Temperature Range −40°C to +125°C 8-Lead MSOP (RM-8) 186 52 °C/W Junction Temperature Range −65°C to +150°C Lead Temperature (Soldering, 60 sec) 300°C ESD CAUTION 1 The input pins have clamp diodes to the power supply pins. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. 0 | Page 5 of 20 ADA4665-2 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted. 70 70 V = 5V SY V = 16V SY V = V /2 CM SY V = V /2 CM SY 60 60 50 50 40 40 30 30 20 20 10 10 0 0 –6 –5 –4 –3 –2 –1 0 1 23 45 6 –6 –5 –4 –3 –2 –1 01 2 3 4 5 6 V (mV) V (mV) OS OS Figure 3. Input Offset Voltage Distribution Figure 6. Input Offset Voltage Distribution 10 10 V = 16V V = 5V SY SY 9 9 –40°C ≤ T ≤ +125°C –40°C ≤ T ≤ +125°C A A 8 8 7 7 6 6 5 5 4 4 3 3 2 2 1 1 0 0 0 1 2 34 567 8 9 10 0 1 23 45 6 78 9 10 TCV (µV/°C) TCV (µV/°C) OS OS Figure 4. Input Offset Voltage Drift Distribution Figure 7. Input Offset Voltage Drift Distribution 5 5 V = 5V V = 16V SY SY 4 4 3 3 2 2 1 1 0 0 –1 –1 –2 –2 –3 –3 –4 –4 01 2 3 4 5 0 2 4 6 8 10 12 14 16 V (V) V (V) CM CM Figure 5. Input Offset Voltage vs. Common-Mode Voltage Figure 8. Input Offset Voltage vs. Common-Mode Voltage Rev. 0 | Page 6 of 20 V (mV) NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS OS 07650-007 07650-008 07650-006 V (mV) OS NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS 07650-004 07650-003 07650-005 ADA4665-2 T = 25°C, unless otherwise noted. A 1k 1k V = 5V SY V = 16V I + SY B I + – B I B – 100 100 I B 10 10 1 1 0.1 0.1 0.01 0.01 0.001 0.001 25 50 75 100 125 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) Figure 9. Input Bias Current vs. Temperature Figure 12. Input Bias Current vs. Temperature 1k 1k V = 5V V = 16V SY SY 100 100 125°C 125°C 105°C 10 10 105°C 1 1 85°C 85°C 0.1 0.1 25°C 25°C 0.01 0.01 0.001 0.001 0.0001 0.0001 0 12 3 45 0 2 4 6 8 10 12 14 16 V (V) V (V) CM CM Figure 10. Input Bias Current vs. Input Common-Mode Voltage Figure 13. Input Bias Current vs. Input Common-Mode Voltage 10k 10k V = 5V V = 16V SY SY 1k 1k 100 100 10 10 1 –40°C –40°C +25°C +25°C +85°C +85°C 1 0.1 +125°C +125°C 0.1 0.01 0.001 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 LOAD CURRENT (mA) LOAD CURRENT (mA) Figure 11. Output Voltage (VOH) to Supply Rail vs. Load Current Figure 14. Output Voltage (VOH) to Supply Rail vs. Load Current Rev. 0 | Page 7 of 20 OUTPUT VOLTAGE (V ) TO SUPPLY RAIL (mV) I (pA) I (pA) OH B B 07650-013 07650-014 07650-012 OUTPUT VOLTAGE (V ) TO SUPPLY RAIL (mV) I (pA) B I (pA) OH B 07650-011 07650-009 07650-010 ADA4665-2 T = 25°C, unless otherwise noted. A 10k 10k V = 16V V = 5V SY SY 1k 1k 100 100 10 10 –40°C –40°C 1 +25°C 1 +25°C +85°C +85°C +125°C +125°C 0.1 0.1 0.001 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 LOAD CURRENT (mA) LOAD CURRENT (mA) Figure 15. Output Voltage (V ) to Supply Rail vs. Load Current Figure 18. Output Voltage (V ) to Supply Rail vs. Load Current OL OL 5.00 16.00 15.99 4.99 R = 100kΩ R = 100kΩ L L 15.98 4.98 15.97 4.97 15.96 4.96 15.95 15.94 4.95 R = 10kΩ L 15.93 R = 10kΩ L 4.94 15.92 V = 5V SY V = 16V SY 4.93 15.91 4.92 15.90 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) Figure 16. Output Voltage (VOH) vs. Temperature Figure 19. Output Voltage (VOH) vs. Temperature 60 60 V = 5V V = 16V SY SY 50 50 R = 10kΩ L 40 40 R = 10kΩ L 30 30 20 20 10 10 R = 100kΩ R = 100kΩ L L 0 0 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) Figure 17. Output Voltage (VOL) vs. Temperature Figure 20. Output Voltage (VOL) vs. Temperature Rev. 0 | Page 8 of 20 OUTPUT VOLTAGE, V (V) OUTPUT VOLTAGE (V ) TO SUPPLY RAIL (mV) OH OUTPUT VOLTAGE, V (mV) OL OL 07650-020 07650-019 07650-018 OUTPUT VOLTAGE, V (V) OH OUTPUT VOLTAGE (V ) TO SUPPLY RAIL (mV) OL OUTPUT VOLTAGE, V (mV) OL 07650-017 07650-015 07650-016 ADA4665-2 T = 25°C, unless otherwise noted. A 80 180 80 180 V = 5V V = 16V SY SY R = 10kΩ R = 10kΩ L L 60 C = 50pF 135 60 C = 50pF 135 L L PHASE PHASE 40 90 40 90 20 45 20 45 GAIN GAIN 0 0 0 0 –20 –45 –20 –45 –90 –40 –90 –40 1k 10k 100k 1M 10M 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 21. Open-Loop Gain and Phase vs. Frequency Figure 24. Open-Loop Gain and Phase vs. Frequency 50 50 V = 5V A = 100 V = 16V A = 100 SY V SY V 40 R = 10kΩ 40 R = 10kΩ L L 30 30 A = 10 A = 10 V V 20 20 10 10 A = 1 A = 1 V V 0 0 –10 –10 –20 –20 –30 –30 –40 –40 –50 –50 100 1k 10k 100k 1M 10M 100M 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) Figure 22. Closed-Loop Gain vs. Frequency Figure 25. Closed-Loop Gain vs. Frequency 1k 1k V = 5V V = 16V SY SY 100 100 A = 100 A = 100 V V 10 10 A = 10 V A = 10 V 1 1 A = 1 V A = 1 V 0.1 0.1 0.01 0.01 10 100 1k 10k 100k 1M 10M 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 23. Output Impedance vs. Frequency Figure 26. Output Impedance vs. Frequency Rev. 0 | Page 9 of 20 OPEN-LOOP GAIN (dB) Z (Ω) CLOSED-LOOP GAIN (dB) OUT 07650-026 07650-025 07650-024 PHASE (Degrees) OPEN-LOOP GAIN (dB) Z (Ω) CLOSED-LOOP GAIN (dB) OUT 07650-023 07650-022 07650-021 PHASE (Degrees) ADA4665-2 T = 25°C, unless otherwise noted. A 100 100 V = 5V V = 16V SY SY 90 90 80 80 70 70 60 60 50 50 40 40 100 1k 10k 100k 1M 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 27. CMRR vs. Frequency Figure 30. CMRR vs. Frequency 120 120 V = 5V V = 16V SY SY 100 100 80 80 60 60 40 40 20 20 PSRR+ PSRR+ 0 0 PSRR– PSRR– –20 –20 100 1k 10k 100k 1M 10M 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 28. PSRR vs. Frequency Figure 31. PSRR vs. Frequency 80 80 V = 5V V = 16V SY SY V = 100mV p-p V = 100mV p-p IN IN 70 70 R = 10kΩ R = 10kΩ L L 60 60 OS+ 50 50 OS+ 40 40 OS– OS– 30 30 20 20 10 10 0 0 10 100 1k 10 100 1k CAPACITANCE (pF) CAPACITANCE (pF) Figure 29. Small Signal Overshoot vs. Load Capacitance Figure 32. Small Signal Overshoot vs. Load Capacitance Rev. 0 | Page 10 of 20 PSRR (dB) OVERSHOOT (%) CMRR (dB) 07650-032 07650-030 07650-031 PSRR (dB) OVERSHOOT (%) CMRR (dB) 07650-029 07650-027 07650-028 ADA4665-2 T = 25°C, unless otherwise noted. A V = 5V V = 16V SY SY R = 2kΩ R = 2kΩ L L C = 10pF C = 10pF L L TIME (100µs/DIV) TIME (100µs/DIV) Figure 33. Large Signal Transient Response Figure 36. Large Signal Transient Response V = 5V V = 16V SY SY R = 2kΩ R = 2kΩ L L C = 10pF C = 10pF L L TIME (100µs/DIV) TIME (100µs/DIV) Figure 34. Small Signal Transient Response Figure 37. Small Signal Transient Response 50 50 V = ±2.5V V = ±8V SY SY 0 0 INPUT INPUT –50 –50 –100 –100 3 10 2 1 5 OUTPUT OUTPUT 0 0 –1 –5 TIME (20µs/DIV) TIME (20µs/DIV) Figure 35. Positive Overload Recovery Figure 38. Positive Overload Recovery Rev. 0 | Page 11 of 20 INPUT VOLTAGE (mV) VOLTAGE (50mV/DIV) VOLTAGE (1V/DIV) 07650-037 07650-036 OUTPUT VOLTAGE (V) 07650-038 INPUT VOLTAGE (mV) VOLTAGE (5V/DIV) VOLTAGE (50mV/DIV) 07650-034 07650-033 OUTPUT VOLTAGE (V) 07650-035 ADA4665-2 T = 25°C, unless otherwise noted. A 150 150 V = ±2.5V V = ±8V SY SY 100 100 50 50 INPUT INPUT 0 0 OUTPUT 0 OUTPUT 0 –1 –5 –2 –10 –3 TIME (20µs/DIV) TIME (20µs/DIV) Figure 39. Negative Overload Recovery Figure 42. Negative Overload Recovery V = 16V V = 5V SY SY R = 2kΩ R = 2kΩ L L C = 50pF C = 50pF L L INPUT INPUT OUTPUT OUTPUT +5mV +5mV ERROR ERROR 0 0 BAND BAND –5mV –5mV TIME (2µs/DIV) TIME (2µs/DIV) Figure 40. Negative Settling Time to 0.1% Figure 43. Negative Settling Time to 0.1% INPUT INPUT V = 16V V = 5V SY SY R = 2kΩ R = 2kΩ L L C = 50pF C = 50pF L L ERROR OUTPUT OUTPUT BAND +5mV +5mV ERROR 0 0 BAND –5mV –5mV TIME (2µs/DIV) TIME (2µs/DIV) Figure 41. Positive Settling Time to 0.1% Figure 44. Positive Settling Time to 0.1% Rev. 0 | Page 12 of 20 INPUT VOLTAGE (mV) VOLTAGE (500mV/DIV) VOLTAGE (500mV/DIV) 07650-044 07650-043 OUTPUT VOLTAGE (V) 07650-042 INPUT VOLTAGE (mV) VOLTAGE (500mV/DIV) VOLTAGE (500mV/DIV) 07650-041 07650-040 OUTPUT VOLTAGE (V) 07650-039 ADA4665-2 T = 25°C, unless otherwise noted. A 100 100 V = 5V V = 16V SY SY 10 10 100 1k 10k 100k 100 1k 10k 100k FREQUENCY (Hz) FREQUENCY (Hz) Figure 45. Voltage Noise Density vs. Frequency Figure 48. Voltage Noise Density vs. Frequency V = 5V V = 16V SY SY TIME (2s/DIV) TIME (2s/DIV) Figure 46. 0.1 Hz to 10 Hz Noise Figure 49. 0.1 Hz to 10 Hz Noise 900 900 800 +125°C 800 +85°C 700 600 +25°C 700 V = 16V SY 500 –40°C 600 400 V = 5V SY 300 500 200 400 100 0 300 0 2 4 6 8 10 12 14 16 –50 –25 0 25 50 75 100 125 SUPPLY VOLTAGE (V) TEMPERATURE (°C) Figure 47. Supply Current vs. Supply Voltage Figure 50. Supply Current vs. Temperature Rev. 0 | Page 13 of 20 VOLTAGE NOISE DENSITY (nV/ Hz) SUPPLY CURRENT (µA) INPUT VOLTAGE NOISE (1µV/DIV) 07650-049 07650-047 07650-048 SUPPLY CURRENT (µA) VOLTAGE NOISE DENSITY (nV/ Hz) INPUT VOLTAGE NOISE (1µV/DIV) 07650-046 07650-050 07650-045 ADA4665-2 T = 25°C, unless otherwise noted. A 0 0 V = 5V V = 16V SY 100kΩ 100kΩ SY R = 10kΩ R = 10kΩ L L 1kΩ 1kΩ –20 –20 A = –100 A = –100 V V –40 –40 –60 –60 –80 –80 –100 –100 –120 –120 V = 1V p-p IN V = 1V p-p V = 5V p-p IN IN –140 –140 V = 4V p-p V = 15V p-p IN IN –160 –160 100 1k 10k 100k 100 1k 10k 100k FREQUENCY (Hz) FREQUENCY (Hz) Figure 51. Channel Separation vs. Frequency Figure 53. Channel Separation vs. Frequency 1 1 V = 16V V = 5V SY SY R = 10kΩ R = 10kΩ L L A = 1 A = 1 V V 0.1 0.1 0.01 0.01 V = 1V p-p IN V = 1V p-p V = 5V p-p IN IN V = 4V p-p V = 15V p-p IN IN 0.001 0.001 10 100 1k 10k 100k 10 100 1k 10k 100k FREQUENCY (Hz) FREQUENCY (Hz) Figure 54. THD + Noise vs. Frequency Figure 52. THD + Noise vs. Frequency Rev. 0 | Page 14 of 20 THD + NOISE (%) CHANNEL SEPARATION (dB) 07650-054 07650-053 THD + NOISE (%) CHANNEL SEPARATION (dB) 07650-052 07650-051 ADA4665-2 APPLICATIONS INFORMATION I RAIL-TO-RAIL INPUT OPERATION 16V R S R L SUPPLY The ADA4665-2 is a unity-gain stable CMOS operational 0.1Ω amplifier designed with rail-to-rail input/output swing R2 R1 1MΩ 10kΩ capability to optimize performance. The rail-to-rail input V * OUT feature is vital to maintain the wide dynamic input voltage 16V range and to maximize signal swing to both supply rails. For 1/2 example, the rail-to-rail input feature is extremely useful in ADA4665-2 buffer applications where the input voltage must cover both R4 R3 the supply rails. 1MΩ 10kΩ The input stage has two input differential pairs, nMOS and *V = AMPLIFIER GAIN × VOLTAGE ACROSS R OUT S pMOS. When the input common-mode voltage is at the low = 100 × R × I S end of the input voltage range, the pMOS input differential pair = 10 × I Figure 55. Low-Side Current Sensing Circuit is active and amplifies the input signal. As the input common- mode voltage is slowly increased, the pMOS differential pair R S 0.1Ω I gradually turns off while the nMOS input differential pair turns 16V on. This transition is inherent to all rail-to-rail input amplifiers R L SUPPLY that use the dual differential pairs topology. For the ADA4665-2, R4 R3 this transition occurs approximately 1 V away from the positive 1MΩ 10kΩ rail and results in a change in offset voltage due to the different 16V offset voltages of the differential pairs (see Figure 5 and Figure 8). V * 1/2 OUT CURRENT SHUNT SENSOR ADA4665-2 R2 R1 Many applications require the sensing of signals near the 1MΩ 10kΩ positive or the negative rails. Current shunt sensors are one such application and are mostly used for feedback control *V = AMPLIFIER GAIN × VOLTAGE ACROSS R OUT S systems. They are also used in a variety of other applications, = 100 × R × I S = 10 × I including power metering, battery fuel gauging, and feedback Figure 56. High-Side Current Sensing Circuit controls in electrical power steering. In such applications, it is desirable to use a shunt with very low resistance to minimize ACTIVE FILTERS the series voltage drop. This not only minimizes wasted power, The ADA4665-2 is well suited for active filter designs. An active but also allows the measurement of high currents while saving filter requires an op amp with a unity-gain bandwidth at least power. The ADA4665-2 provides a low cost solution for 100 times greater than the product of the corner frequency, fc, implementing current shunt sensors. and the quality factor, Q. An example of an active filter is the Figure 55 shows a low-side current sensing circuit, and Figure 56 Sallen-Key, one of the most widely used filter topologies. This shows a high-side current sensing circuit using the ADA4665-2. topology gives the user the flexibility of implementing either A typical shunt resistor of 0.1 Ω is used. In these circuits, the a low-pass or a high-pass filter by simply interchanging the difference amplifier amplifies the voltage drop across the shunt resistors and capacitors. To achieve the desired performance, resistor by a factor of 100. For true difference amplification, 1% or better component tolerances are usually required. matching of the resistor ratio is very important, where R1/R2 = Figure 57 shows a two-pole low-pass filter. It is configured as a R3/R4. The rail-to-rail feature of the ADA4665-2 allows the unity-gain filter with cutoff frequency at 10 kHz. Resistor and output of the op amp to almost reach 16 V (the power supply of capacitor values are chosen to give a quality factor, Q, of 1/√2 the op amp). This allows the current shunt sensor to sense up to for a Butterworth filter, which has maximally flat pass-band approximately 1.6 A of current. frequency response. Figure 58 shows the frequency response of the low-pass Sallen-Key filter. The response falls off at a rate of 40 dB per decade after the cutoff frequency of 10 kHz. Rev. 0 | Page 15 of 20 07650-056 07650-055 I I ADA4665-2 C1 R1 Figure 59 shows a two-pole high-pass filter, with cutoff frequency 1nF 22.5kΩ V at 10 kHz and quality factor, Q, of 1/√2. IN +V R2 SY C1 R1 22.5kΩ 0.5nF 22.5kΩ V IN 1/2 V OUT C2 +V SY C2 0.5nF 0.5nF ADA4665-2 –V SY 1/2 V OUT R2 ADA4665-2 Figure 57. Two-Pole Low-Pass Filter 45kΩ –V SY When R1 = R2 and C1 = 2C2, the values of Q and the cutoff frequency are calculated as follows: Figure 59. Two-Pole High-Pass Filter When R2 = 2R1 and C1 = C2, the values of Q and the cutoff R1R2 C1C2 Q= frequency are calculated as follows: C2(R1+ R2) R1R2 C1C2 1 Q= f = c R1(C1+ C2) 2π R1 R2 C1 C2 1 f = c 10 2π R1 R2 C1C2 0 10 0 –10 –10 –20 –20 –30 –30 –40 –50 –40 –60 –70 –50 –80 –90 –60 100 1k 10k 100k 1M –100 FREQUENCY (Hz) –110 Figure 58. Low-Pass Filter: Gain vs. Frequency –120 10 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 60. High-Pass Filter: Gain vs. Frequency Rev. 0 | Page 16 of 20 GAIN (dB) 07650-057 07650-058 GAIN (dB) 07650-059 07650-060 ADA4665-2 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 85 6.20 (0.2441) 4.00 (0.1574) 1 5.80 (0.2284) 3.80 (0.1497) 4 0.50 (0.0196) 1.27 (0.0500) 45° BSC 1.75 (0.0688) 0.25 (0.0099) 1.35 (0.0532) 0.25 (0.0098) 8° 0.10 (0.0040) 0° 0.51 (0.0201) COPLANARITY 1.27 (0.0500) 0.10 0.31 (0.0122) 0.25 (0.0098) SEATING 0.40 (0.0157) PLANE 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 61. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 3.20 3.00 2.80 8 5 5.15 3.20 4.90 3.00 4.65 1 2.80 4 PIN 1 0.65 BSC 0.95 0.85 1.10 MAX 0.75 0.80 8° 0.15 0.60 0.38 0.23 0° 0.00 0.22 0.40 0.08 COPLANARITY SEATING 0.10 PLANE COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 62. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters ORDERING GUIDE Model Temperature Range Package Description Package Option Branding 1 ADA4665-2ARZ −40°C to +125°C 8-Lead SOIC_N R-8 1 ADA4665-2ARZ-RL −40°C to +125°C 8-Lead SOIC_N R-8 1 ADA4665-2ARZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8 1 ADA4665-2ARMZ −40°C to +125°C 8-Lead MSOP RM-8 A26 1 ADA4665-2ARMZ-R7 −40°C to +125°C 8-Lead MSOP RM-8 A26 1 ADA4665-2ARMZ-RL −40°C to +125°C 8-Lead MSOP RM-8 A26 1 Z = RoHS Compliant Part. Rev. 0 | Page 17 of 20 012407-A ADA4665-2 NOTES Rev. 0 | Page 18 of 20 ADA4665-2 NOTES Rev. 0 | Page 19 of 20 ADA4665-2 NOTES ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07650-0-1/09(0) Rev. 0 | Page 20 of 20