ANALOG DEVICES ADA4610-2

Low Noise, Precision, Rail-to-Rail Output, JFET Dual Operational Amplifier Data Sheet ADA4610-2 FEATURES PIN CONFIGURATIONS Low offset voltage PIN 1 INDICATOR OUT A 1 8 V+ B grade: 0.4 mV maximum –IN A 2 7 OUT B ADA4610-2 A grade: 1 mV maximum TOP VIEW +IN A 3 6 –IN B (Not to Scale) V– 4 5 +IN B Low offset voltage drift B grade: 4 µV/°C maximum NOTES 1. THE EXPOSED PAD MUST BE A grade: 8 µV/°C maximum CONNECTED TO V–. Low input bias current: 5 pA typical at V = ±15 V SY Figure 1. 8-Lead LFCSP (CP Suffix) Dual-supply operation: ±4.5 V to ±15 V Low noise 7.3 nV/√Hz typical at f = 1 kHz OUT A 1 8 V+ 0.45 µV p-p at 0.1 Hz to 10 Hz ADA4610-2 –IN A 2 7 OUT B TOP VIEW Low distortion: 0.00006% +IN A 3 6 –IN B (Not to Scale) No phase reversal V– 4 5 +IN B Rail-to-rail output Figure 2. 8-Lead SOIC_N (R Suffix) and 8-Lead MSOP (RM Suffix) Unity gain stable APPLICATIONS Instrumentation Medical instruments Multipole filters Precision current measurement Photodiode amplifiers Sensors Audio GENERAL DESCRIPTION The ADA4610-2 is a dual channel, precision JFET amplifier The fast slew rate and great stability with capacitive loads make that features low input voltage and current noise, offset voltage, the ADA4610-2a perfect fit for high performance filters. Low input bias current, and rail-to-rail output. input bias currents, low offset, and low noise result in a wide dynamic range for photodiode amplifier circuits. Low noise The combination of low offset, noise, and very low input and distortion, high output current, and excellent speed make bias current makes these amplifiers especially suitable for the ADA4610-2 a great choice for audio applications. high impedance sensor amplification and precise current measurements using shunts. With excellent dc precision, low The ADA4610-2 is specified over the −40°C to +125°C noise, and fast settling time, the ADA4610-2 provides superior extended industrial temperature range. accuracy in medical instruments, electronic measurement, and The ADA4610-2 is available in the 8-lead narrow SOIC, 8-lead automated test equipment. Unlike many competitive amplifiers, MSOP, and 8-lead LFCSP packages. the ADA4610-2 maintains fast settling performance with substantial capacitive loads. Unlike many older JFET amplifiers, the ADA4610-2 does not suffer from output phase reversal when input voltages exceed the maximum common-mode voltage range. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2011–2012 Analog Devices, Inc. All rights reserved. 09646-002 09646-001 ADA4610-2 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 ESD Caution...................................................................................6 Applications ....................................................................................... 1 Typical Performance Characteristics ..............................................7 Pin Configurations ........................................................................... 1 Comparative Voltage and Variable Voltage Graphs ............... 13 General Description ......................................................................... 1 Applications Information .............................................................. 15 Revision History ............................................................................... 2 Comparator Operation .............................................................. 15 Specifications ..................................................................................... 3 Outline Dimensions ....................................................................... 16 Electrical Characteristics ............................................................. 4 Ordering Guide .......................................................................... 17 Absolute Maximum Ratings ............................................................ 6 REVISION HISTORY 5/12—Rev. 0 to Rev. A Changes to Data Sheet Title and General Description Section .. 1 Changed Input Impedance, Differential to Input Capacitance, Differential in Table 1....................................................................... 3 Added Input Resistance in Table 1 ................................................. 3 Changed Input Impedance, Differential to Input Capacitance, Differential in Table 2....................................................................... 4 Added Input Resistance in Table 2 ................................................. 4 Added Figure 9, Figure 10, and Figure 14 ..................................... 8 Added Figure 15 ................................................................................ 9 Updated Outline Dimensions ....................................................... 16 Changes to Ordering Guide .......................................................... 17 12/11—Revision 0: Initial Version Rev. A | Page 2 of 20 Data Sheet ADA4610-2 SPECIFICATIONS VSY = ±5 V, VCM = 0 V, TA = 25°C, unless otherwise noted. Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS 1 Offset Voltage (B Grade) VOS 0.2 0.4 mV −40°C < TA < +125°C 0.8 mV 1 Offset Voltage (A Grade) VOS 0.4 1 mV −40°C < TA < +125°C 1.8 mV 2 Offset Voltage Drift (B Grade) ΔV /ΔT 0.5 4 µV/°C OS 2 Offset Voltage Drift (A Grade) ΔV /ΔT 1 8 µV/°C OS Input Bias Current IB 5 25 pA −40°C < TA < +125°C 1.5 nA Input Offset Current IOS 2 20 pA −40°C < T < +125°C 0.25 nA A Input Voltage Range −2.5 +2.5 V Common-Mode Rejection Ratio CMRR V = −2.5 V to +2.5 V 94 110 dB CM −40°C < TA < +125°C 86 dB Large Signal Voltage Gain AVO RL = 2 kΩ, VOUT = −3.5 V to +3.5 V 98 100 dB −40°C < TA < +125°C 86 dB Input Capacitance, Differential V = 0 V 3.1 pF CM Input Capacitance, Common-Mode V = 0 V 4.8 pF CM 13 Input Resistance VCM = 0 V >1 × 10 Ω OUTPUT CHARACTERISTICS Output Voltage High V R = 2 kΩ 4.85 4.90 V OH L −40°C < TA < +125°C 4.6 V RL = 600 Ω 4.6 4.89 V −40°C < TA < +125°C 4.05 V Output Voltage Low V R = 2 kΩ −4.95 −4.9 V OL L −40°C < T < +125°C −4.75 V A R = 600 Ω −4.9 −4.8 V L −40°C < TA < +125°C −4.4 V Short-Circuit Current ISC ±63 mA POWER SUPPLY Power Supply Rejection Ratio PSRR VSY = ±4.5 V to ±18 V 106 125 dB −40°C < TA < +125°C 103 dB Supply Current/Amplifier IS IOUT = 0 mA 1.5 1.7 mA −40°C < T < +125°C 1.85 mA A DYNAMIC PERFORMANCE Gain Bandwidth Product GBP V = 5 mV p-p, R = 2 kΩ, A = 100 15.4 MHz IN L V Unity-Gain Crossover UGC V = 5 mV p-p, R = 2 kΩ, A = −10 9.3 MHz IN L V Phase Margin φ 61 Degrees M −3 dB Closed-Loop Bandwidth −3 dB AV = 1, VIN = 5 mV p-p 10.6 MHz NOISE PERFORMANCE Voltage Noise e p-p 0.1 Hz to 10 Hz 0.45 μV p-p n Voltage Noise Density en f = 10 Hz 14 nV/√Hz f = 100 Hz 8.2 nV/√Hz f = 1 kHz 7.3 nV/√Hz f = 10 kHz 7.3 nV/√Hz 1 Offset voltage does not include solder heat resistance. 2 Guaranteed by design and characterization. Rev. A | Page 3 of 20 ADA4610-2 Data Sheet ELECTRICAL CHARACTERISTICS VSY = ±15 V, VCM = 0 V, TA = 25°C, unless otherwise noted. Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS 1 Offset Voltage (B Grade) VOS 0.2 0.4 mV −40°C < TA < +125°C 0.8 mV 1 Offset Voltage (A Grade) V 0.4 1 mV OS −40°C < T < +125°C 1.8 mV A 2 Offset Voltage Drift (B Grade) ΔV /ΔT 0.5 4 µV/°C OS 2 Offset Voltage Drift (A Grade) ΔVOS/ΔT 1 8 µV/°C Input Bias Current IB 5 25 pA −40°C < TA < +125°C 1.5 nA Input Offset Current I 2 20 pA OS −40°C < T < +125°C 0.25 nA A Input Voltage Range −12.5 +12.5 V Common-Mode Rejection Ratio CMRR VCM = −12.5 V to +12.5 V 100 115 dB −40°C < TA < +125°C 96 dB Large Signal Voltage Gain AVO RL = 2 kΩ, VOUT = ±13.5 V 104 107 dB −40°C < T < +125°C 91 dB A Input Capacitance, Differential V = 0 V 3.1 pF CM Input Capacitance, Common-Mode VCM = 0 V 4.8 pF 13 Input Resistance VCM = 0 V >1 × 10 Ω OUTPUT CHARACTERISTICS Output Voltage High VOH RL = 2 kΩ 14.8 14.9 V −40°C < TA < +125°C 14.65 V RL = 600 Ω 14.25 14.47 V −40°C < T < +125°C 13.35 V A Output Voltage Low V R = 2 kΩ −14.9 −14.85 V OL L −40°C < T < +125°C −14.75 V A RL = 600 Ω −14.68 −14.6 V −40°C < TA < +125°C −14.3 V Short-Circuit Current I ±79 mA SC POWER SUPPLY Power Supply Rejection Ratio PSRR VSY = ±4.5 V to ±18 V 106 125 dB −40°C < T < +125°C 103 dB A Supply Current/Amplifier I I = 0 mA 1.6 1.85 mA SY OUT −40°C < T < +125°C 2.0 mA A DYNAMIC PERFORMANCE 2 Slew Rate SR R = 2 kΩ ±17 +25/−61 V/µs L Gain Bandwidth Product GBP V = 5 mV p-p, R = 2 kΩ, A = 100 16.3 MHz IN L V Unity-Gain Crossover UGC VIN = 5 mV p-p, RL = 2 kΩ, AV = −10 9.3 MHz Phase Margin φM 66 Degrees −3 dB Closed-Loop Bandwidth −3 dB AV = 1, VIN = 5 mV p-p 9.50 MHz Total Harmonic Distortion (THD) + Noise THD + N 1 kHz, G = +1, R = 2 kΩ, V = 6 V rms 0.00006 % L IN Rev. A | Page 4 of 20 Data Sheet ADA4610-2 Parameter Symbol Test Conditions/Comments Min Typ Max Unit NOISE PERFORMANCE Peak-to-Peak Voltage Noise en p-p 0.1 Hz to 10 Hz bandwidth 0.45 µV p-p Voltage Noise Density en f = 10 Hz 14 nV/√Hz f = 100 Hz 8.5 nV/√Hz f = 1 kHz 7.3 nV/√Hz f = 10 kHz 7.3 nV/√Hz 1 Offset voltage does not include solder heat resistance. 2 Guaranteed by design and characterization. Rev. A | Page 5 of 20 ADA4610-2 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 4. Thermal Resistance Table 3. 1 Package Type θ θ Unit JA JC Parameter Rating 8-Lead MSOP (RM-8) 142 45 °C/W Supply Voltage ±18 V 8-Lead SOIC_N (R-8) 120 43 °C/W Input Voltage ±V S 8-Lead LFCSP_VD (CP-8-9) 57 12 °C/W Output Short-Circuit Duration to GND Observe derating curves Storage Temperature Range −65°C to +150°C 1 θ is specified for worst-case conditions, that is, θ is specified for device JA JA soldered in circuit board for surface-mount packages. Operating Temperature Range −40°C to +125°C Junction Temperature Range −65°C to +150°C Lead Temperature (Soldering, 10 sec) 300°C ESD CAUTION Electrostatic Discharge 2500 V (Human Body Model) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. A | Page 6 of 20 Data Sheet ADA4610-2 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted. 400 400 ADA4610-2 ADA4610-2 V = ±5V V = ±15V SY SY 350 350 T = 25°C T = 25°C A A SOIC SOIC 300 300 250 250 200 200 150 150 100 100 50 50 0 0 –1000 –800 –600 –400 –200 0 200 400 600 800 1000 1200 –1000 –800 –600 –400 –200 0 200 400 600 800 1000 1200 OFFSET VOLTAGE (µV) OFFSET VOLTAGE (µV) Figure 3. Input Offset Voltage Distribution Figure 6. Input Offset Voltage Distribution 350 400 ADA4610-2 ADA4610-2 V = ±5V V = ±15V SY SY 350 300 SOIC SOIC 300 250 250 200 200 150 150 100 100 50 50 0 0 BIN (µV/°C) BIN (µV/°C) Figure 4. TCVOS Distribution Figure 7. TCVOS Distribution 500 500 400 400 300 300 200 200 100 100 0 0 –100 –100 –200 –200 ADA4610-2 ADA4610-2 –300 –300 V = ±5V V = ±15V SY SY T = 25°C T = 25°C A A –400 –400 R = ∞ R = ∞ L L –500 –500 –5 –4 –3 –2 –1 0 1 2 3 4 5 –15 –10 –5 0 5 10 15 COMMON-MODE INPUT (V) COMMON-MODE INPUT (V) Figure 5. Input Offset Voltage vs. Common-Mode Input Voltage Figure 8. Input Offset Voltage vs. Common-Mode Input Voltage Rev. A | Page 7 of 20 NUMBER OF CHANNELS INPUT OFFSET VOLTAGE (µV) NUMBER OF CHANNELS 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 09646-004 09646-005 09646-003 NUMBER OF CHANNELS INPUT OFFSET VOLTAGE (µV) NUMBER OF CHANNELS 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 09646-007 09646-008 09646-006 ADA4610-2 Data Sheet 1M ADA4610-2 ADA4610-2 SOIC V = ±5V SY V = ±15V T = 25°C SY A 100k R = ∞ L T = +25°C A 1 10k 1k 0.1 100 10 1 0.01 –5 –4 –3 –2 –1 0 1 2 3 4 5 0.1 1 10 100 V (V) I SOURCE (mA) CMI OUT Figure 9. Input Bias Current vs. Common Mode Voltage Figure 12. Dropout Voltage vs. Source Current 100M ADA4610-2 SOIC ADA4610-2 10M V = ±5V SY V = ±5V 10 SY R = ∞ L T = 25°C A 1M 100k 10k 1 +125°C 1k 100 +85°C 0.1 10 +25°C 1 –40°C 0.1 –5 –4 –3 –2 –1 0 1 2 3 4 5 6 0.01 0.1 1 10 100 V (V) CMI I SINK (mA) OUT Figure 10. Input Bias Current vs. Common Mode Voltage and Temperature Figure 13. Dropout Voltage vs. Sink Current 100 100 ADA4610-2 ADA4610-2 V = ±5V SOIC SY 90 V = ±15V SY R = ∞ 80 L T = +25°C A 70 10 60 50 40 1 30 20 10 0 0.1 –50 –25 0 25 50 75 100 125 –15 –10 –5 0 5 10 15 TEMPERATURE (°C) COMMON-MODE VOLTAGE (V) Figure 11. Input Bias Current vs. Temperature Figure 14. Input Bias Current vs. Common-Mode Voltage Rev. A | Page 8 of 20 INPUT BIAS A, INPUT BIAS B (pA) INPUT BIAS A, INPUT BIAS B (pA) INPUT BIAS CURRENT (pA) 09646-009 09646-056 09646-055 INPUT BIAS CURRENT (pA) V – V (V) V – V (V) OUT SS DD OUT 09646-011 09646-015 09646-057 Data Sheet ADA4610-2 1G ADA4610-2 ADA4610-2 SOIC 100M V = ±15V V = ±15V 10 SY SY T = 25°C R = ∞ A L 10M 1M 100k 1 10k 1k +125°C +85°C 0.1 100 +25°C –40°C 10 1 0.01 –15 –10 –5 0 5 10 15 0.01 0.1 1 10 100 COMMON-MODE VOLTAGE (V) I SINK (mA) OUT Figure 15. Input Bias Current vs. Common-Mode Voltage and Temperature Figure 18. Dropout Voltage vs. Sink Current 120 270 100 ADA4610-2 ADA4610-2 V = ±5V V = ±15V SY SY 100 T = 25°C 225 A R = 2kΩ L 80 180 10 60 135 40 90 20 45 1 0 0 –20 –45 –40 –90 0.1 –50 –25 0 25 50 75 100 125 0.01 0.1 1 10 100 1k 10k 100k TEMPERATURE (°C) FREQUENCY (kHz) Figure 16. Input Bias Current vs. Temperature Figure 19. Open-Loop Gain and Phase vs. Frequency 60 ADA4610-2 ADA4610-2 V = ±15V SY V = ±5V SY T = 25°C A T = 25°C A A = +100 V 40 1 A = +10 V 20 A = +1 V 0 0.1 –20 0. 0.01 01 –40 0.1 1 10 100 1 10 100 1k 10k 100k I SOURCE (mA) OUT FREQUENCY (kHz) Figure 17. Dropout Voltage vs. Source Current Figure 20. Closed-Loop Gain vs. Frequency Rev. A | Page 9 of 20 INPUT BIAS CURRENT (pA) V – V (V) INPUT BIAS CURRENT (pA) DD OUT 09646-014 09646-012 09646-058 GAIN (dB) GAIN (dB) V – V (V) OUT SS 09646-017 09646-018 PHASE (Degrees) 09646-016 ADA4610-2 Data Sheet 1k 1k ADA4610-2 ADA4610-2 V = ±5V V = ±15V SY SY T = 25°C T = 25°C A A 100 100 10 10 A = +100 V A = +100 V 1 1 A = +10 V A = +10 V 0.1 0.1 A = +1 V A = +1 V 0.01 0.01 0.1 1 10 100 1k 10k 100k 0.1 1 10 100 1k 10k 100k FREQUENCY (kHz) FREQUENCY (kHz) Figure 21. Closed-Loop Output Impedance vs. Frequency Figure 24. Closed-Loop Output Impedance vs. Frequency 120 270 120 ADA4610-2 ADA4610-2 V = ±15V SY V = ±5V SY 100 T = 25°C 225 A T = 25°C 100 A R = 2kΩ L 80 180 80 60 135 PSRR– 60 40 90 40 20 45 PSRR+ 20 0 0 0 –20 –45 –40 –90 –20 0.01 0.1 1 10 100 1k 10k 100k 0.1 1 10 100 1k 10k FREQUENCY (kHz) FREQUENCY (kHz) Figure 22. Open-Loop Gain and Phase vs. Frequency Figure 25. PSRR vs. Frequency 60 140 ADA4610-2 ADA4610-2 V = ±15V V = ±5V SY SY T = 25°C 120 T = 25°C A = +100 A A V 40 100 A = +10 V 20 80 A = +1 V 60 0 40 –20 20 –40 0 1 10 100 1k 10k 100k 0.1 1 10 100 1k 10k FREQUENCY (kHz) FREQUENCY (kHz) Figure 23. Closed-Loop Gain vs. Frequency Figure 26. CMRR vs. Frequency Rev. A | Page 10 of 20 GAIN (dB) Z (Ω) GAIN (dB) OUT 09646-020 09646-021 PHASE (Degrees) 09646-019 Z (Ω) CMRR (dB) PSRR (dB) OUT 09646-023 09646-022 09646-024 Data Sheet ADA4610-2 3 12 2 8 1 4 0 0 ADA4610-2 ADA4610-2 V = ±5V SY V = ±15V –1 SY T = 25°C A –4 T = 25°C A A = +1 V A = +1 V R = 2kΩ L R = 2kΩ L C = 100pF L –2 –8 C = 100pF L –3 –12 0 1 2 3 4 5 6 7 8 9 10 0 1 2 3 4 5 6 7 8 9 10 TIME (µs) TIME (µs) Figure 27. Large Signal Transient Response Figure 30. Large Signal Transient Response 120 75 ADA4610-2 V = ±15V SY 100 T = 25°C A 50 80 25 PSRR– ADA4610-2 60 V = ±5V SY 0 T = 25°C A A = +1 40 V R = 2kΩ L PSRR+ C = 100pF –25 L 20 –50 0 –20 –75 0.1 1 10 100 1k 10k 0 1 2 3 4 5 6 7 8 9 10 FREQUENCY (kHz) TIME (µs) Figure 28. PSRR vs. Frequency Figure 31. Small Signal Transient Response 100 140 ADA4610-2 ADA4610-2 V = ±5V SY V = ±15V SY T = 25°C A 120 T = 25°C A 100 80 10 60 40 20 1 0 0.001 0.01 0.1 1 10 100 0.1 1 10 100 1k 10k FREQUENCY (kHz) FREQUENCY (kHz) Figure 32. Voltage Noise Density Figure 29. CMRR vs. Frequency Rev. A | Page 11 of 20 PSRR (dB) CMRR (dB) OUTPUT VOLTAGE (V) 09646-027 09646-026 09646-025 VOLTAGE NOISE DENSITY (nV/ Hz) OUTPUT VOLTAGE (mV) OUTPUT VOLTAGE (V) 09646-030 09646-028 09646-033 ADA4610-2 Data Sheet 60 100 ADA4610-2 ADA4610-2 V = ±5V V = ±15V SY SY T = 25°C T = 25°C A A 50 A = +1 V R = 2kΩ L V = 100mV p-p IN 40 OS+ 10 30 OS– 20 10 0 1 0.01 0.1 1 0.001 0.01 0.1 1 10 CAPACITANCE (nF) FREQUENCY (kHz) Figure 33. Overshoot vs. Load Capacitance Figure 35. Voltage Noise Density 75 50 ADA4610-2 V = ±15V SY 45 T = 25°C A 50 A = +1 V 40 R = 2kΩ L V = 100mV p-p IN 35 25 OS+ 30 ADA4610-2 V = ±15V SY 0 25 T = 25°C A A = +1 V 20 R = 2kΩ L –25 C = 100pF OS– L 15 10 –50 –75 0 0 1 2 3 4 5 6 7 8 9 10 0.01 0.1 1 TIME (µs) CAPACITANCE (nF) Figure 34. Small Signal Transient Response Figure 36. Overshoot vs. Load Capacitance Rev. A | Page 12 of 20 5 OUTPUT VOLTAGE (mV) OVERSHOOT (%) 09646-034 09646-031 VOLTAGE NOISE DENSITY (nV/ Hz) OVERSHOOT (%) 09646-037 09646-036 Data Sheet ADA4610-2 COMPARATIVE VOLTAGE AND VARIABLE VOLTAGE GRAPHS 16 –40 ADA4610-2 ADA4610-2 V = ±15V SY V = ±15V SY 12 T = 25°C A T = 25°C A –60 R = 2kΩ L A = +1 V 8 R = 2kΩ L C = 100pF L –80 4 0 –100 –4 –120 –8 –140 OUTPUT –12 INPUT –16 –160 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0.1 1 10 100 FREQUENCY (kHz) TIME (ms) Figure 40. No Phase Reversal Figure 37. Channel Separation 1 300 ADA4610-2 ADA4610-2 V = ±15V SY V = ±15V SY T = 25°C A T = 25°C 200 A R = 2kΩ 0.1 L R = 2kΩ L F = 1kHz IN 100 THD + N % 0.01 0 0.001 –100 0.0001 –200 0.00001 –300 0.001 0.01 0.1 1 10 0 1 2 3 4 5 6 7 8 9 10 AMPLITUDE (V rms) TIME (sec) Figure 38. THD + N vs. Amplitude Figure 41. Voltage Noise, 0.1 Hz to 10 Hz 12 0.01 ADA4610-2 ADA4610-2 V = ±15V V = ±15V SY SY T = 25°C T = 25°C A A 10 R = 2kΩ A = +1 L V V = 5V rms R = 2kΩ IN L C = 20pF L 0.001 8 POSITIVE STEP 0.1% 6 500kHz BAND-PASS FILTER 0.01% 0.0001 80kHz BAND-PASS FILTER 4 2 0.00001 0 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 FREQUENCY (kHz) SETTLING TIME (µs) Figure 39. THD + N vs. Frequency Figure 42. Positive Step Settling Time Rev. A | Page 13 of 20 THD + N (%) THD + N (%) CHANNEL SEPARATION (dB) 09646-039 09646-040 09646-041 VOLTAGE (nV) VOLTAGE (V) STEP SIZE (V) 09646-044 09646-042 09646-043 ADA4610-2 Data Sheet 4.0 12 +125°C ADA4610-2 ADA4610-2 R = V = ±15V L ∞ SY 3.5 T = 25°C A 10 A = +1 V R = 2kΩ L 3.0 C = 20pF L +85°C 8 NEGATIVE STEP +25°C 2.5 0.01% –40°C 0.1% 2.0 6 1.5 4 1.0 2 0.5 0 0 0 5 10 15 20 25 30 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 V (V) SETTLING TIME (µs) SY Figure 43 Negative Step Settling Time Figure 44. Supply Current vs. Supply Voltage and Temperature Rev. A | Page 14 of 20 STEP SIZE (V) 09646-045 I FOR BOTH AMPLIFIERS (mA) SY 09646-047 Data Sheet ADA4610-2 APPLICATIONS INFORMATION 8 COMPARATOR OPERATION COMPARATOR, V = LOW OUT 7 Although op amps are quite different from comparators, occasionally an unused section of a dual or a quad op amp may 6 COMPARATOR, V = HIGH OUT be used as a comparator; however, this is not recommended for 5 any rail-to-rail output op amp. For rail-to-rail output op amps, the output stage is generally a ratioed current mirror with bipolar 4 or MOSFET transistors. With the part operating open loop, the 3 second stage increases the current drive to the ratioed mirror to FOLLOWER close the loop. However, the second stage cannot close the loop, 2 which results in an increase in supply current. With the op amp 1 configured as a comparator, the supply current can be signifi- cantly higher (see Figure 45). Configuring an unused section as 0 0 4 8 12 16 20 24 28 32 a voltage follower with the noninverting input connected to a SUPPLY VOLTAGE (V) voltage within the input voltage range is recommended. The Figure 45. Supply Current vs. Supply Voltage ADA4610-2 has a unique output stage design that reduces the excess supply current, but does not entirely eliminate this effect when the op amp is operating open loop. V CC D31 R6 R7 C3 R16 Q30 Q29 Q8 Q9 Q28 C2 RC4 + – 1+ DE5 Q12 C4 Q18 A1 Q14 Q15 A2 DE1 R10 R11 Q5 Q1 Q4 Q23 Q13 Q16 Q17 V OUT DE3 R2 R3 V J1 J2 IN+ R5 DE6 V IN– C1 DE4 Q6 Q7 Q27 DE2 R16 I I Q24 Q25 I 2 3 4 D26 V EE Figure 46. Simplified Schematic Rev. A | Page 15 of 20 I FOR BOTH AMPLIFIERS (mA) SY 09646-054 09646-053 ADA4610-2 Data Sheet OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 8 5 6.20 (0.2441) 4.00 (0.1574) 1 5.80 (0.2284) 3.80 (0.1497) 4 1.27 (0.0500) 0.50 (0.0196) 45° BSC 1.75 (0.0688) 0.25 (0.0099) 1.35 (0.0532) 0.25 (0.0098) 8° 0.10 (0.0040) 0° COPLANARITY 0.51 (0.0201) 1.27 (0.0500) 0.10 0.31 (0.0122) 0.25 (0.0098) SEATING 0.40 (0.0157) 0.17 (0.0067) PLANE COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 47. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 3.20 3.00 2.80 8 5 5.15 3.20 4.90 3.00 4.65 1 2.80 4 PIN 1 IDENTIFIER 0.65 BSC 0.95 15° MAX 0.85 1.10 MAX 0.75 0.80 0.15 0.23 6° 0.55 0.40 0.05 0.09 0° 0.40 0.25 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 48. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters Rev. A | Page 16 of 20 10-07-2009-B 012407-A Data Sheet ADA4610-2 3.25 0.60 MAX 3.00 SQ 0.50 2.75 BSC 0.60 MAX 5 8 2.95 EXPOSED 1.60 2.75 SQ PAD PIN 1 1.50 2.55 INDICATOR 1.40 4 1 PIN 1 0.50 TOP VIEW BOTTOM VIEW INDICATOR 2.23 0.40 2.13 0.30 12° MAX 0.70 MAX 2.03 0.90 MAX 0.65 TYP 0.85 NOM 0.05 MAX FOR PROPER CONNECTION OF 0.01 NOM THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION 0.30 SEATING SECTION OF THIS DATA SHEET. PLANE 0.23 0.20 REF 0.18 Figure 49. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD] 3 mm × 3 mm Body, Very Thin, Dual Lead (CP-8-9) Dimensions shown in millimeters ORDERING GUIDE 1 Model Temperature Range Package Description Package Option Branding ADA4610-2ACPZ-R7 −40°C to +125°C 8-Lead LFCSP_VD CP-8-9 A2U ADA4610-2ACPZ-RL −40°C to +125°C 8-Lead LFCSP_VD CP-8-9 A2U ADA4610-2ARMZ −40°C to +125°C 8-Lead MSOP RM-8 A2U ADA4610-2ARMZ-R7 −40°C to +125°C 8-Lead MSOP RM-8 A2U ADA4610-2ARMZ-RL −40°C to +125°C 8-Lead MSOP RM-8 A2U ADA4610-2ARZ −40°C to +125°C 8-Lead SOIC_N R-8 ADA4610-2ARZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8 ADA4610-2ARZ-RL −40°C to +125°C 8-Lead SOIC_N R-8 ADA4610-2BRZ −40°C to +125°C 8-Lead SOIC_N R-8 ADA4610-2BRZ-R7 −40°C to +125°C 8-Lead SOIC_N R-8 ADA4610-2BRZ-RL −40°C to +125°C 8-Lead SOIC_N R-8 1 Z = RoHS Compliant Part. Rev. A | Page 17 of 20 04-06-2012-A ADA4610-2 Data Sheet NOTES Rev. A | Page 18 of 20 Data Sheet ADA4610-2 NOTES Rev. A | Page 19 of 20 ADA4610-2 Data Sheet NOTES ©2011–2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09646-0-5/12(A) Rev. A | Page 20 of 20