ANALOG DEVICES ADA4304-3

1:3 and 1:4 Single-Ended, Low Cost, Active RF Splitters ADA4304-3/ADA4304-4 FEATURES FUNCTIONAL BLOCK DIAGRAMS 5V 5V Ideal for CATV and terrestrial applications 2.4 GHz, −3 dB bandwidth 0.1µF 0.1µF 1 dB flatness: 54 MHz to 865 MHz 1µH Low noise figure: 4.6 dB Low distortion VCC IL Composite second-order (CSO): −62 dBc Composite triple beat (CTB): −72 dBc VOUT1 Nominal 3 dB gain per output channel 0.01µF VOUT2 VIN 25 dB output-to-output isolation, 50 MHz to 1000 MHz ADA4304-3 0.01µF 0.01µF 75 Ω input and outputs VOUT3 Small package size: 16-lead, 3 mm × 3 mm LFCSP 0.01µF GND APPLICATIONS Set-top boxes Residential gateways Figure 1. CATV distribution systems 5V 5V Splitter modules Digital cable ready (DCR) TVs 0.1µF 0.1µF 1µH VCC IL VOUT1 0.01µF VOUT2 VIN 0.01µF ADA4304-4 VOUT3 0.01µF 0.01µF VOUT4 0.01µF GND Figure 2. GENERAL DESCRIPTION The ADA4304-3/ADA4304-4 are 75 Ω active splitters for use in The ADA4304-3/ADA4304-4 are fabricated using the Analog applications where a lossless signal split is required. Typical Devices, Inc., proprietary silicon germanium (SiGe), applications include multituner digital set-top boxes, cable complementary bipolar process, enabling them to achieve very splitter modules, multituners/digital cable ready (DCR) low levels of distortion with a noise figure of 4.6 dB. The parts televisions, and home gateways where traditional solutions provide low cost alternatives that simplify designs and improve require discrete passive splitter modules with separate fixed system performance by integrating a signal splitter element and gain amplifiers. a gain block into a single IC. The ADA4304-3/ADA4304-4 are available in a 16-lead LFCSP and operate in the extended industrial temperature range of −40°C to +85°C. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 07082-002 07082-001 ADA4304-3/ADA4304-4 TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................6 Applications....................................................................................... 1 Test Circuits........................................................................................9 Functional Block Diagrams............................................................. 1 Applications..................................................................................... 10 General Description ......................................................................... 1 Circuit Description .................................................................... 10 Revision History ............................................................................... 2 Evaluation Boards ...................................................................... 10 Specifications..................................................................................... 3 RF Layout Considerations......................................................... 10 Absolute Maximum Ratings............................................................ 4 Power Supply............................................................................... 10 Thermal Resistance ...................................................................... 4 Outline Dimensions ....................................................................... 12 ESD Caution.................................................................................. 4 Ordering Guide .......................................................................... 12 Pin Configurations and Function Descriptions ........................... 5 REVISION HISTORY 11/07—Revision 0: Initial Version Rev. 0 | Page 2 of 12 ADA4304-3/ADA4304-4 SPECIFICATIONS VCC = 5 V, 75 Ω system, TA = 25°C, unless otherwise noted. Table 1. ADA4304-3 ADA4304-4 Parameter Conditions Min Typ Max Min Typ Max Unit DYNAMIC PERFORMANCE See Figure 19 for test circuit Bandwidth (−3 dB) 2400 2400 MHz Frequency Range 54 865 54 865 MHz Gain f = 100 MHz 3.3 2.9 dB Gain Flatness 54 MHz to 865 MHz 1.0 1.0 dB NOISE/DISTORTION PERFORMANCE 1 Noise Figure @ 54 MHz 4.0 4.0 dB @ 550 MHz 4.6 4.6 dB @ 865 MHz 4.8 4.8 dB Output IP3 f1 = 97.25 MHz, f2 = 103.25 MHz 26 26 dBm Output IP2 f1 = 97.25 MHz, f2 = 103.25 MHz 43 43 dBm Composite Triple Beat (CTB) 135 channels, 15 dBmV/channel, f = 865 MHz −72 −72 dBc Composite Second Order (CSO) 135 channels, 15 dBmV/channel, f = 865 MHz −62 −62 dBc Cross Modulation (CXM) 135 channels, 15 dBmV/channel, −68 −68 dBc 100% modulation @ 15.75 kHz, f = 865 MHz INPUT CHARACTERISTICS See Figure 19 for test circuit Input Return Loss @ 54 MHz −17 −13 −18 −14 dB @ 550 MHz −22 −16 −21 −15 dB @ 865 MHz −12 −8 −12 −8 dB Output-to-Input Isolation Any output, 54 MHz to 865 MHz @ 54 MHz −33 −30 −33 −31 dB @ 550 MHz −33 −30 −33 −31 dB @ 865 MHz −34 −31 −35 −32 dB OUTPUT CHARACTERISTICS See Figure 19 and Figure 20 for test circuits Output Return Loss Any output, 54 MHz to 865 MHz @ 54 MHz −21 −17 −21 −17 dB @ 550 MHz −16 −11 −17 −12 dB @ 865 MHz −14 −9 −14 −9 dB Output-to-Output Isolation Any output, 54 MHz to 865 MHz dB @ 54 MHz −26 −26 dB @ 550 MHz −25 −25 dB @ 865 MHz −25 −25 dB 1 dB Compression (P1dB) Output referred, f = 100 MHz 9.0 8.7 dBm POWER SUPPLY Nominal Supply Voltage 4.75 5.0 5.25 4.75 5.0 5.25 V Quiescent Supply Current 92 105 92 105 mA 1 Characterized with 50 Ω noise figure analyzer. Rev. 0 | Page 3 of 12 ADA4304-3/ADA4304-4 ABSOLUTE MAXIMUM RATINGS The power dissipated in the package (PD) is essentially equal to Table 2. the quiescent power dissipation, that is, the supply voltage (VS) Parameter Rating times the quiescent current (IS). In Table 1, the maximum Supply Voltage 5.5 V power dissipation of the ADA4304-3/ADA4304-4 can be Power Dissipation See Figure 3 calculated as Storage Temperature Range −65°C to +125°C P = 5.25 V × 105 mA = 551 mW D (MAX) Operating Temperature Range −40°C to +85°C Lead Temperature (Soldering, 10 sec) 300°C Airflow increases heat dissipation, effectively reducing θJA. Junction Temperature 150°C In addition, more metal directly in contact with the package leads/exposed pad from metal traces, through-holes, ground, Stresses above those listed under Absolute Maximum and power planes reduces the θJA. Ratings may cause permanent damage to the device. This is Figure 3 shows the maximum safe power dissipation in the a stress rating only; functional operation of the device at package vs. the ambient temperature for the 16-lead LFCSP these or any other conditions above those indicated in the (98°C/W) on a JEDEC standard 4-layer board. operational section of this specification is not implied. Exposure to absolute maximum rating conditions for 2.0 extended periods may affect device reliability. 1.8 1.6 THERMAL RESISTANCE 1.4 θ is specified for the device (including exposed pad) JA soldered to a high thermal conductivity 4-layer (2s2p) 1.2 circuit board, as described in EIA/JESD 51-7. 1.0 0.8 Table 3. Thermal Resistance 0.6 Package Type θJA Unit 16-Lead LFCSP (Exposed Pad) 98 °C/W 0.4 0.2 Maximum Power Dissipation 0 0 10 20 30 40 50 60 70 80 90 100 The maximum safe power dissipation in the ADA4304-3/ AMBIENT TEMPERATURE (°C) ADA4304-4 package is limited by the associated rise in Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board junction temperature (T ) on the die. At approximately J 150°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this ESD CAUTION temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance. Exceeding a junction temperature of 150°C for an extended period can result in changes in the silicon devices, potentially causing failure. Rev. 0 | Page 4 of 12 MAXIMUM POWER DISSIPATION (W) 07082-003 ADA4304-3/ADA4304-4 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS PIN 1 PIN 1 INDICATOR INDICATOR 12 VOUT2 12 VOUT2 VCC 1 VCC 1 VCC 2 ADA4304-3 11 GND VCC 2 ADA4304-4 11 GND TOP VIEW TOP VIEW GND 3 10 VOUT3 GND 3 10 VOUT3 (Not to Scale) (Not to Scale) VIN 4 9GND VIN 4 9GND NC = NO CONNECT Figure 5. ADA4304-4 Pin Configuration Figure 4. ADA4304-3 Pin Configuration Table 4. ADA4304-3 Pin Function Descriptions Table 5. ADA4304-4 Pin Function Descriptions Pin No. Mnemonic Description Pin No. Mnemonic Description 1, 2, 15, 16 VCC Supply Pin. 1, 2, 15, 16 VCC Supply Pin. 3, 5 to 7, 9, 11 GND Ground. 3, 5 to 7, 9, 11 GND Ground. 4 VIN Input. 4 VIN Input. 8 NC No Connection. 8 VOUT4 Output 4. 10 VOUT3 Output 3. 10 VOUT3 Output 3. 12 VOUT2 Output 2. 12 VOUT2 Output 2. 13 VOUT1 Output 1. 13 VOUT1 Output 1. 14 IL Bias Pin. 14 IL Bias Pin. Rev. 0 | Page 5 of 12 07082-004 07082-005 GND 5 16 VCC 15 VCC GND 6 GND 7 14 IL 13 VOUT1 NC 8 GND 5 16 VCC GND 6 15 VCC GND 7 14 IL VOUT4 8 13 VOUT1 ADA4304-3/ADA4304-4 TYPICAL PERFORMANCE CHARACTERISTICS VCC = 5 V, 75 Ω system, TA = 25°C, unless otherwise noted. –54 10 50Ω SYSTEM –56 8 –58 –60 T = +85°C A T = +25°C A 6 –62 T = +85°C A T = +25°C A –64 –66 4 T = –40°C A –68 T = –40°C A –70 2 –72 –74 0 50 100 1000 50 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 6. Composite Second Order (CSO) vs. Frequency Figure 9. Noise Figure vs. Frequency –60 60 –63 55 –66 50 –69 ADA4304-3 T = +85°C A 45 –72 T = +25°C A –75 40 ADA4304-4 –78 35 T = –40°C A –81 30 –84 25 –87 –90 20 50 100 1000 50 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 7. Composite Triple Beat (CTB) vs. Frequency Figure 10. Output IP2 vs. Frequency –60 40 –63 35 –66 30 T = +85°C A –69 ADA4304-3 25 –72 T = +25°C A –75 20 ADA4304-4 –78 T = –40°C A 15 –81 10 –84 5 –87 –90 0 50 100 1000 50 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 8. Cross Modulation (CXM) vs. Frequency Figure 11. Output IP3 vs. Frequency Rev. 0 | Page 6 of 12 CXM (dBc) CTB (dBc) CSO (dBc) 07082-022 07082-021 07082-020 OUTPUT IP3 (dBm) OUTPUT IP2 (dBm) NOISE FIGURE (dB) 07082-011 07082-010 07082-023 ADA4304-3/ADA4304-4 5 0 T = +25°C A 4 –5 T = –40°C A 3 –10 2 –15 1 T = +85°C A –20 0 ADA4304-4 –1 –25 –2 –30 ADA4304-3 –3 –35 –4 –40 –5 –6 –45 40 100 1000 50 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 12. ADA4304-3 Gain vs. Frequency Figure 15. Output-to-Output Isolation vs. Frequency 5 0 T = +25°C 4 A –5 3 T = –40°C A 2 –10 1 T = +85°C A 0 –15 –1 –2 ADA4304-3 –20 –3 –4 –25 ADA4304-4 –5 –6 –30 40 100 1000 50 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 13. ADA4304-4 Gain vs. Frequency Figure 16. Input Return Loss vs. Frequency –25 0 –27 –5 –29 –31 –10 ADA4304-3 –33 ADA4304-4 ADA4304-3 –35 –15 –37 –20 –39 ADA4304-4 –41 –25 –43 –45 –30 50 100 1000 50 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 14. Output-to-Input Isolation vs. Frequency Figure 17. Output Return Loss vs. Frequency Rev. 0 | Page 7 of 12 OUTPUT-TO-INPUT ISOLATION (dB) GAIN (dB) GAIN (dB) 07082-013 07082-025 07082-024 OUTPUT RETURN LOSS (dB) INPUT RETURN LOSS (dB) OUTPUT-TO-OUTPUT ISOLATION (dB) 07082-016 07082-015 07082-014 ADA4304-3/ADA4304-4 100 95 90 85 80 75 –60 –40 –20 0 20 40 60 80 100 –50 –30 –10 10 30 50 70 90 TEMPERATURE (°C) Figure 18. Quiescent Supply Current vs. Temperature Rev. 0 | Page 8 of 12 QUIESCENT SUPPLY CURRENT (mA) 07082-026 ADA4304-3/ADA4304-4 TEST CIRCUITS RF NETWORK ANALYZER RF NETWORK ANALYZER 75Ω S-PARAMETER 75Ω S-PARAMETER TEST SET TEST SET VOUTm VOUTm VIN 4 DUT 4 DUT VIN 75Ω VOUTn VOUTn 75Ω NOTES 1. TESTED FOR ALL COMBINATIONS OF VOUTm AND VOUTn. NOTES 1. TESTED FOR ALL COMBINATIONS OF VOUTm AND VOUTn. Figure 19. Test Circuit for Transmission, Isolation, and Figure 20. Test Circuit for Output-to-Output Isolation Measurements Reflection Measurements Rev. 0 | Page 9 of 12 07082-018 07082-019 ADA4304-3/ADA4304-4 APPLICATIONS The ADA4304-3/ADA4304-4 active splitters are primarily EVALUATION BOARDS intended for use in the downstream path of television set-top The ADA4304-3/ADA4304-4 evaluation board allows designers boxes (STBs) that contain multiple tuners. They are typically to assess the performance of the parts in their particular located directly after the diplexer in a bidirectional CATV application. The board includes 75 Ω coaxial connectors and customer premise unit. The ADA4304-3/ADA4304-4 provide a 75 Ω controlled-impedance signal traces that carry the input single-ended input and three or four single-ended outputs that and output signals. Power (5 V) is applied to the red VCC loop allow the delivery of the RF signal to multiple signal paths. These connector, and ground is connected to the black GND loop paths can include, but are not limited to, a main picture tuner, connector. Figure 21 is a schematic of the evaluation board. On the picture-in-picture (PIP) tuner, an out-of-band (OOB) tuner, the ADA4304-3 evaluation board, connector VO4 and C7 are a digital video recorder (DVR), and a cable modem (CM). not populated. The ADA4304-3/ADA4304-4 exhibit composite second-order RF LAYOUT CONSIDERATIONS (CSO) and composite triple beat (CTB) products that are −62 dBc Appropriate impedance matching techniques are mandatory and −72 dBc, respectively. The use of the SiGe bipolar process when designing circuit boards for the ADA4304-3/ADA4304-4. also allows the ADA4304-3/ADA4304-4 to achieve a noise figure Improper characteristic impedances on traces can cause reflections (NF) of 4.6 dB at 550 MHz. that can lead to poor linearity. The characteristic impedance of CIRCUIT DESCRIPTION the signal trace to the input and from each output should be The ADA4304-3/ADA4304-4 consist of a low noise buffer 75 Ω. Any ground metal on the top surface near signal lines amplifier followed by a resistive power divider. This arrangement should be stitched with vias to the internal ground plane, as provides 3.3 dB (ADA4304-3) or 2.9 dB (ADA4304-4) of gain shown in Figure 22. The device package exposed paddle must relative to the RF signal present at the input of the device. The be reflow soldered to a low inductance ground to achieve data input and each output must be properly matched to a 75 Ω sheet performance specifications. This is achieved by connecting environment for distortion and noise performance to match the footprint ground pad with vias to a ground plane below the data sheet specifications. AC coupling capacitors of 0.01 μF (see Figure 22). are recommended for the input and outputs. POWER SUPPLY A 1 μH RF choke (Coilcraft chip inductor 0805LS-102X) is The 5 V supply should be applied to each VCC pin and RF required to correctly bias the internal nodes of the ADA4304-3/ choke via a low impedance power bus. The power bus should be ADA4304-4. It should be connected between the 5 V supply and decoupled to ground using a 10 μF tantalum capacitor and a 0.1 the IL pin (Pin 14). The choke should be placed as close as possible μF ceramic chip capacitor located close to the ADA4304-3/ to the ADA4304-3/ADA4304-4 to minimize parasitic capacitance ADA4304-4. In addition, the VCC pins should be decoupled to on the IL pin, which is critical for achieving the specified ground with a 0.1 μF ceramic chip capacitor located as close to bandwidth and flatness. each pin as possible. GND VCC C1 L1 + 0.1µF C5 C6 1.0μH 10µF 0.01μF VO1 C3 0.01μF C8 VOUT2 VO2 VCC 0.1µF VCC GND C4 ADA4304-3/ 0.01μF ADA4304-4 GND VOUT3 VO3 C2 VIN 0.01μF VIN GND C7 0.01μF VO4 ADA4304-4 ONLY EXPOSED PAD Figure 21. Evaluation Board Schematic Rev. 0 | Page 10 of 12 07082-006 GND VCC GND VCC GND IL VOUT4 VOUT1 ADA4304-3/ADA4304-4 Figure 22. Evaluation Board Figure 23. Evaluation Board Component Layout Rev. 0 | Page 11 of 12 07082-007 07082-008 ADA4304-3/ADA4304-4 OUTLINE DIMENSIONS 0.50 0.40 0.30 3.00 0.60 MAX PIN 1 BSC SQ INDICATOR * 1.45 13 0.45 16 1 12 1.30 SQ PIN 1 1.15 2.75 TOP EXPOSED INDICATOR BSC SQ VIEW PAD (BOTTOM VIEW) 9 4 0.50 8 5 BSC 0.25 MIN 1.50 REF 0.80 MAX 12° MAX 0.65 TYP 1.00 0.85 0.05 MAX 0.80 0.02 NOM SEATING 0.30 PLANE 0.20 REF 0.23 0.18 * COMPLIANT TO JEDEC STANDARDS MO-220-VEED-2 EXCEPT FOR EXPOSED PAD DIMENSION. Figure 24. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 3 mm × 3 mm Body, Very Thin Quad (CP-16-2) Dimensions shown in millimeters ORDERING GUIDE Model Temperature Range Package Description Package Option Ordering Quantity Branding 1 ADA4304-3ACPZ-RL −40°C to +85°C 16-Lead LFCSP_VQ CP-16-2 5,000 H16 1 ADA4304-3ACPZ-R7 −40°C to +85°C 16-Lead LFCSP_VQ CP-16-2 1,500 H16 1 ADA4304-3ACPZ-R2 −40°C to +85°C 16-Lead LFCSP_VQ CP-16-2 250 H16 1 ADA4304-4ACPZ-RL −40°C to +85°C 16-Lead LFCSP_VQ CP-16-2 5,000 H10 1 ADA4304-4ACPZ-R7 −40°C to +85°C 16-Lead LFCSP_VQ CP-16-2 1,500 H10 1 ADA4304-4ACPZ-R2 −40°C to +85°C 16-Lead LFCSP_VQ CP-16-2 250 H10 1 Z = RoHS Compliant Part. ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07082-0-11/07(0) Rev. 0 | Page 12 of 12