ANALOG DEVICES ADA4304-2

1:2 Single-Ended, Low Cost, Active RF Splitter ADA4304-2 FEATURES FUNCTIONAL BLOCK DIAGRAM 5V 5V Ideal for CATV and terrestrial applications Excellent frequency response 0.1µF 0.1µF 1.6 GHz, −3 dB bandwidth 1µH 1 dB flatness to 1.0 GHz Low noise figure: 4.0 dB VCC IL Low distortion Composite second order (CSO): −62 dBc VOUT1 Composite triple beat (CTB): −72 dBc 0.01µF VIN 1 dB compression point of 8.25 dBm ADA4304-2 0.01µF 2.8 dB of gain per output channel VOUT2 25 dB output-to-output isolation, 50 MHz to 1000 MHz 0.01µF 75 Ω input and outputs GND Integrated output resistors Small package size: 16-lead, 3 mm × 3 mm LFCSP Figure 1. APPLICATIONS Set-top boxes Residential gateways CATV distribution systems Splitter modules Digital cable ready (DCR) TVs GENERAL DESCRIPTION 4 The ADA4304-2 is a 75 Ω active splitter for use in applications T = –40°C A 3 where a lossless signal split is required. Typical applications 2 include multituner digital set-top boxes, cable splitter modules, T = +85°C A 1 multituner/digital cable ready (DCR) televisions, and home T = +25°C A 0 gateways where traditional solutions require discrete passive –1 splitter modules with separate fixed gain amplifiers. –2 The ADA4304-2 is fabricated using Analog Devices, Inc. –3 proprietary silicon-germanium (SiGe), complementary bipolar –4 process, enabling it to achieve very low levels of distortion with –5 a noise figure of 4 dB. The part provides a low cost alternative –6 that simplifies designs and improves system performance by –7 integrating a signal splitter element and a gain block into a single –8 50 100 1000 4000 IC. The ADA4304-2 is available in a 16-lead LFCSP and operates in FREQUENCY (MHz) the extended industrial temperature range of −40°C to +85°C. Figure 2. Gain (S21, S31) vs. Frequency Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. GAIN (dB) 06539-001 06539-011 ADA4304-2 TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................6 Applications....................................................................................... 1 Test Circuits........................................................................................8 Functional Block Diagram .............................................................. 1 Applications........................................................................................9 General Description ......................................................................... 1 Circuit Description .......................................................................9 Revision History ............................................................................... 2 Evaluation Boards .........................................................................9 Specifications..................................................................................... 3 RF Layout Considerations............................................................9 Absolute Maximum Ratings............................................................ 4 Power Supply..................................................................................9 Thermal Resistance ...................................................................... 4 Outline Dimensions....................................................................... 11 ESD Caution.................................................................................. 4 Ordering Guide .......................................................................... 11 Pin Configuration and Function Descriptions............................. 5 REVISION HISTORY 5/07—Revision 0: Initial Version Rev. 0 | Page 2 of 12 ADA4304-2 SPECIFICATIONS VCC = 5 V, 75 Ω system, TA = 25°C, unless otherwise noted. Table 1. Parameter Conditions Min Typ Max Unit DYNAMIC PERFORMANCE Bandwidth (−3 dB) 1600 MHz Specified Frequency Range 54 865 MHz Gain (S21, S31) f = 100 MHz; see Figure 17 and Figure 18 2.8 dB 1 dB Gain Flatness 1000 MHz NOISE/DISTORTION PERFORMANCE 1 Noise Figure @ 54 MHz 4.0 dB @ 550 MHz 4.5 dB @ 865 MHz 4.6 dB Output IP3 f = 97.25 MHz, f = 103.25 MHz 26 dBm 1 2 Output IP2 f1 = 97.25 MHz, f2 = 103.25 MHz 44.5 dBm Composite Triple Beat (CTB) 135 channels, 15 dBmV/channel, f = 865 MHz −72 dBc Composite Second Order (CSO) 135 channels, 15 dBmV/channel, f = 865 MHz −62 dBc Cross Modulation (CXM) 135 channels, 15 dBmV/channel, 100% modulation −69 dBc @ 15.75 kHz, f = 865 MHz INPUT CHARACTERISTICS See Figure 17, Figure 18, and Figure 19 Input Return Loss (S ) @ 54 MHz −15 −11 dB 11 @ 550 MHz −35.5 −22 dB @ 865 MHz −13.3 −8 dB Output-to-Input Isolation (S12, S13) Either output, 54 MHz to 865 MHz @ 54 MHz −32 −30 dB @ 550 MHz −32 −29 dB @ 865 MHz −33 −31 dB OUTPUT CHARACTERISTICS See Figure 17, Figure 18, and Figure 19 Output Return Loss (S22, S33) Either output, 54 MHz to 865 MHz @ 54 MHz −26.7 −21 dB @ 550 MHz −22 −15 dB @ 865 MHz −20 −12 dB Output-to-Output Isolation (S23, S32) Either output, 54 MHz to 865 MHz dB @ 54 MHz −26.7 dB @ 550 MHz −25.1 dB @ 865 MHz −25 dB 1 dB Compression (P ) Output referred, f = 100 MHz 8.25 dBm 1dB POWER SUPPLY Nominal Supply Voltage 4.75 5.0 5.25 V Quiescent Supply Current 88 105 mA 1 Characterized with 50 Ω noise figure analyzer. Rev. 0 | Page 3 of 12 ADA4304-2 ABSOLUTE MAXIMUM RATINGS The power dissipated in the package (PD) is essentially equal to Table 2. the quiescent power dissipation; the supply voltage (VS) times Parameter Rating the quiescent current (IS). In Table 1, the maximum power Supply Voltage 5.5 V dissipation of the ADA4304-2 can be calculated as Power Dissipation See Figure 3 P = 5.25 V × 105 mA = 551 mW D (MAX) Storage Temperature Range −65°C to +125°C Airflow increases heat dissipation, effectively reducing θ . Operating Temperature Range −40°C to +85°C JA Lead Temperature (Soldering, 10 sec) 300°C In addition, more metal directly in contact with the package Junction Temperature 150°C leads/exposed pad from metal traces, through-holes, ground, and power planes reduces the θJA. Stresses above those listed under Absolute Maximum Figure 3 shows the maximum safe power dissipation in the Ratings may cause permanent damage to the device. This is package vs. the ambient temperature for the 16-lead LFCSP a stress rating only; functional operation of the device at (98°C/W) on a JEDEC standard 4-layer board. these or any other conditions above those indicated in the 2.0 operational section of this specification is not implied. 1.8 Exposure to absolute maximum rating conditions for 1.6 extended periods may affect device reliability. 1.4 THERMAL RESISTANCE 1.2 θ is specified for the device (including exposed pad) JA 1.0 soldered to a high thermal conductivity 2s2p circuit board, 0.8 as described in EIA/JESD 51-7. 0.6 Table 3. Thermal Resistance 0.4 Package Type θJA Unit 0.2 16-Lead LFCSP (Exposed Pad) 98 °C/W 0 0 10 20 30 40 50 60 70 80 90 100 AMBIENT TEMPERATURE (°C) Maximum Power Dissipation Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board The maximum safe power dissipation in the ADA4304-2 package is limited by the associated rise in junction temperature (T ) on the die. At approximately 150°C, J ESD CAUTION which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change the stresses that the package exerts on the die, permanently shifting the parametric performance of the ADA4304-2. Exceeding a junction temperature of 150°C for an extended period can result in changes in the silicon devices, potentially causing failure. Rev. 0 | Page 4 of 12 MAXIMUM POWER DISSIPATION (W) 06539-004 ADA4304-2 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS PIN 1 INDICATOR VCC 1 12 VOUT1 ADA4304-2 VCC 2 11 GND TOP VIEW GND 3 10 VOUT2 (Not to Scale) VIN 4 9GND NC = NO CONNECT Figure 4. Pin Configuration Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1, 2, 15, 16 VCC Supply Pin 3, 5 to 7, 9, 11 GND Ground 4 VIN Input 8, 13 NC No Connection 10 VOUT2 Output 2 12 VOUT1 Output 1 14 IL Bias Pin Rev. 0 | Page 5 of 12 06539-002 GND 5 16 VCC GND 6 15 VCC GND 7 14 IL NC 8 13 NC ADA4304-2 TYPICAL PERFORMANCE CHARACTERISTICS VCC = 5 V, 75 Ω system, TA = 25°C, unless otherwise noted. –54 10 50 Ω SYSTEM –56 –58 8 –60 T = +85°C A –62 6 T = +25°C A T = +85°C A –64 –66 4 T = –40°C A –68 T = –40°C T = +25°C A A –70 2 –72 –74 0 50 100 1000 50 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 5. Composite Second Order (CSO) vs. Frequency Figure 8. Noise Figure vs. Frequency –60 60 –63 55 –66 50 –69 45 –72 T = +85°C A –75 40 –78 35 T = +25°C A –81 T = –40°C A 30 –84 25 –87 –90 20 50 100 1000 50 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 6. Composite Triple Beat (CTB) vs. Frequency Figure 9. Output IP2 vs. Frequency –60 40 –63 35 –66 30 –69 25 –72 T = +85°C A –75 20 –78 15 T = +25°C T = –40°C A A –81 10 –84 5 –87 –90 0 50 100 1000 50 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 10. Output IP3 vs. Frequency Figure 7. Cross Modulation (CXM) vs. Frequency Rev. 0 | Page 6 of 12 CXM (dBc) CTB (dBc) CSO (dBc) 06539-006 06539-007 06539-005 OUTPUT IP3 (dBm) OUTPUT IP2 (dBm) NOISE FIGURE (dB) 06539-010 06539-009 06539-008 ADA4304-2 4 0 T = –40°C A 3 –5 2 T = +85°C A –10 1 T = +25°C A 0 –15 –1 –20 –2 –3 –25 –4 –30 –5 –6 –35 –7 –40 –8 50 100 1000 50 100 1000 4000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 14. Input Return Loss (S ) vs. Frequency Figure 11. Gain (S , S ) vs. Frequency 11 21 31 0 –30 –31 –5 –32 –10 –33 –15 –34 –20 –35 –36 –25 –37 –30 –38 –35 –39 –40 –40 50 100 1000 50 100 1000 4000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 15. Output Return Loss (S , S ) vs. Frequency Figure 12. Output-to-Input Isolation (S , S ) vs. Frequency 22 33 12 13 95 0 –5 90 –10 –15 85 –20 –25 80 –30 –35 75 –40 –45 70 –60 –50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 50 100 1000 4000 TEMPERATURE (°C) FREQUENCY (MHz) Figure 16. Quiescent Supply Current vs. Temperature `Figure 13. Output-to-Output Isolation (S , S ) vs. Frequency 23 32 Rev. 0 | Page 7 of 12 ISOLATION (dB) ISOLATION (dB) GAIN (dB) 06539-012 06539-013 06539-011 QUIESCENT SUPPLY CURRENT (mA) OUTPUT RETURN LOSS (dB) INPUT RETURN LOSS (dB) 06539-016 06539-015 06539-014 ADA4304-2 TEST CIRCUITS RF NETWORK ANALYZER 75Ω S-PARAMETER TEST SET VOUT1 PORT 2 12 VIN 4 DUT PORT 1 10 VOUT2 PORT 3 75Ω Figure 17. Test Circuit for S11, S12, S21, S22 Measurements RF NETWORK ANALYZER 75Ω S-PARAMETER TEST SET VOUT1 PORT 2 12 75Ω VIN 4 DUT PORT 1 10 VOUT2 PORT 3 Figure 18. Test Circuit for S13, S31, S33 Measurements RF NETWORK ANALYZER 75Ω S-PARAMETER TEST SET VOUT1 PORT 2 12 VIN 4 DUT PORT 1 10 VOUT2 75Ω PORT 3 Figure 19. Test Circuit for S23, S32 Measurements Rev. 0 | Page 8 of 12 06539-019 06539-017 06539-018 ADA4304-2 APPLICATIONS The ADA4304-2 active splitter is primarily intended for use in EVALUATION BOARDS the downstream path of television set-top boxes (STBs) that The ADA4304-2 evaluation board allows designers to assess the contain multiple tuners. It is typically located directly after the performance of the parts in their particular application. The diplexer in a bidirectional CATV customer premise unit. The board includes 75 Ω coaxial connectors and 75 Ω controlled- ADA4304-2 provides a single-ended input and two single- impedance signal traces that carry the input and output signals. ended outputs that allow the delivery of the RF signal to two Power (5 V) is applied to the red VCC loop connector, and different signal paths. These paths can include, but are not ground is connected to the black GND loop connector. Figure 20 is limited to, a main picture tuner, the picture-in-picture (PIP) a schematic of the ADA4304-2 evaluation board. On the tuner, an out-of-band (OOB) tuner, a digital video recorder ADA4304-2 evaluation board, connectors VO1 and VO4 are (DVR), and a cable modem (CM). not populated. The ADA4304-2 exhibits composite second order (CSO) and RF LAYOUT CONSIDERATIONS composite triple beat (CTB) products that are −62 dBc and Appropriate impedance matching techniques are mandatory −72 dBc, respectively. The use of the SiGe bipolar process also when designing circuit boards for the ADA4304-2. Improper allows the ADA4304-2 to achieve a noise figure (NF) of 4 dB. characteristic impedances on traces can cause reflections that CIRCUIT DESCRIPTION can lead to poor linearity. The characteristic impedance of the The ADA4304-2 consists of a low noise buffer amplifier followed signal trace to the input and from each output should be 75 Ω. by a resistive power divider. This arrangement provides 2.8 dB Any ground metal on the top surface near signal lines should be of gain relative to the RF signal present at the input of the device. stitched with vias to the internal ground plane, as shown in The input and each output must be properly matched to a 75 Ω Figure 21. environment for distortion and noise performance to match the POWER SUPPLY data sheet specifications. AC coupling capacitors of 0.01 μF are The 5 V supply should be applied to each of the VCC pins and recommended for the input and outputs. RF choke via a low impedance power bus. The power bus should A 1 μH RF choke (Coilcraft chip inductor 0805LS-102X) is be decoupled to ground using a 10 μF tantalum capacitor and a required to correctly bias internal nodes of the ADA4304-2. It 0.1 μF ceramic chip capacitor located close to the ADA4304-2. In should be connected between the 5 V supply and the IL pin addition, the VCC pins should be decoupled to ground with a (Pin 14). The choke should be placed as close as possible to 0.1 μF ceramic chip capacitor located as close to each of the pins the ADA4304-2 to minimize parasitic capacitance on the as possible. IL pin, which is critical for achieving the specified bandwidth and flatness. GND VCC C1 L1 + C5 0.1µF 1.0μH 10µF 16 15 14 13 C3 0.01μF 1 12 C8 VCC VO2 VOUT1 0.1µF 2 11 C4 VCC GND 0.01μF ADA4304-2 3 10 C2 GND VOUT2 VO3 VIN 0.01μF 4 9 GND VIN 7 8 5 6 NC = NO CONNECT Figure 20. Evaluation Board Schematic Rev. 0 | Page 9 of 12 06539-003 VCC GND VCC GND IL GND NC NC ADA4304-2 Figure 21. ADA4304-2 Evaluation Board Figure 22. Evaluation Board Component Layout Rev. 0 | Page 10 of 12 06539-020 06539-021 ADA4304-2 OUTLINE DIMENSIONS 0.50 0.40 0.30 3.00 0.60 MAX PIN 1 BSC SQ INDICATOR 1.25 13 16 0.45 1 12 1.10 SQ PIN 1 0.95 TOP 2.75 EXPOSED INDICATOR VIEW BSC SQ PA D (BOTTOM VIEW) 9 4 8 0.50 5 BSC 0.25 MIN 1.50 REF 0.80 MAX 12° MAX 0.65 TYP 1.00 0.85 0.05 MAX 0.80 0.02 NOM SEATING 0.30 PLANE 0.20 REF 0.23 0.18 COMPLIANT TO JEDEC STANDARDS MO-220-VEED-2 Figure 23. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 3 mm × 3 mm Body, Very Thin Quad (CP-16-1) Dimensions shown in millimeters ORDERING GUIDE Model Temperature Range Package Description Package Option Ordering Quantity Branding 1 ADA4304-2ACPZ-RL −40°C to +85°C 16-Lead LFCSP_VQ CP-16-1 5,000 H0Z 1 ADA4304-2ACPZ-R7 −40°C to +85°C 16-Lead LFCSP_VQ CP-16-1 1,500 H0Z 1 ADA4304-2ACPZ-R2 −40°C to +85°C 16-Lead LFCSP_VQ CP-16-1 250 H0Z 1 Z = RoHS Compliant Part. Rev. 0 | Page 11 of 12 ADA4304-2 NOTES ©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06539-0-5/07(0) Rev. 0 | Page 12 of 12