ANALOG DEVICES AD8657

18 V, Precision, Micropower CMOS RRIO Operational Amplifier AD8657 FEATURES PIN CONFIGURATION Micropower at high voltage (18 V): 18 μA typical OUT A 1 8 V+ AD8657 –IN A 2 7 OUT B Low offset voltage: 350 μV maximum TOP VIEW +IN A 3 6 –IN B Single-supply operation: 2.7 V to 18 V (Not to Scale) V– 4 5 +IN B Dual-supply operation: ±1.35 V to ±9 V Low input bias current: 20 pA Figure 1. 8-Lead MSOP Gain bandwidth: 200 kHz Unity-gain stable Excellent electromagnetic interference immunity OUT A 1 8V+ AD8657 –IN A 2 7OUT B APPLICATIONS TOP VIEW +IN A 3 6 –IN B (Not to Scale) Portable operating systems V– 4 5 +IN B Current monitors NOTES 1. IT IS RECOMMENDED TO CONNECT 4 mA to 20 mA loop drivers THE EXPOSED PAD TO V–. Buffer/level shifting Figure 2. 8-Lead LFCSP Multipole filters Remote/wireless sensors Low power transimpedance amplifiers GENERAL DESCRIPTION Table 1. Micropower Op Amps The AD8657 is a dual, micropower, precision, rail-to-rail Supply Voltage 5 V 12 V to 16 V 36 V input/output amplifier optimized for low power and wide Single AD8500 AD8663 operating supply voltage range applications. ADA4505-1 AD8505 The AD8657 operates from 2.7 V up to 18 V with a typical AD8541 quiescent supply current of 18 μA. It uses the Analog Devices, AD8603 Inc., patented DigiTrim® trimming technique, which achieves Dual AD8502 AD8667 OP295 low offset voltage. The AD8657 also has high immunity to ADA4505-2 OP281 ADA4062-2 electromagnetic interference. AD8506 The combination of low supply current, low offset voltage, very AD8542 low input bias current, wide supply range, and rail-to-rail input AD8607 and output makes the AD8657 ideal for current monitoring and Quad AD8504 AD8669 OP495 current loops in process and motor control applications. The ADA4505-4 OP481 ADA4062-4 combination of precision specifications makes this device ideal AD8508 for dc gain and buffering of sensor front ends or high impedance AD8544 input sources in wireless or remote sensors or transmitters. AD8609 The AD8657 is specified over the extended industrial tempera- ture range (−40°C to +125°C) and is available in an 8-lead MSOP package and an 8-lead LFCSP package. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 08804-001 08804-061 AD8657 TABLE OF CONTENTS Features .............................................................................................. 1  Applications Information .............................................................. 17  Applications ....................................................................................... 1  Input Stage ................................................................................... 17  Pin Configuration ............................................................................. 1  Output Stage ................................................................................ 17  General Description ......................................................................... 1  Rail to Rail ................................................................................... 18  Revision History ............................................................................... 2  Resistive Load ............................................................................. 18  Specif ica t ions ..................................................................................... 3  Comparator Operation .............................................................. 19  Electrical Characteristics—2.7 V Operation ............................ 3  EMI Rejection Ratio .................................................................. 20  Electrical Characteristics—10 V Operation ............................. 4  4 mA to 20 mA Process Control Current Loop T ransmitter .................................................................................. 20  Electrical Characteristics—18 V Operation ............................. 5  Outline Dimensions ....................................................................... 21  Absolute Maximum Ratings ............................................................ 6  Ordering Guide .......................................................................... 21  Thermal Resistance ...................................................................... 6  ESD Caution .................................................................................. 6  Typical Performance Characteristics ............................................. 7  REVISION HISTORY 3/11—Rev. 0 to Rev. A Added LFCSP Package Information ........................... Throughout Added Figure 2, Renumbered Subsequent Figures ................... 1 Changes to Table 2, Introductory Text; Input Characteristics, Offset Voltage and Common-Mode Rejection Ratio Test Conditions/Comments; and Dynamic Performance, Phase Margin Values ................................................................................... 3 Changes to Table 3, Introductory Text; Input Characteristics, Offset Voltage and Common-Mode Rejection Ratio Test Conditions/Comments .................................................................... 4 Changes to Table 4, Introductory Text; Input Characteristics, Offset Voltage and Common-Mode Rejection Ratio Test Conditions/Comments .................................................................... 5 Changes to Thermal Resistance Section and Table 5 ................... 6 Updated Outline Dimensions ....................................................... 21 Changes to Ordering Guide .......................................................... 21 1/11—Revision 0: Initial Version Rev. A | Page 2 of 24 AD8657 SPECIFICATIONS ELECTRICAL CHARACTERISTICS—2.7 V OPERATION V = 2.7 V, V = V /2 V, T = 25°C, unless otherwise specified. SY CM SY A Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage V V = 0 V to 2.7 V 350 µV OS CM V = 0.3 V to 2.4 V; −40°C ≤ T ≤ +85°C 1 mV CM A V = 0.3 V to 2.4 V; −40°C ≤ T ≤ +125°C 2.5 mV CM A VCM = 0 V to 2.7 V; −40°C ≤ TA ≤ +125°C 4 mV Input Bias Current IB 1 10 pA −40°C ≤ TA ≤ +125°C 2.6 nA Input Offset Current I 20 pA OS −40°C ≤ T ≤ +125°C 500 pA A Input Voltage Range 0 2.7 V Common-Mode Rejection Ratio CMRR VCM = 0 V to 2.7 V 79 95 dB VCM = 0.3 V to 2.4 V; −40°C ≤ TA ≤ +85°C 70 dB V = 0.3 V to 2.4 V; −40°C ≤ T ≤ +125°C 63 dB CM A V = 0 V to 2.7 V; −40°C ≤ T ≤ +125°C 60 dB CM A Large Signal Voltage Gain A R = 100 kΩ, V = 0.5 V to 2.2 V 94 105 dB VO L O −40°C ≤ TA ≤ +85°C 75 dB −40°C ≤ TA ≤ +125°C 65 dB Offset Voltage Drift ΔVOS/ΔT 2 μV/°C Input Resistance R 10 GΩ IN Input Capacitance, Differential Mode C 3.5 pF INDM Input Capacitance, Common Mode C 3.5 pF INCM OUTPUT CHARACTERISTICS Output Voltage High V R = 100 kΩ to V ; −40°C ≤ T ≤ +125°C 2.69 V OH L CM A Output Voltage Low VOL RL = 100 kΩ to VCM; −40°C ≤ TA ≤ +125°C 10 mV Short-Circuit Current ISC ±4 mA Closed-Loop Output Impedance ZOUT f = 1 kHz, AV = 1 20 Ω POWER SUPPLY Power Supply Rejection Ratio PSRR VSY = 2.7 V to 18 V 105 125 dB −40°C ≤ TA ≤ +125°C 70 dB Supply Current per Amplifier I I = 0 mA 18 22 µA SY O −40°C ≤ T ≤ +125°C 33 µA A DYNAMIC PERFORMANCE Slew Rate SR R = 1 MΩ, C = 10 pF, A = 1 38 V/ms L L V Settling Time to 0.1% t V = 1 V step, R = 100 kΩ, C = 10 pF 14 µs s IN L L Gain Bandwidth Product GBP R = 1 MΩ, C = 10 pF, A = 1 170 kHz L L V Phase Margin ΦM RL = 1 MΩ, CL = 10 pF, AV = 1 60 Degrees Channel Separation CS f = 10 kHz, RL = 1 MΩ 105 dB EMI Rejection Ratio of +IN x EMIRR VIN = 100 mVPEAK; f = 400 MHz, 900 MHz, 90 dB 1800 MHz, 2400 MHz NOISE PERFORMANCE Voltage Noise e p-p f = 0.1 Hz to 10 Hz 6 µV p-p n Voltage Noise Density e f = 1 kHz 60 nV/√Hz n f = 10 kHz 56 nV/√Hz Current Noise Density in f = 1 kHz 0.1 pA/√Hz Rev. A | Page 3 of 24 AD8657 ELECTRICAL CHARACTERISTICS—10 V OPERATION VSY = 10 V, VCM = VSY/2 V, TA = 25°C, unless otherwise specified. Table 3. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage VOS VCM = 0 V to 10 V 350 µV VCM = 0 V to 10 V; −40°C ≤ TA ≤ +125°C 9 mV Input Bias Current I 2 15 pA B −40°C ≤ T ≤ +125°C 2.6 nA A Input Offset Current I 30 pA OS −40°C ≤ TA ≤ +125°C 500 pA Input Voltage Range 0 10 V Common-Mode Rejection Ratio CMRR VCM = 0 V to 10 V 90 105 dB V = 0 V to 10 V; −40°C ≤ T ≤ +125°C 64 dB CM A Large Signal Voltage Gain A R = 100 kΩ, V = 0.5 V to 9.5 V 105 120 dB VO L O −40°C ≤ TA ≤ +85°C 95 dB −40°C ≤ TA ≤ +125°C 67 dB Offset Voltage Drift ΔVOS/ΔT 2 μV/°C Input Resistance RIN 10 GΩ Input Capacitance, Differential Mode C 3.5 pF INDM Input Capacitance, Common Mode C 3.5 pF INCM OUTPUT CHARACTERISTICS Output Voltage High V R = 100 kΩ to V ; −40°C ≤ T ≤ +125°C 9.98 V OH L CM A Output Voltage Low V R = 100 kΩ to V ; −40°C ≤ T ≤ +125°C 20 mV OL L CM A Short-Circuit Current ISC ±11 mA Closed-Loop Output Impedance ZOUT f = 1 kHz, AV = 1 15 Ω POWER SUPPLY Power Supply Rejection Ratio PSRR VSY = 2.7 V to 18 V 105 125 dB −40°C ≤ TA ≤ +125°C 70 dB Supply Current per Amplifier ISY IO = 0 mA 18 22 µA −40°C ≤ T ≤ +125°C 33 µA A DYNAMIC PERFORMANCE Slew Rate SR R = 1 MΩ, C = 10 pF, A = 1 60 V/ms L L V Settling Time to 0.1% t V = 1 V step, R = 100 kΩ, C = 10 pF 13 µs s IN L L Gain Bandwidth Product GBP R = 1 MΩ, C = 10 pF, A = 1 200 kHz L L V Phase Margin ΦM RL = 1 MΩ, CL = 10 pF, AV = 1 60 Degrees Channel Separation CS f = 10 kHz, RL = 1 MΩ 105 dB EMI Rejection Ratio of +IN x EMIRR VIN = 100 mVPEAK; f = 400 MHz, 900 MHz, 90 dB 1800 MHz, 2400 MHz NOISE PERFORMANCE Voltage Noise en p-p f = 0.1 Hz to 10 Hz 5 µV p-p Voltage Noise Density e f = 1 kHz 50 nV/√Hz n f = 10 kHz 45 nV/√Hz Current Noise Density i f = 1 kHz 0.1 pA/√Hz n Rev. A | Page 4 of 24 AD8657 ELECTRICAL CHARACTERISTICS—18 V OPERATION VSY = 18 V, VCM = VSY/2 V, TA = 25°C, unless otherwise specified. Table 4. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage VOS VCM = 0 V to 18 V 350 µV VCM = 0.3 V to 17.7 V; −40°C ≤ TA ≤ +85°C 1.2 mV V = 0.3 V to 17.7 V; −40°C ≤ T ≤ +125°C 2 mV CM A V = 0 V to 18 V; −40°C ≤ T ≤ +125°C 11 mV CM A Input Bias Current I 5 20 pA B −40°C ≤ TA ≤ +125°C 2.9 nA Input Offset Current IOS 40 pA −40°C ≤ TA ≤ +125°C 500 pA Input Voltage Range 0 18 V Common-Mode Rejection Ratio CMRR V = 0 V to 18 V 95 110 dB CM VCM = 0.3 V to 17.7 V; −40°C ≤ TA ≤ +85°C 83 dB VCM = 0.3 V to 17.7 V; −40°C ≤ TA ≤ +125°C 80 dB VCM = 0 V to 18 V; −40°C ≤ TA ≤ +125°C 67 dB Large Signal Voltage Gain AVO RL = 100 kΩ, VO = 0.5 V to 17.5 V 110 120 dB −40°C ≤ T ≤ +85°C 105 dB A −40°C ≤ T ≤ +125°C 73 dB A Offset Voltage Drift ΔVOS/ΔT 2 μV/°C Input Resistance RIN 10 GΩ Input Capacitance, Differential Mode CINDM 3.5 pF Input Capacitance, Common Mode C 10.5 pF INCM OUTPUT CHARACTERISTICS Output Voltage High VOH RL = 100 kΩ to VCM; −40°C ≤ TA ≤ +125°C 17.97 V Output Voltage Low V R = 100 kΩ to V ; −40°C ≤ T ≤ +125°C 30 mV OL L CM A Short-Circuit Current I ±12 mA SC Closed-Loop Output Impedance ZOUT f = 1 kHz, AV = 1 15 Ω POWER SUPPLY Power Supply Rejection Ratio PSRR V = 2.7 V to 18 V 105 125 dB SY −40°C ≤ T ≤ +125°C 70 dB A Supply Current per Amplifier ISY IO = 0 mA 18 22 µA −40°C ≤ TA ≤ +125°C 33 µA DYNAMIC PERFORMANCE Slew Rate SR RL = 1 MΩ, CL = 10 pF, AV = 1 70 V/ms Settling Time to 0.1% ts VIN = 1 V step, RL = 100 kΩ, CL = 10 pF 12 µs Gain Bandwidth Product GBP R = 1 MΩ, C = 10 pF, A = 1 200 kHz L L V Phase Margin Φ R = 1 MΩ, C = 10 pF, A = 1 60 Degrees M L L V Channel Separation CS f = 10 kHz, R = 1 MΩ 105 dB L EMI Rejection Ratio of +IN x EMIRR VIN = 100 mVPEAK; f = 400 MHz, 900 MHz, 90 dB 1800 MHz, 2400 MHz NOISE PERFORMANCE Voltage Noise en p-p f = 0.1 Hz to 10 Hz 5 µV p-p Voltage Noise Density en f = 1 kHz 50 nV/√Hz f = 10 kHz 45 nV/√Hz Current Noise Density i f = 1 kHz 0.1 pA/√Hz n Rev. A | Page 5 of 24 AD8657 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 4. θ is specified for the worst-case conditions, that is, a device JA Parameter Rating soldered in a circuit board for surface-mount packages using a Supply Voltage 20.5 V standard 4-layer JEDEC board. The exposed pad is soldered to Input Voltage (V−) − 300 mV to (V+) + 300 mV the board. 1 Input Current ±10 mA Differential Input Voltage ±VSY Table 5. Thermal Resistance Output Short-Circuit Indefinite Package Type θJA θJC Unit Duration to GND 8-Lead MSOP (RM-8) 142 45 °C/W Temperature Range 8-Lead LFCSP (CP-8-11) 75 12 °C/W Storage −65°C to +150°C Operating −40°C to +125°C Junction −65°C to +150°C ESD CAUTION Lead Temperature 300°C (Soldering, 60 sec) 1 The input pins have clamp diodes to the power supply pins. Limit the input current to 10 mA or less whenever input signals exceed the power supply rail by 0.3 V. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. A | Page 6 of 24 AD8657 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted. 160 160 V = 2.7V V = 18V SY SY 140 140 V = V /2 V = V /2 CM SY CM SY 120 120 100 100 80 80 60 60 40 40 20 20 0 0 V (µV) V (µV) OS OS Figure 3. Input Offset Voltage Distribution Figure 6. Input Offset Voltage Distribution 18 20 V = 2.7V V = 18V SY SY 18 16 –40°C ≤ T ≤ +125°C –40°C ≤ T ≤ +125°C A A 16 14 14 12 12 10 10 8 8 6 6 4 4 2 2 0 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 TCV (µV/°C) TCV (µV/°C) OS OS Figure 4. Input Offset Voltage Drift Distribution Figure 7. Input Offset Voltage Drift Distribution 300 300 V = 2.7V V = 18V SY SY 200 200 100 100 0 0 –100 –100 –200 –200 –300 –300 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 0 2 4 6 8 10 12 14 16 18 V (V) V (V) CM CM Figure 5. Input Offset Voltage vs. Common-Mode Voltage Figure 8. Input Offset Voltage vs. Common-Mode Voltage Rev. A | Page 7 of 24 V (µV) NUMBER OF AMPLIFIERS OS NUMBER OF AMPLIFIERS –140 –120 –100 –80 –60 –40 –20 0 20 40 60 80 100 120 140 08804-003 08804-004 08804-002 V (µV) NUMBER OF AMPLIFIERS OS NUMBER OF AMPLIFIERS –140 –120 –100 –80 –60 –40 –20 0 20 40 60 80 100 120 140 08804-006 08804-007 08804-005 AD8657 2.0 4 V = 2.7V SY 3 V = 18V 1.5 SY –40°C ≤ T ≤ +85°C A –40°C ≤ T ≤ +85°C A 2 1.0 1 0.5 0 0 –0.5 –1 –1.0 –2 –3 –1.5 –4 –2.0 0 2 4 6 8 10 12 14 16 18 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 V (V) CM V (V) CM Figure 12. Input Offset Voltage vs. Common-Mode Voltage Figure 9. Input Offset Voltage vs. Common-Mode Voltage 6 2.0 V = 2.7V SY V = 18V 1.5 SY –40°C ≤ T ≤ +125°C 4 A –40°C ≤ T ≤ +125°C A 1.0 2 0.5 0 0 –0.5 –2 –1.0 –4 –1.5 –6 –2.0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 0 2 4 6 8 10 12 14 16 18 V (V) CM V (V) CM Figure 10. Input Offset Voltage vs. Common-Mode Voltage Figure 13. Input Offset Voltage vs. Common-Mode Voltage 10000 10000 V = 2.7V V = 18V SY SY 1000 1000 100 100 I + I + B B I – I – B B 10 10 1 1 0.1 0.1 25 50 75 100 125 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) Figure 11. Input Bias Current vs. Temperature Figure 14. Input Bias Current vs. Temperature Rev. A | Page 8 of 24 I (pA) B V (mV) V (mV) OS OS 08804-109 08804-108 08804-008 I (pA) B V (mV) V (mV) OS OS 08804-112 08804-111 08804-011 AD8657 4 4 V = 2.7V V = 18V SY SY 3 3 2 2 1 1 0 0 125°C 125°C 85°C 85°C –1 –1 25°C 25°C –2 –2 –3 –3 –4 –4 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 0 2 4 6 8 10 12 14 16 18 V (V) V (V) CM CM Figure 15. Input Bias Current vs. Common-Mode Voltage Figure 18. Input Bias Current vs. Common-Mode Voltage 10 10 V = 2.7V V = 18V SY SY 1 1 –40°C –40°C 100m 100m +25°C +25°C +85°C +85°C +125°C +125°C 10m 10m 1m 1m 0.1m 0.1m 0.01m 0.01m 0.001 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 LOAD CURRENT (mA) LOAD CURRENT (mA) Figure 16. Output Voltage (VOH) to Supply Rail vs. Load Current Figure 19. Output Voltage (VOH) to Supply Rail vs. Load Current 10 10 V = 2.7V V = 18V SY SY 1 1 –40°C –40°C 100m 100m +25°C +25°C +85°C +85°C +125°C +125°C 10m 10m 1m 1m 0.1m 0.1m 0.01m 0.01m 0.001 0.01 0.1 1 10 100 0.001 0.01 0.1 1 10 100 LOAD CURRENT (mA) LOAD CURRENT (mA) Figure 17. Output Voltage (VOL) to Supply Rail vs. Load Current Figure 20. Output Voltage (VOL) to Supply Rail vs. Load Current Rev. A | Page 9 of 24 OUTPUT VOLTAGE (V ) TO SUPPLY RAIL (V) OUTPUT VOLTAGE (V ) TO SUPPLY RAIL (V) OL OH I (nA) B 08804-009 08804-010 08804-014 OUTPUT VOLTAGE (V ) TO SUPPLY RAIL (V) OUTPUT VOLTAGE (V ) TO SUPPLY RAIL (V) OL OH I (nA) B 08804-012 08804-013 08804-017 AD8657 2.700 18.000 R = 1MΩ R = 1MΩ L L 2.699 17.995 17.990 2.698 17.985 2.697 R = 100kΩ L R = 100kΩ L 17.980 2.696 V = 2.7V V = 18V SY SY 17.975 2.695 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) Figure 21. Output Voltage (VOH) vs. Temperature Figure 24. Output Voltage (VOH) vs. Temperature 12 12 V = 2.7V V = 18V SY SY R = 100kΩ 10 10 L 8 8 6 6 4 4 R = 100kΩ L 2 2 R = 1MΩ L R = 1MΩ L 0 0 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) Figure 22. Output Voltage (V ) vs. Temperature Figure 25. Output Voltage (V ) vs. Temperature OL OL 35 35 V = 2.7V V = 18V SY SY 30 30 25 25 20 20 15 15 10 10 –40°C –40°C +25°C +25°C 5 5 +85°C +85°C +125°C +125°C 0 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 0 3 6 9 12 15 18 V (V) V (V) CM CM Figure 23. Supply Current vs. Common-Mode Voltage Figure 26. Supply Current vs. Common-Mode Voltage Rev. A | Page 10 of 24 OUTPUT VOLTAGE, V (V) OH I PER AMP (µA) OUTPUT VOLTAGE, V (mV) SY OL 08804-016 08804-120 08804-015 OUTPUT VOLTAGE, V (V) OH I PER AMP (µA) OUTPUT VOLTAGE, V (mV) SY OL 08804-019 08804-123 08804-018 AD8657 35 60 30 50 V = 2.7V SY V = 18V 25 SY 40 20 30 15 20 10 –40°C +25°C 10 5 +85°C +125°C 0 0 0 3 6 9 12 15 18 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) V (V) SY Figure 27. Supply Current vs. Supply Voltage Figure 30. Supply Current vs. Temperature 60 135 60 135 V = 18V V = 2.7V SY SY PHASE PHASE R = 1MΩ R = 1MΩ L L 90 90 40 40 45 45 20 20 GAIN 0 0 0 0 GAIN –20 –45 –20 –45 C = 10pF C = 10pF L L –40 –90 –40 –90 C = 100pF C = 100pF L L –135 –135 –60 –60 1k 10k 100k 1M 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 28. Open-Loop Gain and Phase vs. Frequency Figure 31. Open-Loop Gain and Phase vs. Frequency 60 60 V = 2.7V V = 18V SY SY A = 100 A = 100 V V 40 40 A = 10 A = 10 V V 20 20 A = 1 A = 1 V V 0 0 –20 –20 –40 –40 –60 –60 100 1k 10k 100k 1M 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 32. Closed-Loop Gain vs. Frequency Figure 29. Closed-Loop Gain vs. Frequency Rev. A | Page 11 of 24 OPEN-LOOP GAIN (dB) CLOSED-LOOP GAIN (dB) I PER AMP (µA) SY 08804-022 08804-020 PHASE (Degrees) 08804-021 OPEN-LOOP GAIN (dB) CLOSED-LOOP GAIN (dB) I PER AMP (µA) SY 08804-023 08804-025 PHASE (Degrees) 08804-024 AD8657 1000 1000 A = 100 A = 100 V V A = 10 A = 10 V V 100 100 A = 1 A = 1 V V 10 10 V = 2.7V V = 18V SY SY 1 1 100 1k 10k 100k 100 1k 10k 100k FREQUENCY (Hz) FREQUENCY (Hz) Figure 33. Output Impedance vs. Frequency Figure 36. Output Impedance vs. Frequency 140 140 V = 2.7V V = 18V SY SY 120 120 V = 2.4V V = V /2 CM CM SY 100 100 80 80 60 60 40 40 20 20 0 0 100 1k 10k 100k 1M 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 34. CMRR vs. Frequency Figure 37. CMRR vs. Frequency 100 100 V = 2.7V V = 18V SY SY 80 80 60 60 PSRR+ PSRR+ 40 40 PSRR– PSRR– 20 20 0 0 100 1k 10k 100k 1M 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 35. PSRR vs. Frequency Figure 38. PSRR vs. Frequency Rev. A | Page 12 of 24 Z (Ω) PSRR (dB) CMRR (dB) OUT 08804-028 08804-027 08804-026 Z (Ω) PSRR (dB) CMRR (dB) OUT 08804-031 08804-030 08804-029 AD8657 70 70 V = 2.7V V = 18V SY SY OS+ OS+ 60 60 V = 10mV p-p V = 10mV p-p IN IN OS– OS– R = 1MΩ R = 1MΩ L L 50 50 40 40 30 30 20 20 10 10 0 0 10 100 1000 10 100 1000 CAPACITANCE (pF) CAPACITANCE (pF) Figure 39. Small Signal Overshoot vs. Load Capacitance Figure 42. Small Signal Overshoot vs. Load Capacitance V = ±1.35V SY A = 1 V V = ±9V SY R = 1MΩ L A = 1 V C = 100pF L R = 1MΩ L C = 100pF L TIME (100µs/DIV) TIME (100µs/DIV) Figure 40. Large Signal Transient Response Figure 43. Large Signal Transient Response V = ±1.35V SY V = ±9V SY A = 1 V A = 1 V R = 1MΩ L R = 1MΩ L C = 100pF L C = 100pF L TIME (100µs/DIV) TIME (100µs/DIV) Figure 41. Small Signal Transient Response Figure 44. Small Signal Transient Response Rev. A | Page 13 of 24 OVERSHOOT (%) VOLTAGE (5mV/DIV) VOLTAGE (500mV/DIV) 08804-034 08804-033 08804-032 OVERSHOOT (%) VOLTAGE (5mV/DIV) VOLTAGE (5V/DIV) 08804-037 08804-036 08804-035 AD8657 V = ±9V SY 0 A = –10 V INPUT R = 1MΩ L INPUT –0.2 0 V = ±1.35 SY A = –10 V –0.4 –1 R = 1MΩ L –2 2 10 1 5 OUTPUT OUTPUT 0 0 TIME (40µs/DIV) TIME (40µs/DIV) Figure 45. Positive Overload Recovery Figure 48. Positive Overload Recovery V = ±9V SY 0.4 2 A = –10 V R = 1MΩ L 0.2 1 INPUT INPUT 0 0 OUTPUT OUTPUT 0 0 V = ±1.35V SY –1 –5 A = –10 V R = 1MΩ L –2 –10 TIME (40µs/DIV) TIME (40µs/DIV) Figure 46. Negative Overload Recovery Figure 49. Negative Overload Recovery INPUT INPUT V = 2.7V V = 18V SY SY R = 100kΩ R = 100kΩ L L C = 10pF L C = 10pF L +5mV +5mV 0 0 ERROR BAND ERROR BAND OUTPUT OUTPUT –5mV –5mV TIME (10µs/DIV) TIME (10µs/DIV) Figure 47. Positive Settling Time to 0.1% Figure 50. Positive Settling Time to 0.1% Rev. A | Page 14 of 24 INPUT VOLTAGE (V) INPUT VOLTAGE (V) VOLTAGE (500mV/DIV) OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 08804-040 08804-038 08804-039 INPUT VOLTAGE (V) INPUT VOLTAGE (V) VOLTAGE (500mV/DIV) OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 08804-043 08804-041 08804-042 AD8657 V = 2.7V V =18V SY SY R = 100kΩ R = 100kΩ L L C = 10pF C = 10pF L L INPUT INPUT +5mV +5mV OUTPUT OUTPUT 0 0 ERROR BAND ERROR BAND –5mV –5mV TIME (10µs/DIV) TIME (10µs/DIV) Figure 51. Negative Settling Time to 0.1% Figure 54. Negative Settling Time to 0.1% 1000 1000 V = 2.7V V = 18V SY SY 100 100 10 10 1 1 10 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 52. Voltage Noise Density vs. Frequency Figure 55. Voltage Noise Density vs. Frequency V = 2.7V V = 18V SY SY TIME (2s/DIV) TIME (2s/DIV) Figure 53. 0.1 Hz to 10 Hz Noise Figure 56. 0.1 Hz to 10 Hz Noise Rev. A | Page 15 of 24 VOLTAGE NOISE DENSITY (nV/√Hz) VOLTAGE (500mV/DIV) VOLTAGE (2µV/DIV) 08804-046 08804-044 08804-045 VOLTAGE NOISE DENSITY (nV/√Hz) VOLTAGE (500mV/DIV) VOLTAGE (2µV/DIV) 08804-049 08804-047 08804-048 AD8657 20 3.0 V = 18V V = 2.7V SY SY 18 V = 17.9V V = 2.6V IN IN 2.5 R = 1MΩ R = 1MΩ 16 L L A = 1 A = 1 V V 14 2.0 12 1.5 10 8 1.0 6 4 0.5 2 0 0 10 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 60. Output Swing vs. Frequency Figure 57. Output Swing vs. Frequency 100 100 V = 2.7V V = 18V SY SY V = 0.2V rms V = 0.2V rms IN IN R = 1MΩ R = 1MΩ L L A = 1 A = 1 V V 10 10 1 1 0.1 0.1 0.01 0.01 10 100 1k 10k 100k 10 100 1k 10k 100k FREQUENCY (Hz) FREQUENCY (Hz) Figure 58. THD + N vs. Frequency Figure 61. THD + N vs. Frequency 0 0 1MΩ 1MΩ 10kΩ V = 2.7V V = 18V SY SY 10kΩ –20 –20 R = 1MΩ R = 1MΩ L L A = –100 A = –100 V V R L R –40 –40 L V = 1V p-p IN –60 –60 V = 5V p-p IN V = 0.5V p-p IN V = 10V p-p IN –80 V = 1.5V p-p –80 V = 15V p-p IN IN V = 17V p-p V = 2.6V p-p IN IN –100 –100 –120 –120 –140 –140 100 1k 10k 100k 100 1k 10k 100k FREQUENCY (Hz) FREQUENCY (Hz) Figure 59. Channel Separation vs. Frequency Figure 62. Channel Separation vs. Frequency Rev. A | Page 16 of 24 CHANNEL SEPARATION (dB) THD + N (%) OUTPUT SWING (V) 08804-050 08804-051 08804-052 CHANNEL SEPARATION (dB) THD + N (%) OUTPUT SWING (V) 08804-053 08804-054 08804-055 AD8657 APPLICATIONS INFORMATION The AD8657 is a low power, rail-to-rail input and output Figure 9, Figure 10, Figure 12, and Figure 13 for typical perfor- precision CMOS amplifier that operates over a wide supply mance data). voltage range of 2.7 V to 18 V. This amplifier uses the Analog Current Source I1 drives the PMOS transistor pair. As the input Devices DigiTrim technique to achieve a higher degree of common-mode voltage approaches the upper rail, I1 is steered precision than is available from other CMOS amplifiers. The away from the PMOS differential pair through the M5 transistor. DigiTrim technique is a method of trimming the offset voltage The bias voltage, VB1, controls the point where this transfer occurs. of an amplifier after assembly. The advantage of postpackage M5 diverts the tail current into a current mirror consisting of the trimming is that it corrects any shifts in offset voltage caused by M6 and M7 transistors. The output of the current mirror then mechanical stresses of assembly. drives the NMOS pair. Note that the activation of this current The AD8657 also employs unique input and output stages to mirror causes a slight increase in supply current at high common- achieve a rail-to-rail input and output range with a very low mode voltages (see Figure 23 and Figure 26 for more details). supply current. The AD8657 achieves its high performance by using low voltage MOS devices for its differential inputs. These low voltage MOS INPUT STAGE devices offer excellent noise and bandwidth per unit of current. Figure 63 shows the simplified schematic of the AD8657. The Each differential input pair is protected by proprietary regulation input stage comprises two differential transistor pairs, an NMOS circuitry (not shown in the simplified schematic). The regula- pair (M1, M2) and a PMOS pair (M3, M4). The input common- tion circuitry consists of a combination of active devices that mode voltage determines which differential pair turns on and is maintain the proper voltages across the input pairs during normal more active than the other. operation and passive clamping devices that protect the amplifier The PMOS differential pair is active when the input voltage during fast transients. However, these passive clamping devices approaches and reaches the lower supply rail. The NMOS pair begin to forward bias as the common-mode voltage approaches is needed for input voltages up to and including the upper supply either power supply rail. This causes an increase in the input rail. This topology allows the amplifier to maintain a wide bias current (see Figure 15 and Figure 18). dynamic input voltage range and to maximize signal swing to The input devices are also protected from large differential both supply rails. input voltages by clamp diodes (D1 and D2). These diodes are For the majority of the input common-mode voltage range, the buffered from the inputs with two 10 kΩ resistors (R1 and R2). PMOS differential pair is active. Differential pairs commonly The differential diodes turn on whenever the differential voltage exhibit different offset voltages. The handoff from one pair to the exceeds approximately 600 mV; in this condition, the differential other creates a step-like characteristic that is visible in the VOS vs. input resistance drops to 20 kΩ. VCM graph (see Figure 5 and Figure 8). This is inherent in all rail- OUTPUT STAGE to-rail amplifiers that use the dual differential pair topology. Therefore, always choose a common-mode voltage that does not The AD8657 features a complementary output stage consisting include the region of handoff from one input differential pair to of the M16 and M17 transistors. These transistors are configured the other. in Class AB topology and are biased by the voltage source, VB2. This topology allows the output voltage to go within millivolts Additional steps in the V vs. V curves are also visible as the OS CM of the supply rails, achieving a rail-to-rail output swing. The output input common-mode voltage approaches the power supply rails. voltage is limited by the output impedance of the transistors, which These changes are a result of the load transistors (M8, M9, M14, are low RON MOS devices. The output voltage swing is a function and M15) running out of headroom. As the load transistors are of the load current and can be estimated using the output voltage to forced into the triode region of operation, the mismatch of their the supply rail vs. load current diagrams (see Figure 16, Figure 17, drain impedances contributes to the offset voltage of the amplifier. Figure 19, and Figure 20). This problem is exacerbated at high temperatures due to the decrease in the threshold voltage of the input transistors (see Rev. A | Page 17 of 24 AD8657 V+ VB1 I1 M8 M9 M5 M10 M11 M3 M4 M16 +IN x R1 D1 D2 VB2 OUT x –IN x R2 M1 M2 M17 M12 M13 M14 M15 M7 M6 V– Figure 63. Simplified Schematic Inverting Configuration RAIL TO RAIL Figure 65 shows AD8657 in an inverting configuration with The AD8657 features rail-to-rail input and output with a supply a resistive load, RL, at the output. The actual load seen by the voltage from 2.7 V to 18 V. Figure 64 shows the input and output amplifier is the parallel combination of the feedback resistor, waveforms of the AD8657 configured as a unity-gain buffer with R2, and load, R . Having a feedback resistor of 1 kΩ and a load a supply voltage of ±9 V and a resistive load of 1 MΩ. With an L of 1 MΩ results in an equivalent load resistance of 999 Ω at the input voltage of ±9 V, the AD8657 allows the output to swing output. In this condition, the AD8657 is incapable of driving very close to both rails. Additionally, it does not exhibit phase such a heavy load; therefore, its performance degrades greatly. reversal. To avoid loading the output, use a larger feedback resistor, but V = ±9V SY consider the resistor thermal noise effect on the overall circuit. INPUT R = 1MΩ OUTPUT L R2 +V SY R1 V IN AD8657 V OUT 1/2 R L –V SY R = R || R2 L, EFF L Figure 65. Inverting Op Amp Noninverting Configuration TIME (200µs/DIV) Figure 66 shows the AD8657 in a noninverting configuration Figure 64. Rail-to-Rail Input and Output with a resistive load, R , at the output. The actual load seen by L the amplifier is the parallel combination of R1 + R2 and RL. RESISTIVE LOAD R2 The feedback resistor alters the load resistance that an amplifier sees. It is, therefore, important to be aware of the value of feed- +V SY R1 back resistors chosen for use with the AD8657. The AD8657 is capable of driving resistive loads down to 100 kΩ. The following AD8657 V OUT 1/2 two examples, inverting and noninverting configurations, show R L V IN how the feedback resistor changes the actual load resistance –V SY seen at the output of the amplifier. R = R || (R1 + R2) L, EFF L Figure 66. Noninverting Op Amp Rev. A | Page 18 of 24 VOLTAGE (5V/DIV) 08804-057 08804-056 08804-059 08804-058 AD8657 consist of substrate PNP bipolar transistors, and conduct whenever COMPARATOR OPERATION the differential input voltage exceeds approximately 600 mV; how- Op amps are designed to operate in a closed-loop configuration ever, these diodes also allow a current path from the input to the with feedback from its output to its inverting input. Figure 67 lower supply rail, thus resulting in an increase in the total supply shows the AD8657 configured as a voltage follower with an input current of the system. As shown in Figure 71, both configurations voltage that is always kept at midpoint of the power supplies. yield the same result. At 18 V of power supply, ISY+ remains at The same configuration is applied to the unused channel. A1 and 36 μA per dual amplifier, but ISY− increases to 140 μA in magni- A2 indicate the placement of ammeters to measure supply current. tude per dual amplifier. ISY+ refers to the current flowing from the upper supply rail to +V SY the op amp, and ISY− refers to the current flowing from the op amp to the lower supply rail. As shown in Figure 68, as expected, in normal operating condition, the total current flowing into the A1 I + SY 100kΩ op amp is equivalent to the total current flowing out of the op amp, where, I + = I − = 36 μA for the dual AD8657 at V = 18 V. SY SY SY AD8657 +V V SY OUT 1/2 A1 I + SY 100kΩ A2 I – SY 100kΩ –V AD8657 SY V 1/2 OUT Figure 69. Comparator A +V SY A2 I – 100kΩ SY A1 I + SY –V SY 100kΩ Figure 67. Voltage Follower AD8657 V OUT 40 1/2 35 100kΩ A2 I – SY 30 25 –V SY 20 Figure 70. Comparator B 15 160 I – SY 10 140 I + SY 5 120 0 100 0 2 4 6 8 10 12 14 16 18 V (V) I – SY SY 80 I + SY Figure 68. Supply Current vs. Supply Voltage (Voltage Follower) 60 In contrast to op amps, comparators are designed to work in an 40 open-loop configuration and to drive logic circuits. Although op amps are different from comparators, occasionally an unused 20 section of a dual op amp is used as a comparator to save board 0 space and cost; however, this is not recommended. 0 2 4 6 8 10 12 14 16 18 V (V) SY Figure 69 and Figure 70 show the AD8657 configured as a com- Figure 71. Supply Current vs. Supply Voltage (AD8657 as a Comparator) parator, with 100 kΩ resistors in series with the input pins. Any unused channels are configured as buffers with the input voltage Note that 100 kΩ resistors are used in series with the input of kept at the midpoint of the power supplies. The AD8657 has input the op amp. If smaller resistor values are used, the supply current of devices that are protected from large differential input voltages the system increases much more. For more details on op amps as by Diode D1 and Diode D2 (refer to Figure 63). These diodes comparators, refer to the AN-849 Application Note Using Op Amps as Comparators. Rev. A | Page 19 of 24 I PER DUAL AMPLIFIER (µA) SY 08804-066 08804-067 I pER DUAL AMPLIFIER (µA) SY 08804-068 08804-069 08804-070 AD8657 choice due to its low supply current of 33 μA per amplifier over EMI REJECTION RATIO temperature and supply voltage. The current transmitter controls Circuit performance is often adversely affected by high frequency the current flowing in the loop, where a zero-scale input signal electromagnetic interference (EMI). In the event where signal is represented by 4 mA of current and a full-scale input signal strength is low and transmission lines are long, an op amp must is represented by 20 mA. The transmitter also floats from the accurately amplify the input signals. However, all op amp pins— control loop power supply, VDD, while signal ground is in the the noninverting input, inverting input, positive supply, negative receiver. The loop current is measured at the load resistor, RL, supply, and output pins—are susceptible to EMI signals. These at the receiver side. high frequency signals are coupled into an op amp by various With a zero-scale input, a current of V /R flows through means such as conduction, near field radiation, or far field radi- REF NULL R. This creates a current flowing through the sense resistor, ation. For instance, wires and PCB traces can act as antennas and I , determined by the following equation (see Figure 73 for pick up high frequency EMI signals. SENSE details): Precision op amps, such as the AD8657, do not amplify EMI or RF signals because of their relatively low bandwidth. However, ISENSE, MIN = (VREF × R)/(RNULL × RSENSE) due to the nonlinearities of the input devices, op amps can rectify With a full-scale input voltage, current flowing through R is these out-of-band signals. When these high frequency signals increased by the full-scale change in V /R . This creates an IN SPAN are rectified, they appear as a dc offset at the output. increase in the current flowing through the sense resistor. To describe the ability of the AD8657 to perform as intended in I = (Full-Scale Change in V × R)/(R × R ) SENSE, DELTA IN SPAN SENSE the presence of an electromagnetic energy, the electromagnetic Therefore interference rejection ratio (EMIRR) of the noninverting pin is specified in Table 2, Table 3, and Table 4 of the Specifications ISENSE, MAX = ISENSE, MIN + ISENSE, DELTA section. A mathematical method of measuring EMIRR is When R >> RSENSE, the current through the load resistor at the defined as follows: receiver side is almost equivalent to ISENSE. EMIRR = 20 log (V IN_PEAK/ΔVOS) Figure 73 is designed for a full-scale input voltage of 5 V. At 0 V 140 of input, loop current is 3.5 mA, and at a full scale of 5 V, the loop current is 21 mA. This allows software calibration to fine 120 tune the current loop to the 4 mA to 20 mA range. The AD8657 and ADR125 both consume only 160 µA quiescent 100 current, making 3.34 mA current available to power additional signal conditioning circuitry or to power a bridge circuit. 80 ADR125 V REF V V OUT IN 60 GND R NULL C2 C3 C4 C5 1MΩ 10µF 0.1µF 0.1µF 10µF 1% 40 V = 100mV IN PEAK V = 2.7V TO 18V SY R SPAN 20 200kΩ 1/2 10M 100M 1G 10G V 1% AD8657 Q1 IN 0V TO 5V V FREQUENCY (Hz) DD 18V R4 R1 Figure 72. EMIRR vs. Frequency 3.3kΩ 68kΩ D1 4mA 1% R3 TO C1 1.2kΩ 4 mA TO 20 mA PROCESS CONTROL CURRENT 20mA 390pF R R2 L LOOP TRANSMITTER 100Ω 2kΩ R SENSE 1% 100Ω The 2-wire current transmitters are often used in distributed 1% control systems and process control applications to transmit NOTES analog signals between sensors and process controllers. Figure 73 1. R1 + R2 = R´. shows a 4 mA to 20 mA current loop transmitter. Figure 73. 4 mA to 20 mA Current Loop Transmitter The transmitter powers directly from the control loop power supply, and the current in the loop carries signal from 4 mA to 20 mA. Thus, 4 mA establishes the baseline current budget within which the circuit must operate. Using the AD8657 is an excellent Rev. A | Page 20 of 24 EMIRR (dB) 08804-071 08804-060 AD8657 OUTLINE DIMENSIONS 3.20 3.00 2.80 8 5 5.15 3.20 4.90 3.00 4.65 1 2.80 4 PIN 1 IDENTIFIER 0.65 BSC 0.95 15° MAX 0.85 1.10 MAX 0.75 0.80 0.15 0.23 6° 0.55 0.40 0.05 0.09 0° 0.40 0.25 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 74. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 2.44 2.34 3.10 2.24 3.00 SQ 0.50 BSC 2.90 5 8 PIN 1 INDEX EXPOSED 1.70 PAD AREA 1.60 1.50 0.50 0.40 0.30 4 1 TOP VIEW BOTTOM VIEW FOR PROPER CONNECTION OF 0.80 THE EXPOSED PAD, REFER TO 0.05 MAX 0.75 THE PIN CONFIGURATION AND 0.02 NOM 0.70 FUNCTION DESCRIPTIONS COPLANARITY SECTION OF THIS DATA SHEET. 0.08 SEATING 0.30 PLANE 0.203 REF 0.25 0.20 COMPLIANT TOJEDEC STANDARDS MO-229-WEED Figure 75. 8-Lead Lead Frame Chip Scale Package [LFCSP_WD] 3 mm × 3 mm Body, Very Very Thin, Dual Lead (CP-8-11) Dimensions shown in millimeters ORDERING GUIDE 1 Model Temperature Range Package Description Package Option Branding AD8657ARMZ −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 A2N AD8657ARMZ-R7 −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 A2N AD8657ARMZ-RL −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 A2N AD8657ACPZ-R7 −40°C to +125°C 8-Lead Lead Frame Chip Scale Package [LFCSP_WD] CP-8-11 A2N AD8657ACPZ-RL −40°C to +125°C 8-Lead Lead Frame Chip Scale Package [LFCSP_WD] CP-8-11 A2N 1 Z = RoHS Compliant Part. Rev. A | Page 21 of 24 PIN 1 INDICATOR (R 0.15) 100709-B 01-24-2011-B AD8657 NOTES Rev. A | Page 22 of 24 AD8657 NOTES Rev. A | Page 23 of 24 AD8657 NOTES ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08804-0-3/11(A) Rev. A | Page 24 of 24