ANALOG DEVICES AD8655

Low Noise, Precision CMOS Amplifier Data Sheet AD8655/AD8656 PIN CONFIGURATIONS FEATURES Low noise: 2.7 nV/√Hz @ f = 10 kHz NC 1 8 NC OUT A 1 8 V+ AD8655 AD8656 –IN 2 7 V+ –IN A 2 7 OUT B Low offset voltage: 250 μV max over VCM TOP VIEW +IN 3 6 OUT +IN A 3 TOP VIEW 6 –IN B Offset voltage drift: 0.4 μV/°C typ and 2.3 μV/°C max (Not to Scale) (Not to Scale) V– 4 5 NC V– 4 5 +IN B Bandwidth: 28 MHz NC = NO CONNECT Rail-to-rail input/output Unity gain stable Figure 1. AD8655 Figure 2. AD8656 2.7 V to 5.5 V operation 8-Lead MSOP (RM-8) 8-Lead MSOP (RM-8) −40°C to +125°C operation Qualified for automotive applications (AD8656) NC 1 8 NC OUT A 1 8 V+ APPLICATIONS AD8655 –IN 2 7 V+ –IN A 2 AD8656 7 OUT B 3 6 +IN TOP VIEW OUT +IN A 3 6 –IN B TOP VIEW ADC and DAC buffers (Not to Scale) (Not to Scale) V– 4 5 NC V– 4 5 +IN B Audio Industrial controls NC = NO CONNECT Precision filters Figure 3. AD8655 Figure 4. AD8656 Digital scales 8-Lead SOIC (R-8) 8-Lead SOIC (R-8) Automotive collision avoidance PLL filters GENERAL DESCRIPTION The AD8655/AD8656 are the industry’s lowest noise, precision The high precision performance of the AD8655/AD8656 CMOS amplifiers. They leverage the Analog Devices DigiTrim® improves the resolution and dynamic range in low voltage technology to achieve high dc accuracy. applications. Audio applications, such as microphone pre-amps and audio mixing consoles, benefit from the low noise, low The AD8655/AD8656 provide low noise (2.7 nV/√Hz @ 10 kHz), distortion, and high output current capability of the AD8655/ low THD + N (0.0007%), and high precision performance AD8656 to reduce system level noise performance and maintain (250 μV max over VCM) to low voltage applications. The ability audio fidelity. The high precision and rail-to-rail input and to swing rail-to-rail at the input and output enables designers output of the AD8655/AD8656 benefit data acquisition, process to buffer analog-to-digital converters (ADCs) and other wide controls, and PLL filter applications. dynamic range devices in single-supply systems. The AD8655/AD8656 are fully specified over the −40°C to +125°C temperature range. The AD8655/AD8656 are available in Pb-free, 8-lead MSOP and SOIC packages. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However , no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ©2005–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 05304-049 05304-048 05304-060 05304-059 Data Sheet AD8655/AD8656 TABLE OF CONTENTS Specifications..................................................................................... 3  Driving Capacitive Loads.......................................................... 16  Absolute Maximum Ratings............................................................ 5  Layout, Grounding, and Bypassing Considerations .................. 18  ESD Caution.................................................................................. 5  Power Supply Bypassing............................................................ 18  Typical Performance Characteristics ............................................. 6  Grounding ................................................................................... 18  Theory of Operation ...................................................................... 15  Leakage Currents........................................................................ 18  Applications..................................................................................... 16  Outline Dimensions ....................................................................... 19  Input Overvoltage Protection ................................................... 16  Ordering Guide .......................................................................... 19  Input Capacitance....................................................................... 16  Automotive Products................................................................. 19  REVISION HISTORY 9/11—Rev. A to Rev. B Changes to Features Section............................................................ 1 Updated Outline Dimensions ....................................................... 19 Changes to Ordering Guide .......................................................... 19 Added Automotive Products Section .......................................... 19 6/05—Rev. 0 to Rev. A Added AD8656 ...................................................................Universal Added Figure 2 and Figure 4........................................................... 1 Changes to Specifications................................................................ 3 Changed Caption of Figure 12 and Added Figure 13 .................. 7 Replaced Figure 16 ........................................................................... 7 Changed Caption of Figure 37 and Added Figure 38 ................ 11 Replaced Figure 47 ......................................................................... 13 Added Figure 55.............................................................................. 14 Changes to Ordering Guide .......................................................... 18 4/05—Revision 0: Initial Version Rev. B | Page 2 of 20 Data Sheet AD8655/AD8656 SPECIFICATIONS VS = 5.0 V, VCM = VS/2, TA = 25°C, unless otherwise specified. Table 1. Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage V V = 0 V to 5 V 50 250 μV OS CM −40°C ≤ TA ≤ +125°C 550 μV Offset Voltage Drift −40°C ≤ TA ≤ +125°C 0.4 2.3 μV/°C ΔVOS/ΔT Input Bias Current I 1 10 pA B −40°C ≤ T ≤ +125°C 500 pA A Input Offset Current I 10 pA OS −40°C ≤ TA≤ +125°C 500 pA Input Voltage Range 0 5 V Common-Mode Rejection Ratio CMRR VCM = 0 V to 5 V 85 100 dB Large Signal Voltage Gain A V = 0.2 V to 4.8 V, R = 10 kΩ, V = 0 V 100 110 dB VO O L CM −40°C ≤ T ≤ +125°C 95 dB A OUTPUT CHARACTERISTICS Output Voltage High V I = 1 mA; −40°C ≤ T ≤ +125°C 4.97 4.991 V OH L A Output Voltage Low V I = 1 mA; −40°C ≤ T ≤ +125°C 8 30 mV OL L A Output Current IOUT VOUT = ±0.5 V ±220 mA POWER SUPPLY Power Supply Rejection Ratio PSRR V = 2.7 V to 5.0 V 88 105 dB S Supply Current/Amplifier ISY VO = 0 V 3.7 4.5 mA −40°C ≤ TA ≤ +125°C 5.3 mA INPUT CAPACITANCE C IN Differential 9.3 pF Common-Mode 16.7 pF NOISE PERFORMANCE Input Voltage Noise Density en f = 1 kHz 4 nV/√Hz f = 10 kHz 2.7 nV/√Hz Total Harmonic Distortion + Noise THD + N G = 1, R = 1 kΩ, f = 1 kHz, V = 2 V p-p 0.0007 % L IN FREQUENCY RESPONSE Gain Bandwidth Product GBP 28 MHz Slew Rate SR R = 10 kΩ 11 V/μs L Settling Time ts To 0.1%, V = 0 V to 2 V step, G = +1 370 ns IN Phase Margin CL = 0 pF 69 degrees Rev. B | Page 3 of 20 Data Sheet AD8655/AD8656 V = 2.7 V, V = V /2, T = 25°C, unless otherwise specified. S CM S A Table 2. Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage V V = 0 V to 2.7 V 44 250 μV OS CM −40°C ≤ T ≤ +125°C 550 μV A Offset Voltage Drift −40°C ≤ T ≤ +125°C 0.4 2.0 μV/°C A ΔVOS/ΔT Input Bias Current IB 1 10 pA −40°C ≤ TA ≤ +125°C 500 pA Input Offset Current I 10 pA OS −40°C ≤ T ≤ +125°C 500 pA A Input Voltage Range 0 2.7 V Common-Mode Rejection Ratio CMRR VCM = 0 V to 2.7 V 80 98 dB Large Signal Voltage Gain AVO VO = 0.2 V to 2.5 V, RL = 10 kΩ, VCM = 0 V 98 dB −40°C ≤ TA ≤ +125°C 90 dB OUTPUT CHARACTERISTICS Output Voltage High VOH IL = 1 mA; −40°C ≤ TA ≤ +125°C 2.67 2.688 V Output Voltage Low VOL IL = 1 mA; −40°C ≤ TA ≤ +125°C 10 30 mV Output Current I V = ±0.5 V ±75 mA OUT OUT POWER SUPPLY Power Supply Rejection Ratio PSRR V = 2.7 V to 5.0 V 88 105 dB S Supply Current/Amplifier I V = 0 V 3.7 4.5 mA SY O −40°C ≤ T ≤ +125°C 5.3 mA A INPUT CAPACITANCE CIN Differential 9.3 pF Common-Mode 16.7 pF NOISE PERFORMANCE Input Voltage Noise Density e f = 1 kHz 4.0 n nV/√Hz f = 10 kHz 2.7 nV/√Hz Total Harmonic Distortion + Noise THD + N G = 1, RL = 1kΩ, f = 1 kHz, VIN = 2 V p-p 0.0007 % FREQUENCY RESPONSE Gain Bandwidth Product GBP 27 MHz Slew Rate SR RL = 10 kΩ 8.5 V/μs Settling Time ts To 0.1%, V = 0 to 1 V step, G = +1 370 ns IN Phase Margin C = 0 pF 54 degrees L Rev. B | Page 4 of 20 Data Sheet AD8655/AD8656 ABSOLUTE MAXIMUM RATINGS Table 3. Stresses above those listed under Absolute Maximum Ratings Parameter Rating may cause permanent damage to the device. This is a stress Supply Voltage 6 V rating only; functional operation of the device at these or any Input Voltage VSS − 0.3 V to VDD + 0.3 V other conditions above those indicated in the operational Differential Input Voltage ±6 V section of this specification is not implied. Exposure to absolute Output Short-Circuit Duration Indefinite maximum rating conditions for extended periods may affect to GND device reliability. Electrostatic Discharge (HBM) 3.0 kV Table 4. Storage Temperature Range −65°C to +150°C 1 Package Type θ θ Unit R, RM Packages JA JC −65°C to +150°C 8-Lead MSOP (RM) 210 45 °C/W Junction Temperature Range R, RM Packages 8-Lead SOIC (R) 158 43 °C/W Lead Temperature 260°C 1 θJA is specified for worst-case conditions; that is, θJA is specified for a device (Soldering, 10 sec) soldered in the circuit board for surface-mount packages. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. B | Page 5 of 20 Data Sheet AD8655/AD8656 TYPICAL PERFORMANCE CHARACTERISTICS 60 20 V = ±2.5V S V = ±2.5V S 50 10 40 0 30 –10 20 10 –20 0 –30 –150 –100 –50 0 50 100 150 01 2 3 4 56 V (μV) OS COMMON-MODE VOLTAGE (V) Figure 5. Input Offset Voltage Distribution Figure 8. Input Offset Voltage vs. Common-Mode Voltage 150.0 250 V = ±2.5V S V = ±2.5V S 100.0 200 50.0 150 0.0 100 –50.0 50 –100.0 –150.0 0 –50 0 50 100 150 0 20 40 60 80 100 120 140 TEMPERATURE (°C) TEMPERATURE (°C) Figure 6. Input Offset Voltage vs. Temperature Figure 9. Input Bias Current vs. Temperature 60 4.0 V = ±2.5V S V = ±2.5V S 3.5 50 3.0 40 2.5 30 2.0 1.5 20 1.0 10 0.5 0 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 01 2 3 4 56 |TCV | (μV/°C) OS SUPPLY VOLTAGE (V) Figure 7. |TCV | Distribution Figure 10. Supply Current vs. Supply Voltage OS Rev. B | Page 6 of 20 V (μV) OS NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS 05304-003 05304-001 05304-002 IB (pA) V (μV) SUPPLY CURRENT (mA) OS 05304-006 05304-005 05304-004 Data Sheet AD8655/AD8656 4.5 4.996 V = ±2.5V S V = ±2.5V S LOAD CURRENT = 1mA 4.994 4.0 4.992 3.5 4.990 4.988 3.0 4.986 2.5 4.984 2.0 4.982 –50 0 50 100 150 –50 0 50 100 150 TEMPERATURE (°C) TEMPERATURE (°C) Figure 11. Supply Current vs. Temperature Figure 14. Output Voltage Swing High vs. Temperature 12 2500 LOAD CURRENT = 1mA V = ±2.5V S V = ±2.5V S 10 2000 1500 8 V OH 1000 6 V OL 500 4 0 2 –50 0 50 100 150 0 50 100 150 200 250 TEMPERATURE (°C) CURRENT LOAD (mA) Figure 12. AD8655 Output Voltage to Supply Rail vs. Current Load Figure 15. Output Voltage Swing Low vs. Temperature 10000 120 V =±2.5V V =±2.5V S S V = 28mV IN 100 R = 1MΩ L C = 47pF L 1000 80 60 100 40 10 V OL 20 V OH 1 0 0.1 1 10 100 1000 100 1k 10k 100k 1M 10M CURRENT LOAD (mA) FREQUENCY (Hz) Figure 13. AD8656 Output Swing vs. Current Load Figure 16. CMRR vs. Frequency Rev. B | Page 7 of 20 DELTA SWING FROM SUPPLY (mV) DELTA SWING FROM SUPPLY (mV) SUPPLY CURRENT (mA) 05304-007 05304-056 05304-008 V (V) OH V (mV) CMRR (dB) OL 05304-011 05304-010 05304-009 Data Sheet AD8655/AD8656 100 110.00 V = ±2.5V S V = ±2.5V S V = 0V CM 107.00 104.00 10 101.00 98.00 95.00 1 92.00 1 10 100 1k 10k 100k –50 0 50 100 150 FREQUENCY (Hz) TEMPERATURE (°C) Figure 20. Voltage Noise Density vs. Frequency Figure 17. Large Signal CMRR vs. Temperature 100 +PSRR V = ±2.5V S V = ±2.5V S V = 50mV IN Vn (p-p) = 1.23μV R = 1MΩ L 80 –PSRR C = 47pF L 60 1 40 20 0 100 1k 10k 100k 1M 10M 100M 1s/DIV FREQUENCY (Hz) Figure 21. Low Frequency Noise (0.1 Hz to 10 Hz). Figure 18. Small Signal PSSR vs. Frequency 110.00 V = ±2.5V T S V IN V = ±2.5V S C = 50pF L 108.00 GAIN = +1 V OUT 106.00 2 104.00 102.00 100.00 –50 0 50 100 150 20μs/DIV TEMPERATURE (°C) Figure 22. No Phase Reversal Figure 19. Large Signal PSSR vs. Temperature Rev. B | Page 8 of 20 PSRR (dB) CMRR (dB) PSRR (dB) 05304-013 05304-012 05304-014 VOLTAGE NOISE DENSITY (nV/√Hz 1/2) 1V/DIV 500nV/DIV 05304-021 05304-020 05304-019 Data Sheet AD8655/AD8656 –45 120 6 V = ±2.5V V = ±2.5V S S V = 5V C = 11.5pF LOAD IN 100 5 G = +1 PHASE MARGIN = 69° 80 –90 4 60 3 40 –135 20 2 0 –180 1 –20 –40 –225 0 10k 100k 1M 10M 100M 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 23. Open-Loop Gain and Phase vs. Frequency Figure 26. Maximum Output Swing vs. Frequency 140.00 V = ±2.5V S T R = 10kΩ V = ±2.5V L S C = 100pF L 130.00 GAIN = +1 V = 4V IN 120.00 2 110.00 100.00 90.00 –50 0 50 100 150 TEMPERATURE (°C) TIME (10μs/DIV) Figure 24. Large Signal Open-Loop Gain vs. Temperature Figure 27. Large Signal Response 50 T V = ±2.5V S V = ±2.5V S R = 1MΩ L 40 C = 100pF L C = 47pF L G = +1 30 20 2 10 0 –10 –20 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) TIME (1μs/DIV) Figure 25. Closed-Loop Gain vs. Frequency Figure 28. Small Signal Response Rev. B | Page 9 of 20 GAIN (dB) A (dB) VO CLOSED-LOOP GAIN (dB) 05304-017 05304-016 05304-015 PHASE SHIFT (Degrees) V (1V/DIV) V (100mV/DIV) OUT OUTPUT (V) OUT 05304-018 05304-022 05304-023 Data Sheet AD8655/AD8656 30 100 V = ±2.5V S V = ±2.5V S V = 200mV IN 25 G = +1 G = +100 G = +10 20 10 –OS 15 10 1 +OS 5 0 0.1 0 50 100 150 200 250 300 350 100 1k 10k 100k 1M 10M 100M CAPACITANCE (pF) FREQUENCY (Hz) Figure 29. Small Signal Overshoot vs. Load Capacitance Figure 32. Output Impedance vs. Frequency 80 V = ±1.35V S T 70 300mV V IN 60 1 0V 50 40 2 0V 30 V OUT V = ±2.5V S V = 300mV 20 IN GAIN = –10 RECOVERY TIME = 240ns –2.5V 10 0 –150 –125 –100 –75 –50 –25 0 25 50 75 100 125 150 400ns/DIV V (μV) OS Figure 30. Negative Overload Recovery Time Figure 33. Input Offset Voltage Distribution 60 T V = ±1.35V S 1 0V V 40 IN V = ±2.5V S V = 300mV IN –300mV GAIN = –10 20 RECOVERY TIME = 240ns 2.5V V OUT 0 –20 2 0V –40 –50 0 50 100 150 400ns/DIV TEMPERATURE (°C) Figure 34. Input Offset Voltage vs. Temperature Figure 31. Positive Overload Recovery Time Rev. B | Page 10 of 20 OVERSHOOT % 05304-024 05304-025 05304-026 V (μV) OUTPUT IMPEDANCE (Ω) OS NUMBER OF AMPLIFIERS 05304-028 05304-029 05304-027 Data Sheet AD8655/AD8656 80 10000 V = ±1.35V S V =±1.35V S 70 60 1000 50 40 100 30 20 10 V OL 10 V OH 0 1 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.1 1 10 100 |TCV | (μV/°C) OS CURRENT LOAD (mA) Figure 35. |TCV | Distribution OS Figure 38. AD8656 Output Swing vs. Current Load 4.5 2.698 V = ±1.35V V = ±1.35V S S LOAD CURRENT = 1mA 4.0 2.694 2.690 3.5 2.686 3.0 2.682 2.5 2.678 2.674 2.0 –50 0 50 100 150 –50 0 50 100 150 TEMPERATURE (°C) TEMPERATURE (°C) Figure 36. Supply Current vs. Temperature Figure 39. Output Voltage Swing High vs. Temperature 1400 14 V = ±1.35V S V = ±1.35V S LOAD CURRENT = 1mA 1200 12 1000 10 V OH 800 8 600 6 V OL 400 4 200 0 2 –50 0 50 100 150 020 40 60 80 100 120 TEMPERATURE (°C) LOAD CURRENT (mA) Figure 37. AD8655 Output Voltage to Supply Rail vs. Load Current Figure 40. Output Voltage Swing Low vs. Temperature Rev. B | Page 11 of 20 (V -V ) (mV) SUPPLY CURRENT (mA) SY OUT NUMBER OF AMPLIFIERS 05304-030 05304-050 05304-031 V (V) DELTA OUTPUT FROM SUPPLY (mV) OH V (mV) OL 05304-033 05304-057 05304-032 Data Sheet AD8655/AD8656 35 T V = ±1.35V V = ±1.35V S S G = +1 30 V = 200mV IN C = 50pF L V IN –OS 25 V OUT 20 2 15 +OS 10 5 0 0 50 100 150 200 250 300 350 20μs/DIV CAPACITANCE (pF) Figure 41. No Phase Reversal Figure 44. Small Signal Overshoot vs. Load Capacitance T T V = ±1.35V S 200mV C = 50pF L V IN GAIN = +1 0V 1 2 2 0V V OUT –1.35V V = ±1.35V S V = 200mV IN GAIN = –10 RECOVERY TIME = 180ns 400ns/DIV TIME (10μs/DIV) Figure 42. Large Signal Response Figure 45. Negative Overload Recovery Time T T V = ±1.35V S 0V 1 C = 100pF L V IN GAIN = +1 V = ±1.35V S –200mV V = 200mV IN GAIN = –10 RECOVERY TIME = 200ns 2 1.35V V OUT 0V 2 400ns/DIV TIME (1μs/DIV) Figure 43. Small Signal Response Figure 46. Positive Overload Recovery Time Rev. B | Page 12 of 20 V (100mV/DIV) V (500mV/DIV) OUT OUT 1V/DIV 05304-047 05304-043 05304-042 OVERSHOOT % 05304-044 05304-045 05304-046 Data Sheet AD8655/AD8656 120 120 –45 V = ±1.35V V =±1.35V S S C = 11.5pF V = 28mV 100 LOAD IN 100 R = 1MΩ PHASE MARGIN = 54° L C = 47pF L –90 80 80 60 40 –135 60 20 40 –180 0 20 –20 –225 0 –40 100 1k 10k 100k 1M 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) Figure 47. CMRR vs. Frequency Figure 50. Open-Loop Gain and Phase vs. Frequency 130.00 102.00 V = ±1.35V V = ±1.35V S S R = 10kΩ L 120.00 98.00 110.00 94.00 100.00 90.00 90.00 86.00 80.00 –50 0 50 100 150 –50 0 50 100 150 TEMPERATURE (°C) TEMPERATURE (°C) Figure 51. Large Signal Open-Loop Gain vs. Temperature Figure 48. Large Signal CMRR vs. Temperature 100 50 V = ±1.35V V = ±1.35V S S V = 50mV R = 1MΩ IN L +PSRR 40 R = 1MΩ C = 47pF L L 80 C = 47pF L –PSRR 30 60 20 10 40 0 20 –10 0 –20 100 1k 10k 100k 1M 10M 100M 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) Figure 49. Small Signal PSSR vs. Frequency Figure 52. Closed-Loop Gain vs. Frequency Rev. B | Page 13 of 20 CMRR (dB) PSRR (dB) CMRR (dB) 05304-034 05304-040 05304-035 GAIN (dB) A (dB) VO CLOSED-LOOP GAIN (dB) 05304-038 05304-037 05304-036 PHASE SHIFT (Degrees) Data Sheet AD8655/AD8656 3.0 0 V =±2.5V S R1 V = 50mV IN 10kΩ +2.5V –20 R2 2.5 100Ω V– V+ V = 1.35V S V + A IN B V V = 2.7V 50mV p-p OUT IN –40 – V– V+ 2.0 G = +1 –2.5V NO LOAD –60 1.5 –80 1.0 –100 0.5 –120 0 –140 10k 100k 1M 10M 10 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) Figure 53. Maximum Output Swing vs. Frequency Figure 55. Channel Separation vs. Frequency 1000 V = ±1.35V S 100 G = +100 G = +10 10 G = +1 1 0.1 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) Figure 54. Output Impedance vs. Frequency Rev. B | Page 14 of 20 OUTPUT IMPEDANCE (Ω) OUTPUT (V) 05304-039 05304-041 CHANNEL SEPERATION (dB) 05304-058 Data Sheet AD8655/AD8656 THEORY OF OPERATION The AD8655/AD8656 can be used in any precision op amp The AD8655/AD8656 amplifiers are voltage feedback, rail-to- rail input and output precision CMOS amplifiers, which operate application. The amplifier does not exhibit phase reversal for from 2.7 V to 5.0 V of power supply voltage. These amplifiers common-mode voltages within the power supply. The use the Analog Devices DigiTrim technology to achieve a AD8655/AD8656 are great choices for high resolution data higher degree of precision than is available from most CMOS acquisition systems with voltage noise of 2.7 nV/√Hz and amplifiers. DigiTrim technology, used in a number of ADI THD + Noise of –103 dB for a 2 V p-p signal at 10 kHz. Their amplifiers, is a method of trimming the offset voltage of the low noise, sub-pA input bias current, precision offset, and high amplifier after it is packaged. The advantage of post-package speed make them superb preamps for fast filter applications. trimming is that it corrects any offset voltages caused by the The speed and output drive capability of the AD8655/AD8656 mechanical stresses of assembly. also make them useful in video applications. The AD8655/AD8656 are available in standard op amp pinouts, making DigiTrim completely transparent to the user. The input stage of the amplifiers is a true rail-to-rail architecture, allowing the input common-mode voltage range of the amplifiers to extend to both positive and negative supply rails. The open- loop gain of the AD8655/AD8656 with a load of 10 kΩ is typically 110 dB. Rev. B | Page 15 of 20 Data Sheet AD8655/AD8656 APPLICATIONS One simple technique for compensation is a snubber that INPUT OVERVOLTAGE PROTECTION consists of a simple RC network. With this circuit in place, The internal protective circuitry of the AD8655/AD8656 allows output swing is maintained, and the amplifier is stable at all voltages exceeding the supply to be applied at the input. It is gains. Figure 57 shows the implementation of a snubber, which recommended, however, not to apply voltages that exceed the reduces overshoot by more than 30% and eliminates ringing. supplies by more than 0.3 V at either input of the amplifier. If a Using a snubber does not recover the loss of bandwidth higher input voltage is applied, series resistors should be used to incurred from a heavy capacitive load. limit the current flowing into the inputs. The input current should be limited to less than 5 mA. V = ±2.5V S A = 1 V C = 500pF L The extremely low input bias current allows the use of larger resistors, which allows the user to apply higher voltages at the inputs. The use of these resistors adds thermal noise, which contributes to the overall output voltage noise of the amplifier. For example, a 10 kΩ resistor has less than 12.6 nV/√Hz of thermal noise and less than 10 nV of error voltage at room temperature. INPUT CAPACITANCE Along with bypassing and ground, high speed amplifiers can be sensitive to parasitic capacitance between the inputs and ground. TIME (2μs/DIV) For circuits with resistive feedback network, the total capacitance, Figure 56. Driving Heavy Capacitive Loads Without Compensation whether it is the source capacitance, stray capacitance on the input pin, or the input capacitance of the amplifier, causes a breakpoint in the noise gain of the circuit. As a result, a V CC capacitor must be added in parallel with the gain resistor to obtain stability. The noise gain is a function of frequency and + V– peaks at the higher frequencies, assuming the feedback capaci- V+ – 200Ω tor is selected to make the second-order system critically 500pF + damped. A few picofarads of capacitance at the input reduce – 500pF V EE 200mV the input impedance at high frequencies, which increases the amplifier’s gain, causing peaking in the frequency response or Figure 57. Snubber Network oscillations. With the AD8655/AD8656, additional input damping is required for stability with capacitive loads greater V = ±2.5V than 200 pF with direct input to output feedback. See the S A = 1 V Driving Capacitive Loads section. R = 200Ω S C = 500pF S C = 500pF L DRIVING CAPACITIVE LOADS Although the AD8655/AD8656 can drive capacitive loads up to 500 pF without oscillating, a large amount of ringing is present when operating the part with input frequencies above 100 kHz. This is especially true when the amplifiers are configured in positive unity gain (worst case). When such large capacitive loads are required, the use of external compensation is highly recommended. This reduces the overshoot and minimizes ringing, which, in turn, improves the stability of the TIME (10μs/DIV) AD8655/AD8656 when driving large capacitive loads. Figure 58. Driving Heavy Capacitive Loads Using a Snubber Network Rev. B | Page 16 of 20 VOLTAGE (100mV/DIV) VOLTAGE (100mV/DIV) 05304-052 05304-053 05304-051 Data Sheet AD8655/AD8656 1.0 THD Readings vs. Common-Mode Voltage 0.5 SWEEP 1: SWEEP 2: V = 2V p-p V = 2V p-p Total harmonic distortion of the AD8655/AD8656 is well below IN IN 0.2 R = 10kΩ R = 1kΩ L L 0.0007% with a load of 1 kΩ. This distortion is a function of the 0.1 circuit configuration, the voltage applied, and the layout, in 0.05 addition to other factors. 0.02 0.01 +2.5V 0.005 – 0.002 V OUT AD8655 0.001 SWEEP 2 R + L 0.0005 –2.5V 0.0002 SWEEP 1 V IN 0.0001 20 50 100 200 500 1k 2k 5k 10k 20k 50k 80k Hz Figure 59. THD + N Test Circuit Figure 60. THD + Noise vs. Frequency Rev. B | Page 17 of 20 05304-054 % 05304-055 Data Sheet AD8655/AD8656 LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS LEAKAGE CURRENTS POWER SUPPLY BYPASSING Poor PC board layout, contaminants, and the board insulator Power supply pins can act as inputs for noise, so care must be material can create leakage currents that are much larger than taken to apply a noise-free, stable dc voltage. The purpose of the input bias current of the AD8655/AD8656. Any voltage bypass capacitors is to create low impedances from the supply differential between the inputs and nearby traces creates leakage to ground at all frequencies, thereby shunting or filtering most currents through the PC board insulator, for example, 1 V/100 of the noise. Bypassing schemes are designed to minimize the GΩ = 10 pA. Similarly, any contaminants on the board can supply impedance at all frequencies with a parallel combination create significant leakage (skin oils are a common problem). of capacitors with values of 0.1 μF and 4.7 μF. Chip capacitors of 0.1 μF (X7R or NPO) are critical and should be as close as To significantly reduce leakage, put a guard ring (shield) around possible to the amplifier package. The 4.7 μF tantalum capacitor the inputs and input leads that are driven to the same voltage is less critical for high frequency bypassing, and, in most cases, potential as the inputs. This ensures there is no voltage potential only one is needed per board at the supply inputs. between the inputs and the surrounding area to create any leakage currents. To be effective, the guard ring must be driven GROUNDING by a relatively low impedance source and should completely A ground plane layer is important for densely packed PC surround the input leads on all sides, above and below, by using boards to minimize parasitic inductances. This minimizes a multilayer board. voltage drops with changes in current. However, an under- The charge absorption of the insulator material itself can also standing of where the current flows in a circuit is critical to cause leakage currents. Minimizing the amount of material implementing effective high speed circuit design. The length between the input leads and the guard ring helps to reduce the of the current path is directly proportional to the magnitude of parasitic inductances, and, therefore, the high frequency absorption. Also, using low absorption materials, such as impedance of the path. Large changes in currents in an Teflon® or ceramic, may be necessary in some instances. inductive ground return create unwanted voltage noise. The length of the high frequency bypass capacitor leads is critical, and, therefore, surface-mount capacitors are recom- mended. A parasitic inductance in the bypass ground trace works against the low impedance created by the bypass capacitor. Because load currents flow from the supplies, the ground for the load impedance should be at the same physical location as the bypass capacitor grounds. For larger value capacitors intended to be effective at lower frequencies, the current return path distance is less critical. Rev. B | Page 18 of 20 Data Sheet AD8655/AD8656 OUTLINE DIMENSIONS 5.00 (0.1968) 3.20 4.80 (0.1890) 3.00 2.80 85 6.20 (0.2441) 4.00 (0.1574) 1 8 5 5.15 5.80 (0.2284) 3.80 (0.1497) 4 3.20 4.90 3.00 4.65 1 2.80 4 1.27 (0.0500) 0.50 (0.0196) 45° BSC 1.75 (0.0688) 0.25 (0.0099) PIN 1 IDENTIFIER 1.35 (0.0532) 0.25 (0.0098) 8° 0.10 (0.0040) 0° 0.65 BSC COPLANARITY 0.51 (0.0201) 1.27 (0.0500) 0.95 15° MAX 0.10 0.31 (0.0122) 0.25 (0.0098) SEATING 0.40 (0.0157) 0.85 1.10 MAX PLANE 0.17 (0.0067) 0.75 0.80 0.15 COMPLIANT TO JEDEC STANDARDS MS-012-AA 0.23 6° 0.55 0.40 0.05 0.09 0° CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS 0.40 0.25 COPLANARITY (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR 0.10 REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 61. 8-Lead Standard Small Outline Package [SOIC_N] Figure 62. 8-Lead Mini Small Outline Package [MSOP] Narrow Body (R-8) (RM-8) Dimensions shown in millimeters and (inches) Dimensions shown in millimeters ORDERING GUIDE Temperature 1, 2 Model Range Package Description Package Option Branding AD8655ARZ −40°C to +125°C 8-Lead SOIC_N R-8 AD8655ARZ-REEL −40°C to +125°C 8-Lead SOIC_N R-8 AD8655ARZ-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8 AD8655ARMZ-REEL −40°C to +125°C 8-Lead MSOP RM-8 A0D AD8655ARMZ −40°C to +125°C 8-Lead MSOP RM-8 A0D AD8656ARZ −40°C to +125°C 8-Lead SOIC_N R-8 AD8656ARZ-REEL −40°C to +125°C 8-Lead SOIC_N R-8 AD8656ARZ-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8 AD8656ARMZ −40°C to +125°C 8-Lead MSOP RM-8 A0S AD8656ARMZ-REEL −40°C to +125°C 8-Lead MSOP RM-8 A0S AD8656WARMZ-REEL −40°C to +125°C 8-Lead MSOP RM-8 A0S 1 Z = RoHS Compliant Part. 2 W = Qualified for Automotive Applications. AUTOMOTIVE PRODUCTS The AD8656W model is available with controlled manufacturing to support the quality and reliability requirements of automotive applications. Note that these automotive models may have specifications that differ from the commercial models; therefore, designers should review the Specifications section of this data sheet carefully. Only the automotive grade product shown is available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for this model. . Rev. B | Page 19 of 20 012407-A 10-07-2009-B Data Sheet AD8655/AD8656 NOTES ©2005–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05304-0-9/11(B) Rev. B | Page 20 of 20