ANALOG DEVICES AD8622

Low Power, Precision Rail-to-Rail Output Op Amp AD8622/AD8624 FEATURES PIN CONFIGURATIONS Very low offset voltage OUT A 1 8 V+ AD8622 –IN A 2 7 OUT B 125 μV maximum +IN A 3 6 –IN B TOP VIEW Supply current: 215 μA/amp typical (Not to Scale) V– 4 5 +IN B Input bias current: 200 pA maximum Low input offset voltage drift: 1.2 μV/°C maximum Figure 1. 8-Lead Narrow-Body SOIC Very low voltage noise: 11 nV/√Hz OUT A 1 8 V+ Operating temperature: −40°C to +125°C AD8622 –IN A 2 7 OUT B Rail-to-rail output swing TOP VIEW +IN A 3 6 –IN B (Not to Scale) Unity gain stable V– 4 5 +IN B ±2.5 V to ±15 V operation Figure 2. 8-Lead MSOP APPLICATIONS 1 14 OUT A OUT D Portable precision instrumentation 2 13 –IN D –IN A Laser diode control loops +IN A 3 12 +IN D AD8624 Strain gage amplifiers TOP VIEW V+ 4 11 V– (Not to Scale) Medical instrumentation 5 +IN B 10 +IN C Thermocouple amplifiers 6 –IN B 9 –IN C 7 8 OUT B OUT C GENERAL DESCRIPTION Figure 3. 14-Lead TSSOP The AD8622/AD8624 are dual and quad precision rail-to-rail output operational amplifiers with low supply currents of only 350 µA/amplifier maximum over temperature and supply voltages. The AD8622/AD8624 also has an input bias current –IN A 1 12 –IN D cancellation circuitry that provides a very low input bias current AD8624 11 +IN D +IN A 2 over the full operating temperature. TOP VIEW V+ 3 10 V– (Not to Scale) +IN B 4 9 +IN C With a typical offset voltage of only 10 µV, offset drift of 0.5 µV/°C, and noise of only 0.2 μV p-p (0.1 Hz to 10 Hz), they are perfectly suited for applications where large error sources cannot be tolerated. Many systems can take advantage of the NOTES low noise, dc precision, and rail-to-rail output swing provided 1. NC = NO CONNECT. 2. IT IS RECOMMENDED THAT THE EXPOSED by the AD8622/AD8624 to maximize the signal-to-noise ratio PAD BE CONNECTED TO V–. and dynamic range for low power operation. The AD8622/ Figure 4. 16-Lead LFCSP AD8624 are specified for the extended industrial temperature range of −40°C to +125°C. The AD8622 is available in lead-free 8-lead SOIC and MSOP packages, while the AD8624 is available Table 1. Low Power Op Amps in lead-free 14-lead TSSOP and 16-lead LFCSP packages. Supply 40 V 36 V 12 V to 18 V 6 V Single OP97 OP777 AD8663 OP1177 Dual OP297 OP727 AD8667 ADA4692-2 OP2177 Quad OP497 OP747 AD8669 ADA4692-4 OP4177 Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Fax: 781.461.3113 ©2009–2011 Analog Devices, Inc. All rights reserved. 07527-001 07527-067 07527-002 07527-068 –IN B 5 16 NC OUT B 6 15 OUT A OUT C 7 14 OUT D –IN C 8 13 NC AD8622/AD8624 TABLE OF CONTENTS Features .............................................................................................. 1 ESD Caution...................................................................................5 Applications ....................................................................................... 1 Typical Performance Characteristics ..............................................6 General Description ......................................................................... 1 Applications Information .............................................................. 15 Pin Configurations ........................................................................... 1 Input Protection ......................................................................... 15 Revision History ............................................................................... 2 Phase Reversal ............................................................................ 15 Specifications ..................................................................................... 3 Micropower Instrumentation Amplifier ................................. 15 Electrical Characteristics—±2.5 V Operation .......................... 3 Hall Sensor Signal Conditioning .............................................. 16 Electrical Characteristics—±15 V Operation ........................... 4 Simplified Schematic ...................................................................... 17 Absolute Maximum Ratings ............................................................ 5 Outline Dimensions ....................................................................... 18 Thermal Resistance ...................................................................... 5 Ordering Guide .......................................................................... 19 REVISION HISTORY 6/11—Rev. B to Rev. C Changes to Figure 13 ........................................................................ 7 2/10—Rev. A to Rev. B Changed 16-Lead to 14-Lead in Figure 62 Caption ................... 19 1/10—Rev. 0 to Rev. A Added 14-Lead TSSOP ...................................................... Universal Added 16-Lead LFCSP ....................................................... Universal Added Figure 3 and Figure 4; Renumbered Sequentially ........... 1 Changes to Table 5 ............................................................................ 5 Changes to Figure 10 to Figure 16 .................................................. 6 Changes to Figure 26 ........................................................................ 9 Changes to Figure 29 ...................................................................... 10 Updated Outline Dimensions ....................................................... 18 Changes to Ordering Guide .......................................................... 19 7/09—Revision 0: Initial Version Rev. C | Page 2 of 20 AD8622/AD8624 SPECIFICATIONS ELECTRICAL CHARACTERISTICS—±2.5 V OPERATION V = ±2.5 V, V = 0 V, T = 25°C, unless otherwise specified. SY CM A Table 2. Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage V 10 125 μV OS −40°C ≤ T ≤ +125°C 230 μV A Offset Voltage Drift ΔV /ΔT −40°C ≤ T ≤ +125°C 0.5 1.2 µV/°C OS A Input Bias Current I 30 200 pA B −40°C ≤ T ≤ +125°C 400 pA A Input Offset Current I 25 200 pA OS −40°C ≤ T ≤ +125°C 300 pA A Input Voltage Range −40°C ≤ T ≤ +125°C −1.3 +1.3 V A Common-Mode Rejection Ratio CMRR V = −1.3 V to +1.3 V 110 120 dB CM −40°C ≤ T ≤ +125°C 107 dB A Open-Loop Gain A R = 10 kΩ, V = −2.0 V to +2.0 V 118 135 dB VO L O −40°C ≤ T ≤ +125°C 109 dB A Input Resistance, Differential Mode R 1 GΩ INDM Input Resistance, Common Mode R 1 TΩ INCM Input Capacitance, Differential Mode C 5.5 pF INDM Input Capacitance, Common Mode C 3 pF INCM OUTPUT CHARACTERISTICS Output Voltage High V R = 100 kΩ to ground 2.45 2.49 V OH L −40°C ≤ T ≤ +125°C 2.41 V A R = 10 kΩ to ground 2.40 2.45 V L −40°C ≤ T ≤ +125°C 2.36 V A Output Voltage Low V R = 100 kΩ to ground −2.49 −2.45 V OL L −40°C ≤ T ≤ +125°C −2.41 V A R = 10 kΩ to ground −2.45 −2.40 V L −40°C ≤ T ≤ +125°C −2.36 V A Short-Circuit Current I ±30 mA SC Closed-Loop Output Impedance Z f = 1 kHz, A = 1 2 Ω OUT V POWER SUPPLY Power Supply Rejection Ratio PSRR V = ±2.0 V to ±18.0 V 125 145 dB S −40°C ≤ T ≤ +125°C 120 dB A Supply Current/Amplifier I I = 0 mA 175 225 μA SY O −40°C ≤ T ≤ +125°C 310 μA A DYNAMIC PERFORMANCE Slew Rate SR R = 10 kΩ, C = 100 pF A = 1 0.28 V/μs L L V Gain Bandwidth Product GBP R = 10 kΩ, C = 20 pF, A = 1 540 kHz L L V Phase Margin Φ R = 10 kΩ, C = 20 pF, A = 1 74 Degrees M L L V NOISE PERFORMANCE Voltage Noise e p-p f = 0.1 Hz to 10 Hz 0.2 μV p-p n Voltage Noise Density e f = 1 kHz 12 nV/√Hz n Uncorrelated Current Noise Density i f = 1 kHz 0.15 pA/√Hz n_uncorr Correlated Current Noise Density i f = 1 kHz 0.07 pA/√Hz n_corr Rev. C | Page 3 of 20 AD8622/AD8624 ELECTRICAL CHARACTERISTICS—±15 V OPERATION V = ±15 V, V = 0 V, T = 25°C, unless otherwise specified. SY CM A Table 3. Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage V 10 125 μV OS −40°C ≤ T ≤ +125°C 230 μV A Offset Voltage Drift ΔV /ΔT −40°C ≤ T ≤ +125°C 0.5 1.2 μV/°C OS A Input Bias Current I 45 200 pA B −40°C ≤ T ≤ +125°C 500 pA A Input Offset Current I 35 200 pA OS −40°C ≤ T ≤ +125°C 500 pA A Input Voltage Range −13.8 +13.8 V Common-Mode Rejection Ratio CMRR V = −13.8 V to +13.8 V 125 135 dB CM −40°C ≤ T ≤ +125°C 112 dB A Open-Loop Gain A R = 10 kΩ, V = −13.5 V to +13.5 V 125 137 dB VO L O −40°C ≤ T ≤ +125°C 120 dB A Input Resistance, Differential Mode R 1 GΩ INDM Input Resistance, Common Mode R 1 TΩ INCM Input Capacitance, Differential Mode C 5.5 pF INDM Input Capacitance, Common Mode C 3 pF INCM OUTPUT CHARACTERISTICS Output Voltage High V R = 100 kΩ to ground 14.94 14.97 V OH L −40°C ≤ T ≤ +125°C 14.84 V A R = 10 kΩ to ground 14.86 14.89 V L −40°C ≤ T ≤ +125°C 14.75 V A Output Voltage Low V R = 100 kΩ to ground −14.97 −14.94 V OL L −40°C ≤ T ≤ +125°C −14.92 V A R = 10 kΩ to ground −14.89 −14.90 V L −40°C ≤ T ≤ +125°C −14.80 V A Short-Circuit Current I ±40 mA SC Closed-Loop Output Impedance Z f = 1 kHz, A = 1 1.5 Ω OUT V POWER SUPPLY Power Supply Rejection Ratio PSRR V = ±2.0 V to ±18.0 V 125 145 dB S −40°C ≤ T ≤ +125°C 120 dB A Supply Current/Amplifier I I = 0 mA 215 250 μA SY O −40°C ≤ T ≤ +125°C 350 μA A DYNAMIC PERFORMANCE Slew Rate SR R = 10 kΩ, C = 100 pF, A = 1 0.48 V/μs L L V Gain Bandwidth Product GBP R = 10 kΩ, C = 20 pF, A = 1 560 kHz L L V Phase Margin Φ R = 10 kΩ, C = 20 pF, A = 1 75 Degrees M L L V NOISE PERFORMANCE Voltage Noise e p-p f = 0.1 Hz to 10 Hz 0.2 μV p-p n Voltage Noise Density e f = 1 kHz 11 nV/√Hz n Uncorrelated Current Noise Density i f = 1 kHz 0.15 pA/√Hz n_uncorr Correlated Current Noise Density i f = 1 kHz 0.06 pA/√Hz n_corr Rev. C | Page 4 of 20 AD8622/AD8624 ABSOLUTE MAXIMUM RATINGS Table 2. THERMAL RESISTANCE Parameter Rating θ is specified for the worst-case conditions, that is, a device Supply Voltage ±18 V JA soldered in a circuit board for surface-mount packages. This Input Voltage ±V SY 1 was measured using a standard 4-layer board. Input Current ±10 mA 2 Differential Input Voltage ±10 V Table 3. Thermal Resistance Output Short-Circuit Duration to GND Indefinite Package Type θ θ Unit JA JC Storage Temperature Range −65°C to +150°C 8-Lead SOIC_N (R-8) 120 45 °C/W Operating Temperature Range −40°C to +125°C 8-Lead MSOP (RM-8) 142 45 °C/W Junction Temperature Range −65°C to +150°C 14-Lead TSSOP (RU-14) 112 35 °C/W Lead Temperature (Soldering, 60 sec) 300°C 16-Lead LFCSP (CP-16-17) 55 14 °C/W 1 The input pins have clamp diodes to the power supply pins. The input current should be limited to 10 mA or less whenever input signals exceed the power supply rail by 0.5 V. ESD CAUTION 2 Differential input voltage is limited to 10 V or the supply voltage, whichever is less. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. C | Page 5 of 20 AD8622/AD8624 TYPICAL PERFORMANCE CHARACTERISTICS T = 25°C, unless otherwise noted. A 60 60 V = ±2.5V V = ±15V SY SY V = 0V V = 0V CM CM 50 50 40 40 30 30 20 20 10 10 0 0 –100 –80 –60 –40 –20 0 20 40 60 80 100 –100 –80 –60 –40 –20 0 20 40 60 80 100 V (µV) V (µV) OS OS Figure 5. Input Offset Voltage Distribution Figure 8. Input Offset Voltage Distribution 60 60 V = ±2.5V V = ±15V SY SY –40°C ≤ T ≤ +125°C –40°C ≤ T ≤ +125°C A A 50 50 40 40 30 30 20 20 10 10 0 0 0 0.2 0.4 0.6 0.8 1.0 1.2 0 0.2 0.4 0.6 0.8 1.0 1.2 TCV (µV/°C) TCV (µV/°C) OS OS Figure 6. Input Offset Voltage Drift Distribution Figure 9. Input Offset Voltage Drift Distribution 50 50 V = ±2.5V V = ±15V SY SY 40 40 –40°C 30 30 20 20 –40°C 10 10 +25°C 0 0 +25°C –10 –10 +85°C +85°C –20 –20 +125°C +125°C –30 –30 –40 –40 –50 –50 –15 –10 –5 0 5 10 +15 –2.5 –1.5 –0.5 0.5 1.5 2.5 V (V) V (V) CM CM Figure 7. Input Offset Voltage vs. Common-Mode Voltage Figure 10. Input Offset Voltage vs. Common-Mode Voltage Rev. C | Page 6 of 20 V (µV) OS NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS 07527-065 07527-066 07527-007 V (µV) OS NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS 07527-063 07527-004 07527-064 AD8622/AD8624 0 10 V = ±15V V = ±2.5V SY SY I + B –10 0 I + I – B B –20 –10 I – B –30 –20 –40 –30 –50 –40 –50 –60 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) Figure 14. Input Bias Current vs. Temperature Figure 11. Input Bias Current vs. Temperature 50 60 V = ±2.5V V = ±15V SY SY 25 40 0 20 –25 0 –50 –75 –20 –100 –40 –125 –150 –60 –15 –10 –5 0 5 10 15 –2.5 –1.5 –0.5 0.5 1.5 2.5 V (V) V (V) CM CM Figure 15. Input Bias Current vs. Common-Mode Voltage Figure 12. Input Bias Current vs. Common-Mode Voltage 100 10 V = ±15V V = ±2.5V SY SY 10 1 1 V – V CC OH 0.1 V – V CC OH V – V OL EE 0.1 V – V OL EE 0.01 0.01 0.001 0.001 0.01 0.1 1 10 100 0.01 0.1 1 10 100 LOAD CURRENT (mA) LOAD CURRENT (mA) Figure 13. Output Voltage to Supply Rail vs. Load Current Figure 16. Output Voltage to Supply Rail vs. Load Current Rev. C | Page 7 of 20 I (pA) I (pA) OUTPUT VOLTAGE TO SUPPLY RAIL (V) B B 07527-013 07527-012 07527-008 I (pA) I (pA) B OUTPUT VOLTAGE TO SUPPLY RAIL (V) B 07527-010 07527-009 07527-011 AD8622/AD8624 0.06 0.16 V = ±15V V = ±2.5V SY SY R = 10kΩ R = 10kΩ L L 0.14 0.05 0.12 V – V V – V CC OH CC OH 0.04 0.10 0.03 0.08 0.06 0.02 V – V OL EE 0.04 V – V OL EE 0.01 0.02 0 0 –50 –25 0 25 50 75 100 125 –50 –25 0 25 50 75 100 125 TEMPERATURE (°C) TEMPERATURE (°C) Figure 17. Output Voltage to Supply Rail vs. Temperature Figure 20. Output Voltage to Supply Rail vs. Temperature 0.35 0.35 0.30 0.30 +125°C 0.25 +85°C 0.25 0.20 V = ±15V SY +25°C 0.15 0.20 –40°C V = ±2.5V SY 0.10 0.15 0.05 0.10 0 –0.05 0.05 0 2 4 6 8 10 12 14 16 18 –50 –25 0 25 50 75 100 125 V (±V) TEMPERATURE (°C) SY Figure 18. Supply Current vs. Supply Voltage Figure 21. Supply Current vs. Temperature 100 100 100 100 V = ±2.5V V = ±15V SY SY R = 10kΩ R = 10kΩ L L PHASE 80 80 80 80 PHASE 60 60 60 60 40 40 40 40 GAIN GAIN 20 20 20 20 0 0 0 0 –20 –20 –20 –20 –40 –40 –40 –40 1k 10k 100k 1M 10M 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 19. Open-Loop Gain and Phase vs. Frequency Figure 22. Open-Loop Gain and Phase vs. Frequency Rev. C | Page 8 of 20 GAIN (dB) OUTPUT VOLTAGE TO SUPPLY RAIL (V) I (mA) SY 07527-044 07527-017 PHASE (Degrees) 07527-018 GAIN (dB) I (mA) OUTPUT VOLTAGE TO SUPPLY RAIL (V) SY PHASE (Degrees) 07527-045 07527-014 07527-015 AD8622/AD8624 60 60 V = ±2.5V V = ±15V SY SY 50 R = 10kΩ 50 R = 10kΩ L L A = 100 A = 100 V V 40 40 30 30 A = 10 A = 10 V V 20 20 10 10 A = 1 A = 1 V V 0 0 –10 –10 –20 –20 –30 –30 –40 –40 100 1k 10k 100k 1M 10M 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 23. Closed-Loop Gain vs. Frequency Figure 26. Closed-Loop Gain vs. Frequency 10k 10k V = ±2.5V V = ±15V SY SY A = 100 V 1k 1k A = 100 V A = 10 V A = 10 V 100 A = 1 100 V A = 1 V 10 10 1 1 0.1 0.1 100 1k 10k 100k 1M 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 24. Output Impedance vs. Frequency Figure 27. Output Impedance vs. Frequency 140 140 V = ±2.5V V = ±15V SY SY 120 120 100 100 80 80 60 60 40 40 20 20 0 0 10 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 25. CMRR vs. Frequency Figure 28. CMRR vs. Frequency Rev. C | Page 9 of 20 CMRR (dB) Z (Ω) GAIN (dB) OUT 07527-021 07527-023 07527-019 CMRR (dB) Z (Ω) GAIN (dB) OUT 07527-024 07527-020 07527-016 AD8622/AD8624 120 120 V = ±2.5V V = ±15V SY SY 100 100 PSRR+ PSRR+ 80 80 60 60 PSRR– PSRR– 40 40 20 20 0 0 10 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 29. PSRR vs. Frequency Figure 32. PSRR vs. Frequency 50 50 V = ±2.5V V = ±15V SY SY 45 A = 1 45 A = 1 V V R = 10kΩ R = 10kΩ L L 40 40 35 35 OS– 30 30 OS– OS+ 25 25 OS+ 20 20 15 15 10 10 5 5 0 0 0.01 0.1 1 10 100 0.01 0.1 1 10 100 CAPACITANCE (nF) CAPACITANCE (nF) Figure 30. Small-Signal Overshoot vs. Load Capacitance Figure 33. Small-Signal Overshoot vs. Load Capacitance V = ±2.5V SY V = ±15V SY A = 1 V A = 1 V R = 10kΩ L R = 10kΩ L C = 100pF L C = 100pF L TIME (40µs/DIV) TIME (40µs/DIV) Figure 31. Large-Signal Transient Response Figure 34. Large-Signal Transient Response Rev. C | Page 10 of 20 PSRR (dB) OVERSHOOT (%) VOLTAGE (500mV/DIV) 07527-030 07527-029 07527-025 PSRR (dB) OVERSHOOT (%) VOLTAGE (5V/DIV) 07527-027 07527-026 07527-022 AD8622/AD8624 V = ±2.5V V = ±15V SY SY A = 1 A = 1 V V R = 10kΩ R = 10kΩ L L C = 100pF C = 100pF L L TIME (10µs/DIV) TIME (10µs/DIV) Figure 35. Small-Signal Transient Response Figure 38. Small-Signal Transient Response 0.4 0.4 V = ±2.5V V = ±15V SY SY A = –100 A = –100 0.2 V 0.2 V R = 10kΩ R = 10kΩ L L INPUT INPUT 0 0 OUTPUT OUTPUT 0 0 –1 –10 –2 –20 –3 TIME (20µs/DIV) TIME (20µs/DIV) Figure 39. Negative Overload Recovery Figure 36. Negative Overload Recovery 0.2 0.2 INPUT INPUT 0 0 –0.2 –0.2 20 3 10 2 OUTPUT 0 OUTPUT 1 V = ±15V SY –10 V = ±2.5V A = –100 SY V 0 A = –100 R = 10kΩ V L R = 10kΩ L –20 –1 TIME (20µs/DIV) TIME (20µs/DIV) Figure 40. Positive Overload Recovery Figure 37. Positive Overload Recovery Rev. C | Page 11 of 20 INPUT VOLTAGE (V) INPUT VOLTAGE (V) VOLTAGE (50mV/DIV) 07527-031 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 07527-035 07527-036 INPUT VOLTAGE (V) INPUT VOLTAGE (V) VOLTAGE (50mV/DIV) 07527-028 07527-032 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 07527-033 AD8622/AD8624 12 12 V = ±15V V = ±15V SY SY A = –1 A = +1 V V 10 10 8 8 0.1% 0.1% 0.01% 0.01% 6 6 4 4 2 2 0 0 0 5 10 15 20 25 30 35 0 5 10 15 20 25 30 35 SETTLING TIME (µs) SETTLING TIME (µs) Figure 41. Output Step vs. Settling Time Figure 44. Output Step vs. Settling Time 100 100 V = ±15V V = ±2.5V SY SY 10 10 1 1 1 10 100 1k 1 10 100 1k FREQUENCY (Hz) FREQUENCY (Hz) Figure 42. Voltage Noise Density vs. Frequency Figure 45. Voltage Noise Density vs. Frequency 1 1 R R S1 V = ±15V S1 V = ±2.5V SY SY R R S2 S2 UNCORRELATED UNCORRELATED R = 0Ω R = 0Ω S1 S1 CORRELATED 0.1 0.1 CORRELATED R = R S1 S2 R = R S1 S2 0.01 0.01 1 10 100 1k 1 10 100 1k FREQUENCY (Hz) FREQUENCY (Hz) Figure 46. Current Noise Density vs. Frequency Figure 43. Current Noise Density vs. Frequency Rev. C | Page 12 of 20 CURRENT NOISE DENSITY (pA/ Hz) VOLTAGE NOISE DENSITY (nV/ Hz) OUTPUT STEP (V) 07527-034 07527-042 07527-057 CURRENT NOISE DENSITY (pA/ Hz) VOLTAGE NOISE DENSITY (nV Hz) OUTPUT STEP (V) 07527-037 07527-056 07527-039 AD8622/AD8624 V = ±2.5V V = ±15V SY SY TIME (1s/DIV) TIME (1s/DIV) Figure 47. 0.1 Hz to 10 Hz Noise Figure 49. 0.1 Hz to 10 Hz Noise 1 1 V = ±2.5V V = ±15V SY SY f = 1kHz f = 1kHz R = 10kΩ R = 10kΩ L L 0.1 0.1 0.01 0.01 0.001 0.001 0.0001 0.0001 0.001 0.01 0.1 1 10 0.001 0.01 0.1 1 10 AMPLITUDE (V rms) AMPLITUDE (V rms) Figure 48. THD + Noise vs. Amplitude Figure 50. THD + Noise vs. Amplitude Rev. C | Page 13 of 20 THD + N (%) INPUT NOISE VOLTAGE (50nV/DIV) 07527-043 07527-049 THD + N (%) INPUT NOISE VOLTAGE (50nV/DIV) 07527-040 07527-046 AD8622/AD8624 0.1 0.1 V = ±15V SY V = ±2.5V SY R = 10kΩ L R = 10kΩ L V = 300mV rms IN V = 300mV rms IN 0.01 0.01 0.001 0.001 0.0001 0.0001 10 100 1k 10k 100k 10 100 1k 10k 100k FREQUENCY (Hz) FREQUENCY (Hz) Figure 51. THD + Noise vs. Frequency Figure 53. THD + Noise vs. Frequency 0 100kΩ 1kΩ –20 –40 R L –60 –80 –100 –120 V = ±2.5V TO ±15V SY R = 10kΩ L A = –100 V –140 10 100 1k 10k 100k FREQUENCY (Hz) Figure 52. Channel Separation vs. Frequency Rev. C | Page 14 of 20 CHANNEL SEPARATION (dB) THD + N (%) 07527-048 07527-051 THD + N (%) 07527-050 AD8622/AD8624 APPLICATIONS INFORMATION V INPUT PROTECTION IN V = ±15V SY The maximum differential input voltage that can be applied to the AD8622/AD8624 is determined by the internal diodes V OUT connected across its inputs and series resistors at each input. These internal diodes and series resistors limit the maximum differential input voltage to ±10 V and are needed to prevent base- emitter junction breakdown from occurring in the input stage of the AD8622/AD8624 when very large differential voltages are applied. In addition, the internal resistors limit the currents that flow through the diodes. However, in applications where large differential voltages can be inadvertently applied to the device, large currents may still flow through these diodes. In such a TIME (200µs/DIV) case, external resistors must be placed at both inputs of the op Figure 55. No Phase Reversal amp to limit the input currents to ±10 mA (see Figure 54). MICROPOWER INSTRUMENTATION AMPLIFIER The AD8622 is a dual, high precision, rail-to-rail output op amp R1 500Ω 2 operating at just 215 μA quiescent current per amplifier. Its 1 ultralow offset, offset drift, and voltage noise, combined with its AD862x very low bias current and high common-mode rejection ratio R2 500Ω 3 (CMRR), are ideally suited for high accuracy and micropower instrumentation amplifier. Figure 56 shows the classic 2-op-amp instrumentation amplifier Figure 54. Input Protection with four resistors using the AD8622. The key to high CMRR PHASE REVERSAL for this instrumentation amplifier are resistors that are well matched from both the resistive ratio and the relative drift. For An undesired phenomenon, phase reversal (also known as true difference amplification, matching of the resistor ratio is phase inversion) occurs in many op amps when one or both of very important, where R3/R4 = R1/R2. Assuming perfectly the inputs are driven beyond the specified input voltage range matched resistors, the gain of the circuit is 1 + R2/R1, which is (IVR), in effect reversing the polarity of the output. In some approximately 100. Tighter matching of two op amps in one cases, phase reversal can induce lockups and even cause package, like the AD8622, offers a significant boost in equipment damage as well as self destruction. performance over the classical 3-op-amp configuration. Overall, The AD8622/AD8624 amplifiers have been carefully designed to the circuit only requires about 430 µA of supply current. prevent output phase reversal when both inputs are maintained R3 10.1kΩ within the specified input voltage range. In addition, even if one R2 1MΩ or both inputs exceed the input voltage range but remain within +15V R4 the supply rails, the output still does not phase reverse. Figure 55 1MΩ +15V – R1 shows the input/output waveforms of the AD8622/AD8624 1/2 10.1kΩ – AD8622 configured as a unity-gain buffer with a supply voltage of ±15 V. 1/2 V V1 + AD8622 O V2 + –15V NOTES –15V 1. V = 100(V2 – V1) O 2. TYPICAL: 0.01mV < |V2 – V1| < 149.7mV 3. TYPICAL: –14.97V < V < +14.97V O 4. USE MATCHED RESISTORS. Figure 56. Micropower Instrumentation Amplifier Rev. C | Page 15 of 20 07527-055 VOLTAGE (5V/DIV) 07527-054 07527-053 AD8622/AD8624 netic field. Using the 4.12k:98.8k resistive divider, the bias HALL SENSOR SIGNAL CONDITIONING voltage of the Hall element is reduced to 100 mV, leading to only The AD8622/AD8624 is also highly suitable for high accuracy, 250 µA of power consumption. The 3-op-amp in-amp low power signal conditioning circuits. One such use is in Hall configuration of the AD8622/AD8624 then increases the sensor signal conditioning (see Figure 57). The magnetic sensitivity to 55 mV/mT. The key to high CMRR for this in-amp sensitivity of a Hall element is proportional to the bias voltage configuration are resistors that are well matched (where R1/R2 applied across it. With 1 V bias voltage, the Hall element = R3/R4) from both the resistive ratio and relative drift. The consumes about 2.5 mA of supply current and has a sensitivity resistors are important in determining the performance over of 5.5 mV/mT typical. To reduce power consumption, bias manufacturing tolerances, time and temperature. At least 1% or voltage must be reduced, but at the risk of lower sensitivity. The better resistors are recommended. Using the AD8622/AD8624 to only way to achieve higher sensitivity is by introducing a gain amplify the sensor signal can reduce power while also achieving using a precision micropower amplifier. The AD8622/AD8624, higher sensitivity. The total current consumed is just 1.2 mA, with all its features, is well suited to amplify the sensitivity of the resulting in 21× improvement in sensitivity/power. Hall element. The ADR121 is a precision micropower 2.5 V voltage reference. A precision voltage reference is required to hold a constant current so that the Hall voltage only depends on the intensity of the mag- V V SY SY + C1 R2 9.9kΩ 1µF TO 10µF AD862x HALL ELEMENT – V SY R5 R1 ADR121 – 2.5V 9.9kΩ 9.9kΩ – V R8 SY 4.12kΩ 400Ω C3 R7 AD862x + R6 R3 C2 + ×4 55mV 0.1µF 200Ω 9.9kΩ 9.9kΩ V = 2.5V + × MAGNETIC FIELD (mT) 0.1µF OUT R9 TO 10µF + mT AD862x V 98.8kΩ SY – – AD862x R4 9.9kΩ + NOTES 1. USE MATCHED RESISTORS FOR IN-AMP. 2. FOR INFORMATION ON C1, C2, AND C3, REFER TO ADR121 DATA SHEET. Figure 57. Hall Sensor Signal Conditioning Rev. C | Page 16 of 20 07527-052 AD8622/AD8624 SIMPLIFIED SCHEMATIC V+ R3 R2 R1 Q10 Q11 C1 V B2 Q6 Q3 V B1 Q5 INPUT BIAS Q4 CANCELLATION CIRCUITRY Q8 OUT x 500Ω +IN x Q1 Q2 D1 D2 500Ω –IN x Q7 Q12 Q9 D3 D4 V– Figure 58. Simplified Schematic Rev. C | Page 17 of 20 07527-062 AD8622/AD8624 OUTLINE DIMENSIONS 3.20 3.00 2.80 8 5 5.15 3.20 4.90 3.00 4.65 1 2.80 4 PIN 1 IDENTIFIER 0.65 BSC 0.95 15° MAX 0.85 1.10 MAX 0.75 0.80 0.15 0.23 6° 0.55 0.40 0.05 0.09 0° 0.40 0.25 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 59. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 5.00 (0.1968) 4.80 (0.1890) 8 5 6.20 (0.2441) 4.00 (0.1574) 1 5.80 (0.2284) 3.80 (0.1497) 4 0.50 (0.0196) 1.27 (0.0500) 45° BSC 1.75 (0.0688) 0.25 (0.0099) 1.35 (0.0532) 0.25 (0.0098) 8° 0.10 (0.0040) 0° COPLANARITY 0.51 (0.0201) 1.27 (0.0500) 0.10 0.31 (0.0122) 0.25 (0.0098) SEATING 0.40 (0.0157) PLANE 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 60. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) Rev. C | Page 18 of 20 100709-B 012407-A AD8622/AD8624 4.10 0.35 4.00 SQ 0.30 3.90 PIN 1 0.25 INDICATOR 13 16 0.65 12 BSC 1 EXPOSED 2.70 PAD 2.60 SQ 2.50 4 9 8 5 0.45 0.25 MIN TOP VIEW BOTTOM VIEW 0.40 0.35 0.80 FOR PROPER CONNECTION OF 0.75 THE EXPOSED PAD, REFER TO 0.05 MAX THE PIN CONFIGURATION AND 0.70 0.02 NOM FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COPLANARITY SEATING 0.08 PLANE 0.20 REF COMPLIANT TO JEDEC STANDARDS MO-220-WGGC. Figure 61. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 4 mm × 4mm Body, Very Very Thin Quad (CP-16-17) Dimensions shown in millimeters 5.10 5.00 4.90 14 8 4.50 6.40 4.40 BSC 4.30 1 7 PIN 1 0.65 BSC 1.05 1.20 1.00 0.20 MAX 0.80 0.09 0.75 0.15 8° 0.60 SEATING 0° 0.05 0.45 0.30 PLANE COPLANARITY 0.19 0.10 COMPLIANT TO JEDEC STANDARDS MO-153-AB-1 Figure 62. 14-Lead Thin Shrink Small Outline Package [TSSOP] (RU-14) Dimensions shown in millimeters ORDERING GUIDE 1 Model Temperature Range Package Description Package Option Branding AD8622ARMZ −40°C to +125°C 8-Lead MSOP RM-8 A1P AD8622ARMZ-REEL −40°C to +125°C 8-Lead MSOP RM-8 A1P AD8622ARMZ-R7 −40°C to +125°C 8-Lead MSOP RM-8 A1P AD8622ARZ −40°C to +125°C 8-Lead SOIC_N R-8 AD8622ARZ-REEL −40°C to +125°C 8-Lead SOIC_N R-8 AD8622ARZ-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8 AD8624ACPZ-R2 −40°C to +125°C 16-Lead LFCSP_WQ CP-16-17 AD8624ACPZ-R7 −40°C to +125°C 16-Lead LFCSP_WQ CP-16-17 AD8624ACPZ-RL −40°C to +125°C 16-Lead LFCSP_WQ CP-16-17 AD8624ARUZ −40°C to +125°C 14-Lead TSSOP RU-14 AD8624ARUZ-RL −40°C to +125°C 14-Lead TSSOP RU-14 1 Z = RoHS Compliant Part. Rev. C | Page 19 of 20 PIN 1 INDICATOR 061908-A 012909-B AD8622/AD8624 NOTES ©2009–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07527-0-6/11(C) Rev. C | Page 20 of 20