ANALOG DEVICES AD8610

Precision, Very Low Noise, Low Input Bias Current, Wide Bandwidth JFET Operational Amplifiers AD8610/AD8620 FEATURES PIN CONFIGURATIONS Low noise: 6 nV/√Hz NULL 1 8 NC Low offset voltage: 100 μV maximum –IN 2 7 V+ AD8610 +IN 3 6 OUT Low input bias current: 10 pA maximum TOP VIEW (Not to Scale) V– 4 5 NULL Fast settling: 600 ns to 0.01% Low distortion NC = NO CONNECT Unity gain stable Figure 1. 8-Lead MSOP and 8-Lead SOIC_N No phase reversal Dual-supply operation: ±5 V to ±13 V OUTA 1 8 V+ –INA 2 7 OUTB AD8620 APPLICATIONS +INA 3 6 –INB TOP VIEW (Not to Scale) Photodiode amplifiers V– 4 5 +INB ATE Instrumentation Figure 2. 8-Lead SOIC_N Sensors and controls High performance filters Fast precision integrators High performance audio GENERAL DESCRIPTION The AD8610/AD8620 are very high precision JFET input ampli- Applications for the AD8610/AD8620 include electronic instru- fiers featuring ultralow offset voltage and drift, very low input ments; ATE amplification, buffering, and integrator circuits; voltage and current noise, very low input bias current, and wide CAT/MRI/ultrasound medical instrumentation; instrumentation bandwidth. Unlike many JFET amplifiers, the AD8610/AD8620 quality photodiode amplification; fast precision filters (including input bias current is low over the entire operating temperature PLL filters); and high quality audio. range. The AD8610/AD8620 are stable with capacitive loads of The AD8610/AD8620 are fully specified over the extended over 1000 pF in noninverting unity gain; much larger capacitive industrial temperature range (−40°C to +125°C). The AD8610 loads can be driven easily at higher noise gains. The AD8610/ is available in the narrow 8-lead SOIC and the tiny 8-lead MSOP AD8620 swing to within 1.2 V of the supplies even with a 1 kΩ surface-mount packages. The AD8620 is available in the narrow load, maximizing dynamic range even with limited supply volt- 8-lead SOIC package. The 8-lead MSOP packaged devices are ages. Outputs slew at 50 V/μs in either inverting or noninverting avail-able only in tape and reel. gain configurations, and settle to 0.01% accuracy in less than 600 ns. Combined with high input impedance, great precision, and very high output drive, the AD8610/AD8620 are ideal amplifiers for driving high performance ADC inputs and buffering DAC converter outputs. Rev. F Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ©2001–2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 02730-001 02730-002 AD8610/AD8620 TABLE OF CONTENTS Features .............................................................................................. 1  Absolute Maximum Ratings ............................................................5  Applications ....................................................................................... 1  ESD Caution...................................................................................5  Pin Configurations ........................................................................... 1  Typical Performance Characteristics ..............................................6  General Description ......................................................................... 1  Theory of Operation ...................................................................... 13  Revision History ............................................................................... 2  Functional Description .............................................................. 13  Specif ica t ions ..................................................................................... 3  Outline Dimensions ....................................................................... 22  Electrical Specifications ............................................................... 4  Ordering Guide .......................................................................... 22  Changes to Specifications ................................................................. 2 REVISION HISTORY Changes to Ordering Guide ............................................................. 4 5/08—Rev. E to Rev. F Updated Outline Dimensions ....................................................... 17 Changes to Figure 17 ........................................................................ 8 10/02—Rev. B to Rev. C. Changes to Functional Description Section ............................... 13 Updated Ordering Guide ................................................................. 4 Changes to THD Readings vs. Common-Mode Voltage Edits to Figure 15 ............................................................................ 12 Section .............................................................................................. 17 Updated Outline Dimensions ....................................................... 16 Changes to Output Current Capability Section ......................... 18 Changes to Figure 66 and Figure 67 ............................................. 19 5/02—Rev. A to Rev. B Changes to Figure 68 ...................................................................... 20 Addition of Part Number AD8620 ................................... Universal Replaced Second-Order Low-Pass Filter Section ....................... 20 Addition of 8-Lead SOIC (R-8 Suffix) Drawing ............................ 1 11/06—Rev. D to Rev. E Changes to General Description ..................................................... 1 Additions to Specifications .............................................................. 2 Updated Format .................................................................. Universal Change to Electrical Specifications ................................................. 3 Changes to Table 1 ............................................................................ 3 Additions to Ordering Guide ........................................................... 4 Changes to Table 2 ............................................................................ 4 Replace TPC 29 .................................................................................. 8 Changes to Outline Dimensions ................................................... 21 Changes to Ordering Guide .......................................................... 21 Add Channel Separation Test Circuit Figure ................................. 9 Add Channel Separation Graph ...................................................... 9 Changes to Figure 26 ...................................................................... 15 2/04—Rev. C to Rev. D. Addition of High-Speed, Low Noise Differential Driver section .............................................................................................. 16 Addition of Figure 30 ..................................................................... 16 Rev. F | Page 2 of 24 AD8610/AD8620 SPECIFICATIONS @ VS = ±5.0 V, VCM = 0 V, TA = 25°C, unless otherwise noted. Table 1. Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage (AD8610B) V 45 100 μV OS −40°C < TA < +125°C 80 200 μV Offset Voltage (AD8620B) VOS 45 150 μV −40°C < TA < +125°C 80 300 μV Offset Voltage (AD8610A/AD8620A) V 85 250 μV OS 25°C < T < 125°C 90 350 μV A −40°C < T < +125°C 150 850 μV A Input Bias Current IB −10 +2 +10 pA −40°C < TA < +85°C −250 +130 +250 pA −40°C < T < +125°C −2.5 +1.5 +2.5 nA A Input Offset Current I −10 +1 +10 pA OS −40°C < T < +85°C −75 +20 +75 pA A −40°C < TA < +125°C −150 +40 +150 pA Input Voltage Range −2 +3 V Common-Mode Rejection Ratio CMRR VCM = –1.5 V to +2.5 V 90 95 dB Large Signal Voltage Gain A R = 1 kΩ, V = −3 V to +3 V 100 180 V/mV VO L O Offset Voltage Drift (AD8610B) ΔV /ΔT −40°C < T < +125°C 0.5 1 μV/°C OS A Offset Voltage Drift (AD8620B) ΔV /ΔT −40°C < T < +125°C 0.5 1.5 μV/°C OS A Offset Voltage Drift (AD8610A/AD8620A) ΔVOS/ΔT −40°C < TA < +125°C 0.8 3.5 μV/°C OUTPUT CHARACTERISTICS Output Voltage High V R = 1 kΩ, −40°C < T < +125°C 3.8 4 V OH L A Output Voltage Low VOL RL = 1 kΩ, −40°C < TA < +125°C −4 −3.8 V Output Current IOUT VOUT > ±2 V ±30 mA POWER SUPPLY Power Supply Rejection Ratio PSRR VS = ±5 V to ±13 V 100 110 dB Supply Current per Amplifier ISY VO = 0 V 2.5 3.0 mA −40°C < T < +125°C 3.0 3.5 mA A DYNAMIC PERFORMANCE Slew Rate SR RL = 2 kΩ 40 50 V/μs Gain Bandwidth Product GBP 25 MHz Settling Time t A = +1, 4 V step, to 0.01% 350 ns S V NOISE PERFORMANCE Voltage Noise e p-p 0.1 Hz to 10 Hz 1.8 μV p-p n Voltage Noise Density e f = 1 kHz 6 nV/√Hz n Current Noise Density in f = 1 kHz 5 fA/√Hz Input Capacitance CIN Differential Mode 8 pF Common Mode 15 pF Channel Separation C S f = 10 kHz 137 dB f = 300 kHz 120 dB Rev. F | Page 3 of 24 AD8610/AD8620 ELECTRICAL SPECIFICATIONS @ VS = ±13 V, VCM = 0 V, TA = 25°C, unless otherwise noted. Table 2. Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage (AD8610B) VOS 45 100 μV −40°C < TA < +125°C 80 200 μV Offset Voltage (AD8620B) VOS 45 150 μV −40°C < T < +125°C 80 300 μV A Offset Voltage (AD8610A/AD8620A) V 85 250 μV OS 25°C < TA < 125°C 90 350 μV −40°C < TA < +125°C 150 850 μV Input Bias Current IB −10 +3 +10 pA −40°C < T < +85°C −250 +130 +250 pA A −40°C < T < +125°C −3.5 +3.5 nA A Input Offset Current I −10 +1.5 +10 pA OS −40°C < TA < +85°C −75 +20 +75 pA −40°C < TA < +125°C −150 +40 +150 pA Input Voltage Range −10.5 +10.5 V Common-Mode Rejection Ratio CMRR V = −10 V to +10 V 90 110 dB CM Large Signal Voltage Gain A R = 1 kΩ, V = −10 V to +10 V 100 200 V/mV VO L O Offset Voltage Drift (AD8610B) ΔV /ΔT −40°C < T < +125°C 0.5 1 μV/°C OS A Offset Voltage Drift (AD8620B) ΔVOS/ΔT −40°C < TA < +125°C 0.5 1.5 μV/°C Offset Voltage Drift (AD8610A/AD8620A) ΔVOS/ΔT −40°C < TA < +125°C 0.8 3.5 μV/°C OUTPUT CHARACTERISTICS Output Voltage High VOH RL = 1 kΩ, −40°C < TA < +125°C +11.75 +11.84 V Output Voltage Low VOL RL = 1 kΩ, −40°C < TA < +125°C −11.84 −11.75 V Output Current I V > 10 V ±45 mA OUT OUT Short-Circuit Current I ±65 mA SC POWER SUPPLY Power Supply Rejection Ratio PSRR VS = ±5 V to ±13 V 100 110 dB Supply Current per Amplifier ISY VO = 0 V 3.0 3.5 mA −40°C < TA < +125°C 3.5 4.0 mA DYNAMIC PERFORMANCE Slew Rate SR RL = 2 kΩ 40 60 V/μs Gain Bandwidth Product GBP 25 MHz Settling Time t A = +1, 10 V step, to 0.01% 600 ns S V NOISE PERFORMANCE Voltage Noise e p-p 0.1 Hz to 10 Hz 1.8 μV p-p n Voltage Noise Density e f = 1 kHz 6 nV/√Hz n Current Noise Density i f = 1 kHz 5 fA/√Hz n Input Capacitance CIN Differential Mode 8 pF Common Mode 15 pF Channel Separation C S f = 10 kHz 137 dB f = 300 kHz 120 dB Rev. F | Page 4 of 24 AD8610/AD8620 ABSOLUTE MAXIMUM RATINGS Table 3. Stresses above those listed under Absolute Maximum Ratings Parameter Rating may cause permanent damage to the device. This is a stress Supply Voltage 27.3 V rating only; functional operation of the device at these or any Input Voltage V to V S− S+ other conditions above those indicated in the operational Differential Input Voltage ±Supply voltage section of this specification is not implied. Exposure to absolute Output Short-Circuit Duration to GND Indefinite maximum rating conditions for extended periods may affect Storage Temperature Range –65°C to +150°C device reliability. Operating Temperature Range –40°C to +125°C Junction Temperature Range –65°C to +150°C Table 4. Thermal Resistance Lead Temperature (Soldering, 10 sec) 300°C 1 Package Type θJA θJC Unit 8-Lead MSOP (RM) 190 44 °C/W 8-Lead SOIC (R) 158 43 °C/W 1 θ is specified for worst-case conditions, that is, θ is specified for a device JA JA soldered in circuit board for surface-mount packages. ESD CAUTION Rev. F | Page 5 of 24 AD8610/AD8620 TYPICAL PERFORMANCE CHARACTERISTICS 14 600 V = ±13V S V = ±5V S 12 400 10 200 8 0 6 –200 4 –400 2 0 –600 –250 –150 –50 50 150 250 –40 25 85 125 INPUT OFFSET VOLTAGE (µV) TEMPERATURE (°C) Figure 3. Input Offset Voltage Figure 6. Input Offset Voltage vs. Temperature at ±5 V (300 Amplifiers) 600 14 V = ±5V OR ±13V S V = ±13V S 12 400 10 200 8 0 6 –200 4 –400 2 –600 0 –40 25 85 125 0 0.2 0.6 1.0 1.4 1.8 2.2 2.6 TEMPERATURE (°C) T V (µV/°C) C OS Figure 4. Input Offset Voltage vs. Temperature at ±13 V (300 Amplifiers) Figure 7. Input Offset Voltage Drift 18 3.6 V = ±13V S V = ±5V S 16 3.4 14 3.2 12 3.0 10 2.8 8 2.6 6 2.4 4 2.2 2 0 2.0 –250 –150 –50 50 150 250 –10 –5 0 5 10 INPUT OFFSET VOLTAGE (µV) COMMON-MODE VOLTAGE (V) Figure 8. Input Bias Current vs. Common-Mode Voltage Figure 5. Input Offset Voltage Rev. F | Page 6 of 24 INPUT OFFSET VOLTAGE (µV) NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS 02730-005 02730-003 02730-004 INPUT BIAS CURRENT (pA) NUMBER OF AMPLIFIERS INPUT OFFSET VOLTAGE (µV) 02730-008 02730-007 02730-006 AD8610/AD8620 3.0 1.8 V = ±13V S 1.6 2.5 1.4 2.0 1.2 1.0 1.5 0.8 1.0 0.6 0.4 0.5 0.2 0 0 03 1 2 4 5 6 7 8 9 10 11 12 13 100 1k 10k 100k 1M 10M 100M SUPPLY VOLTAGE (±V) RESISTANCE LOAD (Ω) Figure 9. Supply Current vs. Supply Voltage Figure 12. Output Voltage to Supply Rail vs. Resistance Load 3.05 4.25 V = ±5V S V = ±13V S R = 1kΩ L 4.20 2.95 4.15 2.85 4.10 2.75 4.05 2.65 4.00 2.55 3.95 –40 25 85 125 –40 25 85 125 TEMPERATURE (°C) TEMPERATURE (°C) Figure 10. Supply Current vs. Temperature Figure 13. Output Voltage High vs. Temperature 2.65 –3.95 V = ±5V S V = ±5V S R = 1kΩ L –4.00 2.60 –4.05 2.55 –4.10 2.50 2.45 –4.15 –4.20 2.40 –4.25 2.35 2.30 –4.30 –40 25 85 125 –40 25 85 125 TEMPERATURE (°C) TEMPERATURE (°C) Figure 11. Supply Current vs. Temperature Figure 14. Output Voltage Low vs. Temperature Rev. F | Page 7 of 24 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 02730-011 02730-010 02730-009 OUTPUT VOLTAGE LOW (V) OUTPUT VOLTAGE HIGH (V) OUTPUT VOLTAGE TO SUPPLY RAIL (V) 02730-012 02730-014 02730-013 AD8610/AD8620 12.05 60 V = ±13V V = ±13V S S R = 1kΩ R = 2kΩ L L C = 20pF L 12.00 40 G = +100 11.95 20 G = +10 11.90 0 G = +1 11.85 –20 11.80 –40 –40 25 85 125 1k 10k 100k 1M 10M 100M TEMPERATURE (°C) FREQUENCY (Hz) Figure 15. Output Voltage High vs. Temperature Figure 18. Closed-Loop Gain vs. Frequency 260 –11.80 V = ±13V S V = ±13V S R = 1kΩ L 240 V = ±10V O R = 1kΩ L –11.85 220 200 –11.90 180 –11.95 160 140 –12.00 120 –12.05 100 –40 25 85 125 –40 25 85 125 TEMPERATURE (°C) TEMPERATURE (°C) Figure 19. AVO vs. Temperature Figure 16. Output Voltage Low vs. Temperature 190 120 V = ±5V S 180 V = ±3V O 100 R = 1kΩ L 170 80 160 60 150 140 40 130 AD8610 20 V = ±13V S C = 20pF 120 L 0 110 100 –20 –40 25 85 125 1kHz 10kHz 100kHz 1MHz 10MHz 50MHz TEMPERATURE (°C) FREQUENCY Figure 20. AVO vs. Temperature Figure 17. Open-Loop Gain and Phase vs. Frequency Rev. F | Page 8 of 24 GAIN AND PHASE (dB AND DEGREES) OUTPUT VOLTAGE LOW (V) OUTPUT VOLTAGE HIGH (V) 02730-015 02730-017 02730-016 CLOSED-LOOP GAIN (dB) A (V/mV) A (V/mV) VO VO 02730-018 02730-020 02730-019 AD8610/AD8620 160 140 V = ±13V V = ±13V S S 140 120 120 100 100 +PSRR 80 80 –PSRR 60 60 40 20 40 0 20 –20 –40 0 100 1k 10k 100k 1M 10M 60M 10 100 1k 10k 100k 1M 10M 60M FREQUENCY (Hz) FREQUENCY (Hz) Figure 21. PSRR vs. Frequency Figure 24. CMRR vs. Frequency 160 V = ±5V V = ±13V S S V = –300mV p-p 140 IN A = –100 V R = 10kΩ L 120 100 +PSRR 80 –PSRR 0V 60 V IN 40 V CH = 5V/DIV 20 OUT 2 0 –20 0V –40 100 1k 10k 100k 1M 10M 60M TIME (4µs/DIV) FREQUENCY (Hz) Figure 22. PSRR vs. Frequency Figure 25. Positive Overvoltage Recovery 122 V = ±13V S V = 300mV p-p IN A = –100 V 121 R = 10kΩ L C = 0pF L 120 V IN 119 0V 0V 118 V OUT 117 CH = 5V/DIV 2 116 –40 25 85 125 TEMPERATURE (°C) TIME (4µs/DIV) Figure 23. PSRR vs. Temperature Figure 26. Negative Overvoltage Recovery Rev. F | Page 9 of 24 PSRR (dB) PSRR (dB) PSRR (dB) 02730-023 02730-022 02730-021 VOLTAGE (300mV/DIV) VOLTAGE (300mV/DIV) CMRR (dB) 02730-026 02730-025 02730-024 AD8610/AD8620 100 V = ±5V S 90 V = ±13V S V p-p = 1.8µV IN 80 70 60 GAIN = +1 50 40 30 GAIN = +10 GAIN = +100 20 10 0 1k 10k 100k 1M 10M 100M TIME (1s/DIV) FREQUENCY (Hz) Figure 27. 0.1 Hz to 10 Hz Input Voltage Noise Figure 30. Z vs. Frequency OUT 3000 1000 V = ±13V S 2500 100 2000 1500 10 1000 500 1 0 1 10 100 1k 10k 100k 1M 025 85 125 FREQUENCY (Hz) TEMPERATURE (°C) Figure 28. Input Voltage Noise Density vs. Frequency Figure 31. Input Bias Current vs. Temperature 100 40 V = ±13V S V = ±13V S 90 R = 2kΩ 35 L V = 100mV p-p IN 80 30 70 25 60 GAIN = +1 50 20 40 15 +OS –OS 30 GAIN = +100 GAIN = +10 10 20 5 10 0 0 1k 10k 100k 1M 10M 100M 0 10 100 1k 10k FREQUENCY (Hz) CAPACITANCE (pF) Figure 29. ZOUT vs. Frequency Figure 32. Small Signal Overshoot vs. Load Capacitance Rev. F | Page 10 of 24 Z (Ω) VOLTAGE NOISE DENSITY (nV/ Hz) OUT PEAK-TO-PEAK VOLTAGE NOISE (1µV/DIV) 02730-027 02730-029 02730-028 Z (Ω) SMALL SIGNAL OVERSHOOT (%) I (pA) B OUT 02730-032 02730-031 02730-030 AD8610/AD8620 40 V = ±5V S R = 2kΩ 35 L V = 100mV IN 30 25 20 15 +OS –OS 10 V = ±13V S V p-p = 20V IN A = +1 V 5 R = 2kΩ L C = 20pF L 0 0 10 100 1k 10k CAPACITANCE (pF) TIME (400ns/DIV) Figure 33. Small Signal Overshoot vs. Load Capacitance Figure 36. +Slew Rate at G = +1 V = ±13V S V = ±14V IN A = +1 V FREQ = 0.5kHz V IN V OUT V = ±13V S V p-p = 20V IN A = +1 V R = 2kΩ L C = 20pF L TIME (400µs/DIV) TIME (400ns/DIV) Figure 34. No Phase Reversal Figure 37. –Slew Rate at G = +1 V = ±13V V = ±13V S S V p-p = 20V V p-p = 20V IN IN A = +1 A = –1 V V R = 2kΩ R = 2kΩ L L C = 20pF C = 20pF L L TIME (1µs/DIV) TIME (1µs/DIV) Figure 35. Large Signal Response at G = +1 Figure 38. Large Signal Response at G = −1 Rev. F | Page 11 of 24 SMALL SIGNAL OVERSHOOT (%) VOLTAGE (5V/DIV) VOLTAGE (5V/DIV) 02730-035 02730-034 02730-033 VOLTAGE (5V/DIV) VOLTAGE (5V/DIV) VOLTAGE (5V/DIV) 02730-038 02730-037 02730-036 AD8610/AD8620 V = ±13V S V p-p = 20V IN A = –1 V R = 2kΩ L SR = 50V/µs C = 20pF L V = ±13V S V p-p = 20V IN A = –1 V R = 2kΩ L SR = 55V/µs C = 20pF L TIME (400ns/DIV) TIME (400ns/DIV) Figure 39. +Slew Rate at G = −1 Figure 40. –Slew Rate at G = −1 Rev. F | Page 12 of 24 VOLTAGE (5V/DIV) 02730-039 VOLTAGE (5V/DIV) 02730-040 AD8610/AD8620 THEORY OF OPERATION R1 138 CS (dB) = 20 log (V / 10 × V ) OUT IN 20kΩ +13V R2 136 2kΩ 3 U1 V+ + V– 6 134 V 2 IN V– 5 V+ 7 20V p-p – R4 R3 132 2kΩ 2kΩ U2 –13V 130 Figure 41. Channel Separation Test Circuit 128 FUNCTIONAL DESCRIPTION 126 The AD8610/AD8620 are manufactured on the Analog Devices, 124 Inc., XFCB (eXtra fast complementary bipolar) process. XFCB 122 is fully dielectrically isolated (DI) and used in conjunction with N-channel JFET technology and thin film resistors (that can be 120 0 50 100 150 200 250 300 350 trimmed) to create the JFET input amplifier. Dielectrically isolated FREQUENCY (kHz) NPN and PNP transistors fabricated on XFCB have an fτ > 3 GHz. Figure 42. AD8620 Channel Separation Graph Low TC thin film resistors enable very accurate offset voltage and offset voltage temperature coefficient trimming. These process Power Consumption breakthroughs allow Analog Devices IC designers to create an A major advantage of the AD8610/AD8620 in new designs is amplifier with faster slew rate and more than 50% higher band- the power saving capability. Lower power consumption of the width at half of the current consumed by its closest competition. AD8610/AD8620 makes them much more attractive for portable The AD8610/AD8620 are unconditionally stable in all gains, instrumentation and for high density systems, simplifying thermal even with capacitive loads well in excess of 1 nF. The AD8610B management, and reducing power-supply performance require- grade achieves less than 100 μV of offset and 1 μV/°C of offset ments. Compare the power consumption of the AD8610 vs. the drift, numbers usually associated with very high precision bipolar OPA627 in Figure 43. input amplifiers. The AD8610 is offered in the tiny 8-lead MSOP 8 as well as narrow 8-lead SOIC surface-mount packages and is fully specified with supply voltages from ±5.0 V to ±13 V. The 7 very wide specified temperature range, up to 125°C, guarantees OPA627 superior operation in systems with little or no active cooling. 6 The unique input architecture of the AD8610/AD8620 features extremely low input bias currents and very low input offset voltage. 5 Low power consumption minimizes the die temperature and maintains the very low input bias current. Unlike many competi- 4 tive JFET amplifiers, the AD8610/AD8620 input bias currents are low even at elevated temperatures. Typical bias currents are less 3 than 200 pA at 85°C. The gate current of a JFET doubles every AD8610 10°C, resulting in a similar increase in input bias current over 2 –75 –50 –25 0 25 50 75 100 125 temperature. Give special care to the PC board layout to minimize TEMPERATURE (°C) leakage currents between PCB traces. Improper layout and Figure 43. Supply Current vs. Temperature board handling generates a leakage current that exceeds the bias current of the AD8610/AD8620. Rev. F | Page 13 of 24 02730-041 CS (dB) SUPPLY CURRENT (mA) 02730-043 02730-042 AD8610/AD8620 +5V Driving Large Capacitive Loads 3 7 The AD8610/AD8620 have excellent capacitive load driving V = 50mV IN 2 4 capability and can safely drive up to 10 nF when operating with 2µF –5V a ±5.0 V supply. Figure 44 and Figure 45 compare the AD8610/ 2kΩ 2kΩ AD8620 against the OPA627 in the noninverting gain configu- Figure 46. Capacitive Load Drive Test Circuit ration driving a 10 kΩ resistor and 10,000 pF capacitor placed in parallel on its output, with a square wave input set to a frequency of 200 kHz. The AD8610/AD8620 have much less ringing than the OPA627 with heavy capacitive loads. V = ±5V S R = 10kΩ L C = 10,000pF L V = ±5V S R = 10kΩ L C = 2µF L TIME (20µs/DIV) Figure 47. OPA627 Capacitive Load Drive, AV = +2 TIME (2µs/DIV) Figure 44. OPA627 Driving CL = 10,000 pF V = ±5V S R = 10kΩ L C = 10,000pF L V = ±5V S R = 10kΩ L C = 2µF L TIME (20µs/DIV) Figure 48. AD8610/AD8620 Capacitive Load Drive, AV = +2 TIME (2µs/DIV) Figure 45. AD8610/AD8620 Driving CL = 10,000 pF The AD8610/AD8620 can drive much larger capacitances without any external compensation. Although the AD8610/ AD8620 are stable with very large capacitive loads, remember that this capacitive loading limits the bandwidth of the amplifier. Heavy capacitive loads also increase the amount of overshoot and ringing at the output. Figure 47 and Figure 48 show the AD8610/AD8620 and the OPA627 in a noninverting gain of +2 driving 2 μF of capacitance load. The ringing on the OPA627 is much larger in magnitude and continues 10 times longer than the AD8610/AD8620. Rev. F | Page 14 of 24 VOLTAGE (20mV/DIV) VOLTAGE (20mV/DIV) 02730-045 02730-044 VOLTAGE (50mV/DIV) VOLTAGE (50mV/DIV) 02730-046 02730-048 02730-047 AD8610/AD8620 Slew Rate (Unity Gain Inverting vs. Noninverting) V = ±13V S R = 2kΩ L Amplifiers generally have a faster slew rate in an inverting unity G= –1 gain configuration due to the absence of the differential input capacitance. Figure 49 through Figure 52 show the performance SR = 54V/µs of the AD8610/AD8620 configured in a unity gain of –1 compared to the OPA627. The AD8610/AD8620 slew rate is more symme- trical, and both the positive and negative transitions are much cleaner than in the OPA627. V = ±13V S R = 2kΩ L G= –1 SR = 54V/µs TIME (400ns/DIV) Figure 51. –Slew Rate of AD8610/AD8620 in Unity Gain of –1 V = ±13V S R = 2kΩ L G= –1 SR = 56V/µs TIME (400ns/DIV) Figure 49. +Slew Rate of AD8610/AD8620 in Unity Gain of –1 V = ±13V S R = 2kΩ L G= –1 TIME (400ns/DIV) SR = 42.1V/µs Figure 52. –Slew Rate of OPA627 in Unity Gain of –1 The AD8610/AD8620 have a very fast slew rate of 60 V/μs even when configured in a noninverting gain of +1. This is the toughest condition to impose on any amplifier because the input common- mode capacitance of the amplifier generally makes its SR appear worse. The slew rate of an amplifier varies according to the voltage difference between its two inputs. To observe the maximum SR, a voltage difference of about 2 V between the inputs must be TIME (400ns/DIV) ensured. This is required for virtually any JFET op amp so that Figure 50. +Slew Rate of OPA627 in Unity Gain of –1 one side of the op amp input circuit is completely off, thus maxi- mizing the current available to charge and discharge the internal compensation capacitance. Lower differential drive voltages produce lower slew rate readings. A JFET input op amp with a slew rate of 60 V/μs at unity gain with VIN = 10 V may slew at 20 V/μs if it is operated at a gain of +100 with VIN = 100 mV. Rev. F | Page 15 of 24 VOLTAGE (5V/DIV) VOLTAGE (5V/DIV) 02730-050 02730-049 VOLTAGE (5V/DIV) VOLTAGE (5V/DIV) 02730-052 02730-051 AD8610/AD8620 The slew rate of the AD8610/AD8620 is double that of the Input Overvoltage Protection OPA627 when configured in a unity gain of +1 (see Figure 53 When the input of an amplifier is driven below VEE or above VCC and Figure 54). by more than one VBE, large currents flow from the substrate through the negative supply (V–) or the positive supply (V+), V = ±13V S R = 2kΩ respectively, to the input pins and can destroy the device. If the L G= +1 input source can deliver larger currents than the maximum forward current of the diode (>5 mA), a series resistor can be added to protect the inputs. With its very low input bias and offset current, a large series resistor can be placed in front of the AD8610/AD8620 inputs to limit current to below damaging SR = 85V/µs levels. Series resistance of 10 kΩ generates less than 25 μV of offset. This 10 kΩ allows input voltages more than 5 V beyond either power supply. Thermal noise generated by the resistor adds 7.5 nV/√Hz to the noise of the AD8610/AD8620. For the AD8610/ AD8620, differential voltages equal to the supply voltage do not cause any problems (see Figure 55). In this context, note that the TIME (400ns/DIV) high breakdown voltage of the input FETs eliminates the need to Figure 53. +Slew Rate of AD8610/AD8620 in Unity Gain of +1 include clamp diodes between the inputs of the amplifier, a practice V = ±13V that is mandatory on many precision op amps. Unfortunately, S R = 2kΩ L clamp diodes greatly interfere with many application circuits, G= +1 such as precision rectifiers and comparators. The AD8610/ AD8620 are free from these limitations. +13V 3 7 6 V1 2 4 AD8610 14V SR = 23V/µs –13V 0 Figure 56. Unity Gain Follower No Phase Reversal Many amplifiers misbehave when one or both of the inputs are TIME (400ns/DIV) forced beyond the input common-mode voltage range. Phase Figure 54. +Slew Rate of OPA627 in Unity Gain of +1 reversal is typified by the transfer function of the amplifier, The slew rate of an amplifier determines the maximum frequency effectively reversing its transfer polarity. In some cases, this can at which it can respond to a large signal input. This frequency cause lockup and even equipment damage in servo systems and (known as full power bandwidth or FPBW) can be calculated can cause permanent damage or no recoverable parameter shifts for a given distortion (for example, 1%) from the equation to the amplifier itself. Many amplifiers feature compensation circuitry to combat these effects, but some are only effective for SR FPBW= the inverting input. The AD8610/AD8620 are designed to prevent () 2π× V PEAK phase reversal when one or both inputs are forced beyond their input common-mode voltage range. CH = 20.8V p-p 1 V IN 0V CH = 19.4V p-p 2 V 0V OUT TIME (400ns/DIV) TIME (400µs/DIV) Figure 55. AD8610 FPBW Figure 57. No Phase Reversal Rev. F | Page 16 of 24 VOLTAGE (10V/DIV) VOLTAGE (5V/DIV) VOLTAGE (5V/DIV) 02730-054 02730-053 02730-055 VOLTAGE (5V/DIV) 02730-056 02730-057 AD8610/AD8620 THD Readings vs. Common-Mode Voltage Settling Time Total harmonic distortion of the AD8610/AD8620 is well below The AD8610/AD8620 have a very fast settling time, even to a 0.0006% with any load down to 600 Ω. The AD8610 outperforms very tight error band, as can be seen from Figure 60. The AD8610/ the OPA627 for distortion, especially at frequencies above 20 kHz. AD8620 are configured in an inverting gain of +1 with 2 kΩ input and feedback resistors. The output is monitored with a 10×, 0.1 10 MΩ, 11.2 pF scope probe. V = ±13V S 1.2k V = 5V rms IN BW = 80kHz 1.0k 0.01 800 OPA627 600 0.001 400 AD8610 200 0.0001 10 100 1k 10k 80k 0 FREQUENCY (Hz) 0.001 0.01 0.1 1 10 Figure 58. AD8610 vs. OPA627 THD + Noise @ V = 0 V ERROR BAND (%) CM 0.1 Figure 60. AD8610/AD8620 Settling Time vs. Error Band V = ±13V S 1.2k R = 600Ω L 1.0k 800 2V rms 0.01 4V rms 600 6V rms 400 OPA627 200 0.001 10 100 1k 10k 20k 0 FREQUENCY (Hz) 0.001 0.01 0.1 1 10 Figure 59. THD + Noise vs. Frequency ERROR BAND (%) Figure 61. OPA627 Settling Time vs. Error Band Noise vs. Common-Mode Voltage The AD8610/AD8620 noise density varies only 10% over the input range, as shown in Table 5. Table 5. Noise vs. Common-Mode Voltage V at f = 1 kHz (V) Noise Reading (nV/√Hz) CM −10 7.21 −5 6.89 0 6.73 +5 6.41 +10 7.21 Rev. F | Page 17 of 24 THD + N (%) THD + N (%) 02730-059 02730-058 SETTLING TIME (ns) SETTLING TIME (ns) 02730-061 02730-060 AD8610/AD8620 10 The AD8610/AD8620 maintain this fast settling time when loaded with large capacitive loads, as shown in Figure 62. 3.0 ERROR BAND = ±0.01% 2.5 1 V 2.0 EE V CC 1.5 1.0 0.1 0.5 0.00001 0.0001 0.001 0.01 0.1 1 LOAD CURRENT (A) 0 Figure 64. AD8610/AD8620 Dropout from ±13 V vs. Load Current 0 500 1000 1500 2000 10 C (pF) L Figure 62. AD8610/AD8620 Settling Time vs. Load Capacitance 3.0 ERROR BAND = ±0.01% V CC 2.5 1 V EE 2.0 1.5 1.0 0.1 0.5 0.00001 0.0001 0.001 0.01 0.1 1 LOAD CURRENT (A) 0 Figure 65. OPA627 Dropout from ±15 V vs. Load Current 0 500 1000 1500 2000 C (pF) L Although operating conditions imposed on the AD8610/AD8620 Figure 63. OPA627 Settling Time vs. Load Capacitance (±13 V) are less favorable than the OPA627 (±15 V), it can be seen that the AD8610/AD8620 have much better drive capability Output Current Capability (lower headroom to the supply) for a given load current. The AD8610/AD8620 can drive very heavy loads due to its Operating with Supplies Greater than ±13 V high output current. It is capable of sourcing or sinking 45 mA at ±10 V output. The short-circuit current is quite high and the The AD8610/AD8620 maximum operating voltage is specified part is capable of sinking about 95 mA and sourcing over 60 mA at ±13 V. When ±13 V is not readily available, an inexpensive while operating with supplies of ±13 V. Figure 64 and Figure 65 LDO can provide ±12 V from a nominal ±15 V supply. compare the output voltage vs. load current of AD8610/ AD8620 and OPA627. Rev. F | Page 18 of 24 SETTLING TIME (µs) SETTLING TIME (µs) 02730-063 02730-062 DELTA FROM RESPECTIVE RAIL (V) DELTA FROM RESPECTIVE RAIL (V) 02730-065 02730-064 AD8610/AD8620 +5V Input Offset Voltage Adjustment 7 Offset of AD8610 is very small and normally does not require 100Ω 3 1 V additional offset adjustment. However, the offset adjust pins can IN 6 AD8610 be used as shown in Figure 66 to further reduce the dc offset. By V OUT 2 using resistors in the range of 50 kΩ, offset trim range is ±3.3 mV. 5 4 V+ 10kΩ 5pF 7 –5V 2 +5V +5V 6 V AD8610 OUT 1 12 13 3 V V 5 L DD 1kΩ S1 3 R1 4 G = +1 1 Y 0 IN1 10kΩ D1 2 G V– ADG452 S2 14 16 Figure 66. Offset Voltage Nulling Circuit G = +10 Y IN2 1 1kΩ D2 15 A A 0 Programmable Gain Amplifier (PGA) S3 11 A B 1 The combination of low noise, low input bias current, low input 9 G = +100 Y IN3 2 100Ω offset voltage, and low temperature drift make the AD8610/ D3 10 S4 6 AD8620 a perfect solution for programmable gain amplifiers. 8 PGAs are often used immediately after sensors to increase the G = +1000 Y 3 IN4 D4 7 11Ω dynamic range of the measurement circuit. Historically, the large 74HC139 V GND SS on resistance of switches (combined with the large IB currents 4 5 of amplifiers) created a large dc offset in PGAs. Recent and –5V improved monolithic switches and amplifiers completely remove Figure 67. High Precision PGA these problems. A PGA discrete circuit is shown in Figure 67. 1. Room temperature error calculation due to R and I ON B In Figure 67, when the 10 pA bias current of the AD8610 is ΔV = I × R = 2 pA × 5 Ω = 10 pV dropped across the (<5 Ω) R of the switch, it results in a OS B ON ON negligible offset error. Total Offset = AD8610 (Offset) + ΔV OS When high precision resistors are used, as in the circuit of Total Offset = AD8610 (Offset_Trimmed) + ΔVOS Figure 67, the error introduced by the PGA is within the Total Offset = 5 μV + 10 pV ≈ 5 μV ½ LSB requirement for a 16-bit system. 2. Full temperature error calculation due to RON and IB ΔVOS (@ 85°C) = IB (@ 85°C) × RON (@ 85°C) = 250 pA × 15 Ω = 3.75 nV 3. The temperature coefficient of switch and AD8610/AD8620 combined is essentially the same as the T V of the C OS AD8610/AD8620. ΔVOS/ΔT(total) = ΔVOS/ΔT(AD8610/AD8620) + ΔVOS/ΔT(IB × RON) ΔVOS/ΔT(total) = 0.5 μV/°C + 0.06 nV/°C ≈ 0.5 μV/°C Rev. F | Page 19 of 24 02730-066 02730-067 AD8610/AD8620 High Speed Instrumentation Amplifier In active filter applications using operational amplifiers, the dc accuracy of the amplifier is critical to optimal filter performance. The 3-op-amp instrumentation amplifiers shown in Figure 68 can The offset voltage and bias current of the amplifier contribute to provide a range of gains from unity up to 1000 or higher. The output error. Input offset voltage is passed by the filter and can instrumentation amplifier configuration features high common- be amplified to produce excessive output offset. For low frequency mode rejection, balanced differential inputs, and stable, accurately applications requiring large value input resistors, bias and offset defined gain. Low input bias currents and fast settling are achieved currents flowing through these resistors also generate an offset with the JFET input AD8610/AD8620. Most instrumentation voltage. amplifiers cannot match the high frequency performance of this circuit. The circuit bandwidth is 25 MHz at a gain of 1, and close to At higher frequencies, the dynamic response of the amplifier 5 MHz at a gain of 10. Settling time for the entire circuit is 550 ns to must be carefully considered. In this case, slew rate, bandwidth, 0.01% for a 10 V step (gain = 10). Note that the resistors around and open-loop gain play a major role in amplifier selection. the input pins need to be small enough in value so that the RC The slew rate must be both fast and symmetrical to minimize time constant they form in combination with stray circuit capaci- distortion. The bandwidth of the amplifier, in conjunction with the tance does not reduce circuit bandwidth. gain of the filter, dictates the frequency response of the filter. The V+ use of high performance amplifiers, such as the AD8610/AD8620, minimizes both dc and ac errors in all active filter applications. 8 3 +INA Second-Order, Low-Pass Filter 1 1/2 AD8620 Figure 69 shows the AD8610 configured as a second-order, U1 2 4 Butterworth, low-pass filter. With the values as shown, the C5 design corner was 1 MHz, and the bench measurement was 10pF V– 974 kHz. The wide bandwidth of the AD8610/AD8620 allows V+ R1 corner frequencies into the megahertz range, but the input 1kΩ 7 capacitances should be taken into account by making C1 and 3 V OUT R4 C2 smaller than the calculated values. The following equations R7 C4 AD8610 6 2kΩ 2kΩ 15pF U2 can be used for component selection: 2 R6 RG 4 2kΩ R1 = R2 = User Selected (Typical Values = 10 kΩ to 100 kΩ) R8 V– 2kΩ 1.414 R5 C1= 2kΩ () 2π() f () R1 CUTOFF +INB 5 C3 0.707 15pF C2= 7 1/2 AD8620 () 2π() f () R1 U1 CUTOFF 6 R2 where C1 and C2 are in farads. 1kΩ +13V C1 220pF C2 R2 R1 10pF 7 1020Ω 1020Ω 3 5 Figure 68. High Speed Instrumentation Amplifier V IN C2 6 V AD8610 110pF OUT High Speed Filters U1 2 1 The four most popular configurations are Butterworth, Elliptical, 4 Bessel (Thompson), and Chebyshev. Each type has a response –13V that is optimized for a given characteristic, as shown in Table 6. Figure 69. Second-Order, Low-Pass Filter Table 6. Filter Types Type Sensitivity Overshoot Phase Amplitude (Pass Band) Butterworth Moderate Good Maximum flat Chebyshev Good Moderate Nonlinear Equal ripple Elliptical Best Poor Equal ripple Bessel (Thompson) Poor Best Linear Rev. F | Page 20 of 24 02730-068 02730-069 AD8610/AD8620 High Speed, Low Noise Differential Driver V+ The AD8620 is a perfect candidate as a low noise differential 3 driver for many popular ADCs. There are also other applica- 1 V+ R4 V 1 O 3 1kΩ R10 tions (such as balanced lines) that require differential drivers. R5 1/2 AD8620 2 R13 6 50Ω R8 1kΩ U2 1kΩ The circuit of Figure 70 is a unique line driver widely used in 1kΩ V– R6 2 AD8610 R12 industrial applications. With ±13 V supplies, the line driver can R1 10kΩ 1kΩ 0 1kΩ V– R7 deliver a differential signal of 23 V p-p into a 1 kΩ load. The V+ R9 1kΩ 1kΩ 5 R11 high slew rate and wide bandwidth of the AD8620 combine to R3 50Ω 7 1kΩ V 2 O yield a full power bandwidth of 145 kHz while the low noise 1/2 AD8620 6 U3 front end produces a referred-to-input noise voltage spectral V 2 – V 1 = V O O IN V– density of 6 nV/√Hz. The design is a balanced transmission system R2 0 1kΩ without transformers, where output common-mode rejection of Figure 70. Differential Driver noise is of paramount importance. Like the transformer-based design, either output can be shorted to ground for unbalanced line driver applications without changing the circuit gain of 1. This allows the design to be easily set to noninverting, inverting, or differential operation. Rev. F | Page 21 of 24 02730-070 AD8610/AD8620 OUTLINE DIMENSIONS 3.20 5.00 (0.1968) 3.00 4.80 (0.1890) 2.80 85 6.20 (0.2441) 4.00 (0.1574) 8 5 5.15 1 5.80 (0.2284) 3.20 3.80 (0.1497) 4 4.90 3.00 4.65 2.80 1 4 0.50 (0.0196) 1.27 (0.0500) 45° BSC 1.75 (0.0688) 0.25 (0.0099) PIN 1 1.35 (0.0532) 0.25 (0.0098) 0.65 BSC 8° 0.10 (0.0040) 0° 0.95 0.51 (0.0201) COPLANARITY 0.85 1.10 MAX 1.27 (0.0500) 0.10 0.31 (0.0122) 0.25 (0.0098) 0.75 SEATING 0.40 (0.0157) 0.80 PLANE 0.17 (0.0067) 8° 0.15 0.38 0.60 0.23 0° 0.00 0.22 0.40 0.08 COMPLIANT TO JEDEC STANDARDS MS-012-AA SEATING COPLANARITY CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS PLANE 0.10 (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 71. 8-Lead Mini Small Outline Package [MSOP] Figure 72. 8-Lead Standard Small Outline Package [SOIC_N] (RM-8) Narrow Body Dimensions shown in millimeters (R-8) Dimensions shown in millimeters and (inches) ORDERING GUIDE Model Temperature Range Package Description Package Option Branding AD8610AR −40°C to +125°C 8-Lead SOIC_N R-8 AD8610AR-REEL −40°C to +125°C 8-Lead SOIC_N R-8 AD8610AR-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8 1 AD8610ARZ −40°C to +125°C 8-Lead SOIC_N R-8 1 AD8610ARZ-REEL −40°C to +125°C 8-Lead SOIC_N R-8 1 AD8610ARZ-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8 AD8610ARM-REEL −40°C to +125°C 8-Lead MSOP RM-8 B0A AD8610ARM-R2 −40°C to +125°C 8-Lead MSOP RM-8 B0A 1 AD8610ARMZ-REEL −40°C to +125°C 8-Lead MSOP RM-8 B0A# 1 AD8610ARMZ-R2 −40°C to +125°C 8-Lead MSOP RM-8 B0A# AD8610BR −40°C to +125°C 8-Lead SOIC_N R-8 AD8610BR-REEL −40°C to +125°C 8-Lead SOIC_N R-8 AD8610BR-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8 1 AD8610BRZ −40°C to +125°C 8-Lead SOIC_N R-8 1 AD8610BRZ-REEL −40°C to +125°C 8-Lead SOIC_N R-8 1 AD8610BRZ-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8 AD8620AR −40°C to +125°C 8-Lead SOIC_N R-8 AD8620AR-REEL −40°C to +125°C 8-Lead SOIC_N R-8 AD8620AR-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8 1 AD8620ARZ −40°C to +125°C 8-Lead SOIC_N R-8 1 AD8620ARZ-REEL −40°C to +125°C 8-Lead SOIC_N R-8 1 AD8620ARZ-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8 AD8620BR −40°C to +125°C 8-Lead SOIC_N R-8 AD8620BR-REEL −40°C to +125°C 8-Lead SOIC_N R-8 AD8620BR-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8 1 AD8620BRZ −40°C to +125°C 8-Lead SOIC_N R-8 1 AD8620BRZ-REEL −40°C to +125°C 8-Lead SOIC_N R-8 1 AD8620BRZ-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8 1 Z = RoHS Compliant Part, # denotes RoHs-compliant product can be top or bottom marked. Rev. F | Page 22 of 24 012407-A AD8610/AD8620 NOTES Rev. F | Page 23 of 24 AD8610/AD8620 NOTES ©2001–2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D02730-0-5/08(F) Rev. F | Page 24 of 24