ANALOG DEVICES AD8515

1.8 V Low Power CMOS Rail-to-Rail Input/Output Operational Amplifier AD8515 FEATURES PIN CONFIGURATION Single-supply operation: 1.8 V to 5 V OUT 1 5 V+ AD8515 Offset voltage: 6 mV maximum V– 2 TOP VIEW Space-saving SOT-23 and SC70 packages (Not to Scale) +IN 3 4 –IN Slew rate: 2.7 V/μs Bandwidth: 5 MHz Rail-to-rail input and output swing Figure 1. 5-Lead SC70 and 5-Lead SOT-23 (KS and RJ Suffixes) Low input bias current: 2 pA typical Low supply current @ 1.8 V: 450 μA maximum APPLICATIONS Portable communications Portable phones Sensor interfaces Laser scanners PCMCIA cards Battery-powered devices New generation phones Personal digital assistants GENERAL DESCRIPTION The AD8515 is a rail-to-rail amplifier that can operate from The AD8515 is a rail-to-rail input and output amplifier with a single-supply voltage as low as 1.8 V. a gain bandwidth of 5 MHz and typical offset voltage of 1 mV from a 1.8 V supply. The low supply current makes these parts The AD8515 single amplifier, available in 5-lead SOT-23 and 5-lead ideal for battery-powered applications. The 2.7 V/μs slew rate SC70 packages, is small enough to be placed next to sensors, makes the AD8515 a good match for driving ASIC inputs such reducing external noise pickup. as voice codecs. The AD8515 is specified over the extended industrial temperature range of −40°C to +125°C. Rev. D Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ©2002–2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 03024-001 AD8515 TABLE OF CONTENTS Features .............................................................................................. 1 Typical Performance Characteristics ..............................................7 Applications....................................................................................... 1 Theory of Operation ...................................................................... 12 Pin Configuration............................................................................. 1 Power Consumption vs. Bandwidth ........................................ 12 General Description ......................................................................... 1 Driving Capacitive Loads .............................................................. 13 Revision History ............................................................................... 2 Full Power Bandwidth ............................................................... 13 Specifications..................................................................................... 3 A Micropower Reference Voltage Generator.............................. 14 Electrical Characteristics............................................................. 3 A 100 kHz Single-Supply Second-Order Band-Pass Filter... 14 Absolute Maximum Ratings............................................................ 6 Wien Bridge Oscillator .............................................................. 15 Thermal Resistance ...................................................................... 6 Outline Dimensions ....................................................................... 16 ESD Caution.................................................................................. 6 Ordering Guide .......................................................................... 16 REVISION HISTORY 2/03—Rev. 0 to Rev. A 7/07—Rev. C to Rev. D Added new SC70 Package .................................................Universal Updated Format..................................................................Universal Changes to Features ..........................................................................1 Updated Package Designator Throughout.................................... 1 Changes to General Description .....................................................1 Changes to Table 1, Supply Current/Amplifier ............................ 3 Changes to Pin Configuration.........................................................1 Changes to Table 2, Supply Current/Amplifier ............................ 4 Changes to Specifications.................................................................2 Changes to Table 3, Large Signal Voltage Gain, Power Supply Changes to Absolute Maximum Ratings........................................5 Rejection Ratio, and Supply Current/Amplifier........................... 5 Changes to Ordering Guide .............................................................5 Changes to Figure 10........................................................................ 8 Changes to TPC 3..............................................................................6 Changes to Figure 35...................................................................... 14 Changes to TPC 10............................................................................7 Updated Outline Dimensions ....................................................... 16 Changes to TPC 13............................................................................8 Changes to Ordering Guide .......................................................... 16 Changes to TPC 27......................................................................... 10 3/05—Rev. B to Rev. C Changes to TPC 28......................................................................... 10 Changes to Specifications................................................................ 2 Added new TPC 29 ........................................................................ 10 Changes to Ordering Guide ............................................................ 5 Changes to Functional Description ............................................. 11 Updated to Outline Dimensions .................................................. 14 4/03—Rev. A to Rev. B 8/02—Revision. 0: Initial Version Change to Figure 5 ......................................................................... 12 Rev. D | Page 2 of 16 AD8515 SPECIFICATIONS ELECTRICAL CHARACTERISTICS V = 1.8 V, V = V /2, T = 25°C, unless otherwise noted. S CM S A Table 1. Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage V V = V /2 1 6 mV OS CM S −40°C < TA < +125°C 8 mV Input Bias Current IB VS = 1.8 V 2 30 pA −40°C < TA < +85°C 600 pA −40°C < T < +125°C 8 nA A Input Offset Current I 1 10 pA OS −40°C < T < +125°C 500 pA A Input Voltage Range 0 1.8 V Common-Mode Rejection Ratio CMRR 0 V ≤ VCM ≤ 1.8 V 50 dB −40°C < TA < +125°C 47 dB Large Signal Voltage Gain A R = 100 kΩ, 0.3 V ≤ V ≤ 1.5 V 110 400 V/mV VO L OUT Offset Voltage Drift ΔV /ΔT 4 μV/°C OS OUTPUT CHARACTERISTICS Output Voltage High V I = 100 μA, −40°C < T < +125°C 1.79 V OH L A IL = 750 μA, −40°C < TA < +125°C 1.77 V Output Voltage Low VOL IL = 100 μA, −40°C < TA < +125°C 10 mV IL = 750 μA, −40°C < TA < +125°C 30 mV Short Circuit Limit I 20 mA SC POWER SUPPLY Supply Current/Amplifier ISY VOUT = VS/2 325 450 μA –40°C < T < +125°C 500 μA A DYNAMIC PERFORMANCE Slew Rate SR R = 10 kΩ 2.7 V/μs L Gain Bandwidth Product GBP 5 MHz NOISE PERFORMANCE Voltage Noise Density en f = 1 kHz 22 nV/√Hz f = 10 kHz 20 nV/√Hz Current Noise Density in f = 1 kHz 0.05 pA/√Hz Rev. D | Page 3 of 16 AD8515 V = 3.0 V, V = V /2, T = 25°C, unless otherwise noted. S CM S A Table 2. Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage V V = V /2 1 6 mV OS CM S −40°C < TA < +125°C 8 mV Input Bias Current IB VS = 3.0 V 2 30 pA −40°C < TA < +85°C 600 pA −40°C < T < +125°C 8 nA A Input Offset Current I 1 10 pA OS −40°C < T < +125°C 500 pA A Input Voltage Range 0 3 V Common-Mode Rejection Ratio CMRR 0 V ≤ VCM ≤ 3.0 V 54 dB −40°C < TA < +125°C 50 dB Large Signal Voltage Gain A R = 100 kΩ, 0.3 V ≤ V ≤ 2.7 V 250 1000 V/mV VO L OUT Offset Voltage Drift ΔV /ΔT 4 μV/°C OS OUTPUT CHARACTERISTICS Output Voltage High V I = 100 μA, −40°C < T < +125°C 2.99 V OH L A IL = 750 μA, −40°C < TA < +125°C 2.98 V Output Voltage Low VOL IL = 100 μA, −40°C < TA < +125°C 10 mV IL = 750 μA, −40°C < TA < +125°C 20 mV POWER SUPPLY Power Supply Rejection Ratio PSRR VS = 1.8 V to 5.0 V 65 85 dB −40°C < TA < +125°C 57 80 dB Supply Current/Amplifier I V = V /2 350 450 μA SY OUT S −40°C < T < +125°C 500 μA A DYNAMIC PERFORMANCE Slew Rate SR R = 10 kΩ 2.7 V/μs L Gain Bandwidth Product GBP 5 MHz NOISE PERFORMANCE Voltage Noise Density en f = 1 kHz 22 nV/√Hz f = 10 kHz 20 nV/√Hz Current Noise Density i f = 1 kHz 0.05 pA/√Hz n Rev. D | Page 4 of 16 AD8515 V = 5.0 V, V = V /2, T = 25°C, unless otherwise noted. S CM S A Table 3. Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage V V = V /2 1 6 mV OS CM S –40°C < TA < +125°C 8 mV Input Bias Current IB VS = 5.0 V 5 30 pA –40°C < TA < +85°C 600 pA –40°C < T < +125°C 8 nA A Input Offset Current I 1 10 pA OS –40°C < T < +125°C 500 pA A Input Voltage Range 0 5.0 V Common-Mode Rejection Ratio CMRR 0 V ≤ VCM ≤ 5.0 V 60 75 dB –40°C < TA < +125°C 54 dB Large Signal Voltage Gain A R = 100 kΩ, 0.3 V ≤ V ≤ 4.7 V 450 2000 V/mV VO L OUT Offset Voltage Drift ΔV /ΔT 4 μV/°C OS OUTPUT CHARACTERISTICS 4.99 Output Voltage High V I = 100 μA, –40°C < T < +125°C 4.98 V OH L A IL = 750 μA, –40°C < TA < +125°C V Output Voltage Low VOL IL = 100 μA, –40°C < TA < +125°C 10 mV IL = 750 μA, –40°C < TA < +125°C 20 mV POWER SUPPLY Power Supply Rejection Ratio PSRR VS = 1.8 V to 5.0 V 65 85 dB –40°C < TA < +125°C 57 80 dB Supply Current/Amplifier I V = V /2 410 550 μA SY OUT S –40°C < T < +125°C 600 μA A DYNAMIC PERFORMANCE Slew Rate SR R = 10 kΩ 2.7 V/μs L Gain Bandwidth Product GBP 5 MHz NOISE PERFORMANCE Voltage Noise Density en f = 1 kHz 22 nV/√Hz f = 10 kHz 20 nV/√Hz Current Noise Density i f = 1 kHz 0.05 pA/√Hz n Rev. D | Page 5 of 16 AD8515 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise noted. THERMAL RESISTANCE Table 4. Parameter Rating θ is specified for the worst-case conditions, that is, a device JA Supply Voltage 6 V soldered in a circuit board for surface-mount packages. Input Voltage GND to V S Table 5. Thermal Resistance Differential Input Voltage ±6 V or ±VS Package Type θ θ Unit JA JC Output Short-Circuit Duration to GND Observe derating curves 5-Lead SOT-23 (RJ) 230 146 °C/W Storage Temperature Range 5-Lead SC70 (KS) 376 126 °C/W KS and RJ Packages −65°C to +150°C Operating Temperature Range AD8515 −40°C to +125°C ESD CAUTION Junction Temperature Range KS and RJ Packages −65°C to +150°C Lead Temperature (Soldering, 60 sec) 300°C Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. D | Page 6 of 16 AD8515 TYPICAL PERFORMANCE CHARACTERISTICS 450 6 V = ±2.5V S 5 400 4 350 3 300 2 250 1 200 0 4.65 4.70 4.75 4.80 4.85 4.90 4.95 4.65 4.70 4.75 4.80 4.85 4.90 4.95 BANDWIDTH (MHz) BANDWIDTH (MHz) Figure 2. Supply Current vs. Bandwidth Figure 5. Supply Voltage vs. Bandwidth 450 160 V = ±2.5V S 400 140 V OL 350 120 V OH 300 100 250 80 200 60 150 40 100 20 50 0 0 0123456 02 510 150 SUPPLY VOLTAGE (V) LOAD CURRENT (mA) Figure 3. Supply Current vs. Supply Voltage Figure 6. Output Voltage to Supply Rail vs. Load Current 500 120 270 V = 5V V = ±2.5V S S AMPLITUDE = 20mV 100 225 80 180 450 GAIN 60 135 40 90 PHASE 400 20 45 0 0 –20 –45 350 –40 –90 –60 –135 300 –80 –180 –50 –25 0 25 50 75 100 125 150 1k 10k 100k 1M 10M 50M TEMPERATURE (°C) FREQUENCY (Hz) Figure 4. ISY vs. Temperature Figure 7. Gain and Phase vs. Frequency Rev. D | Page 7 of 16 I (µA) SUPPLY CURRENT (µA) SUPPLY CURRENT (µA) SY 03024-004 03024-003 03024-002 GAIN (dB) ΔOUTPUT VOLTAGE (mV) SUPPLY VOLTAGE (V) 03024-006 03024-005 PHASE (DEGREES) 03024-007 AD8515 120 96 V = ±2.5V V = ±2.5V S S 100 80 92 60 G = 100 40 88 G = 10 20 G = 1 0 84 –20 –40 80 –60 –80 76 10k 100k 1M 10M 30M –50 0 50 100 150 FREQUENCY (Hz) TEMPERATURE (°C) Figure 8. ACL vs. Frequency Figure 11. PSRR vs. Temperature 120 430 V = ±2.5V S V = ±2.5V S AMPLITUDE = 50mV 100 80 344 60 40 258 20 0 172 –20 –40 86 –60 –80 0 10k 100k 1M 10M 100M –6.24 –4.27 –2.29 –0.32 1.66 3.63 FREQUENCY (Hz) V (mV) OS Figure 9. CMRR vs. Frequency Figure 12. VOS Distribution 140 150 V = ±2.5V S V = ±2.5V S AMPLITUDE = 50mV 120 100 +PSRR 100 80 60 –PSRR 40 50 20 GAIN = 100 GAIN = 1 GAIN = 10 0 –20 0 100 1k 10k 100k 1M 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 10. PSRR vs. Frequency Figure 13. Output Impedance vs. Frequency Rev. D | Page 8 of 16 PSRR (dB) CMRR (dB) A (dB) CL 03024-010 03024-009 03024-008 OUTPUT IMPEDANCE (Ω) NUMBER OF AMPLIFIERS PSRR (dB) 03024-013 03024-012 03024-011 AD8515 25 V = ±2.5V V = 5V S S V = 6.4V 24 IN 23 V IN 22 –I SC V OUT 21 20 +I SC 19 18 17 16 15 –50 0 50 100 150 TIME (200µs/DIV) TEMPERATURE (°C) Figure 14. I vs. Temperature Figure 17. No Phase Reversal SC V = ±2.5V S V = ±2.5V S C = 50pF L V = 200mV IN 02 250 500 750 1k 1.25k 1.5k 1.75k 2k 2.25k.5k FREQUENCY (Hz) TIME (1µs/DIV) Figure 15. Voltage Noise Density Figure 18. Small Signal Transient Response V = ±2.5V S V = ±2.5V S GAIN = 100 C = 500pF L V = 200mV IN TIME (1s/DIV) TIME (1µs/DIV) Figure 19. Small Signal Transient Response Figure 16. Input Voltage Noise Rev. D | Page 9 of 16 VOLTAGE (200mV/DIV) VOLTAGE (13µV/DIV) I (mA) SC 03024-016 03024-015 03024-014 VOLTAGE (100mV/DIV) VOLTAGE (100mV/DIV) VOLTAGE (2V/DIV) 03024-019 03024-018 03024-017 AD8515 120 V = ±2.5V V = ±1.5V S S C = 300pF 100 AMPLITUDE = 50mV L V = 4V IN 80 60 40 20 0 –20 –40 –60 –80 10k 100k 1M 10M 100M TIME (1µs/DIV) FREQUENCY (Hz) Figure 20. Large Signal Transient Response Figure 23. CMRR vs. Frequency V = ±1.5V V = ±0.9V S S V IN GAIN = –40 C = 50pF L 100mV V = 100mV V = 200mV IN IN 0V 0V 2V V OUT TIME (2µs/DIV) TIME (1µs/DIV) Figure 21. Saturation Recovery Figure 24. Small Signal Transient Response 120 270 V = ±1.5V V = ±0.9V S S V IN GAIN = –40 AMPLITUDE = 20mV 100 225 0V V = 100mV IN 80 180 60 135 –100mV 40 90 2V 20 45 V OUT 0 0 0V –20 –45 –40 –90 –60 –135 –80 –180 10k 100k 1M 10M 30M TIME (2µs/DIV) FREQUENCY (Hz) Figure 22. Saturation Recovery Figure 25. Gain and Phase vs. Frequency Rev. D | Page 10 of 16 VOLTAGE VOLTAGE (1V/DIV) VOLTAGE 03024-021 03024-020 03024-022 GAIN (dB) VOLTAGE (100mV/DIV) CMRR (dB) 03024-024 03024-023 PHASE (DEGREES) 03024-025 AD8515 200 4.995 V = ±0.9V V = 5V S S I = 750µA L 4.994 150 4.993 100 4.992 50 4.991 GAIN = 100 GAIN = 1 GAIN = 10 0 4.990 1k 10k 100k 1M 10M –50 0 50 100 150 FREQUENCY (Hz) TEMPERATURE (°C) Figure 26. Output Impedance vs. Frequency Figure 29. V vs. Temperature OH 80 V = ±0.9V S V = 5V S V = 3.2V IN 77 V IN 74 V OUT 71 68 65 –50 0 50 100 150 TIME (200µs/DIV) TEMPERATURE (°C) Figure 27. No Phase Reversal Figure 30. CMRR vs. Temperature 11 V = 5V S I = 750µA L 9 7 5 3 –50 0 50 100 150 TEMPERATURE (°C) Figure 28. V vs. Temperature OL Rev. D | Page 11 of 16 V (mV) VOLTAGE (1V/DIV) OUTPUT IMPEDANCE (Ω) OL 03024-028 03024-027 03024-026 CMRR (dB) V (V) OH 03024-030 03024-029 AD8515 THEORY OF OPERATION The AD8515, offered in space-saving SOT-23 and SC70 packages, This product solves the speed/power requirements for many is a rail-to-rail input and output operational amplifier that can applications. The wide bandwidth is also stable even when operated operate at supply voltages as low as 1.8 V. This product is fabri- with low supply voltages. Figure 5 shows the relationship between cated using 0.6 micron CMOS to achieve one of the best power the supply voltage vs. the bandwidth for the AD8515. consumption-to-speed ratios (that is, bandwidth) in the industry. The AD8515 is ideal for battery-powered instrumentation and With a small amount of supply current (less than 400 μA), handheld devices because it can operate at the end of discharge a wide unity gain bandwidth of 4.5 MHz is available for signal voltage of most popular batteries. Table 6 lists the nominal and processing. end of discharge voltages of several typical batteries. The input stage consists of two parallel, complementary, differ- Table 6. Typical Battery Life Voltage Range ential pairs of PMOS and NMOS. The AD8515 exhibits no Nominal End of Discharge phase reversal because the input signal exceeds the supply by Battery Voltage (V) Voltage (V) more than 0.6 V. Currents into the input pin must be limited Lead-Acid 2 1.8 to 5 mA or less by the use of external series resistance(s). The Lithium 2.6 to 3.6 1.7 to 2.4 AD8515 has a very robust ESD design and can stand ESD NiMH 1.2 1 voltages of up to 4000 V. NiCd 1.2 1 POWER CONSUMPTION vs. BANDWIDTH Carbon-Zinc 1.5 1.1 One of the strongest features of the AD8515 is the bandwidth stability over the specified temperature range while consuming small amounts of current. This effect is shown in Figure 2 through Figure 4. Rev. D | Page 12 of 16 AD8515 DRIVING CAPACITIVE LOADS V = ±0.9V S Most amplifiers have difficulty driving large capacitive loads. C = 800pF L Additionally, higher capacitance at the output can increase the GAIN = –1 amount of overshoot and ringing in the amplifier’s step response and can even affect the stability of the device. This is due to the degradation of phase margin caused by additional phase lag from the capacitive load. The value of capacitive load that an amplifier can drive before oscillation varies with gain, supply voltage, input signal, temperature, and other parameters. Unity gain is the most challenging configuration for driving capacitive loads. The AD8515 is capable of driving large capacitive loads without any external compensation. The graphs in Figure 31 and Figure 32 show the amplifier’s capacitive load driving capability when configured in unity gain of +1. TIME (1µs/DIV) Figure 33. Capacitive Load Driving @ C = 800 pF The AD8515 is even capable of driving higher capacitive loads L in inverting gain of −1, as shown in Figure 33. FULL POWER BANDWIDTH V = ±2.5V S The slew rate of an amplifier determines the maximum frequency C = 50pF L at which it can respond to a large input signal. This frequency GAIN = 1 (known as full power bandwidth, FPBW) can be calculated from the equation SR FPBW= 2π×V PEAK for a given distortion. The FPBW of the AD8515 is shown in Figure 34 to be close to 200 kHz. V IN TIME (1µs/DIV) Figure 31. Capacitive Load Driving @ C = 50 pF L V = ±2.5V S C = 500pF L GAIN = 1 V OUT TIME (2µs/DIV) Figure 34. Full Power Bandwidth TIME (1µs/DIV) Figure 32. Capacitive Load Driving @ CL = 500 pF Rev. D | Page 13 of 16 VOLTAGE (10mV/DIV) VOLTAGE (100mV/DIV) 03024-032 03024-031 VOLTAGE (2V/DIV) VOLTAGE (100mV/DIV) 03024-034 03024-033 AD8515 A MICROPOWER REFERENCE VOLTAGE GENERATOR 1 Many single-supply circuits are configured with the circuit f = L 2π×R1×C1 biased to one-half of the supply voltage. In these cases, a false ground reference can be created by using a voltage divider buffered 1 f = by an amplifier. Figure 35 shows the schematic for such a circuit. H 2π×R1×C1 The two 1 MΩ resistors generate the reference voltages while R1 drawing only 0.9 μA of current from a 1.8 V supply. A capacitor H = 1+ 0 connected from the inverting terminal to the output of the op amp R2 provides compensation to allow for a bypass capacitor to be VCC= 1.8 V− 5 V connected at the reference output. This bypass capacitor helps where: establish an ac ground for the reference output. fL is the low −3 dB frequency. 1.8V TO 5V f is the high −3 dB frequency. H H is the midfrequency gain. 0 R2 1MΩ VCC R4 VCC 3 U1 + 100Ω 0.9V TO 2.5V V+ 1 C3 R1 1µF 1MΩ V– C1 4 – R6 R5 AD8515 1µF 1MΩ 2kΩ 3 U9 + VOUT V11 V+ 1 C2 V– 400mV 0.022µF 4 – AD8515 C1 R1 0 R3 C3 R8 2nF 5kΩ 10kΩ 1µF 1MΩ R2 Figure 35. Micropower Voltage Reference Generator 20kΩ A 100 kHz SINGLE-SUPPLY SECOND-ORDER C6 0 BAND-PASS FILTER 10pF Figure 36. Second-Order Band-Pass Filter The circuit in Figure 36 is commonly used in portable applica- tions where low power consumption and wide bandwidth are required. This figure shows a circuit for a single-supply band-pass 2 filter with a center frequency of 100 kHz. It is essential that the op amp have a loop gain at 100 kHz to maintain an accurate center frequency. This loop gain requirement necessitates the choice of 1.5 an op amp with a high unity gain crossover frequency, such as the AD8515. The 4.5 MHz bandwidth of the AD8515 is sufficient to accurately produce the 100 kHz center frequency, as the response 1 in Figure 37 shows. When the op amp bandwidth is close to the center frequency of the filter, the amplifier internal phase shift causes excess phase shift at 100 kHz, altering the filter response. 0.5 In fact, if the chosen op amp has a bandwidth close to 100 kHz, the phase shift of the op amps causes the loop to oscillate. 0 A common-mode bias level is easily created by connecting the 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) noninverting input to a resistor divider consisting of two resistors connected between VCC and ground. This bias point is also Figure 37. Frequency Response of the Band-Pass Filter decoupled to ground with a 1 μF capacitor. Rev. D | Page 14 of 16 03024-035 OUTPUT VOLTAGE (V) 03024-037 03024-036 AD8515 High frequency oscillators can be built with the AD8515, WIEN BRIDGE OSCILLATOR due to its wide bandwidth. Using the values shown, an oscilla- The circuit in Figure 38 can be used to generate a sine wave, one tion frequency of 130 kHz is created and is shown in Figure 39. of the most fundamental waveforms. Known as a Wien Bridge If R11 is too low, the oscillation might converge; if too large, oscillator, it has the advantage of requiring only one low power the oscillation diverges until the output clips (VS = ±2.5 V, amplifier. This is an important consideration, especially for battery- fOSC = 130 kHz). operated applications where power consumption is a critical issue. To keep the equations simple, the resistor and capacitor values used are kept equal. For the oscillation to happen, two conditions have to be met. First, there should be a zero phase shift from the input to the output, which happens at the oscillation frequency of 1 f = OSC 2πR10×C10 Second, at this frequency, the ratio of VOUT to the voltage at the positive input (+IN, Pin 3) has to be 3, which means that the ratio of R11:R12 should be greater than 2. C9 R19 1nF 1kΩ Figure 39. Output of Wien Bridge Oscillator VCC 3 U10 + V+ 1 V– 2 – C10 R13 AD8515 1nF 1kΩ VEE R11 R12 2.05kΩ 1kΩ Figure 38. Low Power Wien Bridge Oscillator Rev. D | Page 15 of 16 03024-038 VOLTAGE (2V/DIV) 03024-039 0.10 MAX AD8515 OUTLINE DIMENSIONS 2.90 BSC 5 4 2.80 BSC 1.60 BSC 12 3 PIN 1 0.95 BSC 1.90 1.30 BSC 1.15 0.90 1.45 MAX 0.22 0.08 10° 0.15 MAX 5° 0.50 0.60 SEATING 0° 0.30 0.45 PLANE 0.30 COMPLIANT TO JEDEC STANDARDS MO-178-AA Figure 40. 5-Lead Small Outline Transistor Package [SOT-23] (RJ-5) Dimensions shown in millimeters 2.20 2.00 1.80 1.35 5 4 2.40 1.25 2.10 1.15 12 3 1.80 PIN 1 0.65 BSC 1.00 0.40 1.10 0.90 0.10 0.80 0.70 0.46 0.36 0.30 0.22 0.26 SEATING 0.15 0.08 PLANE 0.10 COPLANARITY COMPLIANT TO JEDEC STANDARDS MO-203-AA Figure 41. 5-Lead Thin Shrink Small Outline Transistor Package [SC70] (KS-5) Dimensions shown in millimeters ORDERING GUIDE Model Temperature Range Package Description Package Option Branding AD8515ART-R2 −40°C to +125°C 5-Lead SOT-23 RJ-5 BDA AD8515ART-REEL −40°C to +125°C 5-Lead SOT-23 RJ-5 BDA AD8515ART-REEL7 −40°C to +125°C 5-Lead SOT-23 RJ-5 BDA 1 AD8515ARTZ-R2 −40°C to +125°C 5-Lead SOT-23 RJ-5 BDA# 1 AD8515ARTZ-REEL −40°C to +125°C 5-Lead SOT-23 RJ-5 BDA# 1 AD8515ARTZ-REEL7 −40°C to +125°C 5-Lead SOT-23 RJ-5 BDA# AD8515AKS-R2 −40°C to +125°C 5-Lead SC70 KS-5 BDA AD8515AKS-REEL −40°C to +125°C 5-Lead SC70 KS-5 BDA AD8515AKS-REEL7 −40°C to +125°C 5-Lead SC70 KS-5 BDA 1 AD8515AKSZ-R2 −40°C to +125°C 5-Lead SC70 KS-5 BDA# 1 AD8515AKSZ-REEL −40°C to +125°C 5-Lead SC70 KS-5 BDA# 1 AD8515AKSZ-REEL7 −40°C to +125°C 5-Lead SC70 KS-5 BDA# 1 Z = RoHS Compliant Part; # denotes RoHS product, may be top or bottom marked. ©2002–2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C03024-0-7/07(D) Rev. D | Page 16 of 16