ANALOG DEVICES AD8475

Precision, Selectable Gain, Fully Differential Funnel Amplifier AD8475 FEATURES FUNCTIONAL BLOCK DIAGRAMS Precision attenuation: G = 0.4, G = 0.8 Fully differential or single-ended input/output Differential output designed to drive precision ADCs Drives switched capacitor and Σ-Δ ADCs Rail-to-rail output 1kΩ +IN 0.4x 1 12 NC VOCM pin adjusts output common mode 1.25kΩ 1.25kΩ Robust overvoltage protection up to ±15 V (V = +5 V) S +IN 0.8x 2 11 –OUT Single supply: 3 V to 10 V AD8475 1.25kΩ Dual supplies: ±1.5 V to ±5 V –IN 0.8x 10 +OUT 3 1.25kΩ 1kΩ High performance –IN 0.4x 9 4 VOCM Suited for driving 18-bit converter up to 4 MSPS 10 nV/√Hz output noise 3 ppm/°C gain drift 500 μV maximum output offset 50 V/μs slew rate NC = NO CONNECT Low power: 3.2 mA supply current Figure 1. 16-Lead LFCSP APPLICATIONS ADC drivers Differential instrumentation amplifier building blocks Single-ended-to-differential converters 1kΩ 1.25kΩ GENERAL DESCRIPTION The AD8475 is a fully differential, attenuating amplifier with 1.25kΩ AD8475 1.25kΩ integrated precision gain resistors. It provides precision attenuation (by 0.4 or 0.8), common-mode level shifting, and single-ended-to- 1kΩ 1.25kΩ differential conversion along with input overvoltage protection. Power dissipation on a single 5 V supply is only 16 mW. The AD8475 is a simple to use, fully integrated precision gain block, designed to process signal levels of up to ±10 V on a single NC = NO CONNECT supply. It provides a complete interface to make industrial level Figure 2. 10-Lead MSOP signals directly compatible with the differential input ranges of low voltage high performance 16-bit or 18-bit single-supply successive The AD8475 works extremely well with SAR, Σ-Δ, and pipeline approximation (SAR) analog-to-digital converters (ADCs). converters. The high current output stage of the part allows it to drive the switched capacitor front-end circuits of many ADCs with The AD8475 comes with two standard pin-selectable gain minimal error. options: 0.4 and 0.8. The gain of the part is set by driving the input pin corresponding to the appropriate gain. Unlike many differential drivers in the market, the AD8475 is a high precision amplifier. With 500 μV maximum output offset, The AD8475 also provides overvoltage protection from large 10 nV/√Hz output noise, and −112 dB THD + N, the AD8475 industrial input voltages up to ±15 V while operating on a single pairs well with high accuracy converters. Considering its low power 5 V supply. The VOCM pin adjusts the output voltage common consumption and high precision, the slew-enhanced AD8475 has mode for precision level shifting, to match the ADC’s input range excellent speed, settling to 18-bit precision for 4 MSPS acquisition. and maximize dynamic range. The AD8475 is available in a space-saving 16-lead 3 mm × 3 mm LFCSP package and a 10-lead MSOP package. It is fully specified over the −40°C to +85°C temperature range. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ©2010–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. –IN 0.8x 1 10 +IN 0.8x –IN 0.4x 2 9 +IN 0.4x +V 3 8 –V S S VOCM 4 7 NC +OUT 5 6 –OUT 09432-002 09432-001 –IN 0.4x 5 16 +IN 0.4x +V 6 15 –V S S 14 –V +V 7 S S +V 8 13 –V S S AD8475 TABLE OF CONTENTS Features .............................................................................................. 1  Circuit Information.................................................................... 17  Applications....................................................................................... 1  DC Precision............................................................................... 17  General Description........................................................................... 1  Input Voltage Range................................................................... 18  Functional Block Diagrams............................................................. 1  Driving the AD8475................................................................... 18  Revision History ............................................................................... 2  Power Supplies............................................................................ 18  Specifications..................................................................................... 3  Applications Information .............................................................. 19  Absolute Maximum Ratings............................................................ 5  Typical Configuration................................................................ 19  Thermal Resistance ...................................................................... 5  Single-Ended to Differential Conversion................................ 19  ESD Caution.................................................................................. 5  Setting the Output Common-Mode Voltage .......................... 19  Pin Configurations and Function Descriptions ........................... 6  High Performance ADC Driving ............................................. 20  Typical Performance Characteristics ............................................. 8  AD8475 Evaluation Board ............................................................ 22  Terminology .................................................................................... 16  Outline Dimensions....................................................................... 23  Theory of Operation ...................................................................... 17  Ordering Guide .......................................................................... 24  Overview...................................................................................... 17  REVISION HISTORY 4/11—Rev. A to Rev. B Added B Grade Columns to Specifications Section..................... 3 Changes to Figure 16........................................................................ 9 Changes to Figure 43...................................................................... 14 Changes to Ordering Guide .......................................................... 24 1/11—Rev. 0 to Rev. A Added 16-Lead LFCSP.................................................. Throughout Changes to Table 1 and Note 3........................................................ 3 Change to Table 2 ............................................................................. 5 Added Figure 3 and Table 4; Renumbered Sequentially ............. 6 Changes to Typical Performance Characteristics Format........... 8 Added AD8475 Evaluation Board Section and Figure 56......... 22 10/10—Revision 0: Initial Version Rev. B | Page 2 of 24 AD8475 SPECIFICATIONS VS = 5 V, G = 0.4, VOCM connected to 2.5 V, RL = 1 kΩ differentially, TA = 25°C, referred to output (RTO), unless otherwise noted. Table 1. B Grade A Grade Parameter Test Conditions/Comments Min Typ Max Min Typ Max Unit DYNAMIC PERFORMANCE −3 dB Small Signal 150 150 MHz Bandwidth −3 dB Large Signal 15 15 MHz Bandwidth Slew Rate 2 V step 50 50 V/μs Settling Time to 0.01% 2 V step on output 45 45 ns Settling Time to 0.001% 2 V step on output 50 50 ns 1 NOISE/DISTORTION THD + N f = 100 kHz, V = 4 V p-p, −112 −112 dB OUT 22 kHz band-pass filter HD2 f = 1 MHz, VOUT = 2 V p-p −110 −110 dB HD3 f = 1 MHz, VOUT = 2 V p-p −96 −96 dB IMD3 f1 = 0.95 MHz, f2 = 1.05 MHz, −90 −90 dBc V = 2 V p-p OUT IMD3 f = 95 kHz, f = 105 kHz, −84 −84 dBc 1 2 V = 2 V p-p OUT Output Voltage Noise f = 0.1 Hz to 10 Hz 2.5 2.5 μV p-p Spectral Noise Density f = 1 kHz 10 10 nV/√Hz GAIN 0.4 0.4 V/V Gain Error RL = ∞ 0.02 0.05 % Gain Drift −40°C ≤ TA ≤ +85°C 1 3 1 3 ppm/°C Gain Nonlinearity VOUT = 4 V p-p 2.5 2.5 ppm OFFSET AND CMRR 2 Offset RTO 50 200 50 500 μV vs. Temperature −40°C ≤ T ≤ +85°C 2.5 2.5 μV/°C A vs. Power Supply V = ±2.5 V to ±5 V 90 90 dB S Common-Mode Rejection V = ±5 V 86 76 dB INcm Ratio INPUT CHARACTERISTICS 3 Input Voltage Range Differential input −6.25 +6.25 −6.25 +6.25 V Single-ended input −12.5 +12.5 −12.5 +12.5 V 4 Impedance VINcm = VS/2 Single-Ended Input 2.92 2.92 kΩ Differential Input 5 5 kΩ Common Mode Input 1.75 1.75 kΩ OUTPUT CHARACTERISTICS Output Swing −V + +V − −V + +V − S S S S 0.05 0.05 0.05 0.05 Output Balance Error ∆VOUT,cm/∆VOUT,dm 90 −80 dB Output Impedance 0.1 0.1 Ω Capacitive Load Per output 30 30 pF Short-Circuit Current Limit 110 110 mA VOCM CHARACTERISTICS VOCM Input Voltage Range −VS + 1 +VS −VS + 1 +VS V VOCM Input Impedance 100 100 kΩ VOCM Gain Error 0.02 0.02 % Rev. B | Page 3 of 24 AD8475 B Grade A Grade Parameter Test Conditions/Comments Min Typ Max Min Typ Max Unit POWER SUPPLY Specified Voltage 5 5 V Operating Voltage Range 3 10 3 10 V Supply Current 3 3.2 3 3.2 mA Over Temperature −40°C ≤ T ≤ +85°C 4 4 mA A TEMPERATURE RANGE Specified Performance Range −40 +85 −40 +85 °C Operating Range −40 +125 −40 +125 °C 1 Includes amplifier voltage and current noise, as well as noise of internal resistors. 2 Includes input bias and offset current errors. 3 The input voltage range is a function of the voltage supplies and ESD diodes. 4 Internal resistors are trimmed to be ratio matched but have ±20% absolute accuracy. Rev. B | Page 4 of 24 AD8475 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. θ is specified for the worst-case conditions, that is, a device JA Parameter Rating soldered in a circuit board for surface-mount packages. Supply Voltage 11 V Maximum Voltage at Any Input Pin +V + 10.5 V S Table 3. Thermal Resistance Minimum Voltage at Any Input Pin −V − 16 V S Package Type θ Unit JA Storage Temperature Range −65°C to +150°C 16-Lead LFCSP (Exposed Pad) 84.90 °C/W Specified Temperature Range −40°C to +85°C 10-Lead MSOP 214.0 °C/W Operating Temperature Range −40°C to +125°C Junction Temperature 150°C ESD (FICDM) 1500 V ESD CAUTION ESD (HBM) 2000 V Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. B | Page 5 of 24 AD8475 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS +IN 0.4x 1 12 NC AD8475 +IN 0.8x 2 11 –OUT TOP VIEW –IN 0.8x 3 10 +OUT (Not to Scale –IN 0.4x 4 9 VOCM NOTES 1. NC = NO CONNECT. 2. SOLDER THE EXPOSED PADDLE ON THE BACK OF THE PACKAGE TO A GROUND PLANE. Figure 3. 16-Lead LFCSP Pin Configuration Table 4. 16-Lead LFCSP Pin Function Descriptions Pin No. Mnemonic Description 1 +IN 0.4x Positive Input for 0.4 Attenuation. 2 +IN 0.8x Positive Input for 0.8 Attenuation 3 −IN 0.8x Negative Input for 0.8 Attenuation. 4 −IN 0.4x Negative Input for 0.4 Attenuation. 5 −IN 0.4x Negative Input for 0.4 Attenuation. 6 +VS Positive Supply. 7 +VS Positive Supply. 8 +V Positive Supply. S 9 VOCM Output Common-Mode Adjust. 10 +OUT Positive Output. 11 −OUT Negative Output. 12 NC No Connect. 13 −V Negative Supply. S 14 −V Negative Supply. S 15 −V Negative Supply. S 16 +IN 0.4x Positive Input for 0.4 Attenuation. EPAD Solder the exposed paddle on the back of the package to a ground plane. Rev. B | Page 6 of 24 09432-003 –IN 0.4x 5 16 +IN 0.4x +V 6 15 –V S S +V 7 14 –V S S +V 8 13 –V S S AD8475 –IN 0.8x 1 10 +IN 0.8x –IN 0.4x 2 9 +IN 0.4x AD8475 TOP VIEW +V 3 8 –V S S (Not to Scale VOCM 4 7 NC +OUT 5 6 –OUT NC = NO CONNECT Figure 4. 10-Lead MSOP Pin Configuration Table 5. 10-Lead MSOP Pin Function Descriptions Pin No. Mnemonic Description 1 −IN 0.8x Negative Input for 0.8 Attenuation 2 −IN 0.4x Negative Input for 0.4 Attenuation 3 +V Positive Supply S 4 VOCM Output Common-Mode Adjust 5 +OUT Noninverting Output 6 −OUT Inverting Output 7 NC No Connect 8 −V Negative Supply S 9 +IN 0.4x Positive Input for 0.4 Attenuation 10 +IN 0.8x Positive Input for 0.8 Attenuation Rev. B | Page 7 of 24 09432-004 AD8475 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, VS = 5 V, gain = 0.4, RLOAD = 1 kΩ, RTO, unless otherwise specified. 1000 10 REPRESENTATIVE SAMPLES V = +5V, VOCM = +2.5V S 800 8 –4.97V, +7.75V 0V, +7.75V +4.95V, +7.75V 600 6 G = 0.8 400 4 –2.97V, +3.25V 0V, +3.25V +2.95V, +3.25V 200 G = 0.4 2 0 0 V = +3V, VOCM = +1.5V S –200 –2 –400 –4 –2.97V, –3.75V 0V, –3.75V +2.95V, –3.75V –600 –6 –800 –4.97V, –6.25V 0V, –6.25V +4.95V, –6.25V –8 –1000 –5.5 –4.5 –3.5 –2.5 –1.5 –0.5 0.5 1.5 2.5 3.5 4.5 5.5 –40 –20 0 20 40 60 80 100 120 OUTPUT VOLTAGE (V) TEMPERATURE (°C) Figure 8. Input Common-Mode Voltage vs. Output Voltage, Figure 5. System Offset vs. Temperature V = +5 V and +3 V S 5 150 V = ±5V IN REPRESENTATIVE SAMPLES REPRESENTATIVE SAMPLES 4 100 3 2 50 1 0 0 –1 –50 –2 –3 –100 –4 –150 –5 –40 –20 0 20 40 60 80 100 120 –40 –20 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) Figure 6. CMRR vs. Temperature (G = 0.8) Figure 9. Gain Error vs. Temperature, VS = ±5 V 65 130 125 60 120 55 115 110 50 105 45 100 FALL 95 40 90 RISE 35 85 30 80 –40 –20 0 20 40 60 80 100 120 –40 –20 0 20 40 60 80 100 120 TEMPERATURE (°C) TEMPERATURE (°C) Figure 7. Slew Rate vs. Temperature Figure 10. Short-Circuit Current vs. Temperature Rev. B | Page 8 of 24 SLEW RATE (V/µs) CMRR (µV/V) V (µV) OSO 09432-015 09432-005 09432-006 SHORT-CIRCUIT CURRENT (mA) GAIN ERROR (µV/V) COMMON-MODE VOLTAGE (V) 09432-100 09432-016 09432-008 AD8475 +V +V S S 0.2 0.2 0.4 0.4 0.6 0.6 0.8 0.8 1.0 1.0 –40°C –40°C +25°C +25°C +85°C +85°C +105°C +105°C +125°C +125°C 1.0 1.0 0.8 0.8 0.6 0.6 0.4 0.4 0.2 0.2 –V –V S S 100 1k 10k 100k 1M 10µA 100µA 1mA 10mA 100mA OUTPUT CURRENT (A) R (Ω) LOAD Figure 11. Output Voltage Swing vs. RLOAD vs. Temperature, Figure 14. Output Voltage Swing vs. Output Current vs. Temperature, VS = ±5 V and +5 V VS = ±5 V and +5 V 10 0.8 × V IN 9 8 V 7 OUT 6 5 4 3 2 1 0 100µs/DIV 100 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 12. Overdrive Recovery Figure 15. Maximum Output Voltage vs. Frequency 100 –20 G = 0.8 90 –30 –40 80 G = 0.4 –50 70 –60 60 –70 50 –80 40 –90 30 –100 20 100k 1M 10M 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) Figure 13. Power Supply Rejection Ratio (PSRR) vs. Frequency Figure 16. CMRR vs. Frequency Rev. B | Page 9 of 24 OUTPUT VOLTAGE SWING (V) PSRR (dB) REFERRED TO SUPPLY VOLTAGES 2V/DIV 09432-051 09432-011 09432-013 OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES CMRR (dB) MAXIMUM OUTPUT VOLTAGE ( V p-p) 09432-012 09432-216 09432-014 AD8475 0 –1.94 G = 0.8 0 –7.96 –1.94 –10 G = 0.4 G = 0.8 –7.96 G = 0.4 –20 –10 –30 –20 –40 –30 –50 1k 10k 100k 1M 10M 100M 1k 10k 100k 1M 10M 100M 1G FREQUENCY (Hz) FREQUENCY (Hz) Figure 20. Large Signal Frequency Response for All Gains, V = ±5 V S Figure 17. Small Signal Frequency Response for All Gains VS = ±5 V 0 0 V = ±5V V = ±5V S S V = +3V V = +3V S S V = +5V V = +5V S S –7.96 –10 –7.96 –10 –20 –20 –30 –40 –30 1k 10k 100k 1M 10M 100M 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) Figure 18. Small Signal Frequency Response for Various Supplies Figure 21. Large Signal Frequency Response for Various Supplies 0 0 –10 –10 –20 –20 –30 –30 –40 –40 R = 200Ω R = 200Ω L L R = 1kΩ R = 1kΩ L L R = 10kΩ R = 10kΩ L L –50 –50 100k 1M 10M 100M 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) Figure 19. Small Signal Frequency Response for Various Loads Figure 22. Large Signal Frequency Response for Various Loads Rev. B | Page 10 of 24 GAIN (dB) GAIN (dB) GAIN (dB) 09432-022 09432-018 09432-017 GAIN (dB) GAIN (dB) GAIN (dB) 09432-024 09432-020 09432-019 AD8475 0 0 C = 0pF C = 0pF L L C = 5pF C = 5pF L L C = 10pF C = 10pF L L –7.96 –10 –7.96 –10 –20 –20 –30 –40 –30 1k 10k 100k 1M 10M 100M 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) Figure 23. Small Signal Frequency Response for Various Capacitive Loads Figure 26. Large Signal Frequency Response for Various Capacitive Loads 0 0 VOCM = 1V VOCM = 1.5V VOCM = 2.5V VOCM = 2.5V VOCM = 4V VOCM = 3.5V –10 –10 –20 –20 –30 –30 –40 10k 100k 1M 10M 100M 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) Figure 24. Small Signal Frequency Response for Various VOCM Levels Figure 27. Large Signal Frequency Response for Various VOCM Levels 5 10 V = 100mV p-p V = 2V p-p OUT OUT VOCM = 2.5V VOCM = 2.5V 0 0 –5 –10 –10 –20 –30 –15 –40 –2 1k 10k 100k 1M 10M 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 25. VOCM Small Signal Frequency Response Figure 28. VOCM Large Signal Frequency Response Rev. B | Page 11 of 24 VOCM GAIN (dB) GAIN (dB) GAIN (dB) 09432-025 09432-056 09432-026 GAIN (dB) GAIN (dB) VOCM GAIN (dB) 09432-055 09432-028 09432-027 AD8475 V = 2V p-p V = 100mV p-p OUT OUT 10ns/DIV 20ns/DIV Figure 29. Small Signal Pulse Response, VS = ±2.5 V Figure 32. Large Signal Pulse Response, VS = ±2.5 V C = 0pF C = 0pF L L C = 5pF C = 5pF L L C = 10pF C = 10pF L L 10ns/DIV 20ns/DIV Figure 30. Small Signal Step Response for Various Capacitive Loads, Figure 33. Large Signal Step Response for Various Capacitive Loads VS = ±2.5 V R = 200Ω R = 200Ω L L R = 1kΩ R = 1kΩ L L R = 10kΩ R = 10kΩ L L 10ns/DIV 20ns/DIV Figure 31. Small Signal Step Response for Various Resistive Loads Figure 34. Large Signal Step Response for Various Resistive Loads Rev. B | Page 12 of 24 20mV/DIV 20mV/DIV 20mV/DIV 09432-031 09432-029 09432-030 500mV/DIV 500mV/DIV 500mV/DIV 09432-035 09432-033 09432-034 AD8475 50ns/DIV 500ns/DIV Figure 35. VOCM Small Signal Step Response, VS = ±2.5 V Figure 38. VOCM Large Signal Step Response –20 –20 V = 2V p-p HD2, G = 0.4 OUT HD3, G = 0.4 HD2, V = +5V S HD2, G = 0.8 HD3, V = +5V S –40 –40 HD3, G = 0.8 HD2, V = ±5V S HD3, V = ±5V S –60 –60 –80 –80 –100 –100 –120 –120 –140 –140 0.1 1 10 0.1 1 10 FREQUENCY (MHz) FREQUENCY (MHz) Figure 36. Harmonic Distortion vs. Frequency at Various Gains Figure 39. Harmonic Distortion vs. Frequency at Various Supplies –20 –20 V = 2V p-p OUT HD2, V = 2V p-p OUT HD3, V = 2V p-p HD2, R = 1kΩ OUT L HD2, V = 4V p-p HD3, R = 1kΩ OUT L –40 –40 HD3, V = 4V p-p HD2, R = 200Ω L OUT HD3, R = 200Ω L –60 –60 –80 –80 –100 –100 –120 –120 –140 –140 0.1 1 10 0.1 1 10 FREQUENCY (MHz) FREQUENCY (MHz) Figure 37. Harmonic Distortion vs. Frequency at Various Loads Figure 40. Harmonic Distortion vs. Frequency at Various VOUT,dm Rev. B | Page 13 of 24 HARMONIC DISTORTION (dBc) HARMONIC DISTORTION (dBc) 20mV/DIV 09432-032 09432-040 09432-043 HARMONIC DISTORTION (dBc) HARMONIC DISTORTION (dBc) 500mV/DIV 09432-036 09432-046 09432-042 AD8475 –20 –20 f = 100kHz V = 2V p-p OUT HD2, +5V SUPPLY R = 1kΩ L HD3, +5V SUPPLY R = 200Ω L –40 –40 HD2, ±5V SUPPLY HD3, ±5V SUPPLY –60 –60 –80 –80 –100 –100 –120 –120 –140 –140 09 1 2 3 4 5 6 7 8 0.1 1 10 V (V p-p) OUT FREQUENCY (MHz) Figure 44. Spurious-Free Dynamic Range vs. Frequency at Various Loads Figure 41. Harmonic Distortion vs. VOUT at Various Supplies 10 100 0 –10 10 –20 –30 –40 –50 1 –60 –70 –80 0.1 –90 –100 0.01 –110 10k 100k 1M 10M 100M 75 80 85 90 95 100 105 110 115 120 125 FREQUENCY (Hz) FREQUENCY (kHz) Figure 42. 100 kHz Intermodulation Distortion Figure 45. Output Impedance vs. Frequency 100 90 80 70 60 50 40 30 20 10 0 1s/DIV 1 10 100 1k 10k 100k FREQUENCY (Hz) Figure 43. Voltage Noise Density vs. Frequency Figure 46. 0.1 Hz to 10 Hz Voltage Noise Rev. B | Page 14 of 24 NORMALIZED SPECTRUM (dBc) HARMONIC DISTORTION (dBc) VOLTAGE NOISE (nV/ Hz) 09432-243 09432-047 09432-054 OUTPUT IMPEDANCE (Ω) SPURIOUS-FREE DYANMIC RANGE (dBc) 500nV/DIV 09432-039 09432-049 09432-052 AD8475 –30 –40 –50 –60 –70 –80 –90 –100 1M 10M 100M FREQUENCY (Hz) Figure 47. Output Balance Error vs. Frequency Rev. B | Page 15 of 24 OUTPUT BALANCE ERROR (dB) 09432-050 AD8475 TERMINOLOGY 1kΩ Common-Mode Voltage Common-mode voltage refers to the average of two node voltages with respect to the local ground reference. The output common- 1.25kΩ –OUT +IN mode voltage is defined as VOCM R V AD8475 L, dm OUT, dm V = (V + V )/2 OUT, cm +OUT −OUT –IN 1.25kΩ +OUT Balance Output balance is a measure of how close the output differential 1kΩ signals are to being equal in amplitude and opposite in phase. Figure 48. Signal and Circuit Definitions Output balance is most easily determined by placing a well- Differential Voltage matched resistor divider between the differential voltage nodes Differential voltage refers to the difference between two and comparing the magnitude of the signal at the divider midpoint node voltages. For example, the output differential voltage (or with the magnitude of the differential signal. By this definition, equivalently, output differential mode voltage) is defined as output balance is the magnitude of the output common-mode voltage divided by the magnitude of the output differential V = (V − V ) OUT, dm +OUT −OUT mode voltage. where V+OUT and V−OUT refer to the voltages at the +OUT and −OUT terminals with respect to a common ground reference. ΔV OUT , cm Output Balance Error= Similarly, the differential input voltage is defined as ΔV OUT , dm VIN, dm = (V+IN − (V−IN)) Rev. B | Page 16 of 24 09432-162 AD8475 THEORY OF OPERATION DC PRECISION OVERVIEW The dc precision of the AD8475 is highly dependent on the The AD8475 is a fully differential amplifier, with integrated laser- accuracy of its internal resistors. Using superposition to analyze trimmed resistors, that provides precision attenuating gains of the circuit shown in Figure 50, the following equation shows the 0.4 and 0.8. The internal differential amplifier of the AD8475 relationship between the input and output voltages of the differs from conventional operational amplifiers in that it has amplifier: two outputs whose voltages are equal in magnitude, but move in opposite directions (180° out of phase). An additional input, 1 V() R − R +V() 2R R + R + R IN ,cm P N P N P N IN ,dm VOCM, sets the output common-mode voltage. Like an opera- 2 tional amplifier, it relies on high open-loop gain and negative 1 = V () R − R +V () 2+ R + R OUT ,cm P N OUT,dm P N feedback to force the output nodes to the desired voltages. The 2 AD8475 is designed to greatly simplify single-ended-to-differential where, conversion, common-mode level shifting and precision attenua- RFP RFN tion of large signals so that they are compatible with low voltage, R = , R = P N RGP RGN differential input ADCs. +IN 0.8x +IN 0.4x –V NC –OUT S V = V −V IN ,dm P N 1kΩ 1 1.25kΩ V = (V +V ) 1.25kΩ IN ,cm P N 2 AD8475 The differential closed loop gain of the amplifier is 1.25kΩ 1kΩ V 1.25kΩ 2R R + R + R OUT ,dm P N P N = V 2+ R + R IN ,dm P N –IN 0.8x –IN 0.4x +V VOCM +OUT S and the common rejection of the amplifier is Figure 49. Block Diagram V 2(R − R ) OUT,dm P N CIRCUIT INFORMATION = V 2+ R + R IN ,cm P N The AD8475 amplifier uses a voltage feedback topology; RGP RFP therefore, the amplifier exhibits a nominally constant gain V P bandwidth product. Like a voltage feedback operational V ON amplifier, the AD8475 also has high input impedance at its VOCM internal input terminals (the summing nodes of the internal V OP amplifier) and low output impedance. V N RGN RFN The AD8475 employs two feedback loops, one each to control Figure 50. Functional Circuit Diagram of the AD8475 at a Given Gain the differential and common-mode output voltages. The differen- tial feedback loop, which is fixed with precision laser trimmed The preceding equations show that the gain accuracy and the on-chip resistors, controls the differential output voltage. common-mode rejection (CMRR) of the AD8475 are deter- mined primarily by the matching of the feedback networks Output Common-Mode Voltage (VOCM) (resistor ratios). If the two networks are perfectly matched, that The internal common-mode feedback controls the common- is, if RP and RN equal RF/RG, then the resistor network does not mode output voltage. This architecture makes it easy to set the generate any CMRR errors and the differential closed loop gain output common-mode level to any arbitrary value independent of the amplifier reduces to of the input voltage. The output common-mode voltage is v forced by the internal common-mode feedback loop to be equal RF OUT,dm = to the voltage applied to the VOCM input. The VOCM pin can v RG IN ,dm be left unconnected, and the output common-mode voltage The AD8475’s integrated resistors are precision wafer-laser- self-biases to midsupply by the internal feedback control. trimmed to guarantee a minimum CMRR of 86dB (50μV/V), Due to the internal common-mode feedback loop and the fully and gain error of less that 0.05%. To achieve equivalent precision differential topology of the amplifier, the AD8475 outputs are and performance using a discrete solution, resistors must be precisely balanced over a wide frequency range. This means that matched to 0.01% or better. the amplifier’s differential outputs are very close to the ideal of being identical in amplitude and exactly 180° out of phase. Rev. B | Page 17 of 24 09432-062 09432-163 AD8475 INPUT VOLTAGE RANGE DRIVING THE AD8475 The AD8475 can measure input voltages that are larger than the Care should be taken to drive the AD8475 with a low supply rails. The internal gain and feedback resistors form a impedance source: for example, another amplifier. Source divider, which reduces the input voltage seen by the internal resistance can unbalance the resistor ratios and, therefore, input nodes of the amplifier. The largest voltage that can be significantly degrade the gain accuracy and common-mode measured is constrained by the capability of the amplifier’s rejection of the AD8475. For the best performance, source internal summing nodes. This voltage is defined by the input impedance to the AD8475 input terminals should be kept voltage and the ratio between the feedback and the gain resistors. below 0.1 Ω. Refer to the DC Precision section for details on Figure 51 shows the voltage at the internal summing nodes of the critical role of resistor ratios in the precision of the AD8475. the amplifier, defined by the input voltage and internal resistor POWER SUPPLIES network. If VN is grounded, the expression shown in the figure The AD8475 operates over a wide range of supply voltages. It reduces to can be powered on a single supply as low as 3 V and as high as RG 1 RF ⎛ ⎞ 10 V. The AD8475 can also operate on dual supplies from V = V = VOCM+ V ⎜ ⎟ PLUS MINUS P RF+ RG⎝ 2 RG ⎠ ±1.5 V up to ±5 V The internal amplifier of the AD8475 has rail-to-rail inputs. To A stable dc voltage should be used to power the AD8475. Note obtain accurate measurements with minimal distortion, the that noise on the supply pins can adversely affect performance. voltage at the internal inputs of the amplifier must stay below For more information, see the PSRR performance curve in +VS − 1 V and above −VS. Figure 13. For example, with VS = 5 V in a G = 0.4 configuration, the Place a bypass capacitor of 0.1 μF between each supply pin and AD8475 can measure an input as high as ±12.5 V and maintain ground, as close as possible to each supply pin. Use a tantalum its excellent distortion performance. capacitor of 10 μF between each supply and ground. It can be farther away from the supply pins and, typically, it can be The AD8475 provides overvoltage protection for excessive input shared by other precision integrated circuits. voltages beyond the supply rails. Integrated ESD protection diodes at the inputs prevent damage to the AD8475 up to +V + 10.5 V S and −V − 16 V. S RG RF V P V ON RG 1 RF RF VOCM + V − V + V VOCM P N N RF + RG 2 RG RF + RG V OP V N RG RF Figure 51. Voltages at the Internal Op Amp Inputs of the AD8475 Rev. B | Page 18 of 24 09432-164 AD8475 APPLICATIONS INFORMATION SETTING THE OUTPUT COMMON-MODE VOLTAGE TYPICAL CONFIGURATION The VOCM pin of the AD8475 is internally biased with a The AD8475 is designed to facilitate single-ended-to-differential precision voltage divider comprising two 200 kΩ resistors between conversion, common-mode level shifting, and precision attenuation the supplies. This divider level shifts the output to midsupply. of large signals so that they are compatible with low voltage ADCs. Relying on the internal bias results in an output common-mode Figure 53 shows a typical connection diagram of the AD8475 voltage that is within 0.01% of the expected value. in a gain of 0.4. To use the AD8475 in a gain of 0.8, drive the In cases where control of the output common-mode level is ±IN 0.8x inputs with a low impedance source. desired, an external source or resistor divider with source SINGLE-ENDED TO DIFFERENTIAL CONVERSION resistance less than 100 Ω can be used to drive the VOCM pin. Many industrial systems use single-ended; however, the signals If an external voltage divider consisting of equal resistor values are frequently processed by high performance differential input is used to set VOCM to midsupply, higher values can be used ADCs for higher precision. The AD8475 performs the critical because the external resistors are placed in parallel with the function of precisely converting single-ended signals to the internal resistors. The output common-mode offset listed in the differential inputs of precision ADCs, and it does so with no Specifications section assumes that the VOCM input is driven by a need for external components. low impedance voltage source. To convert a single-ended signal to a differential signal, connect Because of the internal divider, the VOCM pin sources and sinks one input to the signal source and the other input to ground (see current, depending on the externally applied voltage and its Figure 55). Note that either input can be driven by the source associated source resistance. with the only effect being that the outputs have reversed polarity. It is also possible to connect the VOCM input to the common- The AD8475 also accepts truly differential input signals in mode level output of an ADC; however, care must be taken to precision systems with differential signal paths. ensure that the output has sufficient drive capability. The input impedance of the VOCM pin is 100 kΩ. If multiple AD8475 devices share one ADC reference output, a buffer may be neces- sary to drive the parallel inputs. –V S + 0.1µF 10µF LOW IMPEDANCE INPUT SOURCE +IN 0.8x +IN 0.4x –V NC –OUT S 1kΩ 1.25kΩ 1.25kΩ V = (V – V ) AD8475 OUT +OUT –OUT 1.25kΩ 1kΩ 1.25kΩ –IN 0.8x –IN 0.4x +V VOCM +OUT S + REF 10µF 0.1µF 0.1µF +V S Figure 52. Typical Configuration—10-Lead MSOP Rev. B | Page 19 of 24 09432-200 AD8475 –V S + 0.1µF 10µF LOW V 12 NC IN +IN 0.4x 1 IMPEDANCE 1kΩ INPUT SOURCE 1.25kΩ 1.25kΩ +IN 0.8x 2 11 –OUT V = (V – V ) AD8475 OUT +OUT –OUT 10 –IN 0.8x 1.25kΩ +OUT 3 1kΩ 1.25kΩ 9 VOCM –IN 0.4x 4 REF 0.1µF + 10µF 0.1µF +V S Figure 53. Typical Configuration—16-Lead LFCSP The ac and dc performance of the AD8475 are compatible with HIGH PERFORMANCE ADC DRIVING the 18-bit, 1 MSPS AD7982 PulSAR® ADC and other 16-bit and The AD8475 is ideally suited for broadband dc-coupled and 18-bit members of the family, which have sampling rates up to industrial applications. The circuit in Figure 55 shows an 4 MSPS. Some suitable high performance differential ADCs are industrial front-end connection for an AD8475 driving an listed in Table 6. AD7982, a 18-bit, 1 MSPS ADC, with dc coupling on the AD8475 input and output. (The AD7982 achieves its optimum Table 6. High Performance SAR ADCs performance when driven differentially.) The AD8475 performs Sample the attenuation of a 20 V p-p input signal, level shifts it, and Part Resolution Rate Description converts it to a differential signal without the need for any AD7984 18 Bits 1.33 MSPS True differential input, external components. The AD8475 eliminates the need for dual 14 mW, 2.5 V ADC supplies at the front end to accept large bipolar signals. It also AD7982 18 Bits 1 MSPS True differential Input, 7.0 mW, 2.5 V ADC eliminates the need for a precision resistor network for attenua- AD7690 18 Bits 400 kSPS True differential input, tion, and a transformer to drive the ADC and perform the single- 4.5 mW, 5 V ADC ended-to-differential conversion. AD7641 18 Bits 2 MSPS True differential input, 75 mW, 2.5 V ADC In this example, the AD8475 is powered with a single 5 V supply and used in a gain of 0.4, with a single-ended input converted to a differential output. The input is a 20 V p-p symmetric, ground-referenced bipolar signal. With an output common-mode voltage of 2.5 V, each AD8475 output swings between 0.5 V and 4.5 V, opposite in phase, providing an 8 V p-p differential signal to the ADC input. Rev. B | Page 20 of 24 09432-165 –IN 0.4x 5 16 +IN 0.4x +V 6 15 –V S S +V 7 14 –V S S +V 8 13 –V S S AD8475 The differential RC network between the AD8475 output and the ADC provides a single-pole filter that reduces undesirable aliasing effects and high frequency noise. The common-mode bandwidth of the filter is 29.5 MHz (20 Ω, 270 pF), and the differential bandwidth is 3.1 MHz (40 Ω, 1.3 nF). The VOCM input is bypassed for noise reduction, and set externally with 1% resistors to maximize output dynamic range on a single 5 V supply. Figure 54. FFT Results of the AD8475 Driving the AD7982 +4.5V +5V +2.5V 4V +10V +2.5V +1.8V TO +5V +0.5V +V S VDD VIO +IN 0.4x 0V IN– 20V 20Ω SDI NC –OUT +IN 0.8x 270pF SCK AD8475 AD7982 1.3nF –10V SDO NC 270pF –IN 0.8x +OUT 20Ω IN+ CNV VOCM REF GND –IN 0.4x –V S +4.5V +7V TO +18V +5V 2.5V 4V 10kΩ ADR435 +5V +0.5V 0.1µF 10kΩ Figure 55. Attenuation and Level Shifting of Industrial Voltages to Drive Single-Supply Precision ADC Rev. B | Page 21 of 24 09432-167 09432-168 AD8475 AD8475 EVALUATION BOARD An evaluation board for the AD8475 is available to facilitate The AD8475-EVALZ board is designed so that a user can easily standalone testing of the AD8475 performance and functionality evaluate system performance when the AD8475 is mated with for customer evaluation and system design. The board provides any Analog Devices, Inc., SAR ADC. The board can be installed the user flexibility to configure the AD8475 in the desired gain with SMB connectors that mate directly to the Pulsar® Analog- (0.4 or 0.8) and to install the suitable input and load impedances. to-Digital Converter Evaluation Kit. See the AD8475 product page for more information on the AD8475-EVALZ. +V S (GRN) C4 10µF C2 0.1µF R2 0Ω 12 NC +IN 0.4x 1 IN+ 1kΩ R1 1.25kΩ OUT– 0Ω +IN 0.8x 1.25kΩ 11 –OUT R7 2 R5 R9 J1 R3 JP1 AD8475 R12 OUT+ 10 +OUT 0Ω –IN 0.8x 3 1.25kΩ R8 J4 IN– 1kΩ R4 R10 1.25kΩ 0Ω –IN 0.4x 4 9 VOCM J5 R6 VOCM J2 VOCM C5 R11 0.1µF J3 C1 0.1µF C3 10µF +V S (RED) Figure 56. AD8475-EVALZ Schematic Rev. B | Page 22 of 24 + + 09432-065 –IN 0.4x 5 16 +IN 0.4x +V 6 15 –V S S +V 7 14 –V S S 8 13 +V –V S S AD8475 OUTLINE DIMENSIONS 3.10 0.30 3.00 SQ 0.25 2.90 PIN 1 0.20 INDICATOR 13 16 0.50 12 1 BSC EXPOSED 1.65 PAD 1.50 SQ 1.45 9 4 8 5 0.50 0.20 MIN TOP VIEW BOTTOM VIEW 0.40 0.30 0.80 FOR PROPER CONNECTION OF 0.75 THE EXPOSED PAD, REFER TO 0.05 MAX THE PIN CONFIGURATION AND 0.70 0.02 NOM FUNCTION DESCRIPTIONS COPLANARITY SECTION OF THIS DATA SHEET. SEATING 0.08 PLANE 0.20 REF COMPLIANT TO JEDEC STANDARDS MO-229. Figure 57. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] 3 mm × 3 mm Body, Very Very Thin Quad (CP-16-27) Dimensions shown in millimeters 3.10 3.00 2.90 10 6 5.15 3.10 4.90 3.00 4.65 1 2.90 5 PIN 1 IDENTIFIER 0.50 BSC 0.95 15° MAX 0.85 1.10 MAX 0.75 0.70 0.15 0.23 6° 0.55 0.30 0.05 0.13 0° 0.40 0.15 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-BA Figure 58. 10-Lead Mini Small Outline Package [MSOP] (RM-10) Dimensions shown in millimeters Rev. B | Page 23 of 24 PIN 1 INDICATOR 091709-A 091609-A AD8475 ORDERING GUIDE 1 Model Temperature Range Package Description Package Option Branding AD8475ACPZ-R7 −40°C to +85°C 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-16-27 Y3H AD8475ACPZ-RL −40°C to +85°C 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-16-27 Y3H AD8475ACPZ-WP −40°C to +85°C 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ] CP-16-27 Y3H AD8475BRMZ −40°C to +85°C 10-Lead Lead Frame Chip Scale Package [MSOP] RM-10 Y41 AD8475BRMZ-R7 −40°C to +85°C 10-Lead Lead Frame Chip Scale Package [MSOP] RM-10 Y41 AD8475BRMZ-RL −40°C to +85°C 10-Lead Lead Frame Chip Scale Package [MSOP] RM-10 Y41 AD8475ARMZ −40°C to +85°C 10-Lead Lead Frame Chip Scale Package [MSOP] RM-10 Y31 AD8475ARMZ-R7 −40°C to +85°C 10-Lead Lead Frame Chip Scale Package [MSOP] RM-10 Y31 AD8475ARMZ-RL −40°C to +85°C 10-Lead Lead Frame Chip Scale Package [MSOP] RM-10 Y31 AD8475-EVALZ Evaluation Board 1 Z = RoHS Compliant Part. ©2010–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09432-0-4/11(B) Rev. B | Page 24 of 24