ANALOG DEVICES AD8279

Low Power, Wide Supply Range, Low Cost Difference Amplifiers, G = ½, 2 AD8278/AD8279 FEATURES FUNCTIONAL BLOCK DIAGRAMS +VS Wide input range beyond supplies 7 Rugged input overvoltage protection AD8278 40kΩ 20kΩ Low supply current: 200 μA maximum (per amplifier) 2 –IN 5 SENSE Low power dissipation: 0.5 mW at V = 2.5 V S Bandwidth: 1 MHz (G = ½) 6 OUT CMRR: 80 dB minimum, dc to 20 kHz (G = ½, B Grade) Low offset voltage drift: ±1 μV/°C maximum (B Grade) 40kΩ 20kΩ Low gain drift: 1 ppm/°C maximum (B Grade) 3 1 +IN REF Enhanced slew rate: 1.4 V/μs 4 Wide power supply range –VS Single supply: 2 V to 36 V Figure 1. AD8278 Dual supplies: ±2 V to ±18 V +VS 8-lead SOIC, 14-lead SOIC, and 8-lead MSOP packages 11 AD8279 APPLICATIONS 40kΩ 20kΩ 2 –INA 12 SENSEA Voltage measurement and monitoring Current measurement and monitoring 13 OUTA Instrumentation amplifier building block 3 14 +INA REFA Portable, battery-powered equipment 40kΩ 20kΩ 40kΩ 20kΩ Test and measurement 6 –INB 10 SENSEB GENERAL DESCRIPTION 9 OUTB The AD8278 and AD8279 are general-purpose difference 5 8 +INB REFB amplifiers intended for precision signal conditioning in power 40kΩ 20kΩ critical applications that require both high performance and low 4 –VS power. The AD8278 and AD8279 provide exceptional common- Figure 2. AD8279 mode rejection ratio (80 dB) and high bandwidth while amplifying input signals that are well beyond the supply rails. The on-chip Table 1. Difference Amplifiers by Category resistors are laser trimmed for excellent gain accuracy and high Low CMRR. They also have extremely low gain drift vs. temperature. 1 Distortion High Voltage Current Sensing Low Power The common-mode range of the amplifier extends to almost AD8270 AD628 AD8202 (U) AD8276 triple the supply voltage (for G = ½), making the amplifer ideal AD8271 AD629 AD8203 (U) AD8277 for single-supply applications that require a high common- AD8273 AD8205 (B) mode voltage range. The internal resistors and ESD circuitry at AD8274 AD8206 (B) the inputs also provide overvoltage protection to the op amp. AMP03 AD8216 (B) The AD8278 and AD8279 can be used as difference amplifiers with 1 U = unidirectional, B = bidirectional. G = ½ or G = 2. They can also be connected in a high precision, The AD8278 is available in the space-saving 8-lead MSOP and single-ended configuration for non inverting and inverting gains of SOIC packages, and the AD8279 is offered in a 14-lead SOIC −½, −2, +3, +2, +1½, +1, or +½. The AD8278 and AD8279 package. Both are specified for performance over the industrial provide an integrated precision solution that has a smaller size, temperature range of −40°C to +85°C and are fully RoHS lower cost, and better performance than a discrete alternative. compliant. The AD8278 and AD8279 operate on single supplies (2.0 V to 36 V) or dual supplies (±2 V to ±18 V). The maximum quiescent supply current is 200 μA, which is ideal for battery-operated and portable systems. For unity-gain difference amplifiers with similar performance, refer to the AD8276 and AD8277 data sheets. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ©2009–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 08308-001 08308-058 AD8278/AD8279 TABLE OF CONTENTS Features .............................................................................................. 1  Typical Performance Characteristics ..............................................9  Applications....................................................................................... 1  Theory of Operation ...................................................................... 16  General Description ......................................................................... 1  Circuit Information.................................................................... 16  Functional Block Diagrams............................................................. 1  Driving the AD8278 and AD8279 ........................................... 16  Revision History ............................................................................... 2  Input Voltage Range................................................................... 16  Specifications..................................................................................... 3  Power Supplies............................................................................ 17  Absolute Maximum Ratings............................................................ 7  Applications Information .............................................................. 18  Thermal Resistance ...................................................................... 7  Configurations............................................................................ 18  Maximum Power Dissipation ..................................................... 7  Differential Output .................................................................... 19  Short-Circuit Current .................................................................. 7  Instrumentation Amplifier........................................................ 19  ESD Caution.................................................................................. 7  Outline Dimensions....................................................................... 20  Pin Configurations and Function Descriptions ........................... 8  Ordering Guide .......................................................................... 21  REVISION HISTORY 1/11—Rev. B to Rev. C Change to Table 3 ..............................................................................4 Change to Impedance/Differential Parameter, Table 3 ............... 4 Change to Table 4 ..............................................................................5 Change to Impedance/Differential Parameter, Table 5 ............... 6 Change to Table 5 ..............................................................................6 Added Figure 6 and Table 9 .............................................................8 4/10—Rev. A to Rev. B Changes to Figure 31 and Figure 32............................................. 13 Changes to Figure 40, Figure 41, and Figure 42 ......................... 14 Changed Supply Current Parameters to AD8278 Supply Current Parameter and AD8279 Supply Current Parameter, Table 5 ...... 6 Added Figure 47; Renumbered Sequentially .............................. 15 Updated Outline Dimensions ....................................................... 20 Changes to Figure 51 to Figure 57................................................ 18 Added Differential Output Section.............................................. 19 10/09—Rev. 0 to Rev. A Changes to Figure 59...................................................................... 19 Added AD8279 and 14-Lead SOIC Model .....................Universal Updated Outline Dimensions....................................................... 21 Changes to Features.......................................................................... 1 Changes to Ordering Guide .......................................................... 21 Changes to General Description .................................................... 1 Change to Table 2 ............................................................................. 3 7/09—Revision 0: Initial Version Rev. C | Page 2 of 24 AD8278/AD8279 SPECIFICATIONS VS = ±5 V to ±15 V, VREF = 0 V, TA = 25°C, RL = 10 kΩ connected to ground, G = ½ difference amplifier configuration, unless otherwise noted. Table 2. G = ½ Grade B Grade A Parameter Conditions Min Typ Max Min Typ Max Unit INPUT CHARACTERISTICS 1 System Offset 50 100 50 250 μV Over Temperature TA = −40°C to +85°C 100 250 μV vs. Power Supply V = ±5 V to ±18 V 2.5 5 μV/V S Average Temperature = −40°C to +85°C 0.3 1 2 5 μV/°C Coefficient TA Common-Mode Rejection V = ±15 V, V = ±27 V, S CM Ratio (RTI) RS = 0 Ω 80 74 dB 2 Input Voltage Range −3 (V + 0.1) +3 (V − 1.5) −3 (V + 0.1) +3 (V − 1.5) V S S S S 3 Impedance Differential 120 120 kΩ Common Mode 30 30 kΩ DYNAMIC PERFORMANCE Bandwidth 1 1 MHz Slew Rate 1.1 1.4 1.1 1.4 V/μs Channel Separation f = 1 kHz 130 130 dB Settling Time to 0.01% 10 V step on output, C = 100 pF 9 9 μs L Settling Time to 0.001% 10 10 μs GAIN Gain Error 0.005 0.02 0.01 0.05 % Gain Drift T = −40°C to +85°C 1 5 ppm/°C A Gain Nonlinearity VOUT = 20 V p-p 7 12 ppm OUTPUT CHARACTERISTICS 4 Output Voltage Swing VS = ±15 V, RL = 10 kΩ T = −40°C to +85°C −V + 0.2 +V − 0.2 −V + 0.2 +V − 0.2 V A S S S S Short-Circuit Current Limit ±15 ±15 mA Capacitive Load Drive 200 200 pF 5 NOISE Output Voltage Noise f = 0.1 Hz to 10 Hz 1.4 1.4 μV p-p f = 1 kHz 47 50 47 50 nV/√Hz 6 POWER SUPPLY AD8278 Supply Current 200 200 μA Over Temperature T = −40°C to +85°C 250 250 μA A AD8279 Supply Current 300 350 300 350 μA Over Temperature T = −40°C to +85°C 400 400 μA A 7 Operating Voltage Range ±2 ±18 ±2 ±18 V TEMPERATURE RANGE Operating Range −40 +125 −40 +125 °C 1 Includes input bias and offset current errors, RTO (referred to output). 2 The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the Input Voltage Range for details. 3 Internal resistors are trimmed to be ratio matched and have ±20% absolute accuracy. 4 Output voltage swing varies with supply voltage and temperature. See Figure 22 through Figure 25 for details. 5 Includes amplifier voltage and current noise, as well as noise from internal resistors. 6 Supply current varies with supply voltage and temperature. See Figure 26 and Figure 28 for details. 7 Unbalanced dual supplies can be used, such as −V = −0.5 V and +V = +2 V. The positive supply rail must be at least 2 V above the negative supply and reference S S voltage. Rev. C | Page 3 of 24 AD8278/AD8279 V = ±5 V to ±15 V, V = 0 V, T = 25°C, R = 10 kΩ connected to ground, G = 2 difference amplifier configuration, unless S REF A L otherwise noted. Table 3. G = 2 Grade B Grade A Parameter Conditions Unit Min Typ Max Min Typ Max INPUT CHARACTERISTICS 1 System Offset 100 200 100 500 μV Over Temperature T = −40°C to +85°C 200 500 μV A vs. Power Supply VS = ±5 V to ±18 V 5 10 μV/V Average Temperature Coefficient T = −40°C to +85°C 0.6 2 2 5 μV/°C A Common-Mode VS = ±15 V, VCM = ±27 V, Rejection Ratio (RTI) R = 0 Ω 86 80 dB S 2 Input Voltage Range −1.5 (VS + 0.1) +1.5 (VS − 1.5) −1.5 (VS + 0.1) +1.5 (VS − 1.5) V 3 Impedance Differential 30 30 kΩ Common Mode 30 30 kΩ DYNAMIC PERFORMANCE Bandwidth 550 550 kHz Slew Rate 1.1 1.4 1.1 1.4 V/μs Channel Separation f = 1 kHz 130 130 dB Settling Time to 0.01% 10 V step on output, CL = 100 pF 10 10 μs Settling Time to 0.001% 11 11 μs GAIN Gain Error 0.005 0.02 0.01 0.05 % Gain Drift TA = −40°C to +85°C 1 5 ppm/°C Gain Nonlinearity VOUT = 20 V p-p 7 12 ppm OUTPUT CHARACTERISTICS 4 Output Voltage Swing V = ±15 V, R = 10 kΩ, S L TA = −40°C to +85°C −VS + 0.2 +VS − 0.2 −VS + 0.2 +VS − 0.2 V Short-Circuit Current Limit ±15 ±15 mA Capacitive Load Drive 350 350 pF 5 NOISE Output Voltage Noise f = 0.1 Hz to 10 Hz 2.8 2.8 μV p-p f = 1 kHz 90 95 90 95 nV/√Hz 6 POWER SUPPLY AD8278 Supply Current 200 200 μA Over Temperature T = −40°C to +85°C 250 250 μA A AD8279 Supply Current 300 350 300 350 μA Over Temperature TA = −40°C to +85°C 400 400 μA 7 ±2 ±18 ±2 ±18 V Operating Voltage Range TEMPERATURE RANGE Operating Range −40 +125 −40 +125 °C 1 Includes input bias and offset current errors, RTO (referred to output). 2 The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the Input Voltage Range section for details. 3 Internal resistors are trimmed to be ratio matched and have ±20% absolute accuracy. 4 Output voltage swing varies with supply voltage and temperature. See Figure 22 through Figure 25 for details. 5 Includes amplifier voltage and current noise, as well as noise from internal resistors. 6 Supply current varies with supply voltage and temperature. See Figure 26 and Figure 28 for details. 7 Unbalanced dual supplies can be used, such as −V = −0.5 V and +V = +2 V. The positive supply rail must be at least 2 V above the negative supply and reference S S voltage. Rev. C | Page 4 of 24 AD8278/AD8279 V = +2.7 V to <±5 V, V = midsupply, T = 25°C, R = 10 kΩ connected to midsupply, G = ½ difference amplifier configuration, unless S REF A L otherwise noted. Table 4. G = ½ Grade B Grade A Parameter Conditions Unit Min Typ Max Min Typ Max INPUT CHARACTERISTICS 1 System Offset 75 150 75 250 μV Over Temperature T = −40°C to +85°C 150 250 μV A vs. Power Supply VS = ±5 V to ±18 V 2.5 5 μV/V Average Temperature Coefficient T = −40°C to +85°C 0.3 1 2 5 μV/°C A Common-Mode Rejection VS = 2.7 V, VCM = 0 V to Ratio (RTI) 2.4 V, R = 0 Ω 80 74 dB S VS = ±5 V, VCM = −10 V to +7 V, RS = 0 Ω 80 74 dB 2 Input Voltage Range −3 (V + 0.1) +3 (V − 1.5) −3 (V + 0.1) +3 (V − 1.5) V S S S S 3 Impedance Differential 120 120 kΩ Common Mode 30 30 kΩ DYNAMIC PERFORMANCE Bandwidth 870 870 kHz Slew Rate 1.3 1.3 V/μs Channel Separation f = 1 kHz 130 130 dB Settling Time to 0.01% 2 V step on output, C = 100 pF, V = 2.7 V 7 7 μs L S GAIN Gain Error 0.005 0.02 0.01 0.05 % Gain Drift TA = −40°C to +85°C 1 5 ppm/°C OUTPUT CHARACTERISTICS 4 Output Swing R = 10 kΩ, L TA = −40°C to +85°C −VS + 0.1 +VS − 0.15 −VS + 0.1 +VS − 0.15 V Short-Circuit Current Limit ±10 ±10 mA Capacitive Load Drive 200 200 pF 5 NOISE Output Voltage Noise f = 0.1 Hz to 10 Hz 1.4 1.4 μV p-p f = 1 kHz 47 50 47 50 nV/√Hz 6 POWER SUPPLY AD8278 Supply Current T = −40°C to +85°C 200 200 μA A AD8279 Supply Current TA = −40°C to +85°C 375 375 μA Operating Voltage Range 2.0 36 2.0 36 V TEMPERATURE RANGE Operating Range −40 +125 −40 +125 °C 1 Includes input bias and offset current errors, RTO (referred to output). 2 The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the Input Voltage Range section for details. 3 Internal resistors are trimmed to be ratio matched and have ±20% absolute accuracy. 4 Output voltage swing varies with supply voltage and temperature. See Figure 22 through Figure 25 for details. 5 Includes amplifier voltage and current noise, as well as noise from internal resistors. 6 Supply current varies with supply voltage and temperature. See Figure 27 and Figure 28 for details. Rev. C | Page 5 of 24 AD8278/AD8279 V = +2.7 V to <±5 V, V = midsupply, T = 25°C, R = 10 kΩ connected to midsupply, G = 2 difference amplifier configuration, unless S REF A L otherwise noted. Table 5. G = 2 Grade B Grade A Parameter Conditions Unit Min Typ Max Min Typ Max INPUT CHARACTERISTICS 1 System Offset 150 300 150 500 μV Over Temperature T = −40°C to +85°C 300 500 μV A vs. Power Supply VS = ±5 V to ±18 V 5 10 μV/V Average Temperature Coefficient TA = −40°C to +85°C 0.6 2 3 5 μV/°C Common-Mode Rejection V = 2.7 V, V = 0 V S CM Ratio (RTI) to 2.4 V, RS = 0 Ω 86 80 dB V = ±5 V, V = −10 V S CM to +7 V, RS = 0 Ω 86 80 dB 2 Input Voltage Range −1.5 (VS + 0.1) +1.5 (VS − 1.5) −1.5 (VS + 0.1) +1.5 (VS − 1.5) V 3 Impedance Differential 30 30 kΩ Common Mode 30 30 kΩ DYNAMIC PERFORMANCE Bandwidth 450 450 kHz Slew Rate 1.3 1.3 V/μs Channel Separation f = 1 kHz 130 130 dB Settling Time to 0.01% 2 V step on output, CL = 100 pF, VS = 2.7 V 9 9 μs GAIN Gain Error 0.005 0.02 0.01 0.05 % Gain Drift TA = −40°C to +85°C 1 5 ppm/°C OUTPUT CHARACTERISTICS 4 Output Swing RL = 10 kΩ, T = −40°C to +85°C −V + 0.1 +V − 0.15 −V + 0.1 +V − 0.15 V A S S S S Short-Circuit Current Limit ±10 ±10 mA Capacitive Load Drive 200 200 pF 5 NOISE Output Voltage Noise f = 0.1 Hz to 10 Hz 2.8 2.8 μV p-p f = 1 kHz 94 100 94 100 nV/√Hz 6 POWER SUPPLY AD8278 Supply Current TA = −40°C to +85°C 200 200 μA AD8279 Supply Current T = −40°C to +85°C 375 375 μA A Operating Voltage Range 2.0 36 2.0 36 V TEMPERATURE RANGE Operating Range −40 +125 −40 +125 °C 1 Includes input bias and offset current errors, RTO (referred to output). 2 The input voltage range may also be limited by absolute maximum input voltage or by the output swing. See the Input Voltage Range section for details. 3 Internal resistors are trimmed to be ratio matched and have ±20% absolute accuracy. 4 Output voltage swing varies with supply voltage and temperature. See Figure 22 through Figure 25 for details. 5 Includes amplifier voltage and current noise, as well as noise from internal resistors. 6 Supply current varies with supply voltage and temperature. See Figure 27 and Figure 28 for details. Rev. C | Page 6 of 24 AD8278/AD8279 ABSOLUTE MAXIMUM RATINGS 2.0 Table 6. T MAX = 150°C J Parameter Rating 1.6 Supply Voltage ±18 V Maximum Voltage at Any Input Pin −V + 40 V S SOIC 1.2 θ = 121°C/W JA Minimum Voltage at Any Input Pin +V − 40 V S Storage Temperature Range −65°C to +150°C MSOP θ = 135°C/W JA Specified Temperature Range −40°C to +85°C 0.8 Package Glass Transition Temperature (TG) 150°C Stresses above those listed under Absolute Maximum Ratings 0.4 may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any 0 –50 –25 0 255075 100 125 other conditions above those indicated in the operational AMBIENT TEMERATURE (°C) section of this specification is not implied. Exposure to absolute Figure 3. Maximum Power Dissipation vs. Ambient Temperature maximum rating conditions for extended periods may affect device reliability. SHORT-CIRCUIT CURRENT THERMAL RESISTANCE The AD8278 and AD8279 have built-in, short-circuit protection that limits the output current (see Figure 29 for more information). The θ values in Table 7 assume a 4-layer JEDEC standard JA While the short-circuit condition itself does not damage the board with zero airflow. part, the heat generated by the condition can cause the part to Table 7. Thermal Resistance exceed its maximum junction temperature, with corresponding Package Type θ Unit negative effects on reliability. Figure 3 and Figure 29, combined JA with knowledge of the supply voltages and ambient temperature of 8-Lead MSOP 135 °C/W 8-Lead SOIC 121 °C/W the part, can be used to determine whether a short circuit will 14-Lead SOIC 105 °C/W cause the part to exceed its maximum junction temperature. MAXIMUM POWER DISSIPATION ESD CAUTION The maximum safe power dissipation for the AD8278 and AD8279 are limited by the associated rise in junction tempera- ture (TJ) on the die. At approximately 150°C, which is the glass transition temperature, the properties of the plastic change. Even temporarily exceeding this temperature limit may change the stresses that the package exerts on the die, permanently shifting the parametric performance of the amplifiers. Exceeding a temperature of 150°C for an extended period may result in a loss of functionality. Rev. C | Page 7 of 24 MAXIMUM POWER DISSIPATION (W) 08308-002 AD8278/AD8279 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS REF 1 8 NC REF 1 8 NC AD8278 AD8278 –IN 2 7 +VS 2 7 –IN +VS TOP VIEW TOP VIEW +IN 3 6 OUT +IN 3 6 OUT (Not to Scale) (Not to Scale) –VS 4 5 SENSE –VS 4 5 SENSE NC = NO CONNECT NC = NO CONNECT Figure 4. MSOP Pin Configuration Figure 5. SOIC Pin Configuration Table 8. AD8278 Pin Function Descriptions Pin No. Mnemonic Description 1 REF Reference Voltage Input. 2 −IN Inverting Input. 3 +IN Noninverting Input. 4 −VS Negative Supply. 5 SENSE Sense Terminal. 6 OUT Output. 7 +VS Positive Supply. 8 NC No Connect. NC 1 14 REFA –INA 2 13 OUTA +INA 3 12 SENSEA AD8279 –VS 4 11 +VS TOP VIEW +INB 5 10 SENSEB (Not to Scale) –INB 6 9 OUTB NC 7 8 REFB NC = NO CONNECT Figure 6. 14-Lead SOIC Pin Configuration Table 9. AD8279 Pin Function Descriptions Pin No. Mnemonic Description 1 NC No Connect. 2 −INA Channel A Inverting Input. 3 +INA Channel A Noninverting Input. 4 −VS Negative Supply. 5 +INB Channel B Noninverting Input. 6 −INB Channel B Inverting Input. 7 NC No Connect. 8 REFB Channel B Reference Voltage Input. 9 OUTB Channel B Output. 10 SENSEB Channel B Sense Terminal. 11 +VS Positive Supply. 12 SENSEA Channel A Sense Terminal. 13 OUTA Channel A Output. 14 REFA Channel A Reference Voltage Input. Rev. C | Page 8 of 24 08308-003 08308-059 08308-004 AD8278/AD8279 TYPICAL PERFORMANCE CHARACTERISTICS VS = ±15 V, TA = 25°C, RL = 10 kΩ connected to ground, G = ½ difference amplifier configuration, unless otherwise noted. 600 80 N = 3840 MEAN = –16.8 60 SD = 41.7673 500 40 400 20 0 300 –20 200 –40 –60 100 –80 REPRESENTATIVE DATA 0 –100 –150 –100 –50 0 50 100 150 –50 –35 –20 –5 10 25 40 55 70 85 SYSTEM OFFSET VOLTAGE (µV) TEMPERATURE (°C) Figure 7. Distribution of Typical System Offset Voltage, G = 2 Figure 10. System Offset vs. Temperature, Normalized at 25°, G = ½ 800 20 N = 3837 MEAN = 7.78 15 SD = 13.569 700 10 600 5 500 0 400 –5 –10 300 –15 200 –20 100 –25 REPRESENTATIVE DATA 0 –30 –60 –40 –20 0 20 40 60 –50 –35 –20 –5 10 25 40 55 70 85 CMRR (µV/V) TEMPERATURE (°C) Figure 8. Distribution of Typical Common-Mode Rejection, G = 2 Figure 11. Gain Error vs. Temperature, Normalized at 25°C, G = ½ 10 30 5 20 V = ±15V S 0 10 –5 0 V = ±5V S –10 –10 –15 –20 REPRESENTATIVE DATA –20 –30 –50 –35 –20 –51025 40 557085 –20 –15 –10 –5 0 5 10 15 20 TEMPERATURE (°C) OUTPUT VOLTAGE (V) Figure 9. CMRR vs. Temperature, Normalized at 25°C, G = ½ Figure 12. Input Common-Mode Voltage vs. Output Voltage, ±15 V and ±5 V Supplies, G = ½ Rev. C | Page 9 of 24 CMRR (µV/V) NUMBER OF HITS NUMBER OF HITS 08308-007 08308-006 08308-005 COMMON-MODE VOLTAGE (V) GAIN ERROR (µV/V) SYSTEM OFFSET (µV) 08308-010 08308-009 08308-008 AD8278/AD8279 10 5 V = MIDSUPPLY V = MIDSUPPLY V = 5V REF REF S 8 4 V = 5V S 6 3 4 2 2 0 1 V = 2.7V S –2 0 V = 2.7V S –4 –1 –6 –2 –8 –10 –3 –0.5 0.5 1.5 2.5 3.5 4.5 5.5 –0.5 0.5 1.5 2.5 3.5 4.5 5.5 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) Figure 13. Input Common-Mode Voltage vs. Output Voltage, Figure 16. Input Common-Mode Voltage vs. Output Voltage, 5 V and 2.7 V Supplies, VREF = Midsupply, G = ½ 5 V and 2.7 V Supplies, VREF = Midsupply, G = 2 12 6 V = 0V V = 0V REF REF 10 V = 5V 5 S V = 5V S 8 4 6 3 4 2 2 1 V = 2.7V 0 S V = 2.7V S 0 –2 –1 –4 –6 –2 –0.5 0.5 1.5 2.5 3.5 4.5 5.5 –0.5 0.5 1.5 2.5 3.5 4.5 5.5 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) Figure 14. Input Common-Mode Voltage vs. Output Voltage, Figure 17. Input Common-Mode Voltage vs. Output Voltage, 5 V and 2.7 V Supplies, VREF = 0 V, G = ½ 5 V and 2.7 V Supplies, VREF = 0 V, G = 2 30 18 V = ±15V 12 S 20 GAIN = 2 6 10 0 GAIN = ½ –6 0 V = ±5V S –12 –10 –18 –24 –20 –30 –30 –36 –20 –15 –10 –5 051 105 20 100 1k 10k 100k 1M 10M OUTPUT VOLTAGE (V) FREQUENCY (Hz) Figure 15. Input Common-Mode Voltage vs. Output Voltage, Figure 18. Gain vs. Frequency, ±15 V Supplies ±15 V and ±5 V Supplies, G = 2 Rev. C | Page 10 of 24 COMMON-MODE VOLTAGE (V) COMMON-MODE VOLTAGE (V) COMMON-MODE VOLTAGE (V) 08308-013 08308-012 08308-011 GAIN (dB) COMMON-MODE VOLTAGE (V) COMMON-MODE VOLTAGE (V) 08308-015 08308-014 08308-016 AD8278/AD8279 18 +V S –0.1 12 GAIN = 2 –0.2 6 –0.3 0 –0.4 GAIN = ½ –6 T = –40°C A T = +25°C A –12 T = +85°C A T = +125°C +0.4 A –18 +0.3 –24 +0.2 –30 +0.1 –36 –V S 100 1k 10k 100k 1M 10M 21 4 6 8 10 12 14 168 FREQUENCY (Hz) SUPPLY VOLTAGE (±V ) S Figure 19. Gain vs. Frequency, +2.7 V Single Supply Figure 22. Output Voltage Swing vs. Supply Voltage and Temperature, R = 10 kΩ L 120 +V S GAIN = 2 –0.2 –0.4 100 –0.6 GAIN = ½ –0.8 80 –1.0 T = –40°C A –1.2 T = +25°C A 60 T = +85°C A T = +125°C A +1.2 40 +1.0 +0.8 +0.6 20 +0.4 +0.2 0 –V S 11 10 100 1k 10k 100kM 21 4 6 8 10 12 14 168 FREQUENCY (Hz) SUPPLY VOLTAGE (±V ) S Figure 23. Output Voltage Swing vs. Supply Voltage and Temperature, Figure 20. CMRR vs. Frequency R = 2 kΩ L +V 120 S 100 –4 –PSRR –8 80 T = –40°C A T = +25°C A 60 T = +85°C A +PSRR T = +125°C A +8 40 20 +4 0 –V S 11 10 100 1k 10k 100kM 1k 10k 100k LOAD RESISTANCE (Ω) FREQUENCY (Hz) Figure 21. PSRR vs. Frequency Figure 24. Output Voltage Swing vs. R and Temperature, V = ±15 V L S Rev. C | Page 11 of 24 GAIN (dB) PSRR (dB) CMRR (dB) 08308-019 08308-018 08308-017 OUTPUT VOLTAGE SWING (V) OUTPUT VOLTAGE SWING (V) OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES REFERRED TO SUPPLY VOLTAGES REFERRED TO SUPPLY VOLTAGES 08308-021 08308-020 08308-022 AD8278/AD8279 +V 250 S V = MIDSUPPLY REF –0.5 200 –1.0 –1.5 –2.0 150 T = –40°C A V = ±15V S T = +25°C A T = +85°C A T = +125°C A +2.0 100 V = +2.7V S +1.5 50 +1.0 +0.5 –V 0 S 01 1 2 3 4 5 6 7 8 90 –50 –30 –10 10 30 50 70 90 110 130 OUTPUT CURRENT (mA) TEMPERATURE (°C) Figure 25. Output Voltage Swing vs. IOUT and Temperature, VS = ±15 V Figure 28. Supply Current per Channel vs. Temperature 180 30 25 170 20 15 160 I SHORT+ 10 150 5 0 140 –5 –10 I 130 SHORT– –15 120 –20 01 2 4 6 8 10 12 14 168 –50 –30 –10 10 30 50 70 90 110 130 SUPPLY VOLTAGE (±V) TEMPERATURE (°C) Figure 26. Supply Current per Channel vs. Dual-Supply Voltage, VIN = 0 V Figure 29. Short-Circuit Current per Channel vs. Temperature 180 2.0 –SLEW RATE 1.8 170 1.6 1.4 160 +SLEW RATE 1.2 150 1.0 0.8 140 0.6 0.4 130 0.2 0 120 04 5 10 15 20 25 30 350 –50 –30 –10 10 30 50 70 90 110 130 SUPPLY VOLTAGE (V) TEMPERATURE (°C) Figure 27. Supply Current per Channel vs. Single-Supply Voltage, V = 0 V, Figure 30. Slew Rate vs. Temperature, V = 20 V p-p, 1 kHz IN IN V = 0 V REF Rev. C | Page 12 of 24 OUTPUT VOLTAGE SWING (V) SUPPLY CURRENT (µA) SUPPLY CURRENT (µA) REFERRED TO SUPPLY VOLTAGES 08308-025 08308-024 08308-023 SHORT-CIRCUIT CURRENT (mA) SUPPLY CURRENT (µA) SLEW RATE (V/µs) 08308-028 08308-027 08308-026 AD8278/AD8279 10 8 6 4 1V/DIV 2 3.64µs TO 0.01% 0 4.12µs TO 0.001% –2 0.002%/DIV –4 –6 –8 4µs/DIV –10 TIME (µs) –5 –4 –3 –2 –1 0 1 2 3 4 5 OUTPUT VOLTAGE (V) Figure 31. Gain Nonlinearity, VS = ±15 V, RL ≥ 2 kΩ, G = ½ Figure 34. Large Signal Pulse Response and Settling Time, 2 V Step, VS = 2.7 V, G = ½ 20 16 12 8 5V/DIV 4 7.6µs TO 0.01% 9.68µs TO 0.001% 0 –4 0.002%/DIV –8 –12 –16 40µs/DIV –20 TIME (µs) –5 –4 –3 –2 –1 0 1 2 3 4 5 OUTPUT VOLTAGE (V) Figure 35. Large Signal Pulse Response and Settling Time, 10 V Step, Figure 32. Gain Nonlinearity, VS = ±15 V, RL ≥ 2 kΩ, G = 2 V = ±15 V, G = 2 S 5V/DIV 1V/DIV 4.34µs TO 0.01% 6.24µs TO 0.01% 5.12µs TO 0.001% 7.92µs TO 0.001% 0.002%/DIV 0.002%/DIV 40µs/DIV 4µs/DIV TIME (µs) TIME (µs) Figure 33. Large Signal Pulse Response and Settling Time, 10 V Step, Figure 36. Large Signal Pulse Response and Settling Time, 2 V Step, V = ±15 V, G = ½ VS = 2.7 V S Rev. C | Page 13 of 24 NONLINEARITY (2ppm/DIV) NONLINEARITY (2ppm/DIV) 08308-031 08308-030 08308-029 08308-034 08308-033 08308-032 AD8278/AD8279 5.0 V = 5V S 4.5 4.0 3.5 3.0 V = 2.7V S 2.5 2.0 1.5 1.0 0.5 0 10µs/DIV 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 37. Large Signal Step Response, G = ½ Figure 40. Maximum Output Voltage vs. Frequency, VS = 5 V, 2.7 V NO LOAD C = 100pF L C = 147pF L C = 247pF L 10µs/DIV 40µs/DIV Figure 38. Large Signal Step Response, G = 2 Figure 41. Small Signal Step Response for Various Capacitive Loads, G = ½ 30 V = ±15V S 25 20 15 V = ±5V S 10 C = 100pF L C = 200pF L 5 C = 247pF L C = 347pF L 0 40µs/DIV 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 39. Maximum Output Voltage vs. Frequency, VS = ±15 V, ±5 V Figure 42. Small Signal Step Response for Various Capacitive Loads, G = 2 Rev. C | Page 14 of 24 OUTPUT VOLTAGE (V p-p) 5V/DIV 2V/DIV 08308-036 08308-035 08308-037 OUTPUT VOLTAGE (V p-p) 20mV/DIV 20mV/DIV 08308-040 08308-039 08308-038 AD8278/AD8279 50 GAIN = 2 45 40 ±2V 35 ±5V 30 25 ±15V 20 GAIN = ½ ±18V 15 10 5 0 1s/DIV 02 50 100 150 20050 CAPACITIVE LOAD (pF) Figure 46. 0.1 Hz to 10 Hz Voltage Noise Figure 43. Small Signal Overshoot vs. Capacitive Load, RL ≥ 2 kΩ, G = ½ 160 35 140 2kΩ LOAD 30 120 25 100 ±2V 20 80 15 ±5V 60 ±15V 10 40 ±18V 5 20 0 0 10 100 1k 10k 100k 03 50 100 150 200 250 30050 FREQUENCY (Hz) CAPACITIVE LOAD (pF) Figure 44. Small Signal Overshoot vs. Capacitive Load, R ≥ 2 kΩ, G = 2 Figure 47. Channel Separation L 1k GAIN = 2 100 GAIN = ½ 10 0.1 1 10 100 1k 10k 100k FREQUENCY (Hz) Figure 45. Voltage Noise Density vs. Frequency Rev. C | Page 15 of 24 NOISE (nV/ Hz) OVERSHOOT (%) OVERSHOOT (%) 08308-043 08308-042 08308-041 CHANNEL SEPARATION (dB) 1µV/DIV 08308-044 08308-060 AD8278/AD8279 THEORY OF OPERATION AC Performance CIRCUIT INFORMATION Component sizes and trace lengths are much smaller in an IC Each channel of the AD8278 and AD8279 consists of a low power, than on a PCB; therefore, the corresponding parasitic elements low noise op amp and four laser-trimmed on-chip resistors. are also smaller. This results in better ac performance of the These resistors can be externally connected to make a variety AD8278 and AD8279. For example, the positive and negative of amplifier configurations, including difference, noninverting, input terminals of the AD8278 and AD8279 op amps are and inverting configurations. Taking advantage of the integrated intentionally not pinned out. By not connecting these nodes resistors of the AD8278 and AD8279 provides the designer with to the traces on the PCB, their capacitance remains low and several benefits over a discrete design, including smaller size, balanced, resulting in improved loop stability and excellent lower cost, and better ac and dc performance. common-mode rejection over frequency. +VS 7 DRIVING THE AD8278 AND AD8279 AD8278 40kΩ 20kΩ Care should be taken to drive the AD8278 and AD8279 with a 2 –IN 5 SENSE low impedance source, for example, another amplifier. Source resistance of even a few kilohms (kΩ) can unbalance the resistor 6 OUT ratios and, therefore, significantly degrade the gain accuracy and common-mode rejection of the AD8278 and AD8279. Because all 40kΩ 20kΩ 3 1 +IN REF configurations present several kilohms (kΩ) of input resistance, the AD8278 and AD8279 do not require a high current drive 4 from the source and are easy to drive. –VS Figure 48. Functional Block Diagram INPUT VOLTAGE RANGE DC Performance The AD8278 and AD8279 are able to measure input voltages beyond the supply rails. The internal resistors divide down Much of the dc performance of op amp circuits depends on the the voltage before it reaches the internal op amp and provide accuracy of the surrounding resistors. Using superposition to protection to the op amp inputs. Figure 49 shows an example analyze a typical difference amplifier circuit, as is shown in of how the voltage division works in a difference amplifier Figure 49, the output voltage is found to be configuration. For the AD8278 and AD8279 to measure correctly, ⎛ ⎞ R2 R4 R4 ⎛ ⎞ ⎛ ⎞ the input voltages at the input nodes of the internal op amp ⎜ ⎟ V = V 1 + − V ⎜ ⎟ ⎜ ⎟ OUT IN+ IN− ⎜ ⎟ R1+ R2 ⎝ R3⎠ ⎝ R3⎠ must stay below 1.5 V of the positive supply rail and can exceed ⎝ ⎠ the negative supply rail by 0.1 V. Refer to the Power Supplies This equation demonstrates that the gain accuracy and common- section for more details. mode rejection ratio of the AD8278 and AD8279 is determined R2 (V ) IN+ primarily by the matching of resistor ratios. Even a 0.1% R1 + R2 R4 mismatch in one resistor degrades the CMRR to 69 dB for a G = 2 difference amplifier. R3 V IN– R1 The difference amplifier output voltage equation can be reduced to V IN+ R2 R4 V =() V − V OUT IN+ IN− R3 R2 (V ) IN+ R1 + R2 as long as the following ratio of the resistors is tightly matched: Figure 49. Voltage Division in the Difference Amplifier Configuration R2 R4 = The AD8278 and AD8279 have integrated ESD diodes at the inputs R1 R3 that provide overvoltage protection. This feature simplifies The resistors on the AD8278 and AD8279 are laser trimmed to system design by eliminating the need for additional external match accurately. As a result, the AD8278 and AD8279 provide protection circuitry and enables a more robust system. superior performance over a discrete solution, enabling better The voltages at any of the inputs of the parts can safely range CMRR, gain accuracy, and gain drift, even over a wide tempera- from +VS − 40 V up to −VS + 40 V. For example, on ±10 V ture range. supplies, input voltages can go as high as ±30 V. Care should be taken to not exceed the +VS − 40 V to −VS + 40 V input limits to avoid damaging the parts. Rev. C | Page 16 of 24 08308-045 08308-062 AD8278/AD8279 The AD8278 and AD8279 are typically specified at single and POWER SUPPLIES dual supplies, but they can be used with unbalanced supplies as The AD8278 and AD8279 operate extremely well over a very well; for example, −V = −5 V, +V = +20 V. The difference between S S wide range of supply voltages. They can operate on a single the two supplies must be kept below 36 V. The positive supply supply as low as 2 V and as high as 36 V, under appropriate rail must be at least 2 V above the negative supply. setup conditions. R1 (V ) REF For best performance, the user should ensure that the internal R1 + R2 R4 op amp is biased correctly. The internal input terminals of the R3 op amp must have sufficient voltage headroom to operate properly. Proper operation of the part requires at least 1.5 V R1 between the positive supply rail and the op amp input terminals. R2 This relationship is expressed in the following equation: V REF R1 (V ) REF R1 R1 + R2 V <+V − 1.5 V REF S Figure 50. Ensure Sufficient Voltage Headroom on the Internal Op Amp R1+ R2 Inputs For example, when operating on a +V = 2 V single supply and S Use a stable dc voltage to power the AD8278 and AD8279. Noise V = 0 V, it can be seen from Figure 50 that the op amp input REF on the supply pins can adversely affect performance. Place a terminals are biased at 0 V, allowing more than the required 1.5 V bypass capacitor of 0.1 μF between each supply pin and ground, headroom. However, if V = 1 V under the same conditions, the REF as close as possible to each supply pin. Use a tantalum capacitor input terminals of the op amp are biased at 0.66 V (G = ½). Now of 10 μF between each supply and ground. It can be farther the op amp does not have the required 1.5 V headroom and away from the supply pins and, typically, it can be shared by cannot function. Therefore, the user must increase the supply other precision integrated circuits. voltage or decrease VREF to restore proper operation. Rev. C | Page 17 of 24 08308-046 AD8278/AD8279 APPLICATIONS INFORMATION CONFIGURATIONS 20kΩ 40kΩ 5 2 –IN The AD8278 and AD8279 can be configured in several ways OUT 6 (see Figure 51 to Figure 57). These configurations have excellent gain accuracy and gain drift because they rely on the internal 1 20kΩ 40kΩ 3 +IN matched resistors. Note that Figure 53 shows the AD8278 and AD8278 AD8279 as difference amplifiers with a midsupply reference V = MIDSUPPLY REF V = 2 (V − V ) + V OUT IN+ IN− REF voltage at the noninverting input. This allows the AD8278 and Figure 54. Difference Amplifier, Gain = 2, Referenced to Midsupply AD8279 to be used as a level shifter, which is appropriate in single-supply applications that are referenced to midsupply. 40kΩ 20kΩ 2 5 IN Table 10 lists several single-ended amplifier configurations OUT that are not illustrated. 6 1 20kΩ 2 40kΩ 20kΩ 5 3 40kΩ –IN OUT AD8278 6 V = –½V OUT IN Figure 55. Inverting Amplifier, Gain = −½ 3 40kΩ 20kΩ 1 +IN AD8278 40kΩ 20kΩ 25 V = ½ (V − V ) OUT IN+ IN− OUT 6 Figure 51. Difference Amplifier, Gain = ½ 1 20kΩ IN 20kΩ 40kΩ 5 2 3 40kΩ –IN AD8278 OUT V = 1.5V 6 OUT IN Figure 56. Noninverting Amplifier, Gain = 1.5 20kΩ 40kΩ 1 3 +IN 20kΩ 40kΩ 5 2 AD8278 OUT V = 2(V − V ) OUT IN+ IN− 6 Figure 52. Difference Amplifier, Gain = 2 20kΩ 40kΩ 3 1 IN 2 40kΩ 20kΩ 5 –IN AD8278 OUT V = 2V 6 OUT IN Figure 57. Noninverting Amplifier, Gain = 2 3 40kΩ 20kΩ 1 +IN AD8278 V = MIDSUPPLY REF V = ½ (V − V ) + V OUT IN+ IN− REF Figure 53. Difference Amplifier, Gain = ½, Referenced to Midsupply Table 10. AD8278 Difference and Single-Ended Amplifier Configurations Amplifier Configuration Signal Gain Pin 1 (REF) Pin 2 (VIN−) Pin 3 (VIN+) Pin 5 (SENSE) Difference Amplifier +½ GND IN− IN+ OUT Difference Amplifier +2 IN+ OUT GND IN− Single-Ended Inverting Amplifier −½ GND IN GND OUT Single-Ended Inverting Amplifier −2 GND OUT GND IN Single-Ended Noninverting Amplifier +3⁄2 IN GND IN OUT Single-Ended Noninverting Amplifier +3 IN OUT IN GND Single-Ended Noninverting Amplifier +½ GND GND IN OUT Single-Ended Noninverting Amplifier +1 IN GND GND OUT Single-Ended Noninverting Amplifier +1 GND OUT IN GND Single-Ended Noninverting Amplifier +2 IN OUT GND GND Rev. C | Page 18 of 24 08308-048 08308-047 08308-049 08308-051 08308-053 08308-052 08308-050 AD8278/AD8279 INSTRUMENTATION AMPLIFIER The reference must be driven with a low impedance source to maintain the internal resistor ratio. An example using the low The AD8278 and AD8279 can be used as building blocks for a power, low noise OP1177 as a reference is shown in Figure 58. low power, low cost instrumentation amplifier. An instrumentation amplifier provides high impedance inputs and delivers high INCORRECT CORRECT common-mode rejection. Combining the AD8278 with an Analog Devices, Inc., low power amplifier (see Table 11) creates a precise, power efficient voltage measurement solution suitable for power AD8278 AD8278 critical systems. REF REF V V –IN A1 + 40kΩ R F OP1177 20kΩ – R G V 20kΩ OUT Figure 58. Driving the Reference Pin 40kΩ AD8278/ R F AD8279 DIFFERENTIAL OUTPUT A2 REF +IN V = (1 + 2R /R ) (V – V ) × 2 The two difference amplifiers of the AD8279 can be configured OUT F G IN+ IN– to provide a differential output, as shown in Figure 59. This Figure 60. Low Power Precision Instrumentation Amplifier differential output configuration is suitable for various applications, Table 11. Low Power Op Amps such as strain gage excitation and single-ended-to-differential Op Amp (A1, A2) Features conversion. The differential output voltage has a gain twice that AD8506 Dual micropower op amp of a single AD8279 channel, as shown in the following equation: AD8607 Precision dual micropower op amp VDIFF_OUT = V+OUT − V−OUT = 2 × GAD8279 × (VIN+ – VIN−) AD8617 Low cost CMOS micropower op amp If the AD8279 amplifiers are each configured for G = ½, the AD8667 Dual precision CMOS micropower op amp differential gain is 1×; if the AD8279 amplifiers are each It is preferable to use dual op amps for the high impedance inputs configured for G = 2, the differential gain is 4×. because they have better matched performance and track each +VS other over temperature. The AD8278 and AD8279 difference 11 amplifiers cancel out common-mode errors from the input op AD8279 amps, if they track each other. The differential gain accuracy of 20kΩ 40kΩ the in-amp is proportional to how well the input feedback –IN 12 2 resistors (RF) match each other. The CMRR of the in-amp increases as the differential gain is increased (1 + 2RF/RG), but a 13 +OUT higher gain also reduces the common-mode voltage range. Refer to A Designer’s Guide to Instrumentation Amplifiers for 20kΩ 40kΩ +IN 14 3 more design ideas and considerations at www.analog.com, under Technical Documentation. 20kΩ 40kΩ 10 6 9 –OUT 20kΩ 40kΩ 8 5 4 –VS Figure 59. AD8279 Differential Output G = 4 Configuration Rev. C | Page 19 of 24 08308-054 08308-061 08308-056 AD8278/AD8279 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 85 6.20 (0.2441) 4.00 (0.1574) 1 5.80 (0.2284) 3.80 (0.1497) 4 0.50 (0.0196) 1.27 (0.0500) 45° BSC 1.75 (0.0688) 0.25 (0.0099) 1.35 (0.0532) 0.25 (0.0098) 8° 0.10 (0.0040) 0° 0.51 (0.0201) COPLANARITY 1.27 (0.0500) 0.10 0.31 (0.0122) 0.25 (0.0098) SEATING 0.40 (0.0157) PLANE 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 61. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 3.20 3.00 2.80 8 5 5.15 3.20 4.90 3.00 4.65 1 2.80 4 PIN 1 IDENTIFIER 0.65 BSC 0.95 15° MAX 0.85 1.10 MAX 0.75 0.80 0.15 0.23 6° 0.55 0.40 0.05 0.09 0° 0.40 0.25 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 62. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters Rev. C | Page 20 of 24 10-07-2009-B 012407-A AD8278/AD8279 8.75 (0.3445) 8.55 (0.3366) 8 14 6.20 (0.2441) 4.00 (0.1575) 1 5.80 (0.2283) 3.80 (0.1496) 7 1.27 (0.0500) 0.50 (0.0197) 45° BSC 0.25 (0.0098) 1.75 (0.0689) 0.25 (0.0098) 1.35 (0.0531) 8° 0.10 (0.0039) 0° COPLANARITY SEATING 1.27 (0.0500) 0.51 (0.0201) 0.10 PLANE 0.25 (0.0098) 0.40 (0.0157) 0.31 (0.0122) 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AB CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 63. 14-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-14) Dimensions shown in millimeters and (inches) ORDERING GUIDE 1 Model Temperature Range Package Description Package Option Branding AD8278ARZ −40°C to +85°C 8-Lead SOIC_N R-8 AD8278ARZ-R7 −40°C to +85°C 8-Lead SOIC_N, 7" Tape and Reel R-8 AD8278ARZ-RL −40°C to +85°C 8-Lead SOIC_N, 13" Tape and Reel R-8 AD8278BRZ −40°C to +85°C 8-Lead SOIC_N R-8 AD8278BRZ-R7 −40°C to +85°C 8-Lead SOIC_N, 7" Tape and Reel R-8 AD8278BRZ-RL −40°C to +85°C 8-Lead SOIC_N, 13" Tape and Reel R-8 AD8278ARMZ −40°C to +85°C 8-Lead MSOP RM-8 Y21 AD8278ARMZ-R7 −40°C to +85°C 8-Lead MSOP, 7" Tape and Reel RM-8 Y21 AD8278ARMZ-RL −40°C to +85°C 8-Lead MSOP, 13" Tape and Reel RM-8 Y21 AD8278BRMZ −40°C to +85°C 8-Lead MSOP RM-8 Y22 AD8278BRMZ-R7 −40°C to +85°C 8-Lead MSOP, 7" Tape and Reel RM-8 Y22 AD8278BRMZ-RL −40°C to +85°C 8-Lead MSOP, 13" Tape and Reel RM-8 Y22 AD8279ARZ −40°C to +85°C 14-Lead SOIC_N R-14 AD8279ARZ-R7 −40°C to +85°C 14-Lead SOIC_N, 7" Tape and Reel R-14 AD8279ARZ-RL −40°C to +85°C 14-Lead SOIC_N, 13" Tape and Reel R-14 AD8279BRZ −40°C to +85°C 14-Lead SOIC_N R-14 AD8279BRZ-R7 −40°C to +85°C 14-Lead SOIC_N, 7" Tape and Reel R-14 AD8279BRZ-RL −40°C to +85°C 14-Lead SOIC_N, 13" Tape and Reel R-14 1 Z = RoHS Compliant Part. Rev. C | Page 21 of 24 060606-A AD8278/AD8279 NOTES Rev. C | Page 22 of 24 AD8278/AD8279 NOTES Rev. C | Page 23 of 24 AD8278/AD8279 NOTES ©2009–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08308-0-1/11(C) Rev. C | Page 24 of 24