ANALOG DEVICES AD8271

Programmable Gain Precision Difference Amplifier AD8271 FEATURES FUNCTIONAL BLOCK DIAGRAM With no external resistors 10kΩ 10kΩ Difference amplifier, gains of ½, 1, or 2 1 10 P1 N3 Single-ended amplifier: over 40 different gains 10kΩ 10kΩ Set reference voltage at midsupply 2 9 P2 N2 Excellent ac specifications 15 MHz bandwidth 10kΩ 20kΩ P3 3 8 N1 30 V/μs slew rate High accuracy dc performance OUT 20kΩ 4 7 P4 0.08% maximum gain error 10 ppm/°C maximum gain drift 80 dB minimum CMRR (gain of 2) 5 6 –V +V S S AD8271 10-lead MSOP package Supply current: 2.6 mA Figure 1. Supply range: ±2.5 V to ±18 V APPLICATIONS ADC driver Instrumentation amplifier building blocks Level translators Automatic test equipment High performance audio Sine/cosine encoders GENERAL DESCRIPTION Table 1. Difference Amplifiers by Category The AD8271 is a low distortion, precision difference amplifier High High Single-Supply Single-Supply with internal gain setting resistors. With no external components, Speed Voltage Unidirectional Bidirectional it can be configured as a high performance difference amplifier AD8270 AD628 AD8202 AD8205 with gains of ½, 1, or 2. It can also be configured in over 40 single- AD8273 AD629 AD8203 AD8206 ended configurations, with gains ranging from −2 to +3. AD8274 AD8216 AMP03 The AD8271 comes in a 10-lead MSOP package. The AD8271 operates on both single and dual supplies and requires only a 2.6 mA maximum supply current. It is specified over the industrial temperature range of −40°C to +85°C and is fully RoHS compliant. For a dual channel version of the AD8271, see the AD8270 data sheet. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 07363-001 AD8271 TABLE OF CONTENTS Features .............................................................................................. 1  Circuit Information .................................................................... 15  Applications ....................................................................................... 1  Driving the AD8271 ................................................................... 15  Functional Block Diagram .............................................................. 1  Power Supplies ............................................................................ 15  General Description ......................................................................... 1  Input Voltage Range ................................................................... 15  Revision History ............................................................................... 2  Applications Information .............................................................. 16  Specif ica t ions ..................................................................................... 3  Difference Amplifier Configurations ...................................... 16  Difference Amplifier Configurations ........................................ 3  Single-Ended Configurations ................................................... 17  Absolute Maximum Ratings ............................................................ 6  Kelvin Measurement .................................................................. 18  Thermal Resistance ...................................................................... 6  Instrumentation Amplifier........................................................ 18  Maximum Power Dissipation ..................................................... 6  Driving Cabling .......................................................................... 19  ESD Caution .................................................................................. 6  Driving an ADC ......................................................................... 19  Pin Configuration and Function Description .............................. 7  Outline Dimensions ....................................................................... 20  Typical Performance Characteristics ............................................. 8  Ordering Guide .......................................................................... 20  Operational Amplifier Plots ...................................................... 14  Theory of Operation ...................................................................... 15  REVISION HISTORY 1/09—Revision 0: Initial Version Rev. 0 | Page 2 of 20 AD8271 SPECIFICATIONS DIFFERENCE AMPLIFIER CONFIGURATIONS V = ±5 to ±15 V, V = 0 V, G = 1, R = 2 kΩ, T = 25°C, specifications referred to input (RTI), unless otherwise noted. S REF LOAD A Table 2. B Grade A Grade Parameter Conditions Min Typ Max Min Typ Max Unit DYNAMIC PERFORMANCE Bandwidth 15 15 MHz Slew Rate 30 30 V/μs Settling Time to 0.01% VS = ±15, 10 V step on output 700 800 700 800 ns VS = ±5, 5 V step on output 550 650 550 650 ns Settling Time to 0.001% V = ±15, 10 V step on output 750 900 750 900 ns S V = ±5, 5 V step on output 600 750 600 750 ns S NOISE/DISTORTION Harmonic Distortion + Noise V = ±15, f = 1 kHz, 110 110 dB S V = 10 V p-p, R = 600 Ω OUT LOAD VS = ±5, f = 1 kHz, 141 141 dB VOUT = 10 V p-p, RLOAD = 600 Ω 1 Voltage Noise f = 0.1 Hz to 10 Hz 1.5 1.5 μV p-p f = 1 kHz 38 38 nV/√Hz GAIN Gain Error V = 10 V p-p 0.02 0.05 % OUT Gain Drift TA = −40°C to +85°C 1 2 1 10 ppm/°C Gain Nonlinearity VOUT = 10 V p-p, 1 1 ppm RLOAD = 10 kΩ, 2 kΩ, 600 Ω INPUT CHARACTERISTICS 2 Offset 300 600 300 1000 μV Average Temperature Drift TA = −40°C to +85°C 2 2 μV/°C Common-Mode Rejection Ratio DC to 1 kHz 80 92 74 92 dB Power Supply Rejection Ratio 2 10 2 10 μV/V 3 Input Voltage Range −VS − 0.4 +VS + 0.4 −VS − 0.4 +VS + 0.4 V 4 Common-Mode Resistance 10 10 kΩ Bias Current Inputs grounded 500 500 nA OUTPUT CHARACTERISTICS Output Swing VS = ±15 −13.8 +13.8 −13.8 +13.8 V VS = ±15, TA = −40°C to +85°C −13.7 +13.7 −13.7 +13.7 V V = ±5 −4 +4 −4 +4 V S V = ±5, T = −40°C to +85°C −3.9 +3.9 −3.9 +3.9 V S A Short-Circuit Current Limit Sourcing 100 100 mA Sinking 60 60 mA POWER SUPPLY Supply Current 2.3 2.6 2.3 2.6 mA TA = −40°C to +85°C 3.2 3.2 mA 1 Includes amplifier voltage and current noise, as well as noise of internal resistors. 2 Includes input bias and offset errors. 3 At voltages beyond the rails, internal ESD diodes begin to turn on. In some configurations, the input voltage range may be limited by the internal op amp (see the Input Voltage Range section for details). 4 Internal resistors, trimmed to be ratio matched, have ±20% absolute accuracy. Common-mode resistance was calculated with both inputs in parallel. The common- mode impedance at only one input is 2× the resistance listed. Rev. 0 | Page 3 of 20 AD8271 V = ±5 to ±15 V, V = 0 V, G = ½, R = 2 kΩ, T = 25°C, specifications referred to input (RTI), unless otherwise noted. S REF LOAD A Table 3. B Grade A Grade Parameter Conditions Min Typ Max Min Typ Max Unit DYNAMIC PERFORMANCE Bandwidth 20 20 MHz Slew Rate 30 30 V/μs Settling Time to 0.01% VS = ±15, 10 V step on output 700 800 700 800 ns VS = ±5, 5 V step on output 550 650 550 650 ns Settling Time to 0.001% V = ±15, 10 V step on output 750 900 750 900 ns S V = ±5, 5 V step on output 600 750 600 750 ns S NOISE/DISTORTION Harmonic Distortion + Noise V = ±15, f = 1 kHz, 74 74 dB S V = 10 V p-p, R = 600 Ω OUT LOAD 101 101 dB VS = ±5, f = 1 kHz, VOUT = 10 V p-p, RLOAD = 600 Ω 1 Voltage Noise f = 0.1 Hz to 10 Hz 2 2 μV p-p f = 1 kHz 52 52 nV/√Hz GAIN Gain Error V = 10 V p-p 0.04 0.08 % OUT Gain Drift TA = −40°C to +85°C 0.5 2 1 10 ppm/°C Gain Nonlinearity VOUT = 10 V p-p, 200 200 ppm RLOAD = 10 kΩ, 2 kΩ, 600 Ω INPUT CHARACTERISTICS 2 Offset 450 1000 450 1500 μV Average Temperature Drift TA = −40°C to +85°C 3 3 μV/°C Common-Mode Rejection Ratio DC to 1 kHz 74 86 70 86 dB Power Supply Rejection Ratio 2 10 2 10 μV/V 3 Input Voltage Range −VS − 0.4 +VS + 0.4 −VS − 0.4 +VS + 0.4 V 4 Common-Mode Resistance 7.5 7.5 kΩ Bias Current Inputs grounded 500 500 nA OUTPUT CHARACTERISTICS Output Swing VS = ±15 −13.8 +13.8 −13.8 +13.8 V VS = ±15, TA = −40°C to +85°C −13.7 +13.7 −13.7 +13.7 V V = ±5 −4 +4 −4 +4 V S V = ±5, T = −40°C to +85°C −3.9 +3.9 −3.9 +3.9 V S A Short-Circuit Current Limit Sourcing 100 100 mA Sinking 60 60 mA POWER SUPPLY Supply Current 2.3 2.6 2.3 2.6 mA TA = −40°C to +85°C 3.2 3.2 mA 1 Includes amplifier voltage and current noise, as well as noise of internal resistors. 2 Includes input bias and offset errors. 3 At voltages beyond the rails, internal ESD diodes begin to turn on. In some configurations, the input voltage range may be limited by the internal op amp (see the Input Voltage Range section for details). 4 Internal resistors, trimmed to be ratio matched, have ±20% absolute accuracy. Common-mode resistance was calculated with both inputs in parallel. The common- mode impedance at only one input is 2× the resistance listed. Rev. 0 | Page 4 of 20 AD8271 V = ±5 to ±15 V, V = 0 V, G = 2, R = 2 kΩ, T = 25°C, specifications referred to input (RTI), unless otherwise noted. S REF LOAD A Table 4. B Grade A Grade Parameter Conditions Min Typ Max Min Typ Max Unit DYNAMIC PERFORMANCE Bandwidth 10 10 MHz Slew Rate 30 30 V/μs Settling Time to 0.01% VS = ±15, 10 V step on output 700 800 700 800 ns VS = ±5, 5 V step on output 550 650 550 650 ns Settling Time to 0.001% V = ±15, 10 V step on output 750 900 750 900 ns S V = ±5, 5 V step on output 600 750 600 750 ns S NOISE/DISTORTION Harmonic Distortion + Noise V = ±15, f = 1 kHz, 86 86 dB S V = 10 V p-p, R = 600 Ω OUT LOAD 112 112 dB VS = ±5, f = 1 kHz, VOUT = 10 V p-p, RLOAD = 600 Ω 1 Voltage Noise f = 0.1 Hz to 10 Hz 1 1 μV p-p f = 1 kHz 26 26 nV/√Hz GAIN Gain Error V = 10 V p-p 0.04 0.08 % OUT Gain Drift TA = −40°C to +85°C 0.5 2 1 10 ppm/°C Gain Nonlinearity VOUT = 10 V p-p, 50 50 ppm RLOAD = 10 kΩ, 2 kΩ, 600 Ω INPUT CHARACTERISTICS 2 Offset 225 500 225 750 μV Average Temperature Drift TA = −40°C to +85°C 1.5 1.5 μV/°C Common-Mode Rejection Ratio DC to 1 kHz 84 98 78 98 dB Power Supply Rejection Ratio 2 10 2 10 μV/V 3 Input Voltage Range −VS − 0.4 +VS + 0.4 −VS − 0.4 +VS + 0.4 V 4 Common-Mode Resistance 7.5 7.5 kΩ Bias Current Inputs grounded 500 500 nA OUTPUT CHARACTERISTICS Output Swing VS = ±15 −13.8 +13.8 −13.8 +13.8 V VS = ±15, TA = −40°C to +85°C −13.7 +13.7 −13.7 +13.7 V V = ±5 −4 +4 −4 +4 V S V = ±5, T = −40°C to +85°C −3.9 +3.9 −3.9 +3.9 V S A Short-Circuit Current Limit Sourcing 100 100 mA Sinking 60 60 mA POWER SUPPLY Supply Current 2.3 2.6 2.3 2.6 mA TA = −40°C to +85°C 3.2 3.2 mA 1 Includes amplifier voltage and current noise, as well as noise of internal resistors. 2 Includes input bias and offset errors. 3 At voltages beyond the rails, internal ESD diodes begin to turn on. In some configurations, the input voltage range may be limited by the internal op amp (see the Input Voltage Range section for details). 4 Internal resistors, trimmed to be ratio matched, have ±20% absolute accuracy. Common-mode resistance was calculated with both inputs in parallel. The common- mode impedance at only one input is 2× the resistance listed. Rev. 0 | Page 5 of 20 AD8271 ABSOLUTE MAXIMUM RATINGS MAXIMUM POWER DISSIPATION Table 5. Parameter Rating The maximum safe power dissipation for the AD8271 is limited by the associated rise in junction temperature (T ) on the die. At Supply Voltage ±18 V J approximately 150°C, which is the glass transition temperature, Output Short-Circuit Current See derating curve in Figure 2 the properties of the plastic change. Even temporarily exceeding Input Voltage Range +VS + 0.4 V to this temperature limit may change the stresses that the package −VS − 0.4 V exerts on the die, permanently shifting the parametric perfor- Storage Temperature Range −65°C to +130°C mance of the amplifiers. Exceeding a temperature of 150°C for Specified Temperature Range −40°C to +85°C an extended period of time can cause changes in silicon devices, Package Glass Transition Temperature (T) 150°C G potentially resulting in a loss of functionality. ESD The AD8271 has built-in short-circuit protection that limits Human Body Model 1 kV the output current to approximately 100 mA (see Figure 22 for Charge Device Model 1 kV more information). Although the short-circuit condition itself Machine Model 0.1 kV does not damage the part, the heat generated by the condition can cause the part to exceed its maximum junction temperature, Stresses above those listed under Absolute Maximum Ratings with corresponding negative effects on reliability. may cause permanent damage to the device. This is a stress 1.6 rating only; functional operation of the device at these or any T MAX = 150°C 1.4 J other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute 1.2 maximum rating conditions for extended periods may affect 1.0 device reliability. 0.8 THERMAL RESISTANCE 0.6 Table 6. Thermal Resistance Package Type θ θ Unit JA JC 0.4 10-Lead MSOP 141.9 43.7 °C/W 0.2 0 The θJA values in Table 6 assume a 4-layer JEDEC standard –50 –25 0 25 50 75 100 125 AMBIENT TEMPERATURE (C) board with zero airflow. Figure 2. Maximum Power Dissipation vs. Ambient Temperature ESD CAUTION Rev. 0 | Page 6 of 20 MAXIMUM POWER DISSIPATION (W) 07363-102 AD8271 PIN CONFIGURATION AND FUNCTION DESCRIPTION P1 1 10 N3 P2 2 9 N2 AD8271 P3 3 8 N1 TOP VIEW (Not to Scale) P4 4 7 OUT –V 5 6 +V S S Figure 3. Table 7. Pin Function Descriptions Pin No. Mnemonic Description 1 P1 Noninverting Input. A 10 kΩ resistor is connected to the noninverting (+) terminal of the op amp. 2 P2 Noninverting Input. A 10 kΩ resistor is connected to the noninverting (+) terminal of the op amp. 3 P3 Noninverting Input. A 20 kΩ resistor is connected to the noninverting (+) terminal of the op amp. This pin is used as a reference voltage input in many configurations. 4 P4 Noninverting Input. A 20 kΩ resistor is connected to the noninverting (+) terminal of the op amp. This pin is used as a reference voltage input in many configurations. 5 −VS Negative Supply. 6 +VS Positive Supply. 7 OUT Output. 8 N1 Inverting Input. A 10 kΩ resistor is connected to the inverting (−) terminal of the op amp. 9 N2 Inverting Input. A 10 kΩ resistor is connected to the inverting (−) terminal of the op amp. 10 N3 Inverting Input. A 10 kΩ resistor is connected to the inverting (−) terminal of the op amp. Rev. 0 | Page 7 of 20 07363-002 AD8271 TYPICAL PERFORMANCE CHARACTERISTICS VS = ±15 V, TA = 25°C, difference amplifier configuration, unless otherwise noted. 70 180 GAIN = 1 N = 989 60 MEAN = –29 SD = 43 150 50 40 120 30 +0.6µV/V/°C 20 90 10 0 60 –0.1µV/V/°C –10 –20 30 –30 REPRESENTATIVE SAMPLES 0 –40 –200 –100 0 100 200 –50 –30 –10 10 30 50 70 90 110 130 CMMR (µV/V) TEMPERATURE (°C) Figure 4. Typical Distribution of CMRR, Gain = 1 Figure 7. CMRR vs. Temperature, Normalized at 25°C, Gain = 1 300 GAIN = 1 180 N = 989 MEAN = –306 200 SD = 229 150 2.2µV/°C 100 120 0 90 –100 60 2.8µV/°C 30 –200 REPRESENTATIVE SAMPLES 0 –300 –1000 –500 0 500 1000 –50 –30 –10 1030 50 7090 110 130 SYSTEM OFFSET VOLTAGE (µV) TEMPERATURE (°C) Figure 5. Typical Distribution of System Offset, Gain = 1 Figure 8. System Offset vs. Temperature, Normalized at 25°C, Referred to Output, Gain = 1 200 240 GAIN = 1 N = 1006 150 1.7ppm/°C 210 MEAN = 0.003 SD = 0.005 180 100 150 50 120 0 90 –50 0.5ppm/°C 60 30 –100 REPRESENTATIVE SAMPLES 0 –150 –0.04 –0.02 0 0.02 0.04 –50 –30 –10 10 30 50 70 90 110 130 GAIN ERROR (%) TEMPERATURE (°C) Figure 6. Typical Distribution of Gain Error, Gain = 1 Figure 9. Gain Error vs. Temperature, Normalized at 25°C, Gain = 1 Rev. 0 | Page 8 of 20 NUMBER OF UNITS NUMBER OF UNITS NUMBER OF UNITS 07363-109 07363-108 07363-107 SYSTEM OFFSET VOLTAGE (μV) GAIN ERROR (μV/V) CMRR (μV/V) 07363-004 07363-006 07363-005 AD8271 V = ±15 V, T = 25°C, difference amplifier configuration, unless otherwise noted. S A 20 6 (0, +5) (0, +15) 15 4 (–4.3, +2.85) (+4.3, +2.85) (–7.5, +7.5) (+7.5, +7.5) (0, +2.5) 10 2 (–1.6, +1.7) (+1.6, +1.7) 5 V = ±2.5 V = ±5 S S 0 0 –5 (–1.6, –1.7) (+1.6, –1.7) –2 –10 (0, –2.5) (–7.5, –7.5) (+7.5, –7.5) ( (–4 –4..3, 3, + –2. 2.85) 85) (+4.3, –2.85) –4 –15 (0, –15) (0, –5) –20 –6 –10 –5 0 5 10 –5 –4 –3 –2 –1 0 1 2 3 4 5 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) Figure 10. Common-Mode Input Voltage vs. Output Voltage, Figure 13. Common-Mode Input Voltage vs. Output Voltage, Gain = ½, ±15 V Supplies Gain = 1, ±5 V and ±2.5 V Supplies 6 20 (0, +5) (0, +15) 15 4 (–14.3, +11.4) (+14.3, +11.4) (–2.5, +2.5) (+2.5, +2.5) (0, +2.5) 10 2 (–1.25, –1.25) (+1.25, +1.25) 5 V = ±2.5 V = ±5 S S 0 0 –5 (–1.25, –1.25) (+1.25, –1.25) –2 –10 (0, –2.5) (–2.5, –2.5) (+2.5, –2.5) (–14.3, –11.4) (+14.3, –11.4) –4 –15 (0, –15) (0, –5) –6 –20 –3 –2 –1 0 1 2 3 –20 –15 –10 –5 0 5 10 15 20 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) Figure 11. Common-Mode Input Voltage vs. Output Voltage, Figure 14. Common-Mode Input Voltage vs. Output Voltage, Gain = ½, ±5 V and ±2.5 V Supplies Gain = 2, ±15 V Supplies 20 6 (0, +5) (0, +15) (–4, +4) (+4, +4) 15 4 (–14.3, +7.85) (+14.3, +7.85) (0, +2.5) 10 (–1.6, +2.1) (+1.6, +2.1) 2 5 V = ±2.5 V = ±5 S S 0 0 –5 –2 (–1.6, –2.1) (+1.6, –2.1) –10 (0, –2.5) (–14.3, –7.85) (+14.3, –7.85) –4 –15 (–4, –4) (+4, –4) (0, –15) (0, –5) –20 –6 –20 –15 –10 –5 0 5 10 15 20 –5 –4 –3 –2 –1 0 1 2 3 4 5 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) Figure 12. Common-Mode Input Voltage vs. Output Voltage, Figure 15. Common-Mode Input Voltage vs. Output Voltage, Gain =1, ±15 V Supplies Gain = 2, ±5 V and ±2.5 V Supplies Rev. 0 | Page 9 of 20 COMMON-MODE INPUT VOLTAGE (V) COMMON-MODE INPUT VOLTAGE (V) COMMON-MODE INPUT VOLTAGE (V) 07363-008 07363-009 07363-007 COMMON-MODE INPUT VOLTAGE (V) COMMON-MODE INPUT VOLTAGE (V) COMMON-MODE INPUT VOLTAGE (V) 07363-012 07363-011 07363-010 AD8271 V = ±15 V, T = 25°C, difference amplifier configuration, unless otherwise noted. S A 10 140 GAIN = 2, ½ GAIN = 2 120 5 GAIN = 1 100 GAIN = 1 0 80 GAIN = ½ –5 60 –10 40 –15 20 –20 0 100 1k 10k 100k 1M 10M 100M 10 100 1k 10k 100k 1M FREQUENCY (Hz) FREQUENCY (Hz) Figure 19. Positive PSRR vs. Frequency Figure 16. Gain vs. Frequency 100 140 GAIN = 2, ½ GAIN = 2, ½ 90 120 80 GAIN = 1 GAIN = 1 100 70 60 80 50 60 40 30 40 20 20 10 0 0 10 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 17. CMRR vs. Frequency Figure 20. Negative PSRR vs. Frequency 32 4 10V p-p INPUT V = ±15V S GAIN = 1 28 3 R = 10kΩ, 2kΩ, 600Ω LOAD 24 2 20 1 16 0 12 –1 V = ±5V S 8 –2 4 –3 0 –4 100 1k 10k 100k 1M 10M –10 –8 –6 –4 –2 0 2 461 8 0 FREQUENCY (Hz) TEMPERATURE (°C) Figure 21. Gain Nonlinearity, Gain = 1 Figure 18. Output Voltage Swing vs. Large-Signal Frequency Response Rev. 0 | Page 10 of 20 GAIN (dB) OUTPUT VOLTAGE SWING (V p-p) CMRR (dB) 07363-017 07363-019 07363-018 NONLINEARITY (1ppm/DIV) NEGATIVE PSRR (dB) POSITIVE PSRR (dB) 07363-016 07363-015 07363-136 AD8271 V = ±15 V, T = 25°C, difference amplifier configuration, unless otherwise noted. S A 120 V = ±15V S 100 I SHORT+ 80 100pF 18pF 0pF 60 40 20 0 –20 I –40 SHORT– –60 –80 –100 1µs/DIV –50 –30 –10 10 30 50 70 90 110 130 TEMPERATURE (°C) Figure 22. Short-Circuit Current vs. Temperature Figure 25. Small-Signal Step Response, Gain = ½ +V S +125°C V = ±15V S +V – 2 S 220pF +85°C –40°C +25°C 33pF 0pF +V – 4 S 0 +125°C +85°C –V + 4 S +25°C –V + 2 S –40°C –V S 1µs/DIV 200 1k 10k R (Ω) LOAD Figure 23. Output Voltage Swing vs. RLOAD Figure 26. Small-Signal Step Response, Gain = 1 +V S –40°C V = ±15V S +25°C +V – 3 S 470pF 100pF 0pF +V – 6 S +125°C +85°C 0 +125°C –V + 6 S +85°C +25°C –V + 3 S –40°C –V S 0 20 406080 100 1µs/DIV CURRENT (mA) Figure 24. Output Voltage Swing vs. Current (I ) Figure 27. Small-Signal Step Response, Gain = 2 OUT Rev. 0 | Page 11 of 20 OUTPUT VOLTAGE SWING (V) OUTPUT VOLTAGE SWING (V) SHORT-CIRCUIT CURRENT (mA) 07363-118 07363-022 07363-023 50ms/DIV 50mV/DIV 50mV/DIV 07363-026 07363-025 07363-024 AD8271 V = ±15 V, T = 25°C, difference amplifier configuration, unless otherwise noted. S A 160 GAIN = ½ 140 V = ±10V S V = ±5V S 120 V = ±2.5V S 100 80 60 40 V = ±18V S V = ±15V S 20 0 1µs/DIV 0 102030 40 50 60 70 80 90 100 CAPACITIVE LOAD (pF) Figure 28. Small-Signal Overshoot vs. Capacitive Load, Gain = ½ Figure 31. Large-Signal Pulse Response, Gain = ½ 80 GAIN = 1 70 60 V = ±10V S V = ±5V S 50 V = ±2.5V S 40 30 V = ±18V 20 S V = ±15V S 10 0 1µs/DIV 0 50 100 150 200 CAPACITIVE LOAD (pF) Figure 29. Small-Signal Overshoot vs. Capacitive Load, Gain = 1 Figure 32. Large-Signal Pulse Response, Gain = 1 80 GAIN = 2 70 60 50 V = ±10V S 40 V = ±5V S 30 V = ±2.5V S 20 V = ±18V S 10 V = ±15V S 0 1µs/DIV 0 50 100 150 200 250 300 350 400 450 CAPACITIVE LOAD (pF) Figure 30. Small-Signal Overshoot vs. Capacitive Load, Gain = 2 Figure 33. Large-Signal Pulse Response, Gain = 2 Rev. 0 | Page 12 of 20 OVERSHOOT (%) OVERSHOOT (%) OVERSHOOT (%) 07363-132 07363-031 07363-030 2V/DIV 2V/DIV 2V/DIV 07363-129 07363-128 07363-127 AD8271 V = ±15 V, T = 25°C, difference amplifier configuration, unless otherwise noted. S A 0.1 45 R = 100kΩ LOAD R = 2kΩ 40 LOAD R = 600Ω LOAD GAIN = ½ 35 +SR 30 0.01 GAIN = 2 25 –SR 20 15 0.001 10 GAIN = 1 5 0 0.0001 10 100 1k 10k 100k FREQUENCY (Hz) TEMPERATURE (°C) Figure 34. Output Slew Rate vs. Temperature Figure 37. THD + N vs. Frequency 1k 1 GAIN = 1 f = 1kHz R = 600Ω LOAD R = 2kΩ LOAD R = 100kΩ LOAD 0.1 GAIN = 2 0.01 100 GAIN = 1 0.001 GAIN = ½ 0.0001 10 0 5 10 15 20 25 1 10 100 1k 10k 100k OUTPUT AMPLITUDE (dBu) FREQUENCY (Hz) Figure 35. Voltage Noise Spectral Density vs. Frequency, Referred to Output Figure 38. THD + N vs. Output Amplitude, Gain = 1 0.1 HD2, R = 100kΩ GAIN = 2 LOAD HD2, R = 2kΩ GAIN = 1 LOAD HD2, R = 600Ω V = 10V p-p LOAD OUT HD3, R = 100kΩ LOAD HD3, R = 2kΩ LOAD 0.01 HD3, R = 600Ω LOAD GAIN = 1 0.001 GAIN = ½ 0.0001 1µV/DIV 1s/DIV 0.00001 10 100 1k 10k 100k FREQUENCY (Hz) Figure 39. Harmonic Distortion Products vs. Frequency, Gain = 1 Figure 36. 0.1 Hz to 10 Hz Voltage Noise, Referred to Output Rev. 0 | Page 13 of 20 VOLTAGE NOISE SPECTRAL DENSITY (nV/√Hz) OUTPUT SLEW RATE (V/µs) –45 –35 –25 –15 –5 5 15 25 35 45 55 65 75 85 95 105 115 07363-042 125 07363-041 07363-130 AMPLITUDE (% OF FUNDAMENTAL) THDN + N (%) THD + N (%) 07363-133 07363-134 07363-135 AD8271 OPERATIONAL AMPLIFIER PLOTS VS = ±15 V, TA = 25°C, unless otherwise noted. 10 1 0.1 0 1 2 345 6 7 8 9 10 1 10 100 1k 10k 100k TIME (sec) FREQUENCY (Hz) Figure 40. Change in Op Amp Offset Voltage vs. Warm-Up Time Figure 42. Current Noise Spectral Density vs. Frequency 50pA/DIV 1s/DIV Figure 41. 0.1 Hz to 10 Hz Current Noise Rev. 0 | Page 14 of 20 OFFSET (10µV/DIV) 07363-028 07363-044 CURRENT NOISE SPECTRAL DENSITY (pA/√Hz) 07363-029 AD8271 THEORY OF OPERATION 10kΩ 10kΩ of the AD8271 depend on the matching of its resistors. Even P1 1 10 N3 source resistance of a few ohms can have a substantial effect on 10kΩ 10kΩ 2 9 these specifications. P2 N2 10kΩ 20kΩ POWER SUPPLIES 3 8 P3 N1 A stable dc voltage should be used to power the AD8271. Noise 20kΩ P4 4 7 OUT on the supply pins can adversely affect performance. A bypass capacitor of 0.1 μF should be placed between each supply pin 5 6 –V +V S AD8271 S and ground, as close as possible to each supply pin. A tantalum Figure 43. Functional Block Diagram capacitor of 10 μF should also be used between each supply and ground. It can be farther away from the supply pins and, typically, CIRCUIT INFORMATION it can be shared by other precision integrated circuits. The AD8271 consists of a high precision, low distortion op amp and seven trimmed resistors. These resistors can be connected The AD8271 is specified at ±15 V and ±5 V, but it can be used with to create a wide variety of amplifier configurations, including unbalanced supplies, as well. For example, −VS = 0 V, +VS = 20 V. difference, noninverting, and inverting configurations. The The difference between the two supplies must be kept below 36 V. resistors on the chip can be connected in parallel for a wider range INPUT VOLTAGE RANGE of options. Using the on-chip resistors of the AD8271 provides The AD8271 has a true rail-to-rail input range for the majority the designer with several advantages over a discrete design. of applications. Because most AD8271 configurations divide down DC Performance the voltage before they reach the internal op amp, the op amp sees Much of the dc performance of op amp circuits depends on the only a fraction of the input voltage. Figure 44 shows an example accuracy of the surrounding resistors. The resistors on the AD8271 of how the voltage division works in the difference amplifier are laid out to be tightly matched. The resistors of each part are configuration. laser trimmed and tested for their matching accuracy. Because R2 (V ) +IN R1 + R2 of this trimming and testing, the AD8271 can guarantee high R4 accuracy for specifications, such as gain drift, common-mode R3 rejection, and gain error. R1 AC Performance R2 Because feature size is much smaller in an integrated circuit than R2 on a printed circuit board (PCB), the corresponding parasitics are (V ) +IN R1 + R2 also smaller. The smaller feature size helps the ac performance of the AD8271. For example, the positive and negative input terminals Figure 44. Voltage Division in the Difference Amplifier Configuration of the AD8271 op amp are not pinned out intentionally. By not The internal op amp voltage range may be relevant in the connecting these nodes to the traces on the PCB, the capacitance following applications, and calculating the voltage at the remains low, resulting in both improved loop stability and internal op amp is advised. common-mode rejection over frequency. • Difference amplifier configurations using supply voltages Production Costs of less than ±4.5 V Because one part, rather than several discrete components, is • Difference amplifier configurations with a reference placed on the PCB, the board can be built more quickly and voltage near the rail efficiently. • Single-ended amplifier configurations Size For correct operation, the input voltages at the internal op amp The AD8271 fits an op amp and seven resistors in one MSOP must stay within 1.5 V of either supply rail. package. Voltages beyond the supply rails should not be applied to the DRIVING THE AD8271 part. The part contains ESD diodes at the input pins, which The AD8271 is easy to drive, with all configurations presenting conduct if voltages beyond the rails are applied. Currents greater at least several kilohms (kΩ) of input resistance. The AD8271 than 5 mA may damage these diodes and the part. For a similar should be driven with a low impedance source: for example, part that can operate with voltages beyond the rails, see the another amplifier. The gain accuracy and common-mode rejection AD8274 data sheet. Rev. 0 | Page 15 of 20 07363-032 07363-033 AD8271 APPLICATIONS INFORMATION The resistors and connections provided on the AD8271 offer The AD8271 can also be referred to a combination of reference abundant versatility through the variety of configurations that voltages. For example, the reference can be set at 2.5 V, using are possible. just 5 V and GND. Some of the possible configurations are shown in Figure 48 through Figure 50. Note that the output DIFFERENCE AMPLIFIER CONFIGURATIONS is not internally tied to a feedback path, so any of the 10 kΩ The AD8271 can be placed in difference amplifier configurations resistors on the inverting input can be used in the feedback with gains of ½, 1, and 2. Figure 45 through Figure 47 show network. This flexibility allows for more efficient board lay- sample difference amplifier configurations referenced to ground. out options. P1 10kΩ N3 10kΩ P1 10kΩ N3 10kΩ 1 10 +IN –IN 1 10 +IN –IN 5kΩ 5kΩ P2 N2 10kΩ 10kΩ P2 N2 10kΩ 10kΩ 2 9 10kΩ 10kΩ 2 9 –V –IN S –IN P3 10kΩ N1 20kΩ = = 10kΩ 10kΩ P3 10kΩ N1 20kΩ 3 8 +IN +IN 3 8 OUT P4 OUT 5kΩ +V 20kΩ 5kΩ S P4 OUT 20kΩ 4 7 4 7 +V + –V GND S S GND OUT 2 AD8271 AD8271 Figure 45. Gain = ½ Difference Amplifier, Referenced to Ground Figure 48. Gain = ½ Difference Amplifier, Referenced to Midsupply P1 N3 10kΩ 10kΩ P1 N3 10kΩ 1 10 10kΩ +IN –IN +IN 1 10 –IN 10kΩ 10kΩ P2 N2 10kΩ 10kΩ P2 10kΩ N2 10kΩ 10kΩ 2 9 NC NC –IN 2 9 10kΩ NC NC –IN = P3 N1 10kΩ 10kΩ 20kΩ P3 N1 = 10kΩ 3 8 20kΩ 10kΩ +IN –V 3 8 +IN S GND OUT P4 OUT 10kΩ OUT 20kΩ 10kΩ P4 OUT 4 7 20kΩ +V 4 7 S GND +V + –V S S AD8271 2 AD8271 Figure 46. Gain = 1 Difference Amplifier, Referenced to Ground Figure 49. Gain = 1 Difference Amplifier, Referenced to Midsupply P1 N3 10kΩ 10kΩ P1 10kΩ N3 1 10 10kΩ 1 10 10kΩ +IN –IN 10kΩ P2 N2 10kΩ 10kΩ +IN +IN P2 N2 2 9 10kΩ 10kΩ 5kΩ 2 9 5kΩ –IN –IN P3 N1 10kΩ 20kΩ = 5kΩ P3 10kΩ N1 3 8 20kΩ = 5kΩ +IN –V 3 8 S +IN GND OUT P4 OUT OUT 20kΩ 10kΩ P4 OUT 4 7 20kΩ 10kΩ +V 4 7 S GND OUT +V + –V S S AD8271 2 AD8271 Figure 47. Gain = 2 Difference Amplifier, Referenced to Ground Figure 50. Gain = 2 Difference Amplifier, Referenced to Midsupply Table 8. Pin Connections for Difference Amplifier Configurations Configuration Pin 1 Pin 2 Pin 3 Pin 4 Pin 8 Pin 9 Pin 10 Gain and Reference (P1) (P2) (P3) (P4) (N1) (N2) (N3) OUT Gain of ½, Referenced to Ground +IN GND GND GND OUT −IN Gain of ½, Referenced to Midsupply +IN −V +V +V OUT OUT −IN S S S Gain of 1, Referenced to Ground +IN NC GND GND OUT NC −IN NC Gain of 1, Referenced to Midsupply +IN NC −VS +VS OUT −IN −IN Gain of 2, Referenced to Ground +IN +IN GND GND OUT −IN Gain of 2, Referenced to Midsupply +IN +IN −V +V OUT −IN −IN S S Rev. 0 | Page 16 of 20 07363-053 07363-054 07363-055 07363-058 07363-057 07363-056 AD8271 SINGLE-ENDED CONFIGURATIONS The AD8271 can be configured for a wide variety of single-ended configurations with gains ranging from −2 to +3 (see Table 9). Table 9. Selected Single-Ended Configurations Electrical Performance Configuration 1 1 1 2 2 3 3 Signal Gain Op Amp Closed-Loop Gain Input Resistance Pin 10 Pin 9 Pin 8 Pin 1 Pin 2 Pin 3 Pin 4 −2 3 5 kΩ IN IN OUT GND GND GND GND OUT −1.5 3 4.8 kΩ IN IN GND GND GND IN −1.4 3 5 kΩ IN IN OUT GND GND NC IN −1.25 3 5.333 kΩ IN IN OUT GND NC GND IN −1 3 5 kΩ IN IN OUT GND GND IN IN OUT −0.8 3 5.556 kΩ IN IN IN GND NC GND −0.667 2 8 kΩ IN NC OUT GND GND GND IN −0.6 2 8.333 kΩ IN NC OUT GND GND NC IN −0.5 2 8.889 kΩ IN NC OUT GND NC GND IN OUT −0.333 2 7.5 kΩ IN NC GND GND IN IN −0.25 1.5 8 kΩ OUT IN OUT GND GND GND IN −0.2 1.5 8.333 kΩ OUT IN OUT GND GND NC IN −0.125 1.5 8.889 kΩ OUT IN OUT GND NC GND IN OUT +0.1 1.5 8.333 kΩ OUT IN IN GND NC GND +0.2 2 10 kΩ IN NC OUT GND IN NC IN +0.25 1.5 24 kΩ OUT GND OUT GND GND GND IN +0.3 1.5 25 kΩ OUT GND OUT GND GND NC IN OUT +0.333 2 24 kΩ GND NC GND GND GND IN +0.375 1.5 26.67 kΩ OUT GND OUT GND NC GND IN +0.4 2 25 kΩ GND NC OUT GND GND NC IN +0.5 3 24 kΩ GND GND OUT GND GND GND IN OUT +0.5 1.5 15 kΩ OUT GND GND GND IN IN +0.6 3 25 kΩ GND GND OUT GND GND NC IN +0.6 1.5 16.67 kΩ OUT GND OUT IN GND NC GND +0.625 1.5 16 kΩ OUT IN OUT NC IN IN GND OUT +0.667 2 15 kΩ GND NC GND GND IN IN +0.7 1.5 16.67 kΩ OUT IN OUT IN IN NC GND +0.75 3 26.67 kΩ GND GND OUT GND NC GND IN +0.75 1.5 13.33 kΩ OUT GND OUT GND IN GND IN OUT +0.8 2 16.67 kΩ GND NC IN GND NC GND +0.9 1.5 16.67 kΩ OUT GND OUT GND IN NC IN +1 1.5 15 kΩ OUT GND OUT IN IN GND GND +1 1.5 >1 GΩ OUT IN OUT IN IN IN IN OUT +1 3 >1 GΩ IN IN IN IN IN IN +1.125 1.5 26.67 kΩ OUT GND OUT NC IN IN GND +1.2 3 16.67 kΩ GND GND OUT IN GND NC GND +1.2 1.5 25 kΩ OUT GND OUT IN IN NC GND OUT +1.25 1.5 24 kΩ OUT GND IN IN IN GND +1.333 2 15 kΩ GND NC OUT IN IN GND GND +1.5 3 13.33 kΩ GND GND OUT GND IN GND IN +1.5 1.5 >1 GΩ OUT GND OUT IN IN IN IN OUT +1.6 2 25 kΩ GND NC IN IN NC GND +1.667 2 24 kΩ GND NC OUT IN IN IN GND +1.8 3 16.67 kΩ GND GND OUT GND IN NC IN +2 2 >1 GΩ GND NC OUT IN IN IN IN OUT +2.25 3 26.67 kΩ GND GND NC IN IN GND +2.4 3 25 kΩ GND GND OUT IN IN NC GND +2.5 3 24 kΩ GND GND OUT IN IN IN GND +3 3 >1 GΩ GND GND OUT IN IN IN IN 1 A 10 kΩ resistor is connected to the inverting (−) terminal of the op amp. 2 A 10 kΩ resistor is connected to the noninverting (+) terminal of the op amp. 3 A 20 kΩ resistor is connected to the noninverting (+) terminal of the op amp. Rev. 0 | Page 17 of 20 AD8271 SENSE 10kΩ R w Many signal gains have more than one configuration choice, which allows freedom in choosing the op amp closed-loop gain. In 10kΩ –IN R w general, for designs that need to be stable with a large capacitive 10kΩ +IN FORCE load on the output, choose a configuration with high loop gain. R Otherwise, choose a configuration with low loop gain, because L 10kΩ 1kΩ these configurations typically have lower noise, lower offset, and higher bandwidth. Figure 52. Connecting Both the Output and Feedback at the Load Minimizes Error Due to Wire Resistance The AD8271 Specifications section and Typical Performance Characteristics section show the performance of the part primarily INSTRUMENTATION AMPLIFIER when it is in the difference amplifier configuration. To estimate The AD8271 can be used as a building block for high performance the performance of the part in a single-ended configuration, refer instrumentation amplifiers. For example, Figure 53 shows how to the difference amplifier configuration with the corresponding to build an ultralow noise instrumentation amplifier using the closed-loop gain (see Table 10). AD8599 dual op amp. External resistors RG and RFx provide gain; therefore, the output is Table 10. Closed-Loop Gain of the Difference Amplifiers Difference Amplifier Gain Closed-Loop Gain ⎛ 2R ⎞ Fx ⎜ ⎟ V =() V −V 1+ () G 0.5 1.5 OUT +IN −IN AD8271 ⎜ ⎟ R G ⎝ ⎠ 1 2 AD8599 2 3 –IN A2 10kΩ Gain of 1 Configuration R F1 10kΩ 2kΩ The AD8271 is designed to be stable for loop gains of 1.5 and R G OUT 10kΩ greater. Because a typical voltage follower configuration has 20Ω R AD8271 F2 a loop gain of 1, it may be unstable. Several stable configurations 10kΩ 2kΩ for gain of 1 are listed in Table 9. REF KELVIN MEASUREMENT +IN AD8599 V = ±15V S A2 In the case where the output load is located remotely or at Figure 53.Ultralow Noise Instrumentation Amplifier Using AD8599 a distance from the AD8271, as shown in Figure 51, wire Configured for Gain = 201 resistance can actually cause significant errors at the load. For optimal noise performance, it is desirable to have a high 10kΩ gain at the input stage using low value gain-setting resistors, as R 10kΩ W shown in this particular example. With less than 2 nV/√Hz (WIRE RESISTANCE) –IN 10kΩ input-referred noise (see Figure 54) at ~10 mA supply current, +IN the AD8271 and AD8599 combination offers an in-amp with a R L 10kΩ 1kΩ fine balance of critical specifications: a gain bandwidth product of 10 MHz, low bias current, low offset drift, high CMRR, and Figure 51. Wire Resistance Causes Errors at Load Voltage high slew rate. 10.0 Since the output of the AD8271 is not internally tied to any of 9.0 the feedback resistors, Kelvin type measurements are possible because the op amp output and feedback can both be connected 8.0 closer to the load (Figure 52). The Kelvin sensing on the feedback 7.0 minimizes error at the load caused by voltage drops across the 6.0 wire resistance. This technique is most effective in reducing errors 5.0 for loads less than 10 kΩ. As the load resistance increases, the 4.0 error due to the wire resistance becomes less significant. G = 201 3.0 BANDWIDTH Because it adds the sense wire resistance to the feedback resistor, a LIMIT 2.0 trade-off of the Kelvin connection is that it can degrade common- mode rejection, especially over temperature. For sense wire 1.0 resistance less than 1 Ω, it is typically not an issue. If common- 0 1 10 100 1k 10k 100k mode performance is critical, two amplifier stages can be used: FREQUENCY (Hz) the first stage removes common-mode interference, and the Figure 54. Ultralow Noise In-Amp Voltage Noise Spectral Density vs. second stage performs the Kelvin drive. Frequency, Referred to Input Rev. 0 | Page 18 of 20 07363-149 VOLTAGE NOISE SPECTRAL DENSITY (nV/√Hz) 07363-150 07363-151 07363-153 AD8271 DRIVING CABLING DRIVING AN ADC Because the AD8271 can drive large voltages at high output The AD271 high slew rate and drive capability, combined with currents and slew rates, it makes an excellent cable driver. It is its dc accuracy, make it a good ADC driver. The AD8271 can good practice to put a small value resistor between the AD8271 drive single-ended input ADCs. Many converters require the output and cable, since capacitance in the cable can cause peaking output to be buffered with a small value resistor combined with or instability in the output response. A resistance of 20 Ω or higher a high quality ceramic capacitor. See the relevant converter data is recommended. sheet for more details. AD8271 (SINGLE OUT) Figure 55. Driving Cabling Rev. 0 | Page 19 of 20 07363-148 AD8271 OUTLINE DIMENSIONS 3.10 3.00 2.90 6 10 5.15 3.10 4.90 3.00 4.65 2.90 1 5 PIN 1 0.50 BSC 0.95 0.85 1.10 MAX 0.75 0.80 8° 0.15 0.60 0.33 SEATING 0.23 0° 0.05 PLANE 0.40 0.17 0.08 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-BA Figure 56. 10-Lead Mini Small Outline Package [MSOP] (RM-10) Dimensions are shown in millimeters ORDERING GUIDE Model Temperature Range Package Description Package Option Branding 1 AD8271ARMZ −40°C to +85°C 10-Lead MSOP RM-10 Y1E 1 AD8271ARMZ-R7 −40°C to +85°C 10-Lead MSOP, 7” Tape and Reel RM-10 Y1E 1 AD8271ARMZ-RL −40°C to +85°C 10-Lead MSOP, 13” Tape and Reel RM-10 Y1E 1 AD8271BRMZ −40°C to +85°C 10-Lead MSOP RM-10 Y1G 1 AD8271BRMZ-R7 −40°C to +85°C 10-Lead MSOP, 7” Tape and Reel RM-10 Y1G 1 AD8271BRMZ-RL −40°C to +85°C 10-Lead MSOP, 13” Tape and Reel RM-10 Y1G 1 Z = RoHS Compliant Part. ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07363-0-1/09(0) Rev. 0 | Page 20 of 20