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ANALOG DEVICES AD8270

Description

Analog Devices AD8270 Precision, Low Distortion, Dual-Channel Amplifier

Part Number

AD8270

Price

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Manufacturer

ANALOG DEVICES

Lead Time

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Category

PRODUCTS - A

Specifications

# Channels

2

CMRR (dB)

76dB

Gain Error (%) max

+0.08%

Rail-Rail In

Yes

Rail-Rail Out

Yes

Slew Rate

30V/µs

Vosi (µV)

1000µV

Features

Datasheet

pdf file

AD8270-1691881728.pdf

593 KiB

Extracted Text

Precision Dual-Channel, Difference Amplifier AD8270 FEATURES FUNCTIONAL BLOCK DIAGRAM With no external resistors Difference amplifier: gains of 0.5, 1, or 2 Single ended amplifiers: over 40 different gains Set reference voltage at midsupply Excellent ac specifications 10kΩ 10kΩ 10kΩ 10kΩ 15 MHz bandwidth –IN1A 1 12 –IN1B 30 V/μs slew rate 10kΩ 10kΩ _ –IN2A 2 11 –IN2B High accuracy dc performance 0.08% maximum gain error 10kΩ 10kΩ +IN2A 3 10 +IN2B + 10 ppm/°C maximum gain drift 10kΩ 10kΩ 80 dB minimum CMRR (G = 2) AD8270 +IN1A 4 9+IN1B Two channels in small 4 mm × 4 mm LFCSP Supply current: 2.5 mA per channel 20kΩ 20kΩ 20kΩ 20kΩ Supply range: ±2.5 V to ±18 V APPLICATIONS Instrumentation amplifier building blocks Figure 1. Level translators Automatic test equipment High performance audio Sine/Cosine encoders GENERAL DESCRIPTION Table 1. Difference Amplifiers by Category The AD8270 is a low distortion, dual-channel amplifier with High internal gain setting resistors. With no external components, High Single-Supply Single-Supply Speed Voltage Unidirectional Bidirectional it can be configured as a high performance difference amplifier AD8270 AD628 AD8202 AD8205 with gains of 0.5, 1, or 2. It can also be configured in over 40 single- AD8273 AD629 AD8203 AD8206 ended configurations, with gains ranging from −2 to +3. AMP03 AD8216 The AD8270 is the first dual-difference amplifier in the small 4 mm × 4 mm LFCSP. It requires the same board area as a typical single-difference amplifier. The smaller package allows a 2× increase in channel density and a lower cost per channel, all with no compromise in performance. The AD8270 operates on both single and dual supplies and requires only 2.5 mA maximum supply current for each ampli- fier. It is specified over the industrial temperature range of −40°C to +85°C and is fully RoHS compliant. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ©2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 06979-001 REF1A 5 16 +V S 15 OUTA REF2A 6 REF2B 7 14 OUTB 8 REF1B 13 –V S + _ AD8270 TABLE OF CONTENTS Features .............................................................................................. 1 Circuit Information.................................................................... 13 Applications....................................................................................... 1 Driving the AD8270................................................................... 13 General Description ......................................................................... 1 Package Considerations............................................................. 13 Functional Block Diagram .............................................................. 1 Power Supplies............................................................................ 13 Revision History ............................................................................... 2 Input Voltage Range................................................................... 14 Specifications..................................................................................... 3 Applications Information .............................................................. 15 Difference Amplifier Configurations ........................................ 3 Difference Amplifier Configurations ...................................... 15 Absolute Maximum Ratings............................................................ 5 Single-Ended Configurations ................................................... 15 Thermal Resistance ...................................................................... 5 Differential Output .................................................................... 17 Maximum Power Dissipation ..................................................... 5 Driving an ADC ......................................................................... 18 ESD Caution.................................................................................. 5 Driving Cabling .......................................................................... 18 Pin Configuration and Function Descriptions............................. 6 Outline Dimensions ....................................................................... 19 Typical Performance Characteristics ............................................. 7 Ordering Guide .......................................................................... 19 Theory of Operation ...................................................................... 13 REVISION HISTORY 1/08—Revision 0: Initial Version Rev. 0 | Page 2 of 20 AD8270 SPECIFICATIONS DIFFERENCE AMPLIFIER CONFIGURATIONS V = ±15 V, V = 0 V, T = 25°C, R = 2 kΩ, specifications referred to input, unless otherwise noted. S REF A LOAD Table 2. G = 0.5 G = 1 G = 2 Parameter Conditions Min Typ Max Min Typ Max Min Typ Max Unit DYNAMIC PERFORMANCE Bandwidth 20 15 10 MHz Slew Rate 30 30 30 V/μs Settling Time to 0.01% 10 V step on output 700 800 700 800 700 800 ns Settling Time to 0.001% 10 V step on output 750 900 750 900 750 900 ns NOISE/DISTORTION Harmonic Distortion f = 1 kHz, VOUT = 10 V p-p, 84 145 95 dB RLOAD = 600 Ω 1 Voltage Noise f = 0.1 Hz to 10 Hz 2 1.5 1 μV p-p f = 1 kHz 52 38 26 nV/√Hz GAIN Gain Error 0.08 0.08 0.08 % Gain Drift TA = −40°C to +85°C 1 10 1 10 1 10 ppm/°C INPUT CHARACTERISTICS 2 Offset 450 1500 300 1000 225 750 μV Average Temperature Drift TA = −40°C to +85°C 3 2 1.5 μV/°C Common-Mode Rejection DC to 1 kHz 70 86 76 92 80 98 dB Ratio Power Supply Rejection Ratio 2 10 2 10 2 10 μV/V 3 Input Voltage Range −15.4 +15.4 −15.4 +15.4 −15.4 +15.4 V 4 Common-Mode Resistance 7.5 10 7.5 kΩ Bias Current 500 500 500 nA OUTPUT CHARACTERISTICS Output Swing −13.8 +13.8 −13.8 +13.8 −13.8 +13.8 V T = −40°C to +85°C −13.7 +13.7 −13.7 +13.7 −13.7 +13.7 V A Short-Circuit Current Limit Sourcing 100 100 100 mA Sinking 60 60 60 mA POWER SUPPLY Supply Current 2.3 2.5 2.3 2.5 2.3 2.5 mA (per Amplifier) TA = −40°C to +85°C 3 3 3 mA 1 Includes amplifier voltage and current noise, as well as noise of internal resistors. 2 Includes input bias and offset errors. 3 At voltages beyond the rails, internal ESD diodes begin to turn on. In some configurations, the input voltage range may be limited by the internal op amp (see the Input Voltage Range section for details). 4 Internal resistors are trimmed to be ratio matched but have ±20% absolute accuracy. Common-mode resistance was calculated with both inputs in parallel. Common- mode impedance at only one input is 2× the resistance listed. Rev. 0 | Page 3 of 20 AD8270 V = ±5 V, V = 0 V, T = 25°C, R = 2 kΩ, specifications referred to input, unless otherwise noted. S REF A LOAD Table 3. G = 0.5 G = 1 G = 2 Parameter Conditions Min Typ Max Min Typ Max Min Typ Max Unit DYNAMIC PERFORMANCE Bandwidth 20 15 10 MHz Slew Rate 30 30 30 V/μs Settling Time to 0.01% 5 V step on output 550 650 550 650 550 650 ns Settling Time to 0.001% 5 V step on output 600 750 600 750 600 750 ns NOISE/DISTORTION Harmonic Distortion f = 1 kHz, VOUT = 5 V p-p, 101 141 112 dB RLOAD = 600 Ω 1 Voltage Noise f = 0.1 Hz to 10 Hz 2 1.5 1 μV p-p f = 1 kHz 52 38 26 nV/√Hz GAIN Gain Error 0.08 0.08 0.08 % Gain Drift TA = −40°C to +85°C 1 10 1 10 1 10 ppm/°C INPUT CHARACTERISTICS 2 Offset 450 1500 300 1000 225 750 μV Average Temperature Drift TA = −40°C to +85°C 3 2 1.5 μV/°C Common-Mode Rejection Ratio DC to 1 kHz 70 86 76 92 80 98 dB Power Supply Rejection Ratio 2 10 2 10 2 10 dB 3 Input Voltage Range −5.4 +5.4 −5.4 +5.4 −5.4 +5.4 V 4 Common-Mode Resistance 7.5 10 7.5 kΩ Bias Current 500 500 500 nA OUTPUT CHARACTERISTICS Output Swing −4 +4 −4 +4 −4 +4 V TA = −40°C to +85°C −3.9 +3.9 −3.9 +3.9 −3.9 +3.9 V Short-Circuit Current Limit Sourcing 100 100 100 mA Sinking 60 60 60 mA POWER SUPPLY Supply Current (per Amplifier) 2.3 2.5 2.3 2.5 2.3 2.5 mA T = −40°C to +85°C 3 3 3 mA A 1 Includes amplifier voltage and current noise, as well as noise of internal resistors. 2 Includes input bias and offset errors. 3 At voltages beyond the rails, internal ESD diodes begin to turn on. In some configurations, the input voltage range may be limited by the internal op amp (see the Input Voltage Range section for details). 4 Internal resistors are trimmed to be ratio matched but have ±20% absolute accuracy. Common-mode resistance was calculated with both inputs in parallel. Common- mode impedance at only one input is 2× the resistance listed. Rev. 0 | Page 4 of 20 AD8270 ABSOLUTE MAXIMUM RATINGS Table 4. MAXIMUM POWER DISSIPATION Parameter Rating The maximum safe power dissipation for the AD8270 is limited Supply Voltage ±18 V by the associated rise in junction temperature (TJ) on the die. At Output Short-Circuit Current See derating approximately 130°C, which is the glass transition temperature, curve in Figure 2 the plastic changes its properties. Even temporarily exceeding Input Voltage Range ±VS this temperature limit may change the stresses that the package Storage Temperature Range −65°C to +130°C exerts on the die, permanently shifting the parametric performance Specified Temperature Range −40°C to +85°C of the amplifiers. Exceeding a temperature of 130°C for an Package Glass Transition Temperature (T) 130°C G extended period of time can result in a loss of functionality. ESD (Human Body Model) 1 kV The AD8270 has built-in, short-circuit protection that limits the ESD (Charge Device Model) 1 kV output current to approximately 100 mA (see Figure 19 for ESD (Machine Model) 0.1 kV more information). While the short-circuit condition itself does not damage the part, the heat generated by the condition can Stresses above those listed under Absolute Maximum Ratings cause the part to exceed its maximum junction temperature, may cause permanent damage to the device. This is a stress with corresponding negative effects on reliability. rating only; functional operation of the device at these or any other conditions above those indicated in the operational 3.2 section of this specification is not implied. Exposure to absolute T MAXIMUM = 130°C J maximum rating conditions for extended periods may affect 2.8 device reliability. 2.4 PAD SOLDERED θ = 57°C/W JA 2.0 THERMAL RESISTANCE 1.6 Table 5. Thermal Resistance 1.2 Thermal Pad θJA Unit PAD NOT SOLDERED = 96°C/W θ JA 0.8 16-Lead LFCSP with Thermal Pad 57 °C/W Soldered to Board 0.4 16-Lead LFCSP with Thermal Pad 96 °C/W Not Soldered to Board 0 –50 –25 0 25 50 75 100 125 AMBIENT TEMPERATURE (°C) The θJA values in Table 5 assume a 4-layer JEDEC standard Figure 2. Maximum Power Dissipation vs. Ambient Temperature board with zero airflow. If the thermal pad is soldered to the board, it is also assumed it is connected to a plane. θ at the JC exposed pad is 9.7°C/W. ESD CAUTION Rev. 0 | Page 5 of 20 MAXIMUM POWER DISSIPATION (W) 06979-003 AD8270 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS PIN 1 INDICATOR –IN1A 1 12 –IN1B AD8270 11 –IN2B –IN2A 2 TOP VIEW +IN2A 3 10 +IN2B (Not to Scale) +IN1A 4 9+IN1B Figure 3. Pin Configuration Table 6. Pin Function Descriptions Pin No. Mnemonic Description 1 −IN1A 10 kΩ Resistor Connected to Negative Terminal of Op Amp A. 2 −IN2A 10 kΩ Resistor Connected to Negative Terminal of Op Amp A. 3 +IN2A 10 kΩ Resistor Connected to Positive Terminal of Op Amp A. 4 +IN1A 10 kΩ Resistor Connected to Positive Terminal of Op Amp A. 5 REF1A 20 kΩ Resistor Connected to Positive Terminal of Op Amp A. Most configurations use this pin as a reference voltage input. 6 REF2A 20 kΩ Resistor Connected to Positive Terminal of Op Amp A. Most configurations use this pin as a reference voltage input. 7 REF2B 20 kΩ Resistor Connected to Positive Terminal of Op Amp B. Most configurations use this pin as a reference voltage input. 8 REF1B 20 kΩ Resistor Connected to Positive Terminal of Op Amp B. Most configurations use this pin as a reference voltage input. 9 +IN1B 10 kΩ Resistor Connected to Positive Terminal of Op Amp B. 10 +IN2B 10 kΩ Resistor Connected to Positive Terminal of Op Amp B. 11 −IN2B 10 kΩ Resistor Connected to Negative Terminal of Op Amp B. 12 −IN1B 10 kΩ Resistor Connected to Negative Terminal of Op Amp B. 13 −V Negative Supply. S 14 OUTB Op Amp B Output. 15 OUTA Op Amp A Output. 16 +VS Positive Supply. Rev. 0 | Page 6 of 20 06979-002 REF1A 5 16 +V S REF2A 6 15 OUTA REF2B 7 14 OUTB REF1B 8 13 –V S AD8270 TYPICAL PERFORMANCE CHARACTERISTICS VS = ±15 V, TA = 25°C, difference amplifier configuration, unless otherwise noted. 160 20 N: 1043 (0, +15) MEAN: –0.003 140 15 SD: 0.28 (–7.5, +7.5) (+7.5, +7.5) 120 10 100 5 80 0 60 –5 40 –10 (–7.5, –7.5) (+7.5, –7.5) 20 –15 (0, –15) 0 –20 –0.9 –0.6 –0.3 0 0.3 0.6 0.9 –10 –5 0 5 10 SYSTEM OFFSET VOLTAGE (mV) OUTPUT VOLTAGE (V) Figure 4. Typical Distribution of System Offset Voltage, G = 1 Figure 7. Common-Mode Input Voltage vs. Output Voltage, Gain = 0.5, ±15 V Supplies 6 N: 984 (0, +5) MEAN: –1.01 180 SD: 27 4 (–2.5, +2.5) (+2.5, +2.5) (0, +2.5) 150 2 (–1.25, –1.25) (+1.25, +1.25) 120 V = ±2.5 V = ±5 S S 0 90 (–1.25, –1.25) (+1.25, –1.25) –2 60 (0, –2.5) (–2.5, –2.5) (+2.5, –2.5) –4 30 (0, –5) 0 –6 –150 –100 –50 0 50 100 150 –3 –2 –1 0 1 2 3 CMRR (µV/V) OUTPUT VOLTAGE (V) Figure 5. Typical Distribution of CMRR, G = 1 Figure 8. Common-Mode Input Voltage vs. Output Voltage, Gain = 0.5, ±5 V and ±2.5 V Supplies 20 400 N: 1043 MEAN: –0.015 (0, +15) SD: 0.0068 15 350 (–14.3, +7.85) (+14.3, +7.85) 300 10 250 5 200 0 150 –5 100 –10 (–14.3, –7.85) (+14.3, –7.85) 50 –15 (0, –15) 0 –20 –0.04 –0.02 0 0.02 0.04 –20 –15 –10 –5 0 5 10 15 20 GAIN ERROR (%) OUTPUT VOLTAGE (V) Figure 6. Typical Distribution of Gain Error, G = 1 Figure 9. Common-Mode Input Voltage vs. Output Voltage, Gain = 1, ±15 V Supplies Rev. 0 | Page 7 of 20 NUMBER OF UNITS NUMBER OF UNITS NUMBER OF UNITS 06979-004 06979-006 06979-005 COMMON-MODE INPUT VOLTAGE (V) COMMON-MODE INPUT VOLTAGE (V) COMMON-MODE INPUT VOLTAGE (V) 06979-008 06979-009 06979-007 AD8270 6 140 (0, +5) GAIN = 2, 0.5 120 4 (–4.3, +2.85) (+4.3, +2.85) (0, +2.5) 100 GAIN = 1 2 (–1.6, +1.7) (+1.6, +1.7) V = ±2.5 V = ±5 80 S S 0 60 (–1.6, –1.7) (+1.6, –1.7) –2 40 (0, –2.5) ( (– –4. 4.3, 3, + –2. 2.85 85) ) (+4.3, –2.85) –4 20 (0, –5) –6 0 –5 –4 –3 –2 –1 0 1 2 3 4 5 10 100 1k 10k 100k 1M OUTPUT VOLTAGE (V) FREQUENCY (Hz) Figure 10. Common-Mode Input Voltage vs. Output Voltage, Figure 13. Positive PSRR vs. Frequency Gain = 1, ±5 V and ±2.5 V Supplies 20 140 (0, +15) GAIN = 2, 0.5 15 120 (–14.3, +11.4) (+14.3, +11.4) 10 GAIN = 1 100 5 80 0 60 –5 40 –10 (–14.3, –11.4) (+14.3, –11.4) 20 –15 (0, –15) –20 0 –20 –15 –10 –5 0 5 10 15 20 10 100 1k 10k 100k 1M OUTPUT VOLTAGE (V) FREQUENCY (Hz) Figure 14. Negative PSRR vs. Frequency Figure 11. Common-Mode Input Voltage vs. Output Voltage, Gain = 2, ±15 V Supplies 32 6 (0, +5) V = ±15V S (–4, +4) (+4, +4) 28 4 (0, +2.5) 24 (–1.6, +2.1) (+1.6, +2.1) 2 20 V = ±2.5 V = ±5 S S 0 16 12 –2 V = ±5V S (–1.6, –2.1) (+1.6, –2.1) 8 (0, –2.5) –4 4 (–4, –4) (+4, –4) (0, –5) 0 –6 100 1k 10k 100k 1M 10M –5 –4 –3 –2 –1 0 1 2 3 4 5 FREQUENCY (Hz) OUTPUT VOLTAGE (V) Figure 12. Common-Mode Input Voltage vs. Output Voltage, Figure 15. Output Voltage Swing vs. Large Signal Frequency Response Gain = 2, ±5 V and ±2.5 V Supplies Rev. 0 | Page 8 of 20 COMMON-MODE INPUT VOLTAGE (V) COMMON-MODE INPUT VOLTAGE (V) COMMON-MODE INPUT VOLTAGE (V) 06979-012 06979-010 06979-011 OUTPUT VOLTAGE SWING (V p-p) NEGATIVE PSRR (dB) POSITIVE PSRR (dB) 06979-017 06979-016 06979-015 AD8270 10 120 I SHORT+ 100 GAIN = 2 5 80 60 GAIN = 1 0 40 20 GAIN = 0.5 –5 0 –20 –10 –40 I SHORT– –60 –15 –80 –100 –20 –120 –40 –20 0 20 40 60 80 100 120 100 1k 10k 100k 1M 10M 100M TEMPERATURE (°C) FREQUENCY (Hz) Figure 16. Gain vs. Frequency Figure 19. Short-Circuit Current vs. Temperature 100 +V S +125°C 90 GAIN = 2, 0.5 +V – 2 S 80 GAIN = 1 +85°C –40°C +25°C 70 +V – 4 S 60 50 0 +125°C 40 +85°C –V + 2 S 30 +25°C 20 –V + 4 S 10 –40°C 0 –V S 200 1k 10k 10 100 1k 10k 100k 1M 10M R (Ω) FREQUENCY (Hz) LOAD Figure 20. Output Voltage Swing vs. RLOAD Figure 17. CMRR vs. Frequency 0 +V S –40°C CROSSTALK (G = 1) +25°C –20 +V – 3 S –40 +V – 6 S +125°C –60 +85°C 0 –80 +125°C –V + 6 S –100 +85°C +25°C –V + 3 S –120 –40°C –V –140 S 0 2040 6080 100 10 100 1k 10k 100k FREQUENCY (Hz) CURRENT (mA) Figure 18. Channel Separation vs. Frequency Figure 21. Output Voltage Swing vs. Current (IOUT) Rev. 0 | Page 9 of 20 CHANNEL SEPARATION (dB) GAIN (dB) CMRR (dB) 06979-019 06979-018 06979-013 OUTPUT VOLTAGE SWING (V) OUTPUT VOLTAGE SWING (V) SHORT-CIRCUIT CURRENT (mA) 06979-021 06979-022 06979-023 AD8270 160 V = ±15V S 140 100pF V = ±10V S 18pF V = ±5V 0pF S 120 V = ±2.5V S 100 80 60 40 V = ±18V S V = ±15V S 20 0 1µs/DIV 0 102030 40 50 60 70 80 90 100 CAPACITIVE LOAD (pF) Figure 22. Small Signal Step Response, Gain = 0.5 Figure 25. Small Signal Overshoot with Capacitive Load, Gain = 0.5 80 V = ±15V S 70 220pF 33pF 0pF 60 V = ±10V S V = ±5V S 50 V = ±2.5V S 40 30 V = ±18V 20 S V = ±15V S 10 0 1µs/DIV 0 50 100 150 200 CAPACITIVE LOAD (pF) Figure 23. Small Signal Step Response, Gain = 1 Figure 26. Small Signal Overshoot with Capacitive Load, Gain = 1 80 V = ±15V S 70 470pF 100pF 0pF 60 50 V = ±10V S 40 V = ±5V S 30 V = ±2.5V S 20 V = ±18V S 10 V = ±15V S 0 1µs/DIV 0 50 100 150 200 250 300 350 400 450 CAPACITIVE LOAD (pF) Figure 24. Small Signal Step Response, Gain = 2 Figure 27. Small Signal Overshoot with Capacitive Load, Gain = 2 Rev. 0 | Page 10 of 20 50ms/DIV 50mV/DIV 50mV/DIV 06979-026 06979-025 06979-024 OVERSHOOT (%) OVERSHOOT (%) OVERSHOOT (%) 06979-032 06979-031 06979-030 AD8270 45 V = ±15V S V = ±5V IN 40 35 +SR 30 –SR 25 20 15 10 5 0 1µs/DIV –45–35–25 –15 –5 5 15 25 35 45 55 65 75 85 95 105 115 125 TEMPERATURE (°C) Figure 28. Large Signal Pulse Response Gain = 0.5 Figure 31. Output Slew Rate vs. Temperature 1k V = ±15V S V = ±5V IN GAIN = 2 100 GAIN = 1 GAIN = 0.5 10 1µs/DIV 1 10 100 1k 10k 100k FREQUENCY (Hz) Figure 29. Large Signal Pulse Response Gain = 1 Figure 32. Voltage Noise Spectral Density vs. Frequency, Referred to Output V = ±15V S GAIN = 2 V = ±5V IN GAIN = 1 GAIN = 1/2 1µV/DIV 1s/DIV 1µs/DIV Figure 30. Large Signal Pulse Response, Gain = 2 Figure 33. 0.1 Hz to 10 Hz Voltage Noise, Referred to Output Rev. 0 | Page 11 of 20 5V/DIV 2V/DIV 1V/DIV 06979-035 06979-034 06979-033 VOLTAGE NOISE (nV/√Hz) OUTPUT SLEW RATE (V/µs) 06979-042 06979-036 06979-041 AD8270 N: 1043 210 MEAN: 4.6 SD: 134.5 180 150 120 90 60 30 0 –600 –400 –200 0 200 400 600 0 1 2 345 6 7 8 9 10 V (µV) TIME (s) OSI Figure 34. Typical Distribution of Op Amp Voltage Offset Figure 37. Change in Op Amp Offset Voltage vs. Warm-Up Time 100 N: 1043 MEAN: 321.6 SD: 6.9 80 60 40 20 50pA/DIV 1s/DIV 0 310 315 320 325 330 335 340 I (nA) BIAS Figure 38. 0.1 Hz to 10 Hz Current Noise of Internal Op Amp Figure 35. Typical Distribution of Op Amp Bias Current 10 160 N: 1043 MEAN: 0.31 SD: 2.59 140 120 100 1 80 60 40 20 0 0.1 –9 –6 –3 0 3 6 9 12 1 10 100 1k 10k 100k I (nA) OFFSET FREQUENCY (Hz) Figure 39. Current Noise Spectral Density of Internal Op Amp Figure 36. Typical Distribution of Op Amp Offset Current Rev. 0 | Page 12 of 20 NUMBER OF UNITS NUMBER OF UNITS NUMBER OF UNITS 06979-027 06979-014 06979-020 CURRENT NOISE (pA/√Hz) OFFSET (10µV/DIV) 06979-028 06979-044 06979-029 AD8270 THEORY OF OPERATION Size The AD8270 fits two op amps and 14 resistors in a 4 mm × 4 mm package. DRIVING THE AD8270 10kΩ 10kΩ 10kΩ 10kΩ The AD8270 is easy to drive, with all configurations presenting –IN1A 1 12 –IN1B at least several kilohms (kΩ) of input resistance. The AD8270 10kΩ 10kΩ _ –IN2A 2 11 –IN2B should be driven with a low impedance source: for example, another amplifier. The gain accuracy and common-mode rejection 10kΩ 10kΩ +IN2A 3 10 +IN2B + of the AD8270 depend on the matching of its resistors. Even 10kΩ 10kΩ AD8270 source resistance of a few ohms can have a substantial effect on +IN1A 4 9+IN1B these specifications. 20kΩ 20kΩ 20kΩ 20kΩ PACKAGE CONSIDERATIONS The AD8270 is packaged in a 4 mm × 4 mm LFCSP. Beware of blindly copying the footprint from another 4 mm × 4 mm LFCSP part; it may not have the same thermal pad size and leads. Refer Figure 40. Functional Block Diagram to the Outline Dimensions section to verify that the PCB symbol has the correct dimensions. CIRCUIT INFORMATION The 4 mm × 4 mm LFCSP of the AD8270 comes with a thermal The AD8270 has two channels, each consisting of a high precision, pad. This pad is connected internally to −V . Connecting to this S low distortion op amp and seven trimmed resistors. These resis- pad is not necessary for electrical performance; the pad can be tors can be connected to make a wide variety of amplifier left unconnected or can be connected to the negative supply rail. configurations: difference, noninverting, inverting, and more. The resistors on the chip can be connected in parallel for a wider Connecting the pad to the negative supply rail is recommended range of options. Using the on-chip resistors of the AD8270 in high vibration applications or when good heat dissipation is provides the designer several advantages over a discrete design. required (for example, with high ambient temperatures or when driving heavy loads). For best heat dissipation performance, the DC Performance negative supply rail should be a plane in the board. See the Much of the dc performance of op amp circuits depends on the Absolute Maximum Ratings section for thermal coefficients accuracy of the surrounding resistors. The resistors on the AD8270 with and without the pad soldered. are laid out to be tightly matched. The resistors of each part are laser trimmed and tested for their matching accuracy. Because Space between the leads and thermal pad should be as wide as of this trimming and testing, the AD8270 can guarantee high possible to minimize the risk of contaminants affecting perform- accuracy for specifications such as gain drift, common-mode ance. A thorough washing of the board is recommended after the rejection, and gain error. soldering process, especially if high accuracy performance is required at high temperatures. AC Performance POWER SUPPLIES Because feature size is much smaller in an integrated circuit than on a PCB board, the corresponding parasitics are smaller, as well. A stable dc voltage should be used to power the AD8270. Noise The smaller feature size helps the ac performance of the AD8270. on the supply pins can adversely affect performance. A bypass For example, the positive and negative input terminals of the capacitor of 0.1 μF should be placed between each supply pin AD8270 op amp are not pinned out intentionally. By not and ground, as close as possible to each supply pin. A tantalum connecting these nodes to the traces on the PCB board, the capacitor of 10 μF should also be used between each supply and capacitance remains low, resulting in both improved loop ground. It can be farther away from the supply pins and, typically, stability and common-mode rejection over frequency. it can be shared by other precision integrated circuits. Production Costs The AD8270 is specified at ±15 V and ±5 V, but it can be used with unbalanced supplies, as well. For example, −VS = 0 V, +VS = 20 V. Because one part, rather than several, is placed on the PCB The difference between the two supplies must be kept below 36 V. board, the board can be built more quickly. Rev. 0 | Page 13 of 20 06979-059 REF1A 5 16 +V S 15 OUTA REF2A 6 REF2B 7 14 OUTB 8 REF1B 13 –V S + _ AD8270 The internal op amp voltage range may be relevant in the INPUT VOLTAGE RANGE following applications, and calculating the voltage at the The AD8270 has a true rail-to-rail input range for the majority internal op amp is advised. of applications. Because most AD8270 configurations divide down the voltage before they reach the internal op amp, the op amp sees • Difference amplifier configurations using supply voltages only a fraction of the input voltage. Figure 41 shows an example of less than ±4.5 V of how the voltage division works in the difference amplifier • Difference amplifier configurations with a reference configuration. voltage near the rail R2 • Single-ended amplifier configurations (V ) +IN R1 + R2 R4 For correct operation, the input voltages at the internal op amp R3 must stay within 1.5 V of either supply rail. R1 Voltages beyond the supply rails should not be applied to the R2 part. The part contains ESD diodes at the input pins, which conduct if voltages beyond the rails are applied. Currents greater R2 (V ) +IN than 5 mA can damage these diodes and the part. For a similar R1 + R2 part that can operate with voltages beyond the rails, see the Figure 41. Voltage Division in the Difference Amplifier Configuration AD8273 data sheet. Rev. 0 | Page 14 of 20 06979-061 AD8270 APPLICATIONS INFORMATION SINGLE-ENDED CONFIGURATIONS DIFFERENCE AMPLIFIER CONFIGURATIONS The AD8270 can be configured for a wide variety of single- The AD8270 can be placed in difference amplifier configurations ended configurations with gains ranging from −2 to +3. with gains of 0.5, 1, and 2. Figure 42 through Figure 44 show the Table 8 shows a subset of the possible configurations. difference amplifier configurations, referenced to ground. The AD8270 can also be referred to a combination of reference voltages. Many signal gains have more than one configuration choice, For example, the reference could be set at 2.5 V, using just 5 V which allows freedom in choosing the op amp closed-loop gain. and GND. Some of the possible configurations are shown in In general, for designs that need to be stable with a large capacitive Figure 45 through Figure 47. load on the output, choose a configuration with high loop gain. Otherwise, choose a configuration with low loop gain, because The layout for Channel A is shown in Figure 42 through Figure 47. these configurations typically have lower noise, lower offset, The layout for Channel B is symmetrical. Table 7 shows the pin and higher bandwidth. connections for Channel A and Channel B. 16 15 16 15 5kΩ 5kΩ 10kΩ 10kΩ 10kΩ 10kΩ 1 1 10kΩ 10kΩ 10kΩ 10kΩ –IN –IN 2 –IN 2 –IN = = 10kΩ 10kΩ 10kΩ 10kΩ 3 3 +IN +IN +IN +IN 10kΩ 10kΩ 4 4 5kΩ 5kΩ 20kΩ 20kΩ 20kΩ 20kΩ 56 56 GND +V + –V S S 2 GND –V +V S S Figure 42. Gain = 0.5 Difference Amplifier, Referenced to Ground Figure 45. Gain = 0.5 Difference Amplifier, Referenced to Midsupply 16 15 16 15 10kΩ 10kΩ 10kΩ 10kΩ 10kΩ 10kΩ 1 1 –IN –IN 10kΩ 10kΩ 10kΩ –IN 10kΩ –IN NC 2 2 NC = = 10kΩ 10kΩ 10kΩ 10kΩ 3 3 NC NC +IN +IN 10kΩ 10kΩ 4 4 +IN +IN 10kΩ 10kΩ 20kΩ 20kΩ 20kΩ 20kΩ 56 56 GND +V + –V S S 2 –V +V GND S S NC = NO CONNECT NC = NO CONNECT Figure 43. Gain = 1 Difference Amplifier, Referenced to Ground Figure 46. Gain = 1 Difference Amplifier, Referenced to Midsupply 16 15 16 15 10kΩ 10kΩ 10kΩ 10kΩ 10kΩ 10kΩ 1 1 5kΩ 5kΩ –IN 10kΩ –IN –IN 10kΩ –IN 2 2 = = 10kΩ 5kΩ 10kΩ 5kΩ 3 3 +IN +IN +IN 10kΩ +IN 10kΩ 4 4 20kΩ 20kΩ 10kΩ 20kΩ 20kΩ 10kΩ 56 56 GND +V + –V S S 2 –V +V GND S S Figure 44. Gain = 2 Difference Amplifier, Referenced to Ground Figure 47. Gain = 2 Difference Amplifier, Referenced to Midsupply Table 7. Pin Connections for Difference Amplifier Configurations Channel A Channel B Gain and Reference Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 12 Pin 11 Pin 10 Pin 9 Pin 8 Pin 7 Gain of 0.5, Referenced to Ground OUT −IN +IN GND GND GND OUT −IN +IN GND GND GND Gain of 0.5, Referenced to Midsupply OUT −IN +IN −V +V +V OUT −IN +IN −V +V +V S S S S S S Gain of 1, Referenced to Ground −IN NC NC +IN GND GND −IN NC NC +IN GND GND Gain of 1, Referenced to Midsupply −IN NC NC +IN −VS +VS −IN NC NC +IN −VS +VS Gain of 2, Referenced to Ground −IN −IN +IN +IN GND GND −IN −IN +IN +IN GND GND Gain of 2, Referenced to Midsupply −IN −IN +IN +IN −V +V −IN −IN +IN +IN −V +V S S S S Rev. 0 | Page 15 of 20 06979-053 06979-055 06979-054 06979-058 06979-057 06979-056 AD8270 Table 8. Selected Single-Ended Configurations Electrical Performance Pin Connections 20 kΩ + Op Amp Input 10 kΩ − 10 kΩ − 10 kΩ + 10 kΩ + 20 kΩ + Signal Gain Closed-Loop Gain Resistance Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 −2 3 5 kΩ IN IN GND GND GND GND −1.5 3 4.8 kΩ IN IN GND GND GND IN −1.4 3 5 kΩ IN IN GND GND NC IN −1.25 3 5.333 kΩ IN IN GND NC GND IN −1 3 5 kΩ IN IN GND GND IN IN −0.8 3 5.556 kΩ IN IN IN GND NC GND −0.667 2 8 kΩ IN NC GND GND GND IN −0.6 2 8.333 kΩ IN NC GND GND NC IN −0.5 2 8.889 kΩ IN NC GND NC GND IN −0.333 2 7.5 kΩ IN NC GND GND IN IN −0.25 1.5 8 kΩ OUT IN GND GND GND IN −0.2 1.5 8.333 kΩ OUT IN GND GND NC IN −0.125 1.5 8.889 kΩ OUT IN GND NC GND IN +0.1 1.5 8.333 kΩ OUT IN IN GND NC GND +0.2 2 10 kΩ IN NC GND IN NC IN +0.25 1.5 24 kΩ OUT GND GND GND GND IN +0.3 1.5 25 kΩ OUT GND GND GND NC IN +0.333 2 24 kΩ GND NC GND GND GND IN +0.375 1.5 26.67 kΩ OUT GND GND NC GND IN +0.4 2 25 kΩ GND NC GND GND NC IN +0.5 3 24 kΩ GND GND GND GND GND IN +0.5 1.5 15 kΩ OUT GND GND GND IN IN +0.6 3 25 kΩ GND GND GND GND NC IN +0.6 1.5 16.67 kΩ OUT GND IN GND NC GND +0.625 1.5 16 kΩ OUT IN NC IN IN GND +0.667 2 15 kΩ GND NC GND GND IN IN +0.7 1.5 16.67 kΩ OUT IN IN IN NC GND +0.75 3 26.67 kΩ GND GND GND NC GND IN +0.75 1.5 13.33 kΩ OUT GND GND IN GND IN +0.8 2 16.67 kΩ GND NC IN GND NC GND +0.9 1.5 16.67 kΩ OUT GND GND IN NC IN +1 1.5 15 kΩ OUT GND IN IN GND GND +1 1.5 >1 GΩ OUT IN IN IN IN IN +1 3 >1 GΩ IN IN IN IN IN IN +1.125 1.5 26.67 kΩ OUT GND NC IN IN GND +1.2 3 16.67 kΩ GND GND IN GND NC GND +1.2 1.5 25 kΩ OUT GND IN IN NC GND +1.25 1.5 24 kΩ OUT GND IN IN IN GND +1.333 2 15 kΩ GND NC IN IN GND GND +1.5 3 13.33 kΩ GND GND GND IN GND IN +1.5 1.5 >1 GΩ OUT GND IN IN IN IN +1.6 2 25 kΩ GND NC IN IN NC GND +1.667 2 24 kΩ GND NC IN IN IN GND +1.8 3 16.67 kΩ GND GND GND IN NC IN +2 2 >1 GΩ GND NC IN IN IN IN +2.25 3 26.67 kΩ GND GND NC IN IN GND +2.4 3 25 kΩ GND GND IN IN NC GND +2.5 3 24 kΩ GND GND IN IN IN GND +3 3 >1 GΩ GND GND IN IN IN IN Rev. 0 | Page 16 of 20 AD8270 +OUT –OUT The AD8270 Specifications section and Typical Performance 16 15 14 13 Characteristics section show the performance of the part primarily V – V = V – V +IN –IN +OUT –OUT when it is in the difference amplifier configuration. To get a good V = V + V OCM +OUT –OUT 10kΩ 10kΩ 10kΩ 10kΩ 1 12 estimate of the performance of the part in a single-ended 10kΩ 10kΩ _ 11 –IN 2 +IN +IN +OUT configuration, refer to the difference amplifier configuration 10kΩ 10kΩ = V 10 OCM +IN 3 + –IN with the corresponding closed-loop gain (see Table 9). –OUT 10kΩ 10kΩ –IN AD8270 4 9 Table 9. Closed-Loop Gain of the Difference Amplifiers 20kΩ 20kΩ 20kΩ 20kΩ 5 6 7 8 Difference Amplifier Gain Closed-Loop Gain OCM 0.5 1.5 OCM 1 2 Figure 48. Differential Output, G = 1, Common-Mode Output Voltage 2 3 Set with Reference Voltage Gain of 1 Configuration +OUT –OUT The AD8270 is designed to be stable for loop gains of 1.5 and 16 15 14 13 V – V = V – V +IN –IN +OUT –OUT greater. Because a typical voltage follower configuration has V + V A B V + V = +OUT –OUT 10kΩ 10kΩ 10kΩ 10kΩ 2 1 a loop gain of 1, it may be unstable. Several stable G = 1 configu- 12 10kΩ 10kΩ _ 2 11 –IN +IN +IN +OUT rations are listed in Table 8. 10kΩ 10kΩ = V 3 10 –IN OCM +IN + DIFFERENTIAL OUTPUT –IN –OUT 10kΩ 10kΩ AD8270 A 4 9 A The AD8270 can easily be configured for differential output. 20kΩ 20kΩ 20kΩ 20kΩ Figure 48 shows the configuration for a G = 1 differential output 5 6 7 8 V + V A B amplifier. The OCM node in the figure sets the common-mode 2 B output voltage. Figure 49 shows the configuration for a G = 1 Figure 49. Differential Output, G = 1, Common-Mode Output Voltage differential output amplifier, where the average of two voltages Set as the Average of Two Voltages sets the common-mode output voltage. For example, this Note that these two configurations are based on the G = 0.5 configuration can be used to set the common mode at 2.5 V, difference amplifier configurations shown in Figure 42 and using just a 5 V reference and GND. Figure 45. A similar technique can be used to create differential output with a gain of 2 or 4, using the G = 1 and G = 2 difference amplifier configurations, respectively. Rev. 0 | Page 17 of 20 06979-063 06979-062 + _ + _ AD8270 To reduce the peaking, use a resistor between the AD8270 and the DRIVING AN ADC cable. Because cable capacitance and desired output response vary The AD270 high slew rate and drive capability, combined with widely, this resistor is best determined empirically. A good starting its dc accuracy, make it a good ADC driver. The AD8270 can point is 20 Ω. drive both single-ended and differential input ADCs. Many converters require the output to be buffered with a small value resistor combined with a high quality ceramic capacitor. See the AD8270 converter data sheet for more details. Figure 51 shows the AD8270 (DIFF OUT) in differential configuration, driving the AD7688 ADC. The AD8270 divides down the 5 V reference voltage from the ADR435, so that the common-mode output voltage is 2.5 V, which is precisely where the AD7688 needs it. DRIVING CABLING AD8270 (SINGLE OUT) All cables have a certain capacitance per unit length, which varies widely with cable type. The capacitive load from the cable may cause peaking or instability in output response, especially when the AD8270 is operating in a gain of 0.5. Figure 50. Driving Cabling +12V –12V 16 13 NOTE: 10kΩ POWER SUPPLY DECOUPLING 1 NOT SHOWN. 10kΩ 10kΩ –IN 2 33Ω 15 3 +IN 10kΩ 3 2.7nF +IN COG AD7688 10kΩ 4 33Ω REF 20kΩ 4 –IN 5 1 2.7nF COG 20kΩ 6 AD8270 5V_REF 0.1µF 20kΩ 7 0.1µF +12V 20kΩ 8 2 10kΩ V 9 IN V 5 5V_REF OUT 10kΩ 10 –IN 10µF ADR435 14 10kΩ 11 +IN GND 10kΩ 4 10kΩ 12 Figure 51. Driving an ADC Rev. 0 | Page 18 of 20 06979-037 06979-060 AD8270 OUTLINE DIMENSIONS 4.00 0.60 MAX BSC SQ 0.60 MAX PIN 1 INDICATOR 13 16 1 12 PIN 1 0.65 BSC 2.50 INDICATOR TOP 3.75 EXPOSED 2.35 SQ VIEW PAD BSC SQ (BOTTOM VIEW) 2.20 0.50 9 0.40 4 8 5 0.30 0.25 MIN 0.80 MAX 1.95 BSC 12° MAX 0.65 TYP 0.05 MAX 1.00 0.02 NOM 0.85 0.35 0.80 0.20 REF 0.30 COPLANARITY SEATING 0.08 0.25 PLANE COMPLIANT TO JEDEC STANDARDS MO-220-VGGC Figure 52. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 4 mm × 4 mm Body, Very Thin Quad (CP-16-10) Dimensions are shown in millimeters ORDERING GUIDE Model Temperature Range Package Description Package Option 1 AD8270ACPZ-R7 −40°C to +85°C 16-Lead LFCSP_VQ CP-16-10 1 AD8270ACPZ-RL −40°C to +85°C 16-Lead LFCSP_VQ CP-16-10 1 AD8270ACPZ-WP −40°C to +85°C 16-Lead LFCSP_VQ CP-16-10 1 Z = RoHS Compliant Part. Rev. 0 | Page 19 of 20 010606-0 AD8270 NOTES ©2008 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D06979-0-1/08(0) Rev. 0 | Page 20 of 20

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