ANALOG DEVICES AD8231

Zero Drift, Digitally Programmable Instrumentation Amplifier AD8231 FEATURES FUNCTIONAL BLOCK DIAGRAM Digitally/pin-programmable gain G = 1, 2, 4, 8, 16, 32, 64, or 128 Specified from −40°C to +125°C 1 12 50 nV/°C maximum input offset drift NC +V S 10 ppm/°C maximum gain drift LOGIC 2 11 –INA –V S Excellent dc performance IN-AMP 80 dB minimum CMR, G = 1 3 10 +INA OUTA 15 μV maximum input offset voltage 4 9 500 pA maximum bias current NC REF 0.7 μV p-p noise (0.1 Hz to 10 Hz) OP AMP Good ac performance AD8231 2.7 MHz bandwidth, G = 1 1.1 V/μs slew rate Rail-to-rail output Figure 1. Shutdown/multiplex Extra op amp Table 1. Instrumentation and Difference Amplifiers by Single-supply range: 3 V to 5 V Category Dual-supply range: ±1.5 V to ±2.5 V High Low High Mil Low Digital Qualified for automotive applications Performance Cost Voltage Grade Power Gain 1 1 1 AD8221 AD623 AD628 AD620 AD627 AD8231 1 1 AD8220 AD8553 AD629 AD621 AD8250 APPLICATIONS AD8222 AD524 AD8251 1 1 Pressure and strain transducers AD8224 AD526 AD8555 1 Thermocouples and RTDs AD624 AD8556 1 AD8557 Programmable instrumentation Industrial controls 1 Rail-to-rail output. Weigh scales Automotive controls GENERAL DESCRIPTION The AD8231 also includes an uncommitted op amp that can be The AD8231 is a low drift, rail-to-rail, instrumentation amplifier used for additional gain, differential signal driving, or filtering. with software-programmable gains of 1, 2, 4, 8, 16, 32, 64, or 128. Like the in-amp, the op amp has an auto-zero architecture, rail- The gains are programmed via digital logic or pin strapping. to-rail input, and rail-to-rail output. The AD8231 is ideal for applications that require precision The AD8231 includes a shutdown feature that reduces current performance over a wide temperature range, such as industrial to a maximum of 1 μA. In shutdown, both amplifiers also have temperature sensing and data logging. Because the gain setting a high output impedance, which allows easy multiplexing of resistors are internal, maximum gain drift is only 10 ppm/°C for multiple amplifiers without additional switches. gains of 1 to 32. Because of the auto-zero input stage, maximum input offset is 15 μV and maximum input offset drift is just The AD8231 is specified over the extended industrial tempera- 50 nV/°C. CMRR is 80 dB for G = 1, increasing to 110 dB at ture range of −40°C to +125°C. It is available in a 4 mm × 4 mm higher gains. 16-lead LFCSP. Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ©2007–2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 5 16 SDN A2 6 15 +INB A1 7 14 –INB A0 8 13 OUTB CS 06586-001 AD8231 TABLE OF CONTENTS Features .............................................................................................. 1  Gain Selection............................................................................. 18  Applications....................................................................................... 1  Reference Terminal .................................................................... 18  Functional Block Diagram .............................................................. 1  Layout .......................................................................................... 19  General Description ......................................................................... 1  Input Bias Current Return Path ............................................... 19  Revision History ............................................................................... 2  Input Protection ......................................................................... 19  Specifications..................................................................................... 3  RF Interference ........................................................................... 20  Absolute Maximum Ratings............................................................ 7  Common-Mode Input Voltage Range ..................................... 20  Thermal Resistance ...................................................................... 7  Reducing Noise........................................................................... 20  Maximum Power Dissipation ..................................................... 7  Applications Information .............................................................. 21  ESD Caution.................................................................................. 7  Differential Output .................................................................... 21  Pin Configuration and Function Descriptions............................. 8  Multiplexing................................................................................ 21  Typical Performance Characteristics ............................................. 9  Using the AD8231 with Bipolar Supplies................................ 21  Instrumentation Amplifier Performance Curves..................... 9  Sallen Key Filter.......................................................................... 22  Operational Amplifier Performance Curves .......................... 15  Outline Dimensions....................................................................... 23  Performance Curves Valid for Both Amplifiers ..................... 17  Ordering Guide .......................................................................... 23  Theory of Operation ...................................................................... 18  Automotive Products................................................................. 23  Amplifier Architecture .............................................................. 18  REVISION HISTORY 4/11—Rev. A to Rev. B 5/07—Revision 0: Initial Version Changes to Features Section and Applications Section............... 1 Added Exposed Pad Notation to Outline Dimensions ............. 23 Changes to Ordering Guide .......................................................... 23 Added Automotive Products Section .......................................... 23 9/07—Rev. 0 to Rev. A Changes to Features and General Description ............................. 1 Changes to Table 2............................................................................ 3 Changes to Table 3............................................................................ 5 Changes to Typical Performance Characteristics Layout............ 9 Inserted Figure 3 to Figure 8; Renumbered Sequentially............ 9 Inserted Figure 9; Renumbered Sequentially.............................. 10 Inserted Figure 16, and Figure 18 to Figure 20; Renumbered Sequentially ..................................................................................... 11 Inserted Figure 24; Renumbered Sequentially............................ 12 Deleted Figure 28 and Figure 29; Renumbered Sequentially ... 13 Inserted Figure 33 and Figure 34; Renumbered Sequentially... 14 Inserted Figure 41 to Figure 46; Renumbered Sequentially...... 16 Inserted Figure 48; Renumbered Sequentially............................ 17 Changes to Gain Selection Section and Figure 50 ..................... 18 Added Input Protection Section................................................... 19 Added Reducing Noise Section .................................................... 20 Changes to Multiplexing Section.................................................. 21 Added Using the AD8231 with Bipolar Supplies Section ......... 21 Added Sallen Key Filter Section ................................................... 22 Changes to Ordering Guide .......................................................... 23 Rev. B | Page 2 of 24 AD8231 SPECIFICATIONS VS = 5 V, VREF = 2.5 V, G = 1, RL = 10 kΩ, TA = 25°C, unless otherwise noted. Table 2. Parameter Conditions Min Typ Max Unit INSTRUMENTATION AMPLIFIER Offset Voltage V RTI = V + V/G OS OSI OSO Input Offset, VOSI 4 15 μV Average Temperature Drift TA = −40°C to +125°C 0.01 0.05 μV/°C Output Offset, VOSO 15 30 μV Average Temperature Drift T = −40°C to +125°C 0.05 0.5 μV/°C A Input Currents Input Bias Current 250 500 pA TA = −40°C to +125°C 5 nA Input Offset Current 20 100 pA T = −40°C to +125°C 0.5 nA A Gains 1, 2, 4, 8, 16, 32, 64, or 128 Gain Error G = 1 0.05 % G = 2 to 128 0.8 % Gain Drift TA = −40°C to +125°C G = 1 to 32 3 10 ppm/°C G = 64 4 20 ppm/°C G = 128 10 30 ppm/°C Linearity 0.2 V to 4.8 V, 10 kΩ load 3 ppm 0.2 V to 4.8 V, 2 kΩ load 5 ppm CMRR G = 1 80 dB G = 2 86 dB G = 4 92 dB G = 8 98 dB G = 16 104 dB G = 32 110 dB G = 64 110 dB G = 128 110 dB 2 2 Noise en = √(eni + (eno/G) ), VIN+, VIN− = 2.5 V Input Voltage Noise, eni f = 1 kHz 32 nV/√Hz f = 1 kHz, TA = −40°C 27 nV/√Hz f = 1 kHz, T = 125°C 39 nV/√Hz A f = 0.1 Hz to 10 Hz 0.7 μV p-p Output Voltage Noise, eno f = 1 kHz 58 nV/√Hz f = 1 kHz, TA = −40°C 50 nV/√Hz f = 1 kHz, TA = 125°C 70 nV/√Hz f = 0.1 Hz to 10 Hz 1.1 μV p-p Current Noise f = 10 Hz 20 fA/√Hz Other Input Characteristics Common-Mode Input Impedance 10||5 GΩ||pF Power Supply Rejection Ratio 100 115 dB Input Operating Voltage Range 0.05 4.95 V Reference Input Input Impedance 28 kΩ Voltage Range −0.2 +5.2 V Rev. B | Page 3 of 24 AD8231 Parameter Conditions Min Typ Max Unit Dynamic Performance Bandwidth G = 1 2.7 MHz G = 2 2.5 MHz Gain Bandwidth Product G = 4 to 128 7 MHz Slew Rate 1.1 V/μs Output Characteristics Output Voltage High R = 100 kΩ to ground 4.9 4.94 V L R = 10 kΩ to ground 4.8 4.88 V L Output Voltage Low RL = 100 kΩ to 5 V 60 100 mV RL = 10 kΩ to 5 V 80 200 mV Short-Circuit Current 70 mA Digital Interface Input Voltage Low T = −40°C to +125°C 1.0 V A Input Voltage High T = −40°C to +125°C 4.0 V A Setup Time to CS High TA = −40°C to +125°C 50 ns Hold Time after CS High TA = −40°C to +125°C 20 ns OPERATIONAL AMPLIFIER Input Characteristics Offset Voltage, VOS 5 15 μV Temperature Drift TA = −40°C to +125°C 0.01 0.06 μV/°C Input Bias Current 250 500 pA T = −40°C to +125°C 5 nA A Input Offset Current 20 100 pA TA = −40°C to +125°C 0.5 nA Input Voltage Range 0.05 4.95 V Open-Loop Gain 100 120 V/mV Common-Mode Rejection Ratio 100 120 dB Power Supply Rejection Ratio 100 110 dB Voltage Noise Density 20 nV/√Hz Voltage Noise f = 0.1 Hz to 10 Hz 0.4 μV p-p Dynamic Performance Gain Bandwidth Product 1 MHz Slew Rate 0.5 V/μs Output Characteristics Output Voltage High RL = 100 kΩ to ground 4.9 4.96 V RL = 10 kΩ to ground 4.8 4.92 V Output Voltage Low RL = 100 kΩ to 5 V 60 100 mV R = 10 kΩ to 5 V 80 200 mV L Short-Circuit Current 70 mA BOTH AMPLIFIERS Power Supply Quiescent Current 4 5 mA Quiescent Current (Shutdown) 0.01 1 μA Rev. B | Page 4 of 24 AD8231 V = 3.0 V, V = 1.5 V, T = 25°C, G = 1, R = 10 kΩ, unless otherwise noted. S REF A L Table 3. Parameter Conditions Min Typ Max Unit INSTRUMENTATION AMPLIFIER Offset Voltage V RTI = V + V/G OS OSI OSO Input Offset, V 4 15 μV OSI Average Temperature Drift 0.01 0.05 μV/°C Output Offset, VOSO 15 30 μV Average Temperature Drift 0.05 0.5 μV/°C Input Currents Input Bias Current 250 500 pA T = −40°C to +125°C 5 nA A Input Offset Current 20 100 pA TA = −40°C to +125°C 0.5 nA Gains 1, 2, 4, 8, 16, 32, 64, or 128 Gain Error G = 1 0.05 % G = 2 to 128 0.8 % Gain Drift TA = −40°C to +125°C G = 1 to 32 3 10 ppm/°C G = 64 4 20 ppm/°C G = 128 10 30 ppm/°C CMRR G = 1 80 dB G = 2 86 dB G = 4 92 dB G = 8 98 dB G = 16 104 dB G = 32 110 dB G = 64 110 dB G = 128 110 dB 2 2 Noise en = √(eni + (eno/G) ) V , V = 2.5 V, T = 25°C IN+ IN− A Input Voltage Noise, e f = 1 kHz 40 nV/√Hz ni f = 1 kHz, T = −40°C 35 nV/√Hz A f = 1 kHz, TA = 125°C 48 nV/√Hz f = 0.1 Hz to 10 Hz 0.8 μV p-p Output Voltage Noise, eno f = 1 kHz 72 nV/√Hz f = 1 kHz, T = −40°C 62 nV/√Hz A f = 1 kHz, T = 125°C 83 nV/√Hz A f = 0.1 Hz to 10 Hz 1.4 μV p-p Current Noise f = 10 Hz 20 fA/√Hz Other Input Characteristics Common-Mode Input Impedance 10||5 GΩ||pF Power Supply Rejection Ratio 100 115 dB Input Operating Voltage Range 0.05 2.95 V Reference Input Input Impedance 28 kΩ||pF Voltage Range −0.2 +3.2 V Rev. B | Page 5 of 24 AD8231 Parameter Conditions Min Typ Max Unit Dynamic Performance Bandwidth G = 1 2.7 MHz G = 2 2.5 MHz Gain Bandwidth Product G = 4 to 128 7 MHz Slew Rate 1.1 V/μs Output Characteristics Output Voltage High R = 100 kΩ to ground 2.9 2.94 V L R = 10 kΩ to ground 2.8 2.88 V L Output Voltage Low R = 100 kΩ to 3 V 60 100 mV L RL = 10 kΩ to 3 V 80 200 mV Short-Circuit Current 40 mA Digital Interface Input Voltage Low T = −40°C to +125°C 0.7 V A Input Voltage High T = −40°C to +125°C 2.3 V A T = −40°C to +125°C 60 ns Setup Time to CS High A Hold Time after CS High TA = −40°C to +125°C 20 ns OPERATIONAL AMPLIFIERS Input Characteristics Offset Voltage, VOS 5 15 μV Temperature Drift TA = −40°C to +125°C 0.01 0.06 μV/°C Input Bias Current 250 500 pA T = −40°C to +125°C 5 nA A Input Offset Current 20 100 pA TA = −40°C to +125°C 0.5 nA Input Voltage Range 0.05 2.95 V Open-Loop Gain 100 120 V/mV Common-Mode Rejection Ratio 100 120 dB Power Supply Rejection Ratio 100 110 dB Voltage Noise Density 27 nV/√Hz Voltage Noise f = 0.1 Hz to 10 Hz 0.6 μV p-p Dynamic Performance Gain Bandwidth Product 1 MHz Slew Rate 0.5 V/μs Output Characteristics Output Voltage High RL = 100 kΩ to ground 2.9 2.96 V RL = 10 kΩ to ground 2.8 2.82 V Output Voltage Low RL = 100 kΩ to 3 V 60 100 mV R = 10 kΩ to 3 V 80 200 mV L Short-Circuit Current 40 mA BOTH AMPLIFIERS Power Supply Quiescent Current 3.5 4.5 mA Quiescent Current (Shutdown) 0.01 1 μA Rev. B | Page 6 of 24 AD8231 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 4. Parameter Rating Table 5. Supply Voltage 6 V Thermal Pad θ Unit JA 1 Output Short-Circuit Current Indefinite Soldered to Board 54 °C/W Input Voltage (Common-Mode) −V − 0.3 V to +V + 0.3 V S S Not Soldered to Board 96 °C/W Differential Input Voltage −VS − 0.3 V to +VS + 0.3 V The θ values in Table 5 assume a 4-layer JEDEC standard JA Storage Temperature Range –65°C to +150°C board. If the thermal pad is soldered to the board, it is Operational Temperature Range –40°C to +125°C also assumed it is connected to a plane. θJC at the exposed pad Package Glass Transition Temperature 130°C is 6.3°C/W. ESD (Human Body Model) 1.5 kV ESD (Charged Device Model) 1.5 kV MAXIMUM POWER DISSIPATION ESD (Machine Model) 0.2 kV The maximum safe power dissipation for the AD8231 is limited 1 For junction temperatures between 105°C and 130°C, short-circuit operation by the associated rise in junction temperature (TJ) on the die. At beyond 1000 hours can impact part reliability. approximately 130°C, which is the glass transition temperature, Stresses above those listed under Absolute Maximum Ratings the plastic changes its properties. Even temporarily exceeding may cause permanent damage to the device. This is a stress this temperature limit may change the stresses that the package rating only; functional operation of the device at these or any exerts on the die, permanently shifting the parametric perform- other conditions above those indicated in the operational ance of the amplifiers. Exceeding a temperature of 130°C for an section of this specification is not implied. Exposure to absolute extended period can result in a loss of functionality. maximum rating conditions for extended periods may affect device reliability. ESD CAUTION Rev. B | Page 7 of 24 AD8231 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS PIN 1 NC 1 INDICATOR 12 +V S (IN-AMP –IN) –INA 2 11 –V S AD8231 (IN-AMP +IN) +INA 3 10 OUTA (IN-AMP OUT) TOP VIEW (Not to Scale) NC 4 9REF NOTES 1. NC = NO CONNECT. 2. THE EXPOSED PAD CAN BE CONNECTED TO THE NEGATIVE SUPPLY (–V ) OR LEFT FLOATING. S Figure 2. Pin Configuration Table 6. Pin Function Descriptions Pin Number Mnemonic Description 1 NC No Connect. 2 −INA (IN-AMP −IN) Instrumentation Amplifier Negative Input. 3 +INA (IN-AMP +IN) Instrumentation Amplifier Positive Input. 4 NC No Connect. 5 SDN Shutdown. 6 +INB Operational Amplifier Positive Input. 7 −INB Operational Amplifier Negative Input. 8 OUTB (OP AMP OUT) Operational Amplifier Output. 9 REF Instrumentation Amplifier Reference Pin. It should be driven with a low impedance. Output is referred to this pin. 10 OUTA (IN-AMP OUT) Instrumentation Amplifier Output. 11 −VS Negative Power Supply. Connect to ground in single-supply applications. 12 +VS Positive Power Supply. 13 CS Chip Select. Enables digital logic interface. 14 A0 Gain Setting Bit (LSB). 15 A1 Gain Setting Bit. 16 A2 Gain Setting Bit (MSB). EPAD Exposed Pad. Can be connected to the negative supply (−VS) or left floating. Rev. B | Page 8 of 24 06586-002 SDN 5 16 A2 15 A1 +INB 6 –INB 7 14 A0 (OP AMP OUT) OUTB 8 13 CS AD8231 TYPICAL PERFORMANCE CHARACTERISTICS INSTRUMENTATION AMPLIFIER PERFORMANCE CURVES 1000 1400 N: 5956 N: 5956 MEAN: 0.977167 MEAN: –48.0779 SD: 11.8177 SD: 21.0433 1200 800 1000 600 800 600 400 400 200 200 0 0 –100 –80 –60 –40 –20 0 20 40 60 80 100 –500 –400 –300 –200 –100 0 100 200 300 400 500 CMRR (µV/V) GAIN ERROR (µV/V) Figure 3. Instrumentation Amplifier CMR Distribution, G = 1 Figure 6. Instrumentation Amplifier Gain Distribution, G = 1 800 9 N: 5956 N: 40 MEAN: 2.06788 MEAN: –8.31 8 700 SD: 1.07546 SD: 6 7 600 6 500 5 400 4 300 3 200 2 100 1 0 0 –15 –10 –5 0 5 10 15 –50 –40 –30 –20 –10 0 10 20 30 40 50 V (µV) INPUT OFFSET DRIFT (nV/°C) OSI Figure 7. Instrumentation Amplifier Input Offset Voltage Drift, Figure 4. Instrumentation Amplifier Input Offset Voltage Distribution −40°C to +125°C 16 800 N: 40 N: 5956 MEAN: –0.003 MEAN: 10.3901 14 700 SD: 0.061 SD: 3.9553 12 600 10 500 8 400 6 300 4 200 2 100 0 0 –0.5 –0.4 –0.3 –0.2 –0.1 0 0.1 0.2 0.3 0.4 0.5 –30 –20 –10 0 10 20 30 OUTPUT OFFSET DRIFT (µV/°C) V (µV) OSO Figure 8. Instrumentation Amplifier Output Offset Drift, −40°C to +125°C Figure 5. Instrumentation Amplifier Output Offset Voltage Distribution Rev. B | Page 9 of 24 HITS HITS HITS 06586-102 06586-101 06586-100 HITS NUMBER OF AMPLIFIERS NUMBER OF AMPLIFIERS 06586-105 06586-104 06586-103 AD8231 2000 6 V = MIDSUPPLY REF 0V, 4.96V V = MIDSUPPLY CM 5 1500 4 1000 5V SINGLE SUPPLY 4.92V, 2.5V 3 500 0V, 2.96V 2 3V SINGLE SUPPLY 3V 0 1 2.92V, 1.5V 0V, 0.04V 5V –500 0 –40 –20 0 20 40 60 80 100 120 06 1 2 3 4 5 TEMPERATURE (°C) OUTPUT VOLTAGE (V) Figure 9. Instrumentation Amplifier Bias Current vs. Temperature Figure 12. Instrumentation Amplifier Input Common-Mode Range vs. Output Voltage, V = 0 V REF 2.0 6 1.5 1.5V, 4.96V 5 1.0 0.02V, 4.22V 4 5V SINGLE SUPPLY 0.5 1.5V, 2.96V 4.98V, 3.22V 0 3 –0.5 0.02V, 2.22V 2.98V, 2.22V 2 4.98V, 1.78V 3V SINGLE SUPPLY –1.0 1 0.02V, 0.78V 2.98V, 0.78V +V = +2.5V S –1.5 –V = –2.5V S 1.5V, 0.04V V = 0V REF –2.0 0 –2.5 –2.0 –1.5 –1.0 –0.5 0 0.5 1.0 1.5 2.0 2.5 05 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5.0 V (V) OUTPUT VOLTAGE (V) CM Figure 10. Instrumentation Amplifier Bias Current vs. Figure 13. Instrumentation Amplifier Input Common-Mode Range vs. Common-Mode Voltage, 5 V Output Voltage, V = 1.5 V REF 6 1.0 0.8 2.5V, 4.96V 5 0.6 5V SINGLE SUPPLY 0.4 4 4.98V, 3.72V 0.2 0.02V, 3.72V 0 3 2.98V, 2.72V 2.5V, 2.96V –0.2 2 –0.4 0.02V, 1.72V 3V SINGLE 4.98V,1.28V SUPPLY –0.6 1 +V = +1.5V S –0.8 –V = –1.5V S 0.02V, 1.28V 2.5V, 0.04V V = 0V REF 2.98V, 0.28V –1.0 0 –1.5 –1.2 –0.9 –0.6 –0.3 0 0.3 0.6 0.9 1.2 1.5 05 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5.0 OUTPUT VOLTAGE (V) V (V) CM Figure 14. Instrumentation Amplifier Input Common-Mode Range vs. Figure 11. Instrumentation Amplifier Bias Current vs. Output Voltage, VREF = 2.5 V Common-Mode Voltage, 3 V Rev. B | Page 10 of 24 BIAS CURRENT (nA) BIAS CURRENT (nA) BIAS CURRENT (pA) 06586-106 06586-007 06586-006 INPUT COMMON-MODE VOLTAGE (V) INPUT COMMON-MODE VOLTAGE (V) INPUT COMMON-MODE VOLTAGE (V) 06586-003 06586-005 06586-004 AD8231 50 20 G = 128 G = 1 G = 1 40 G = 64 15 G = 8 G = 8 G = 32 G = 128 30 10 G = 16 G = 128 G = 8 20 5 G = 4 10 G = 2 0 G = 1 0 –5 –10 –10 –20 –15 –30 REPRESENTATIVE SAMPLES –40 –20 100 1k 10k 100k 1M 10M –40 –20 0 20 40 60 80 100 120 FREQUENCY (Hz) TEMPERATURE (°C) Figure 15. Instrumentation Amplifier Gain vs. Frequency Figure 18. Instrumentation Amplifier CMRR vs. Temperature 1000 140 G = 1 G = 1 G = 2 800 G = 4 120 G = 8 600 G = 16 G = 8 G = 32 G = 64 100 400 G = 128 G = 128 200 80 0 60 –200 –400 40 –600 20 –800 –1000 0 –40 –20 0 20 40 60 80 100 120 1 10 100 1k 10k 100k TEMPERATURE (°C) FREQUENCY (Hz) Figure 16. Instrumentation Amplifier Gain Drift vs. Temperature Figure 19. Instrumentation Amplifier Positive PSRR vs. Frequency 140 140 G = 128 G = 1 120 120 G = 8 100 G = 8 100 80 G = 128 G = 1 60 80 40 60 20 40 0 10 100 1k 10k 100k 1 10 100 1k 100k 100k FREQUENCY (Hz) FREQUENCY (Hz) Figure 17. Instrumentation Amplifier CMRR vs. Frequency Figure 20. Instrumentation Amplifier Negative PSRR vs. Frequency Rev. B | Page 11 of 24 CMRR (dB) GAIN DRIFT (ppm) GAIN (dB) 06586-010 06586-116 06586-009 NEGATIVE PSRR (dB) POSITIVE PSRR (dB) CMRR (µV/V) 06586-118 06586-147 06586-146 AD8231 100 10 G = +128, 0.4µV/DIV 1 G = +1, 1µV/DIV 0.1 1s/DIV 0.01 11 10 100 1k 10k00k FREQUENCY (Hz) Figure 21. Instrumentation Amplifier 0.1 Hz to 10 Hz Noise Figure 24. Instrumentation Amplifier Current Noise Spectral Density 100 G = +1 G = +8 90 G = +128 80 70 60 50 40 30 20 10 20mV/DIV 5µs/DIV 0 1 10 100 1k FREQUENCY (Hz) Figure 22. Instrumentation Amplifier Voltage Noise Spectral Density vs. Figure 25. Instrumentation Amplifier Small Signal Pulse Response, G = 1, Frequency, 5 V, 1 Hz to 1000 Hz RL = 2 kΩ, CL = 500 pF 1000 G = +1 500pF 800pF 300pF NO G = +8 900 LOAD G = +128 800 700 600 500 400 300 200 100 20mV/DIV 4µs/DIV 0 1 10 100 1k 10k 100k FREQUENCY (Hz) Figure 26. Instrumentation Amplifier Small Signal Pulse Response for Various Figure 23. Instrumentation Amplifier Voltage Noise Spectral Density vs. Capacitive Loads, G = 1 Frequency, 5 V, 1 Hz to 1 MHz Rev. B | Page 12 of 24 NOISE (nV/ Hz) NOISE (nV/ Hz) 06586-012 06586-008 06586-011 CURRENT NOISE (pA/ Hz) 06586-014 06586-013 06586-107 AD8231 G = +8 G = +32 G = +128 2V/DIV 17.6µs TO 0.01% 21.4µs TO 0.001% 0.001%/DIV 100µs/DIV 20mV/DIV 10µs/DIV Figure 27. Instrumentation Amplifier Small Signal Pulse Response, G = 4, 16, Figure 30. Instrumentation Amplifier Large Signal Pulse Response, and 128, R = 2 kΩ, C = 500 pF G = 128, V = 5 V L L S 25 20 0.001% 2V/DIV 15 0.01% 3.95µs TO 0.01% 10 4µs TO 0.001% 5 0.001%/DIV 10µs/DIV 0 11 10 100k GAIN (V/V) Figure 28. Instrumentation Amplifier Large Signal Pulse Response, Figure 31. Instrumentation Amplifier Settling Time vs. G = 1, V = 5 V S Gain for a 4 V p-p Step, V = 5 V S 25 0.001% 20 2V/DIV 15 0.01% 3.75µs TO 0.01% 10 3.8µs TO 0.001% 5 0.001%/DIV 10µs/DIV 0 11 10 100k GAIN (V/V) Figure 29. Instrumentation Amplifier Large Signal Pulse Response, Figure 32. Instrumentation Amplifier Settling Time vs. G = 8, V = 5 V S Gain for a 2 V p-p Step, VS = 3 V Rev. B | Page 13 of 24 06586-017 06586-016 06586-015 SETTLING TIME (µs) SETTLING TIME (µs) 06586-018 06586-020 06586-019 AD8231 +V +V S S –40°C –40°C +25°C +25°C –0.2 –0.2 +85°C +85°C +125°C +125°C –0.4 –0.4 –0.6 –0.6 –0.8 –0.8 –1.0 –1.0 1.0 1.0 0.8 0.8 0.6 0.6 0.4 0.4 0.2 0.2 –V –V S S 0.1 1 10 100 0.1 1 10 100 OUTPUT CURRENT (mA) OUTPUT CURRENT (mA) Figure 33. Instrumentation Amplifier Output Voltage Swing vs. Figure 34. Instrumentation Amplifier Output Voltage Swing vs. Output Current, VS = 3 V Output Current, VS = 5 V Rev. B | Page 14 of 24 OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES 06586-133 OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES 06586-134 AD8231 OPERATIONAL AMPLIFIER PERFORMANCE CURVES 100 –90 NO LOAD 80 –100 60 –110 300pF 40 –120 76° PHASE 800pF MARGIN 1nF 20 –130 1.5nF 0 –140 R = 10kΩ L 20mV/DIV 5µs/DIV C = 200pF L –20 –150 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) Figure 35. Operational Amplifier Open-Loop Gain and Phase vs. Figure 38. Operational Amplifier Small Signal Response for Frequency, V = 5 V Various Capacitive Loads, V = 3 V S S 100 –90 NO 80 –100 LOAD 1nF║2kΩ 60 –110 1.5nF║2kΩ 40 –120 72° PHASE MARGIN 20 –130 0 –140 R = 10kΩ L C = 200pF L –20 –150 10 100 1k 10k 100k 1M 10M TIME (5µs/DIV) FREQUENCY (Hz) Figure 36. Operational Amplifier Open-Loop Gain and Phase vs. Figure 39. Operational Amplifier Large Signal Transient Response, V = 5 V S Frequency, VS = 3 V NO 1nF 2nF LOAD 800pF NO LOAD 1nF║2kΩ 1.5nF║2kΩ 1.5nF 20mV/DIV 5µs/DIV TIME (5µs/DIV) Figure 40. Operational Amplifier Large Signal Transient Response, VS = 3 V Figure 37. Operational Amplifier Small Signal Response for Various Capacitive Loads, V = 5 V S Rev. B | Page 15 of 24 OPEN-LOOP GAIN (dB) OPEN-LOOP GAIN (dB) 06586-023 OPEN-LOOP PHASE SHIFT (Degrees) OPEN-LOOP PHASE SHIFT (Degrees) 06586-022 06586-021 OUTPUT VOLTAGE (0.5V/DIV) OUTPUT VOLTAGE (0.5V/DIV) 06586-024 06586-026 06586-025 AD8231 1000 +V S –40°C +25°C 900 –0.2 +85°C +125°C –0.4 800 –0.6 700 –0.8 600 –1.0 500 1.0 400 0.8 300 0.6 200 0.4 100 0.2 0 –V S 1 10 100 1k 10k 100k 0.1 1 10 100 OUTPUT CURRENT (mA) FREQUENCY (Hz) Figure 41. Operational Amplifier Voltage Spectral Noise Density vs. Frequency Figure 44. Operational Amplifier Output Voltage Swing vs. Output Current, VS = 3 V 2.2 +V S –40°C 2.0 +25°C –0.2 +85°C 1.8 +125°C –0.4 1.6 –0.6 1.4 –0.8 1.2 –1.0 1.0 1.0 0.8 0.8 0.6 0.6 0.4 0.4 0.2 3V 0.2 0 5V –0.2 –V S 0.1 1 10 100 –40 –25 –10 5 20 35 50 65 80 95 110 125 OUTPUT CURRENT (mA) TEMPERATURE (°C) Figure 42. Operational Amplifier Bias Current vs. Temperature Figure 45. Operational Amplifier Output Voltage Swing vs. Output Current, VS = 5 V 400 140 +PSRR 300 120 200 100 100 80 V = ±2.5V S –PSRR 0 60 –100 V = ±1.5V S 40 –200 20 –300 –400 0 –3 –2 –1 0 1 2 3 1 10 100 1k 10k 100k V (V) CM FREQUENCY (Hz) Figure 46. Operational Amplifier Power Supply Rejection Ratio Figure 43. Operational Amplifier Bias Current vs. Common Mode Rev. B | Page 16 of 24 SPECTRAL NOISE DENSITY (nV/ Hz) BIAS CURRENT (nA) BIAS CURRENT (pA) 06586-109 06586-108 06586-141 PSRR (dB) OUTPUT VOLTAGE SWING (V) OUTPUT VOLTAGE SWING (V) REFERRED TO SUPPLY VOLTAGES REFERRED TO SUPPLY VOLTAGES 06586-145 06586-144 06586-148 AD8231 PERFORMANCE CURVES VALID FOR BOTH AMPLIFIERS 7 160 G = 8 G = 128 +125°C 140 6 +85°C 120 5 G = 1 +25°C 100 4 –40°C 80 3 60 2 40 1 20 SOURCE CHANNEL: OP AMP AT G = 1 0 0 2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5 5.9 10 100 1k 10k 100k V (V) FREQUENCY (Hz) SUPPLY Figure 47. Supply Current vs. Supply Voltage Figure 48. Channel Separation vs. Frequency Rev. B | Page 17 of 24 I (mA) SUPPLY 06586-028 CHANNEL SEPARATION (dB) 06586-149 AD8231 THEORY OF OPERATION CS A0 A1 A2 SDN OUTB –INA 14kΩ 14kΩ –INB A1 A4 +INB OUTA A3 14kΩ 14kΩ A2 +INA AD8231 +V –V REF S S Figure 49. Simplified Schematic AMPLIFIER ARCHITECTURE Table 7. Truth Table for AD8231 Gain Settings CS A2 A1 A0 Gain The AD8231 is based on the classic 3-op amp topology. This Low Low Low Low 1 topology has two stages: a preamplifier to provide amplification, Low Low Low High 2 followed by a difference amplifier to remove the common-mode Low Low High Low 4 voltage. Figure 49 shows a simplified schematic of the AD8231. Low Low High High 8 The preamp stage is composed of Amplifier A1, Amplifier A2, Low High Low Low 16 and a digitally controlled resistor network. The second stage is a Low High Low High 32 gain of 1 difference amplifier composed of Amplifier A3 and Low High High Low 64 four 14 kΩ resistors. A1, A2, and A3 are all zero drift, rail-to- Low High High High 128 rail input, rail-to rail-output amplifiers. High X X X No change The AD8231 design makes it extremely robust over temperature. The AD8231 uses an internal thin film resistor to set the gain. REFERENCE TERMINAL Because all of the resistors are on the same die, gain temperature The output voltage of the AD8231 is developed with respect to drift performance and CMRR drift performance are better than the potential on the reference terminal, which is useful when can be achieved with topologies using external resistors. The the output signal needs to be offset to a midsupply level. For AD8231 also uses an auto-zero topology to null the offsets of all its example, a voltage source can be tied to the REF pin to level- internal amplifiers. Because this topology continually corrects for shift the output so that the AD8231 can drive a single-supply any offset errors, offset temperature drift is nearly nonexistent. ADC. The REF pin is protected with ESD diodes and should not exceed either +V or −V by more than 0.3 V. The AD8231 also includes a free operational amplifier. Like S S the other amplifiers in the AD8231, it is a zero drift, rail-to-rail For best performance, source impedance to the REF terminal input, rail-to-rail output architecture. should be kept below 1 Ω. As shown in Figure 49, the reference terminal, REF, is at one end of a 14 kΩ resistor. Additional GAIN SELECTION impedance at the REF terminal adds to this 14 kΩ resistor The gain of the AD8231 is set by voltages applied to the A0, A1, and results in amplification of the signal connected to the CS and A2 pins. To change the gain, the pin must be driven positive input, causing a CMRR error. low. When the CS pin is driven high, the gain is latched, and INCORRECT CORRECT voltages at the A0 to A2 pins have no effect. Because the CS pin is level sensitive rather than edge sensitive, it can also be tied + + permanently low. Table 7 shows the different gain settings. AD8231 AD8231 IN-AMP IN-AMP The time required for a gain change is dominated by the settling V REF – – REF REF time of the amplifier. The AD8231 takes about 200 ns to switch V REF gains, after which the amplifier begins to settle. Refer to Figure 28 + through Figure 32 to determine the settling time for different gains. AD8231 OP AMP – Figure 50. Driving the Reference (REF) Rev. B | Page 18 of 24 06586-031 06586-032 AD8231 INCORRECT CORRECT LAYOUT +V +V S S The AD8231 is a high precision device. To ensure optimum performance at the PCB level, care must be taken in the design of the board layout. The AD8231 pinout is arranged in a logical manner to aid in this task. AD8231 AD8231 REF REF Power Supplies The AD8231 should be decoupled with a 0.1 μF bypass capacitor –V –V between the two supplies. This capacitor should be placed as close S S TRANSFORMER TRANSFORMER as possible to Pin 11 and Pin 12, either directly next to the pins or beneath the pins on the backside of the board. The auto-zero +V +V S S architecture of the AD8231 requires a low ac impedance between the supplies. Long trace lengths to the bypass capacitor increase this impedance, which results in a larger input offset voltage. AD8231 AD8231 A stable dc voltage should be used to power the instrumentation REF REF amplifier. Noise on the supply pins can adversely affect performance. 10MΩ –V –V Package Considerations S S THERMOCOUPLE THERMOCOUPLE The AD8231 comes in a 4 mm × 4 mm LFCSP. Beware of blindly copying the footprint from another 4 mm × 4 mm +V +V S S LFCSP part; it cannot have the same thermal pad size and leads. C C Refer to the Outline Dimensions section to verify that the PCB symbol has the correct dimensions. Space between R 1 f = HIGH-PASS AD8231 2πRC AD8231 the leads and thermal pad should be kept as wide as possible C C REF REF for the best bias current performance. R Thermal Pad –V –V S S The AD8231 4 mm × 4 mm LFCSP comes with a thermal pad. CAPACITIVELY COUPLED CAPACITIVELY COUPLED This pad is connected internally to −VS. The pad can either be Figure 51. Creating an I Path BIAS left unconnected or connected to the negative supply rail. For high vibration applications, a landing is recommended. INPUT PROTECTION Because the AD8231 dissipates little power, heat dissipation All terminals of the AD8231 are protected against ESD. In is rarely an issue. If improved heat dissipation is desired (for addition, the input structure allows for dc overload conditions example, when ambient temperatures are near 125°C or when a diode drop above the positive supply and a diode drop below driving heavy loads), connect the thermal pad to the negative the negative supply. Voltages beyond these limits cause the ESD supply rail. For the best heat dissipation performance, the diodes to conduct and current to flow. If overvoltage events are negative supply rail should be a plane in the board. See the anticipated, an external resistor should be used in series with Thermal Resistance section for thermal coefficients with and each of the inputs to limit the current to below 10 mA. Currents without the pad soldered. up to 100 mA can be sustained for a few seconds. INPUT BIAS CURRENT RETURN PATH Note that if either input is brought below the negative supply to the point where the ESD diode turns on, the AD8231 output The input bias current of the AD8231 must have a return path can phase-reverse. to common. When the source, such as a thermocouple, cannot provide a return current path, one should be created, as shown in Figure 51. Rev. B | Page 19 of 24 06586-033 AD8231 If more common-mode range is required, the simplest solution is RF INTERFERENCE to apply less gain in the instrumentation amplifier. The extra op RF rectification is often a problem when amplifiers are used in amp can be used to provide another gain stage after the in-amp. applications where there are strong RF signals. The disturbance Because the AD8231 has good offset and noise performance at low can appear as a small dc offset voltage. High frequency signals gains, applying less gain in the instrumentation amplifier generally can be filtered with a low-pass, RC network placed at the has a limited impact on the overall system performance. input of the instrumentation amplifier, as shown in Figure 52. The filter limits the input signal bandwidth according to the REDUCING NOISE following relationship Because the AD8231 has no 1/f noise, reducing the bandwidth 1 corresponds directly to less noise. Table 8 shows the AD8231 FilterFreqDiff= performance at a gain of 1 at different bandwidths, assuming a 2πR(2CD+CC) 2-pole Butterworth filter roll off. 1 FilterFreqCM= 2πRC Table 8. AD8231 noise at various bandwidths C SNR SNR Differential where CD ≥ 10CC. 1 2 Single-Ended Output Bandwidth Noise +V S (Hz) (μV rms) dB Bits dB Bits 1 0.07 148.3 24.3 154.3 25.3 0.1µF 10µF 3.2 0.12 143.2 23.5 149.2 24.5 C C 1nF 10 0.21 138.3 22.7 144.3 23.7 R +INA 32 0.37 133.2 21.8 139.2 22.8 4.02kΩ 100 0.66 128.3 21.0 137.63 22.0 V C OUT D AD8231 10nF 320 1.17 123.2 20.2 129.2 21.2 R REF 1 k 2.07 118.3 19.3 124.3 20.3 –INA 4.02kΩ 3.2 k 3.71 113.2 18.5 119.2 19.5 C C 1nF 10 k 6.55 108.3 17.7 117.3 18.7 0.1µF 10µF 32 k 11.73 103.2 16.9 109.2 17.9 1 SNR for single-ended output configuration calculated with output signal of –V S 4.8 V p-p, which corresponds to 1.697 V rms. 2 Figure 52. RFI Suppression SNR for differential output configuration calculated with output signal of 9.6 V p-p, which corresponds to 3.397 V rms. Figure 52 shows an example where the differential filter frequency The AD8231 has two clocks: an auto-zero clock at 3.4 kHz and is approximately 2 kHz, and the common-mode filter frequency a commutating clock at 54 kHz. While the auto-zero clock has is approximately 40 kHz. negligible energy and can generally be ignored, the commutating Values of R and C should be chosen to minimize RFI. Mismatch C clock has enough energy to significantly affect the noise of the between the R × C at the positive input and the R × C at the C C part. Therefore, in applications where low noise is critical, limiting negative input degrades the CMRR of the AD8231. By using a the bandwidth of the system below 54 kHz is recommended. value of CD that is ten times larger than the value of CC, the effect of the mismatch is reduced and performance is improved. COMMON-MODE INPUT VOLTAGE RANGE The 3-op amp architecture of the AD8231 applies gain and then removes the common-mode voltage. Therefore, internal nodes in the AD8231 experience a combination of both the gained signal and the common-mode signal. This combined signal can be limited by the voltage supplies even when the individual input and output signals are not. To determine whether the signal could be limited, refer to Figure 12 through Figure 14 or use the following formula V ×Gain DIFF −V + 0.04 V