ANALOG DEVICES AD8225

Precision Gain of 5 Instrumentation Amplifier AD8225 FEATURES FUNCTIONAL BLOCK DIAGRAM No External Components Required AD8225 Highly Stable, Factory Trimmed Gain of 5 1 8 NC NC Low Power, 1.2 mA Max Supply Current –IN 2 7 +V S Wide Power Supply Range (�1.7 V to �18 V) 3 6 +IN V OUT Single- and Dual-Supply Operation –V 4 5 S REF Excellent Dynamic Performance NC = NO CONNECT High CMRR 86 dB Min @ DC 80 dB Min to 10 kHz Wide Bandwidth 900 kHz 4 V to 36 V Single Supply 140 High Slew Rate 130 5 V/�s Min 120 Outstanding DC Precision Low Gain Drift 110 5 ppm/�C Max 100 AD8225 Low Input Offset Voltage 90 150 �V Max HIGH PERFORMANCE IN AMP 80 Low Offset Drift @ GAIN OF 5 70 2 �V/�C Max Low Input Bias Current 60 1.2 nA Max 50 40 APPLICATIONS Patient Monitors 30 1 10 100 1k 10k 100k Current Transmitters FREQUENCY – Hz Multiplexed Systems Figure 1. Typical CMRR vs. Frequency 4 to 20 mA Converters Bridge Transducers Sensor Signal Conditioning GENERAL DESCRIPTION CMRR performance of the AD8225 rejects noise from utility The AD8225 is an instrumentation amplifier with a fixed gain systems, motors, and repair equipment on factory floors, switch- of 5, which sets new standards of performance. The superior ing power supplies, and medical equipment. CMRR of the AD8225 enables rejection of high frequency common-mode voltage (80 dB Min @ 10 kHz). As a result, Low input bias currents combined with a high slew rate of 5 V/µs higher ambient levels of noise from utility lines, industrial make the AD8225 ideally suited for multiplexed applications. equipment, and other radiating sources are rejected. Extended The AD8225 provides excellent dc precision, with maximum CMV range enables the AD8225 to extract low level differential input offset voltage of 150 µV and drift of 2 µV/°C. Gain drift is signals in the presence of high common-mode dc voltage levels 5ppm/°C or less. even at low supply voltages. Operating on either single or dual supplies, the fixed gain of 5 Ambient electrical noise from utility lines is present at 60 Hz and wide input common-mode voltage range make the AD8225 and harmonic frequencies. Power systems operating at 400 Hz well suited for patient monitoring applications. create high noise environments in aircraft instrument clusters. The AD8225 is packaged in an 8-lead SOIC package and is Good CMRR performance over frequency is necessary if power specified over the standard industrial temperature range, –40°C system generated noise is to be rejected. The dc to 10 kHz to +85°C. REV. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. may result from its use. No license is granted by implication or otherwise Tel: 781/329-4700 www.analog.com under any patent or patent rights of Analog Devices. Trademarks and Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved. registered trademarks are the property of their respective companies. CMRR – dB (T = 25�C, V = �15 V, R = 2 k�, unless otherwise noted.) AD8225–SPECIFICATIONS A S L Parameter Conditions Min Typ Max Unit GAIN Gain 5V/V Gain Error –0.1 +0.05 +0.1 % Nonlinearity 2 10 ±ppm vs. Temperature 1 5 ±ppm/°C OFFSET VOLTAGE (RTI) Offset Voltage 50 150 ±µV vs. Temperature 0.3 2 ±µV/°C vs. Supply (PSRR) 90 100 dB INPUT Input Operating Impedance �2GΩ�pF Differential 10 Common Mode 10�2GΩ�pF Input Voltage Range –V + 1.6 +V – 1.0 V S S (Common-Mode) vs. Temperature –V + 2.2 +V – 1.2 V S S Input Bias Current 0.5 1.2 nA vs. Temperature 3 pA/°C Input Offset Current 0.15 0.5 nA vs. Temperature 1.5 pA/°C Common-Mode Rejection Ratio 86 94 dB T = T to T 83 dB A MIN MAX f = 10 kHz* 80 dB OUTPUT Operating Voltage Range R = 2 kΩ –V + 1.4 +V – 1.4 V L S S vs. Temperature –V + 1.5 +V – 1.6 V S S Operating Voltage Range R = 10 kΩ –V + 1.0 +V – 1.1 V L S S vs. Temperature –V + 1.2 +V – 1.0 V S S Short Circuit Current 18 mA DYNAMIC RESPONSE Small Signal –3 dB Bandwidth 900 kHz Full Power Bandwidth V = 20 V p-p 75 kHz OUT Settling Time (0.01%) 10 V Step 3.4 µs Settling Time (0.001%) 10 V Step 4.8 µs Slew Rate 5 V/µs NOISE (RTI) Voltage 0.1 Hz to 10 Hz 1.5 µV p-p Spectral Density, 1 kHz 45 nV/√Hz Current 0.1 Hz to 10 Hz 4 pA p-p Spectral Density, 1 kHz 50 fA/√Hz REFERENCE INPUT R V , V = 0 18 kΩ IN IN+ REF I 60 µA IN Voltage Range –V + 1.4 +V – 1.4 V S S Gain to Output 0.999 1 1.001 POWER SUPPLY Operating Range 1.7 18 ±V Quiescent Current 1.05 1.2 mA TEMPERATURE RANGE For Specified Performance –40 +85 °C *Pin 1 connected to Pin 4. See Applications section. Specifications subject to change without notice. –2– REV. A AD8225 SPECIFICATIONS (T = 25�C, V = �5 V, R = 2 k�, unless otherwise noted.) A S L Parameter Conditions Min Typ Max Unit GAIN Gain 5V/V Gain Error –0.1 +0.05 +0.1 % Nonlinearity 2 10 ±ppm vs. Temperature 1 5 ±ppm/°C VOLTAGE OFFSET (RTI) Offset Voltage 125 325 ±µV vs. Temperature 2 ±µV/°C vs. Supply 90 100 dB INPUT Input Operating Impedance Differential 10�2GΩ�pF �2GΩ�pF Common-Mode 10 Input Operating Voltage Range –V + 1.6 +V – 1.0 V S S vs. Temperature –V + 2.1 +V – 1.5 V S S Input Bias Current 0.5 1.2 nA vs. Temperature 3 pA/°C Input Offset Current 0.15 0.5 nA vs. Temperature 1.5 pA/°C Common-Mode Rejection Ratio 86 94 dB T = T to T 83 dB A MIN MAX f = 10 kHz* 80 dB OUTPUT Operating Voltage Range R = 2 kΩ –V + 0.9 +V – 1.0 V L S S vs. Temperature –V + 1.0 +V – 1.2 V S S Operating Voltage Range R = 10 kΩ –V + 0.8 +V – 1.0 V L S S vs. Temperature –V + 0.9 +V – 1.0 V S S Short Circuit Current 18 mA DYNAMIC RESPONSE Small Signal –3 dB Bandwidth 900 kHz Full Power Bandwidth V = 7.8 V p-p 170 kHz OUT Settling Time (0.01%) 7 V Step 3 µs Settling Time (0.001%) 7 V Step 4.3 µs Slew Rate 5 V/µs NOISE (RTI) Voltage 0.1 Hz to 10 Hz 1.5 µV p-p Spectral Density, 1 kHz 45 nV/√Hz Current 0.1 Hz to 10 Hz 4 pA p-p Spectral Density, 1 kHz 50 fA/√Hz REFERENCE INPUT R 18 kΩ IN I V , V = 0 60 µA IN INT REF Voltage Range –V + 0.9 +V – 1.0 V S S Gain to Output 0.999 1 1.001 POWER SUPPLY Operating Range 1.7 18 ±V Quiescent Current 1.05 1.2 mA TEMPERATURE RANGE For Specified Performance –40 +85 °C *Pin 1 connected to Pin 4. See Applications section. Specifications subject to change without notice. REV. A –3– AD8225 SPECIFICATIONS (T = 25�C, V = 5 V, R = 2 k�, unless otherwise noted.) A S L Parameter Conditions Min Typ Max Unit GAIN Gain 5V/V Gain Error –0.1 +0.05 +0.1 % Nonlinearity 2 10 ±ppm vs. Temperature 1 5 ±ppm/°C OFFSET VOLTAGE (RTI) Offset Voltage 150 375 ±µV vs. Temperature 2 ±µV/°C vs. Supply 90 100 dB INPUT Input Operating Impedance Differential 10�2GΩ�pF Common Mode 10�2GΩ�pF Input Voltage Range 1.6 V – 1.05 V S (Common-Mode) vs. Temperature 1.7 V – 1.0 V S Input Bias Current 0.5 1.2 nA vs. Temperature 3 pA/°C Input Offset Current 0.15 0.5 nA vs. Temperature 1.5 pA/°C Common-Mode Rejection Ratio 86 94 dB T = T to T 83 dB A MIN MAX f = 10 kHz* 80 dB OUTPUT Operating Voltage Range R = 2 kΩ 0.8 V – 1.05 V L S vs. Temperature 0.9 V – 1.2 V S Operating Voltage Range R = 10 kΩ 0.8 V – 1.0 V L S vs. Temperature 0.9 V – 1.0 V S Short Circuit Current 18 mA DYNAMIC RESPONSE Small Signal –3 dB Bandwidth 900 kHz Full Power Bandwidth V = 3.2 V p-p 420 kHz OUT Settling Time (0.01%) 2 V Step 3.3 µs Settling Time (0.001%) 2 V Step 5.1 µs Slew Rate 5 V/µs NOISE (RTI) Voltage 0.1 Hz to 10 Hz 1.5 µV p-p Spectral Density, 1 kHz 45 nV/√Hz Current 0.1 Hz to 10 Hz 4 pA p-p Spectral Density, 1 kHz 50 fA/√Hz REFERENCE INPUT R 18 kΩ IN I 60 µA IN Voltage Range 0.4 V – 0.9 V S Gain to Output 0.999 1 1.001 POWER SUPPLY Operating Range 3.4 36 V Quiescent Current 1.05 1.2 mA TEMPERATURE RANGE For Specified Performance –40 +85 °C *Pin 1 connected to Pin 4. See Applications section. Specifications subject to change without notice. –4– REV. A AD8225 ABSOLUTE MAXIMUM RATINGS* PIN FUNCTION DESCRIPTIONS Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V Pin Number Mnemonic Function Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . 650 mW Input Voltage (Common-Mode) . . . . . . . . . . . . . . . . . . . . ±V S 1NCMay be Connected to Pin 4 to Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ±25 V Balance C IN Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite 2 –IN Inverting Input Storage Temperature . . . . . . . . . . . . . . . . . . –65ºC to +125ºC 3 +IN Noninverting Input Operating Temperature Range . . . . . . . . . . . –40ºC to +85ºC Lead Temperature Range (10 sec Soldering) . . . . . . . . . 300ºC 4 –V Negative Supply Voltage S *Stresses above those listed under Absolute Maximum Ratings may cause perma- 5 REF Connect to Desired Output nent damage to the device. This is a stress rating only and functional operation of CMV the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating 6V Output OUT conditions for extended periods may affect device reliability. 7+V Positive Supply Voltage S 8NC 1.5 T = 150 C J 8-LEAD SOIC PACKAGE 1.0 0.5 0 –50 –40 –30 –20 –10 0 10 2030 405060 70 80 90 AMBIENT TEMPERATURE – C Figure 2. Maximum Power Dissipation vs. Temperature ORDERING GUIDE Model Temperature Range Package Description Package Options AD8225AR –40ºC to +85ºC 8-Lead SOIC RN-8 AD8225AR-REEL –40ºC to +85ºC 8-Lead SOIC 13" REEL AD8225AR-REEL7 –40ºC to +85ºC 8-Lead SOIC 7" REEL AD8225-EVAL Evaluation Board RN-8 CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD8225 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. REV. A –5– POWER DISSIPATION – W AD8225–Typical Performance Characteristics (T = 25�C, R = 2 k�, V = �15 V, unless otherwise noted.) A L S 50 250 LOT SIZE = 3775 45 200 40 35 150 30 +BIAS CURRENT 25 100 20 –BIAS CURRENT 50 15 10 0 5 0 –50 –140–120–100 –80 –60 –40 –20 0 20 40 60 80 100 120 –60 –40 –20 0 20 40 60 80 100 INPUT OFFSET VOLTAGE – �V TEMPERATURE – C TPC 4. Bias Current vs. Temperature TPC 1. Typical Distribution of Input Offset Voltage, V = ±15 V S 8 50 LOT SIZE = 7550 45 40 6 35 30 4 25 20 15 2 10 5 0 0 05 1 234 –200 –100 0 100 200 300 400 500 600 700 800 WARM-UP TIME – Min INPUT BIAS CURRENT – pA TPC 5. Offset Voltage vs. Warm-Up Time TPC 2. Typical Distribution of Input Bias Current, V = ±15 V S 1000 50 LOT SIZE = 3775 45 40 35 30 100 25 20 15 10 5 0 0 1 10 100 1k 10k 100k –500 –400 –300 –200 –100 0 100 200 300 400 FREQUENCY – Hz INPUT OFFSET CURRENT – pA TPC 6. Voltage Noise Spectral Density vs. Frequency (RTI) TPC 3. Typical Distribution of Input Offset Current, V = ±15 V S –6– REV. A % OF UNITS % OF UNITS % OF UNITS VOLTAGE NOISE DENSITY – nV/ Hz BIAS CURRENT – pA CHANGE IN OFFSET VOLTAGE – �V AD8225 1000 130 120 110 100 90 100 80 70 60 50 40 0 30 1 10 100 1k 10k 1 10 100 1k 10k 100k FREQUENCY – Hz FREQUENCY – Hz TPC 7. Input Current Noise Spectral Density vs. TPC 10. CMR vs. Frequency, RTI Frequency 0.10 4 0.08 1S 3 0.06 100 2 90 0.04 1 0.02 0 0 –0.02 –1 –0.04 10 –2 0 –0.06 –3 –0.08 –4 –0.10 –40 –20 020 40 60 80 100 0 5 10 TEMPERATURE – C TIME – sec TPC 8. 0.1 Hz to 10 Hz Voltage Noise, RTI TPC 11. CMRR vs. Temperature 15 8 V = 15V 1S S 10 6 100 4 90 5 2 V = 5V S 0 0 –2 –5 10 –4 0 –10 –6 –8 –15 0 10 15 –15 –10 –5 5 0 5 10 OUTPUT VOLTAGE – V TIME – sec TPC 9. 0.1 Hz to 10 Hz Current Noise TPC 12. CMV Range vs. V , Dual Supplies OUT REV. A –7– VOLTAGE NOISE DENSITY – nV/ Hz NOISE – RTI – �V CURRENT NOISE – 2pA/div CMRR DRIFT – ppm/ C CMR – dB COMMON-MODE VOLTAGE – V AD8225 5 40 30 4 20 V = 5V S 10 0 3 –10 2 –20 –30 1 –40 –50 0 –60 05 1 234 100 1k 10k 100k 1M 10M FREQUENCY – Hz OUTPUT VOLTAGE – V TPC 13. CMV vs. V , Single Supply TPC 16. Large Signal Frequency Response, OUT V = 4 V p-p OUT 140 +V –0.0 S –0.5 120 –1.0 100 –1.5 80 +V –2.0 S 02 51 1050 2.0 60 –V S 1.5 40 1.0 20 0.5 –V +0.0 S 0 051 105 20 0.1 1 10 100 1k 10k 100k 1M SUPPL Y VOLTAGE – �V FREQUENCY – Hz TPC 14. PSRR vs. Frequency, RTI TPC 17. Input Common Mode Voltage Range vs. Supply Voltage 40 +V 0 S 30 –0.5 R = 10k� 20 L –1.0 10 R = 2k� L –1.5 0 –2.0 –10 02 21 4618102 14 1680 2.0 –20 1.5 –30 R = 2k� L 1.0 –40 R = 10k� 0.5 L –50 –60 –V 0 S 100 1k 10k 100k 1M 10M 021 41 6181024 168 20 FREQUENCY – Hz SUPPL Y VOLTAGE – �V TPC 18. Output Voltage Swing vs. Supply Voltage TPC 15. Small Signal Frequency Response, and Load Resistance V = 200 mV p-p OUT –8– REV. A GAIN – dB COMMON-MODE VOLTAGE – V PSRR – dB INPUT VOLTAGE � 5 – V GAIN – dB OUTPUT VOLTAGE SWING – V (REFERRED TO SUPPL Y VOL T AGES) (REFERENCED TO SUPPL Y VOL T AGES) AD8225 30 10 9 25 8 7 20 6 15 5 0.001% 4 10 3 0.01% 2 5 1 0 0 10 100 1k 100k02 510 150 LOAD RESISTANCE – � STEP SIZE – V TPC 19. Output Voltage Swing vs. Load Resistance TPC 22. Settling Time vs. Step Size 4 HORIZ 100mV 2V CH 1 = 5V/DIV (4�s/DIV) 3 100 100 OUTPUT (5V/DIV) 2 90 90 1 TEST 0 CIRCUIT OUTPUT CH 2 = 10mV/DIV –1 (0.001%/DIV) 10 –2 10 0 0 –3 –4 –10 0 10 OUTPUT VOLTAGE – V TPC 20. Large Signal Pulse Response and Settling TPC 23. Gain Nonlinearity Time to 0.001% 1.5 1.4 INPUT 1.3 100 90 1.2 1.1 1 +85 C 1.0 +25 C 0.9 OUTPUT 0.8 –40 C 10 0.7 0 2 0.6 CH 1 = 10mV, CH 2 = 20mV, H = 2�s 0.5 0 2 468 10 12 14 16 18 20 SUPPL Y VOLTAGE – V TPC 21. Small Signal Pulse Response, C = 100 pF TPC 24. I vs. V and Temperature L SUPPLY SUPPLY REV. A –9– OUTPUT VOLTAGE SWING – V p-p SUPPLY CURRENT – mA SETTLING TIME – �s NONLINEARITY – ppm AD8225 Test Circuits 4k� G = 100 G = 101 AD797 AD829 100� G = 100 G = 5 LPF SCOPE AD8225 G = 5 20k� 2k� AD8225 20� 2k� Test Circuit 2. Settling Time to 0.01% Test Circuit 1. 1 Hz to 10 Hz Voltage Noise Test –10– REV. A AD8225 +V S APPLICATIONS +V +V S S Precision V-to-I Converter V B When small analog voltages are transmitted across significant –IN Q2 Q1 +IN distances, errors may develop due to ambient electrical noise, stray capacitance, or series impedance effects. If the desired A1 A2 voltage is converted to a current, however, the effects of ambient –V R1 –V +V R2 C2 C1 S S S noise are mitigated. All that is required is a voltage to current 3k� conversion at the source, and an I-to-V conversion at the other V REF end to reverse the process. 15k� Figure 5 illustrates how the AD8225 may be used as the trans- +V S A3 –V S mitter and receiver in a current loop system. The full-scale 3k� 15k� output is 5 mA. OUT R FULL SCALE 3 SH I OUT e CURRENT = 5mA –V IN 20� S 3 200mV AD8225 6 V pk FS SH 6 1k� 8� Figure 3. Simplified Schematic 2 AD8225 5 e OUT 5 200mV 2 47pF pk FS THEORY OF OPERATION 9k� GND OR The AD8225 is a monolithic, three op amp instrumentation REF V amplifier. Laser wafer trimming and proprietary circuit tech- OP27 V 0.5 e SH IN I = = niques enable the AD8225 to boast the lowest output offset OUT R R SH SH voltage and drift of any currently available in amp (150 µV Figure 5. Precision Voltage-to-Current Converter RTI), as well as a higher common-mode voltage range. As noted in Figure 5, an additional op amp and four resistors are Referring to Figure 3, the input buffers consist of super-beta required to complete the converter. The precision gain of 5 in the NPN transistors Q1 and Q2, and op amps A1 and A2. The AD8225s, used in the transmit and receive sections, preserves transistors are compensated so that the bias currents are the integrity of the desired signal, while the high frequency extremely low, typically 100 pA or less. As a result, current noise common-mode performance at the receiver rejects noise on the is also low, at 50 fA/√Hz. The unity gain input buffers drive a transmission line. The reference of the receiver may be connected gain-of-five difference amplifier. Because the 3 kΩ and 15 kΩ to local ground or the reference pin of an A/D converter (ADC). resistors are ratio matched, gain stability is better than 5 ppm/°C over the rated temperature range. Figure 6 shows bench measurements of the input and output voltages, and output current of the circuit of Figure 5. The The AD8225 also has five times the gain bandwidth of a typical transmission media is 10 feet of insulated hook-up wire for the in amp. This wider GBW results from compensation at a fixed current drive and return lines. gain of 5, which can be one fifth of that required if the amplifier were compensated for unity gain. e = 398mV p-p, e = 398mV p-p, IN OUT High frequency performance is also enhanced by the innovative I = 10.3mA p-p OUT pinout of the AD8225. Since Pins 1 and 8 are uncommitted, Pin 1 may be connected to Pin 4. Since Pin 4 is also ac com- mon, the stray capacitance at Pins 2 and 3 is balanced. 1 e e AC IN OUT 2 GROUND AD8225 8 NC I OUT –IN 7 +V S 3 +IN 6 V OUT 5 REF AC CH 1 = 100mV, CH 2 = 100mV, CH 3 = 10mA, GROUND H = 200�s Figure 6. V-to-I Converter Waveforms (CH1: V , PIN 1 HAS NO INTERNAL CONNECTION IN CH2: V , CH3: I ) OUT OUT Figure 4. Pinout for Symmetrical Input Stray Capacitance REV. A –11– AD8225 Driving a High Resolution ADC 100 pF of capacitance at its output, a 75 Ω series resistor is Most high precision ADCs feature differential analog inputs. required at each in amp output to prevent oscillation. Differential inputs offer an inherent 6 dB improvement in S/N Using the Reference Input ratio and resultant bit resolution. These advantages are easy to Note in the example in Figure 7 that Pin 5, the reference input, is realize using a pair of AD8225s. driven by a voltage source. This is because the reference pin is AD8225s can be configured to drive an ADC with differential internally connected to a 15 kΩ resistor, which is carefully trimmed inputs by using either single-ended or differential inputs to the to optimize common-mode rejection. Any additional resistance AD8225s. Figure 7 shows the circuit connections for a differen- connected to this node will unbalance the bridge network formed tial input. A single-ended input may be configured by connecting by the two 3 kΩ and two 15 kΩ resistors, resulting in an error the negative input terminal to ground. voltage generated by common-mode voltages at the input pins. AD8225 Used as an EKG Front End 5V The topology of the instrumentation amplifier has made it the 3 circuit configuration of choice for designers of EKG and other 75� 6 +IN AD8225 low level biomedical amplifiers. CMRR and common-mode 2 2.7nF voltage advantages of the instrumentation amplifier are tailor 5 AD7675 made to meet the challenges of detecting minuscule cardiac 100kSPS generated voltage levels in the presence of overwhelming levels 3 75� of noise and dc offset voltage. The subtracter circuit of the in 6 –IN AD8225 amp will extract and amplify low level signals that are virtually 2 2.7nF 5 obscured by the presence of high common-mode dc and ac ALTERNATE 4.99k� CONNECTION potentials. 1.25V FOR SE SOURCE OP177 4.99k� A typical circuit block diagram of an EKG amplifier is shown in 2.5V Figure 8. Using discrete op amps in the in amp and gain stages, the signal chain usually includes several filters, high voltage AD780 protection, lead-select circuitry, patient lead buffering, and an RERERENCE ADC. Designers who roll their own instrumentation amplifiers must provide precision custom trimmed resistor networks and well matched op amps. Figure 7. Driver for Differential ADC The AD8225 instrumentation amplifier not only replaces all the The AD7675 ADC illustrated in Figure 7 is a SAR type converter. components shown in the highlighted block in Figure 8, but also When the input is sampled, the internal sample-and-hold capacitor provides a solution to many of the difficult design problems is charged to the input voltage level. Since the output of the encountered in EKG front ends. Among these are patient gener- AD8225 cannot track the instantaneous current surge, a voltage ated errors from ac noise sources and errors generated by unequal glitch develops. To source the momentary current surge, a electrode potentials. Alone, these error voltages can exceed the capacitor is connected from the A/D input terminal to ground. desired QRS complex by orders of magnitude. Since the AD8225 cannot tolerate greater than approximately PA TIENT INSTRUMENTATION AMPLIFIER ISOLATION G = 3 TO 10 BARRIER A1 DIGITAL DATA GAIN AND ADC TO SYSTEM A3 TOTAL G = 1000 MAINFRAME LEAD SELECT, HV PROTECTION, FILTERING A2 Figure 8. Block Diagram, EKG Monitor Front End Using Discrete Components –12– REV. A 16 BITS AD8225 In the classical three op amp in amp topology shown in Figure 8, gain is developed differentially between the two input amplifiers RA-LA 1 A1 and A2, sacrificing CMV (common-mode voltage) range. The gain of the in amp is typically 10 or less, and an additional gain stage increases the overall gain to approximately 1000. LA-LL 2 Gain developed in the input stage results in a trade-off in common- mode voltage range, constraining the ability of the amplifier to tolerate high dc electrode errors. Although the AD8225 is also RA-LL 3 a three amplifier design, its gain of 5 is developed at the output amplifier, improving the CMV range at the input. Using ±5V CH 1 = 2V, CH 2 = 2V, CH 3 = 2V, H = 200ms supplies, the CMV range of the AD8225 is from –3.4 V to Figure 10. EKG Waveform Using Circuit of Figure 9 +4 V, compared to –3.1 V to +3.8 V, a 7% improvement in input headroom over conventional in amps with the same gain. Benefits of Fast Slew Rates At 5 V/µs, the slew rate of the AD8225 is as fast as many op amp circuits. This is an advantage in systems applications using multiple sensors. For example, an analog multiplexer (see Figure 11) may AD8225 be used to select pairs of leads connected to several sensors. If OP77 G = 5 the AD8225 drives an ADC, the acquisition time is constrained G = 200 by the ability of the in amp to settle to a stable level after a new set of leads is selected. Fast slew rates contribute greatly to 19.6k� 301� 100� this function, especially if the difference in input levels is large. S1A S1B 0.2V, 2V AD8225 S2A DA OP77 G = 5 G = 200 S2B 1 AD8225 ADG409 S3A DB 19.6k� 301� S3B 100� REF S4A 4 S4B AD8225 OP77 G = 5 G = 200 Figure 11. Connection to an ADG409 Analog MUX 19.6k� 301� 100� Figure 12 illustrates the response of an AD8225 connected to an ADG409 analog multiplexer in the circuit shown in Figure 11 at two signal levels. Two of the four MUX inputs are connected Figure 9. EKG Monitor Front End to test dc levels. The remaining two are at ground potential so Figure 9 illustrates how an AD8225 may be used in an EKG that the output slews as the inputs A0 and A1 are addressed. As front end. In a low cost system, the AD8225 can be connected to can be seen, the output response settles well within 4 µs of the the patient. If buffers are required, the AD8225 can replace the applied level. expensive precision resistor network and op amp. Figure 10 shows test waveforms observed from the circuit of SMALL SIGNAL (200mV/DIV) Figure 9. INPUT SIGNAL TRAN- SITION LARGE SIGNAL (2V/DIV) CH 1 = 200mV, CH 2 = 2V, H = 500ns Figure 12. Slew Responses After MUX Selection REV. A –13– AD8225 Evaluation Board or single supplies, and the input may be dc- or ac-coupled. A Figure 13 is a schematic of an evaluation board available for the circuit is provided on the board so that the user can zero the AD8225. The board is shipped with an AD8225 already installed output offset. If desired, a reference may be applied from an and tested. The user need only connect power and an input to external voltage source. conduct measurements. The supply may be configured for dual +V S C1 0.1�F C4 R3 R2 100k�* 0.1�F 100� +IN W3 3 7 6 R4 GND A1 OUTPUT W4 2 100� 5 1 R8 4 C3 R5 –IN 0.1�F 100k�* W12 C2 W13 EXT_REF 0.1�F W11 W14 –V S USER-SUPPLIED +V AUX C12 10�F, 25V C10 CS1 W7 0.1�F J500 +V +V AUX S 240�A GND C7 OFFSET R9 0.1�F ADJ 5.9k�, 1% W6 3 R1 7 –V –V AUX S 6 10k� C11 A1 R10 2 10�F, 25V 4 5.9k�, 1% C9 C8 0.1�F CS2 0.1�F J500 –V AUX 240�A NOTES AD707JN –V AUX REMOVE W3 AND W4 FOR AC COUPLING *INSTALL FOR AC COUPLING Figure 13. Evaluation Board Schematic –14– REV. A AD8225 OUTLINE DIMENSIONS 8-Lead Standard Small Outline Package (SOIC) (RN-8) Dimensions shown in millimeters and (inches) 5.00 (0.1968) 4.80 (0.1890) 85 4.00 (0.1574) 6.20 (0.2440) 3.80 (0.1497) 5.80 (0.2284) 1 4 1.27 (0.0500) 0.50 (0.0196) �45� BSC 1.75 (0.0688) 0.25 (0.0099) 1.35 (0.0532) 0.25 (0.0098) 0.10 (0.0040) 8� 0.51 (0.0201) 0� 1.27 (0.0500) COPLANARITY 0.33 (0.0130) 0.25 (0.0098) SEATING 0.41 (0.0160) 0.10 0.19 (0.0075) PLANE COMPLIANT TO JEDEC STANDARDS MS-012AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN REV. A –15– AD8225 Revision History Location Page 2/03—Data Sheet changed from REV. 0 to REV. A. Updated ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Change to TPC 10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Change to TPC 20 caption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Edit to Precision V-to-I Converter section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 OUTLINE DIMENSIONS updated . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 –16– REV. A PRINTED IN U.S.A. C02771–0–2/03(A)