ANALOG DEVICES AD8209

High Voltage, Precision Difference Amplifier AD8209 FEATURES FUNCTIONAL BLOCK DIAGRAM V S A1 A2 ±8000 V HBM ESD AEC-Q100 qualified EMI FILTER AD8209 EMI filters included EMI High common-mode voltage range IN+ + + FILTER OUT G = 7 G = 2 −2 V to +45 V operating EMI – – IN– FILTER −24 V to +80 V survival Buffered output voltage Gain = 14 V/V Low-pass filter (single-pole or two-pole) Wide operating temperature range GND 8-lead MSOP: −40°C to +125°C Figure 1. Excellent ac and dc performance ±1 mV voltage offset −5 ppm/°C typical gain drift 80 dB CMRR minimum dc to 10 kHz APPLICATIONS High-side current sensing Motor controls Solenoid controls Power management Low-side current sensing Diagnostic protection GENERAL DESCRIPTION The AD8209 is a single-supply difference amplifier ideal for performance, minimizing errors in the application. Typical offset amplifying and low-pass filtering small differential voltages in the and gain drift in the MSOP package are less than 5 μV/°C and presence of a large common-mode voltage. The input common- 10 ppm/°C, respectively. The device also delivers a minimum CMRR of 80 dB from dc to 10 kHz. mode voltage range extends from −2 V to +45 V at a single +5 V supply. The AD8209 is qualified per AEC-Q100 specifications. The The AD8209 features an externally accessible 100 kΩ resistor at amplifier offers enhanced input overvoltage and ESD protection, the output of the preamplifier (A1), which can be used for low- and includes EMI filtering. pass filtering and for establishing gains other than 14. Automotive applications demand robust, precision components for improved system control. The AD8209 provides excellent ac and dc Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 08461-001 AD8209 TABLE OF CONTENTS Features .............................................................................................. 1  Applications Information .............................................................. 11  Applications ....................................................................................... 1  High-Side Current Sensing with a Low-Side Switch ............. 11  Functional Block Diagram .............................................................. 1  High-Rail Current Sensing ....................................................... 11  General Description ......................................................................... 1  Low-Side Current Sensing ........................................................ 11  Revision History ............................................................................... 2  Gain Adjustment ........................................................................ 12  Specif ica t ions ..................................................................................... 3  Gain Trim .................................................................................... 12  Absolute Maximum Ratings ............................................................ 4  Low-Pass Filtering ...................................................................... 13  ESD Caution .................................................................................. 4  High Line Current Sensing with LPF and Gain Adjustment ...... 14  Pin Configuration and Function Descriptions ............................. 5  Outline Dimensions ....................................................................... 15  Typical Performance Characteristics ............................................. 6  Ordering Guide .......................................................................... 15  Theory of Operation ...................................................................... 10  REVISION HISTORY 10/09—Revision 0: Initial Version Rev. 0 | Page 2 of 16 AD8209 SPECIFICATIONS TOPR = −40°C to +125°C, TA = 25°C, VS = 5 V, RL = 25 kΩ (RL is the output load resistor), unless otherwise noted. Table 1. 1 Parameter Test Conditions Min Typ Max Unit SYSTEM GAIN Initial 14 V/V Error vs. Temperature 0.075 V ≤ VOUT ≤ (VS − 0.1 V), dc, TOPR ±0.3 % Gain Drift TOPR 0 −20 ppm/°C VOLTAGE OFFSET Initial Input Offset (Referred to Input [RTI]) VCM = 0.15 V, TA ±2 mV Input Offset (RTI) Over Temperature VCM = 0 V, TOPR ±4 mV Voltage Offset vs. Temperature VCM = 0 V, TOPR −20 +20 μV/°C INPUT Input Impedance Differential 360 400 440 kΩ Common Mode 180 200 220 kΩ V (Continuous) −2 +45 V CM 2 CMRR VCM = −2 V to +45 V, dc 80 100 dB 3 f = dc to 10 kHz, TOPR 80 dB PREAMPLIFIER (A1) Gain 7 V/V Gain Error 0.05 V ≤ V ≤ (V − 0.1 V), dc, T −0.3 +0.3 % OUT S OPR Output Voltage Range 0.05 V − 0.1 V S Output Resistance 97 100 103 kΩ OUTPUT BUFFER (A2) Gain 2 V/V Gain Error 0.075 V ≤ VOUT ≤ (VS − 0.1 V), dc, TOPR −0.3 +0.3 % 4 Output Voltage Range RL = 25 kΩ, differential Input (V) = 0 V, TOPR 0.075 VS − 0.1 V Input Bias Current TOPR 50 nA Output Resistance R = 1 kΩ, frequency = dc 2 Ω L DYNAMIC RESPONSE System Bandwidth VIN = 0.01 V p-p, VOUT = 0.14 V p-p 80 kHz Slew Rate V = 0.28 V, V = 4 V step 1 V/μs IN OUT NOISE 0.1 Hz to 10 Hz 20 μV p-p Spectral Density, 1 kHz (RTI) 500 nV/√Hz POWER SUPPLY Operating Range 4.5 5.5 V Quiescent Current Typical, T 1.6 mA A Quiescent Current vs. Temperature V = 0.1 V dc, V = 5 V, T 2.7 mA OUT S OPR PSRR VS = 4.5 V to 5.5 V, TOPR 66 80 dB TEMPERATURE RANGE For Specified Performance at T −40 +125 °C OPR 1 V = input common-mode voltage. CM 2 Source imbalance < 2 Ω. 3 The AD8209 preamplifier exceeds 80 dB CMRR at 10 kHz. However, because the output is available only by way of the 100 kΩ resistor, even a small amount of pin-to- pin capacitance between the IN pins and the A1 and A2 pins might couple an input common-mode signal larger than the greatly attenuated preamplifier output. The effect of pin-to-pin coupling can be neglected in all applications by using a filter capacitor from Pin 3 to GND. 4 The output voltage range of the AD8209 varies depending on the load resistance and temperature. For additional information on this specification, refer to Figure 12 and Figure 13. Rev. 0 | Page 3 of 16 AD8209 ABSOLUTE MAXIMUM RATINGS Table 2. Stresses above those listed under Absolute Maximum Ratings Parameter Rating may cause permanent damage to the device. This is a stress Supply Voltage 12 V rating only; functional operation of the device at these or any Continuous Input Voltage (Common Mode) −24 V to +80 V other conditions above those indicated in the operational Differential Input Voltage ±12 V section of this specification is not implied. Exposure to absolute Reversed Supply Voltage Protection 0.3 V maximum rating conditions for extended periods may affect ESD Human Body Model ±8000 V device reliability. Operating Temperature Range −40°C to +125°C Storage Temperature Range −65°C to +150°C Output Short-Circuit Duration Indefinite ESD CAUTION Lead Temperature Range (Soldering 10 sec) 300°C Rev. 0 | Page 4 of 16 AD8209 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 8 7 2 3 –IN 1 8 +IN 4 AD8209 2 7 GND V S TOP VIEW A1 3 6 NC (Not to Scale) 5 A2 4 5 OUT NC = NO CONNECT Figure 2. Pin Configuration Figure 3. Metallization Photograph Table 3. Pin Function Descriptions Coordinates Pin No. Mnemonic X Y Description 1 −IN −322 +563 Inverting Input 2 GND −321 +208 Ground 3 A1 −321 −51 Preamplifier (A1) Output 4 A2 −321 −214 Buffer (A2) Input 5 OUT +321 −388 Buffer (A2) Output 6 NC No Connect 7 VS +322 +363 Supply 8 +IN +322 +561 Noninverting Input Rev. 0 | Page 5 of 16 08461-002 08461-003 AD8209 TYPICAL PERFORMANCE CHARACTERISTICS TOPR = −40°C to +125°C, TA = 25°C, VS = 5 V, RL = 25 kΩ (RL is the output load resistor), unless otherwise noted. 0.70 1500 0.55 1250 0.40 1000 0.25 750 0.10 500 –0.05 250 –0.20 0 –0.35 –250 –0.50 –500 –0.65 –750 –0.80 –1000 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 110 120 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 110 120 TEMPERATURE (°C) TEMPERATURE (°C) Figure 4. Typical Offset Drift vs. Temperature Figure 7. Typical Gain Error vs. Temperature 30 0.47 25 0.42 20 0.37 15 0.32 10 0.27 5 0.22 0 0.17 0.12 –5 0.07 –10 0.02 –15 –0.03 –20 –2 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 1k 10k 100k 1M FREQUENCY (Hz) INPUT COMMON-MODE (V) Figure 5. Typical Small-Signal Bandwidth Figure 8. Total Input Bias Current vs. Common-Mode Voltage, with +IN and –IN Pins Connected (Shorted) –35 140 130 +125°C 120 –30 +25°C 110 –40°C 100 –25 90 80 –20 70 60 –15 50 40 30 –10 10 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 9. Input Bias Current of A2 vs. Input Voltage and Temperature Figure 6. Typical CMRR vs. Frequency Rev. 0 | Page 6 of 16 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 –40°C +25°C +125° C A2 INPUT VOLTAGE (V) CMRR (dB) V (mV) GAIN (dB) OSI 08461-012 08461-022 08461-004 A2 INPUT BIAS CURRENT (nA) TOTAL INPUT BIAS CURRENT (mA) GAIN ERROR (ppm) 08461-007 08461-006 08461-005 AD8209 12.0 2.0 11.5 1.8 11.0 1.6 10.5 10.0 1.4 9.5 1.2 9.0 8.5 1.0 8.0 0.8 7.5 0.6 7.0 6.5 0.4 6.0 0.2 5.5 5.0 0 –40 –20 0 20406080 100 120 140 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 0.5 1.5 2.5 3.5 4.5 5.5 6.5 7.5 8.5 TEMPERATURE (°C) OUTPUT SINK CURRENT (mA) Figure 10. Maximum Output Sink Current vs. Temperature Figure 13. Output Voltage Range from GND vs. Output Sink Current 6.5 6.3 6.0 5.8 INPUT 100mV/DIV 5.5 1 5.3 OUTPUT 5.0 4.8 500mV/DIV 4.5 2 4.3 4.1 –40 –20 0 20 40 60 80 100 120 140 TIME (2µs/DIV) TEMPERATURE (°C) Figure 11. Maximum Output Source Current vs. Temperature Figure 14. Rise Time 5.0 4.6 4.2 100mV/DIV 3.8 INPUT 3.4 1 500mV/DIV 3.0 2.6 2.2 OUTPUT 1.8 2 1.4 1.0 TIME (2µs/DIV) 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 OUTPUT SOURCE CURRENT (mA) Figure 12. Output Voltage Range of A2 vs. Output Source Current Figure 15. Fall Time Rev. 0 | Page 7 of 16 OUTPUT VOLTAGE RANGE (V) MAXIMUM OUTPUT SOURCE CURRENT (mA) MAXIMUM OUTPUT SINK CURRENT (mA) 08461-009 08461-008 08461-010 OUTPUT VOLTAGE RANGE (V) 08461-018 08461-017 08461-011 AD8209 200mV/DIV 2 2V/DIV INPUT 3 2V/DIV 3 0.01%/DIV 2 OUTPUT TIME (2µs/DIV) TIME (20µs/DIV) Figure 16. Differential Overload Recovery, Rising Figure 19. Settling Time, Falling 500 +125°C +25°C –40°C 200mV/DIV 400 3 INPUT 300 2V/DIV 200 2 OUTPUT 100 0 TIME (2µs/DIV) –4 –3 –2 –1 0 1 2 3 4 V (mV) OS Figure 17. Differential Overload Recovery, Falling Figure 20. Offset Distribution 180 150 2V/DIV 120 2 90 0.01%/DIV 60 3 30 0 TIME (20µs/DIV) –20 –15 –10 –5 0 5 10 15 20 OFFSET DRIFT (µV/°C) Figure 21. Offset Drift Distribution Figure 18. Settling Time, Rising Rev. 0 | Page 8 of 16 08461-015 08461-013 08461-014 COUNT COUNT 08461-016 08461-019 08461-020 AD8209 1400 1200 1000 800 600 400 200 0 –20 –15 –10 –5 0 5 101520 GAIN DRIFT (ppm/°C) Figure 22. Gain Drift Distribution Rev. 0 | Page 9 of 16 COUNT 08461-021 AD8209 THEORY OF OPERATION The AD8209 is a single-supply difference amplifier typically used by connecting A1 to A2 and placing a capacitor to ground (see to amplify a small differential voltage in the presence of rapidly Figure 32). changing, high common-mode voltages. The value of RF1 and RF2 is 10 kΩ, providing a gain of 2 V/V for The AD8209 consists of two amplifiers (A1 and A2), a resistor Amplifier A2. When connecting Pin A1 and Pin A2 together, the network, a small voltage reference, and a bias circuit (not shown); AD8209 provides a total system gain equal to see Figure 23. Total Gain of (A1 + A2) (V/V) = 7 (V/V) × 2 (V/V) = 14 V/V The set of input attenuators preceding A1 consist of R , R , and A B at the output of A2 (the OUT pin). R , which feature a combined series resistance of approximately C The ratios of R , R , R , and R are trimmed to a high level of A B C F 400 kΩ ± 20%. The purpose of these resistors is to attenuate the precision, allowing a typical CMRR value that exceeds 80 dB. This input voltage to match the input voltage range of A1. This balanced performance is accomplished by laser trimming the resistor ratio resistor network attenuates the common-mode signal by a ratio matching to better than 0.01%. of 1/14. The A1 amplifier inputs are held within the power supply V –IN +IN S A1 A2 range, even as Pin 1 and Pin 8 exceed the supply or fall below the common (ground). A reference voltage of 350 mV biases the R R A R A FILTER attenuator above ground, allowing Amplifier A1 to operate in + + the presence of negative common-mode voltages. A2 OUT A1 – – R F1 R R The input resistor network also attenuates normal (differential) B B R G mode voltages. Therefore, A1 features a gain of 97 V/V to provide R M R F R F2 R R R a total system gain, from ±IN to the output of A1, equal to 7 V/V, C F C as shown in the following equation: 350mV Gain (A1) = 1/14 (V/V) × 97 (V/V) = 7 V/V A precision trimmed, 100 kΩ resistor is placed in series with the GND output of Amplifier A1. The user has access to this resistor via Figure 23. Simplified Schematic an external pin (A1). A low-pass filter can be easily implemented Rev. 0 | Page 10 of 16 08461-025 AD8209 APPLICATIONS INFORMATION HIGH-SIDE CURRENT SENSING HIGH-RAIL CURRENT SENSING WITH A LOW-SIDE SWITCH In the high-rail current-sensing configuration, the shunt resistor is referenced to the battery. High voltage is present at the inputs of In load control configurations for high-side current sensing with a the current-sense amplifier. When the shunt is battery referenced, low-side switch, the PWM-controlled switch is ground referenced. An inductive load (solenoid) connects to a power supply/battery. the AD8209 produces a linear ground-referenced analog output. A resistive shunt is placed between the switch and the load (see Additionally, the AD8214 can be used to provide an overcurrent Figure 24). An advantage of placing the shunt on the high side detection signal in as little as 100 ns (see Figure 26). This feature is is that the entire current, including the recirculation current, is useful in high current systems where fast shutdown in overcurrent conditions is essential. monitored because the shunt remains in the loop when the switch is off. In addition, shorts to ground can be detected with the shunt OVERCURRENT DETECTION (<100ns) on the high side, enhancing the diagnostics of the control loop. In 5 6 7 8 this circuit configuration, when the switch is closed, the common- OUT GND NC –IN mode voltage moves down to near the negative rail. When the AD8214 switch is opened, the voltage reversal across the inductive load NC V +IN V REG S causes the common-mode voltage to be held one diode drop 4 3 2 1 above the battery by the clamp diode. 5V CLAMP DIODE INDUCTIVE CLAMP OUTPUT LOAD DIODE SHUNT + +IN +V NC OUT BATTERY S – + –IN +IN 1 8 INDUCTIVE BATTERY 5V – GND V LOAD S 2 7 SHUNT AD8209 A1 AD8209 NC 3 6 A2 OUT 4 5 SWITCH C –IN GND A1 A2 F SWITCH Figure 26. Battery-Referenced Shunt Resistor C F LOW-SIDE CURRENT SENSING NC = NO CONNECT In systems where low-side current sensing is preferable, the Figure 24. Low-Side Switch AD8209 provides a simple, high accuracy, integrated solution. In this configuration, the AD8209 rejects ground noise and offers high In cases where a high-side switch is used for PWM control of the input to output linearity, regardless of the differential input voltage. load current in an application, the AD8209 can be used as shown in Figure 25. The recirculation current through the freewheeling INDUCTIVE diode (clamp diode) is monitored through the shunt resistor. In LOAD CLAMP 5V this configuration, the common-mode voltage in the application DIODE drops below GND when the FET is switched off. The AD8209 SWITCH OUTPUT operates down to −2 V, providing an accurate current measurement. +IN +V NC OUT S 5V BATTERY SWITCH OUTPUT SHUNT AD8209 +IN +V NC OUT S + –IN GND A1 A2 BATTERY – SHUNT AD8209 C F NC = NO CONNECT –IN GND A1 A2 CLAMP Figure 27. Ground-Referenced Shunt Resistor DIODE INDUCTIVE LOAD C F NC = NO CONNECT Figure 25. High-Side Switch Rev. 0 | Page 11 of 16 08461-027 08461-026 08461-029 08461-028 AD8209 4 mA to 20 mA Current Loop Receiver used should be equal to 100 kΩ minus the parallel sum of R EXT and 100 kΩ. For example, with R = 100 kΩ (yielding a composite EXT The AD8209 can also be used in low current-sensing applica- gain of 7 V/V), the optional offset nulling resistor is 50 kΩ. tions, such as the 4 mA to 20 mA current loop receiver shown in Figure 28. In such applications, the relatively large shunt Gains Greater than 14 resistor may degrade the common-mode rejection. Adding a Connecting a resistor from the output of the buffer amplifier to resistor of equal value on the low impedance side of the input its noninverting input, as shown in Figure 30, increases the gain. corrects this error. The gain is now multiplied by the factor 5V R /(R − 100 kΩ) EXT EXT 10Ω 1% OUTPUT For example, it is doubled for R = 200 kΩ. Overall gains as EXT +IN +V NC OUT high as 50 are achievable in this way. Note that the accuracy of S + the gain becomes critically dependent on the resistor value at BATTERY – 10Ω high gains. In addition, the effective input offset voltage at Pin 1 AD8209 1% and Pin 8 (which is about six times the actual offset of A1) limits the use of the part in high gain, dc-coupled applications. –IN GND A1 A2 5V OUTPUT C F +IN +V NC OUT S 14R EXT NC = NO CONNECT GAIN = R – 100kΩ EXT + Figure 28. 4 mA to 20 mA Current Loop Receiver AD8209 R EXT V DIFF GAIN – R = 100kΩ EXT GAIN – 14 GAIN ADJUSTMENT –IN GND A1 A2 The default gain of the preamplifier and buffer are 7 V/V and 2 V/V, respectively, resulting in a composite gain of 14 V/V. With + V the addition of external resistor(s) or trimmer(s), the gain can CM – be lowered, raised, or finely calibrated. Gains Less than 14 NC = NO CONNECT Figure 30. Adjusting for Gains Greater than 14 Because the preamplifier has an output resistance of 100 kΩ, an external resistor connected from Pin 3 and Pin 4 to GND decreases GAIN TRIM the gain by the following factor (see Figure 29): Figure 31 shows a method for incremental gain trimming by REXT/(100 kΩ + REXT) using a trim potentiometer and an external resistor, R . EXT 5V The following approximation is useful for small gain ranges: ΔG ≈ (10 MΩ ÷ REXT)% OUTPUT +IN +V NC OUT S For example, using this equation, the adjustment range is ±2% 14R EXT for REXT = 5 MΩ and ±10% for REXT = 1 MΩ. GAIN = R + 100kΩ EXT + 5V AD8209 V DIFF – GAIN R = 100kΩ EXT 14 – GAIN OUTPUT –IN GND A1 A2 +IN +V NC OUT S + V R CM EXT + – AD8209 V DIFF – NC = NO CONNECT –IN GND A1 A2 Figure 29. Adjusting for Gains Less than 14 GAIN TRIM 20kΩ MIN R EXT + The overall bandwidth is unaffected by changes in gain by using V CM – this method, although there may be a small offset voltage due to the imbalance in source resistances at the input to the buffer. In NC = NO CONNECT many cases, this can be ignored, but if desired, the offset voltage can Figure 31. Incremental Gain Trimming be nulled by inserting a resistor in series with Pin 4. The resistor Rev. 0 | Page 12 of 16 08461-031 08461-030 08461-033 08461-032 AD8209 Internal Signal Overload Considerations If the gain is raised using a resistor, as shown in Figure 30, the corner frequency is lowered by the same factor as the gain is raised. When configuring the gain for values other than 14, the maximum Therefore, using a resistor of 200 kΩ (for which the gain would input voltage with respect to the supply voltage and ground must be doubled), results in a corner frequency scaled to 0.796 Hz μF be considered because either the preamplifier or the output buffer (0.039 μF for a 20 Hz corner frequency). reaches its full-scale output (VS − 0.1 V) with large differential 5V input voltages. The input of the AD8209 is limited to (V − 0.1) ÷ S 7 for overall gains of ≤7 because the preamplifier, with its fixed OUTPUT gain of 7 V/V, reaches its full-scale output before the output +IN +V NC OUT S buffer. For gains greater than 7, the swing at the buffer output reaches its full scale first and then limits the AD8209 input to C + AD8209 V (VS − 0.1) ÷ G, where G is the overall gain. DIFF – f (Hz) = 1/C(µF) C LOW-PASS FILTERING –IN GND A1 A2 In many transducer applications, it is necessary to filter the signal to remove spurious high frequency components, including noise, + 255kΩ V CM or to extract the mean value of a fluctuating signal with a peak- – C to-average ratio (PAR) greater than unity. For example, a full-wave rectified sinusoid has a PAR of 1.57, a raised cosine has a PAR NC = NO CONNECT of 2, and a half-wave sinusoid has a PAR of 3.14. Signals with Figure 33. Two-Pole, Low-Pass Filter large spikes may have PARs of 10 or more. A two-pole filter with a roll-off of 40 dB/decade can be When implementing a filter, the PAR should be considered so implemented using the connections shown in Figure 33. This that the output of the AD8209 preamplifier (A1) does not clip configuration is a Sallen-Key form based on a ×2 amplifier. It is before A2; otherwise, the nonlinearity would be averaged and useful to remember that a two-pole filter with a corner frequency appear as an error at the output. To avoid this error, both amplifiers of f2 and a single-pole filter with a corner frequency of f1 have should clip at the same time. This condition is achieved when the the same attenuation, that is, 40 log (f2/f1), as shown in Figure 34. PAR is no greater than the gain of the second amplifier (2 for Using the standard resistor value shown in Figure 33 and capacitors the default configuration). For example, if a PAR of 5 is expected, of equal values, the corner frequency is conveniently scaled to the gain of A2 should be increased to 5. 1 Hz μF (0.05 μF for a 20 Hz corner frequency). A maximal flat response occurs when the resistor is lowered to 196 kΩ, scaling Low-pass filters can be implemented in several ways by using the corner frequency to 1.145 Hz μF. The output offset is raised the features provided by the AD8209. In the simplest case, a by approximately 5 mV (equivalent to 250 μV at the input pins). single-pole filter (20 dB/decade) is formed when the output FREQUENCY of A1 is connected to the input of A2 via the internal 100 kΩ resistor by tying Pin 3 to Pin 4 and adding a capacitor from this 40dB/DECADE node to ground, as shown in Figure 32. If a resistor is added across the capacitor to lower the gain, the corner frequency 20dB/DECADE increases; therefore, gain should be calculated using the parallel sum of the resistor and 100 kΩ. 5V 40log (f /f ) 2 1 OUTPUT +IN +V NC OUT S A 1-POLE FILTER, CORNER f , AND 1 A 2-POLE FILTER, CORNER f , HAVE 2 1 + THE SAME ATTENUATION –40log (f /f ) 2 1 f = AD8209 C 5 2πC10 V 2 AT FREQUENCY f /f DIFF 2 1 – C IN FARADS 2 f f f /f 1 2 2 1 –IN GND A1 A2 Figure 34. Comparative Responses of Single-Pole and Two-Pole Low-Pass Filters + C V F CM – NC = NO CONNECT Figure 32. Single-Pole, Low-Pass Filter Using the Internal 100 kΩ Resistor Rev. 0 | Page 13 of 16 08461-034 ATTENUATION 08461-035 08461-036 AD8209 diode regulates the common-mode potential applied to the device. HIGH LINE CURRENT SENSING For example, a battery spike of 20 V may result in an applied WITH LPF AND GAIN ADJUSTMENT common-mode potential of 21.5 V to the input of the devices. The circuit shown in Figure 35 is similar to Figure 24, but includes gain adjustment and low-pass filtering. To produce a full-scale output of 4 V, a gain of 40 V/V is used, 5V adjustable by ±5% to absorb the tolerance in the shunt. There is sufficient headroom to allow 10% overrange (to 4.4 V). The INDUCTIVE CLAMP OUTPUT LOAD DIODE 4V/AMP roughly triangular voltage across the sense resistor is averaged +IN +V NC OUT S by a single-pole, low-pass filter that is set with a corner frequency + BATTERY 133kΩ of 3.6 Hz, which provides about 30 dB of attenuation at 100 Hz. – SHUNT AD8209 A higher rate of attenuation can be obtained by using a two-pole filter with a corner frequency of 20 Hz, as shown in Figure 36. 20kΩ –IN GND A1 A2 SWITCH Although this circuit uses two separate capacitors, the total capaci- V OS/IB NULL tance is less than half of what is needed for the single-pole filter. 5V C 5% CALIBRATION RANGE f (Hz) = 0.767Hz/C(µF) C (0.22µF FOR f = 3.6Hz) C NC = NO CONNECT CLAMP INDUCTIVE OUTPUT DIODE LOAD Figure 35. High Line Current-Sensor Interface; +IN +V NC OUT S Gain = 40 V/V, Single-Pole, Low-Pass Filter 432kΩ + BATTERY – A power device that is either on or off controls the current in C SHUNT AD8209 the load. The average current is proportional to the duty cycle of the input pulse and is sensed by a small-value resistor. The 50kΩ –IN GND A1 A2 SWITCH average differential voltage across the shunt is typically 100 mV, although its peak value is higher by an amount that depends on the 93kΩ inductance of the load and the control frequency. The common- C f (Hz) =1/C(µF) C (0.05µF FOR f = 20Hz) C mode voltage, on the other hand, extends from roughly 1 V above NC = NO CONNECT ground for the on condition to about 1.5 V above the battery Figure 36. Two-Pole Low-Pass Filter voltage in the off condition. The conduction of the clamping Rev. 0 | Page 14 of 16 08461-037 08461-038 AD8209 OUTLINE DIMENSIONS 3.20 3.00 2.80 8 5 5.15 3.20 4.90 3.00 4.65 1 2.80 4 PIN1 IDENTIFIER 0.65BSC 0.95 15°MAX 0.85 1.10MAX 0.75 0.80 0.15 0.23 6° 0.55 0.40 0.05 0.09 0° 0.40 0.25 COPLANARITY 0.10 COMPLIANTTOJEDECSTANDARDSMO-187-AA Figure 37. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters ORDERING GUIDE Model Temperature Package Package Description Package Option Branding 1 AD8209WBRMZ −40°C to +125°C 8-Lead Mini Small Outline Package (MSOP) RM-8 Y26 1 AD8209WBRMZ-R7 −40°C to +125°C 8-Lead Mini Small Outline Package (MSOP) RM-8 Y26 1 AD8209WBRMZ-RL −40°C to +125°C 8-Lead Mini Small Outline Package (MSOP) RM-8 Y26 1 Z = RoHS Compliant Part. Rev. 0 | Page 15 of 16 100709-B AD8209 NOTES ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08461-0-10/09(0) Rev. 0 | Page 16 of 16