ANALOG DEVICES AD818

Low Cost, Low Power Video Op Amp AD818 FEATURES CONNECTION DIAGRAM Low Cost 8-Lead Plastic Mini-DIP (N) and SOIC (R) Packages Excellent Video Performance 55 MHz 0.1 dB Bandwidth (Gain = +2) 0.01% and 0.05� Differential Gain and Phase Errors NULL NULL 1 8 AD818 High Speed 130 MHz Bandwidth (3 dB, G = +2) +V –IN 2 7 S 100 MHz Bandwidth (3 dB, G+ = –1) +IN 3 6 OUTPUT 500 V/�s Slew Rate 80 ns Settling Time to 0.01% (V = 10 V Step) O –V 4 5 NC S High Output Drive Capability TOP VIEW 50 mA Minimum Output Current NC = NO CONNECT Ideal for Driving Back Terminated Cables Flexible Power Supply any video application. The 130 MHz 3 dB bandwidth (G = +2) Specified for Single (+5 V) and Dual (�5 V to �15 V) and 500 V/ms slew rate make the AD818 useful in many high speed Power Supplies applications including video monitors, CATV, color copiers, Low Power: 7.5 mA Max Supply Current image scanners, and fax machines. Available in 8-Lead SOIC and 8-Lead PDIP The AD818 is fully specified for operation with a single +5 V GENERAL DESCRIPTION power supply and with dual supplies from ±5 V to ±15 V. This The AD818 is a low cost video op amp optimized for use in power supply flexibility, coupled with a very low supply current video applications that require gains equal to or greater than +2 of 7.5 mA and excellent ac characteristics under all power sup- or –1. The AD818’s low differential gain and phase errors, ply conditions, make the AD818 the ideal choice for many single supply functionality, low power, and high output drive demanding yet power sensitive applications. make it ideal for cable driving applications such as video The AD818 is a voltage feedback op amp and excels as a gain cameras and professional video equipment. stage in high speed and video systems (gain ≥ 2, or gain £ –1). It With video specs like 0.1 dB flatness to 55 MHz and low differ- achieves a settling time of 45 ns to 0.1%, with a low input offset ential gain and phase errors of 0.01% and 0.05∞, along with voltage of 2 mV max. 50 mA of output current, the AD818 is an excellent choice for The AD818 is available in low cost, small 8-lead PDIP and SOIC packages. +15V 0.02 0.01�F 2.2�F DIFF GAIN 0.01 R BT V IN 75� 75� AD818 0.06 0.00 R T 75� 0.05 DIFF PHASE 0.1�F 2.2�F 0.04 –15V 1k� 0.03 510 15 1k� SUPPLY VOLTAGE (�V) Figure 2. Differential Gain and Phase vs. Supply Figure 1. Video Line Driver D REV. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. may result from its use. No license is granted by implication or otherwise Tel: 781/329-4700 www.analog.com under any patent or patent rights of Analog Devices. Trademarks and Fax: 781.461-3113 ©2010 Analog Devices, Inc. All rights reserved. registered trademarks are the property of their respective companies. DIFFERENTIAL PHASE (Degrees) DIFFERENTIAL GAIN (%) AD818–SPECIFICATIONS (@ T = 25�C, unless otherwise noted.) A AD818A Parameter Conditions V Min Typ Max Unit S DYNAMIC PERFORMANCE –3 dB Bandwidth Gain = +2 ±5 V 70 95 MHz ±15 V 100 130 MHz 0 V, +5 V 40 55 MHz Gain = –1 ±5 V 50 70 MHz ±15 V 70 100 MHz 0 V, +5 V 30 50 MHz Bandwidth for 0.1 dB Flatness Gain = +2 ±5 V 20 43 MHz C = 2 pF ±15 V 40 55 MHz C 0 V, +5 V 10 18 MHz Gain = –1 ±5 V 18 34 MHz C = 2 pF ±15 V 40 72 MHz C 0 V, +5 V 10 19 MHz Full Power Bandwidth* V = 5 V p-p OUT R = 500 W±5 V 25.5 MHz LOAD V = 20 V p-p OUT R = 1 kW±15 V 8.0 MHz LOAD Slew Rate R = 1 kW±5 V 350 400 V/ms LOAD Gain = –1 ±15 V 450 500 V/ms 0 V, +5 V 250 300 V/ms Settling Time to 0.1% –2.5 V to +2.5 V ±5 V 45 ns 0 V–10 V Step, A = –1 ±15 V 45 ns V Settling Time to 0.01% –2.5 V to +2.5 V ±5 V 80 ns 0 V–10 V Step, A = –1 ±15 V 80 ns V Total Harmonic Distortion F = 1 MHz ±15 V 63 dB C Differential Gain Error NTSC ±15 V 0.005 0.01 % (R = 150 W)Gain = +2 ±5 V 0.01 0.02 % L 0 V, +5 V 0.08 % Differential Phase Error NTSC ±15 V 0.045 0.09 Degrees (R = 150 W)Gain = +2 ±5 V 0.06 0.09 Degrees L 0 V, +5 V 0.1 Degrees Cap Load Drive 10 pF INPUT OFFSET VOLTAGE ±5 V to ±15 V 0.5 2 mV T to T 3mV MIN MAX Offset Drift 10 mV/∞C INPUT BIAS CURRENT ±5 V, ±15 V 3.3 6.6 mA T 10 mA MIN T 4.4 mA MAX INPUT OFFSET CURRENT ±5 V, ±15 V 25 300 nA T to T 500 nA MIN MAX Offset Current Drift 0.3 nA/∞C OPEN-LOOP GAIN V = ±2.5 V ±5 V OUT R = 500 W 35 V/mV LOAD T to T 2 V/mV MIN MAX R = 150 W 24 V/mV LOAD V = ±10 V ±15 V OUT R = 1 kW 69 V/mV LOAD T to T 3 V/mV MIN MAX V = ±7.5 V ±15 V OUT R = 150 W LOAD (50 mA Output) 3 5 V/mV COMMON-MODE REJECTION V = ±2.5 V ±5 V 82 100 dB CM V = ±12 V ±15 V 86 120 dB CM T to T ±15 V 84 100 dB MIN MAX –2– REV. D AD818 AD818A Parameter Conditions V Min Typ Max Unit S POWER SUPPLY REJECTION V = ±5 V to ±15 V 80 90 dB S T to T 80 dB MIN MAX INPUT VOLTAGE NOISE f = 10 kHz ±5 V, ±15 V 10 nV/÷Hz INPUT CURRENT NOISE f = 10 kHz ±5 V, ±15 V 1.5 pA/÷Hz INPUT COMMON-MODE VOLTAGE RANGE ±5 V +3.8 +4.3 V –2.7 –3.4 V ±15 V +13 +14.3 V –12 –13.4 V 0 V, +5 V +3.8 +4.3 V +1.2 +0.9 V OUTPUT VOLTAGE SWING R = 500 W±5 V 3.3 3.8 ±V LOAD R = 150 W±5 V 3.2 3.6 ±V LOAD R = 1 kW±15 V 13.3 13.7 ±V LOAD R = 500 W±15 V 12.8 13.4 ±V LOAD R = 500 W 0 V, +5 V 1.5, 3.5 V LOAD Output Current ±15 V 50 mA ±5 V 50 mA 0 V, +5 V 30 mA Short-Circuit Current ±15 V 90 mA INPUT RESISTANCE 300 kW INPUT CAPACITANCE 1.5 pF OUTPUT RESISTANCE Open Loop 8 W POWER SUPPLY Operating Range Dual Supply ±2.5 ±18 V Single Supply +5 +36 V Quiescent Current ±5 V 7.0 7.5 mA T to T ±5 V 7.5 mA MIN MAX ±15 V 7.5 mA T to T ±15 V 7.0 7.5 mA MIN MAX *Full power bandwidth = slew rate/(2p V ). PEAK Specifications subject to change without notice. REV. D –3– AD818 1 2.0 ABSOLUTE MAXIMUM RATINGS T = 150 C J Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V 8-LEAD MINI-DIP PACKAGE 2 Internal Power Dissipation Plastic (N) . . . . . . . . . . . . . . . . . . . . . . See Derating Curves 1.5 Small Outline (R) . . . . . . . . . . . . . . . . . See Derating Curves Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . ±V S Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ±6 V 1.0 Output Short-Circuit Duration . . . . . . . . See Derating Curves Storage Temperature Range (N, R) . . . . . . . . –65∞C to +125∞C Operating Temperature Range . . . . . . . . . . . . –40∞C to +85∞C 0.5 Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300∞C 8-LEAD SOIC PACKAGE NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the 0 –50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 device at these or any other conditions above those indicated in the operational AMBIENT TEMPERATURE (�C) section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 8-lead plastic package, � = 90∞C/W; 8-lead JA Figure 3. Maximum Power Dissipation vs. Temperature SOIC package, � = 155∞C/W. JA for Different Package Types CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD818 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. METALLIZATION PHOTOGRAPH Dimensions shown in inches and (mm) OFFSET OFFSET NULL NULL +V S 1 8 7 –INPUT 2 0.0523 (1.33) 6 OUTPUT +INPUT 3 4 –V S 0.0559 (1.42) –4– REV. D MAXIMUM POWER DISSIPATION (W) Typical Performance Characteristics–AD818 20 20 15 15 R = 500� L +V CM 10 10 –V CM R = 150� L 5 5 0 0 02 5 10 150 02 5 10 150 SUPPLY VOLTAGE (�V) SUPPLY VOLTAGE (�V) TPC 1. Common-Mode Voltage Range vs. Supply TPC 4. Output Voltage Swing vs. Supply 30 8.0 25 7.5 V = �15V S 20 +85�C +25�C 15 7.0 –40�C 10 6.5 V = �5V S 5 0 6.0 10 100 1k 10k02 5 10 150 LOAD RESISTANCE (�) SUPPLY VOLTAGE (�V) TPC 2. Output Voltage Swing vs. Load Resistance TPC 5. Quiescent Supply Current vs. Supply Voltage 600 100 500 10 400 1 300 0.1 200 0.01 02 5 10 150 1k 10k 100k 1M 10M 100M SUPPLY VOLTAGE (�V) FREQUENCY (Hz) TPC 3. Slew Rate vs. Supply Voltage TPC 6. Closed-Loop Output Impedance vs. Frequency REV. D –5– SLEW RATE (V/�s) INPUT COMMON-MODE RANGE (�V) OUTPUT VOLTAGE SWING (V p-p) CLOSED-LOOP OUTPUT IMPEDANCE (�) QUIESCENT SUPPLY CURRENT (mA) OUTPUT VOLTAGE SWING (�V) AD818 7 130 6 110 SOURCE CURRENT 5 90 4 SINK CURRENT 70 3 50 2 1 30 –60 –40 –20 0 20 40 60 80 100 120 140 –60 –40 –20 0 20 40 60 80 100 120 140 TEMPERATURE (�C) TEMPERATURE (�C) TPC 7. Input Bias Current vs. Temperature TPC 10. Short-Circuit Current vs. Temperature 100 100 70 95 PHASE �5V OR �15V SUPPLIES 80 80 PHASE MARGIN �15V SUPPLIES 60 85 R = 1k� L 60 60 40 40 50 75 �5V SUPPLIES R = 1k� L GAIN/BANDWIDTH 20 20 40 65 0 0 –20 30 55 1k 10k 100k 1M 10M 100M 1G –60 –40 –20 0 20 40 60 80 100 120 140 FREQUENCY (Hz) TEMPERATURE (�C) TPC 8. –3 dB Bandwidth and Phase Margin vs. TPC 11. Open-Loop Gain and Phase Margin vs. Temperature, Gain = +2 Frequency 9 100 90 �15V 8 80 +SUPPLY 7 70 �5V 60 6 –SUPPLY 50 5 40 30 4 20 3 10 100 1k 10k 100 1k 10k 100k 1M 10M 100M FREQUENCY (Hz) LOAD RESISTANCE (�) TPC 12. Power Supply Rejection vs. Frequency TPC 9. Open-Loop Gain vs. Load Resistance –6– REV. D PHASE MARGIN (Degrees) OPEN-LOOP GAIN (V/mV) INPUT BIAS CURRENT (�A) –3dB BANDWIDTH (MHz) OPEN-LOOP GAIN (dB) PSR (dB) SHORT CIRCUIT CURRENT (mA) PHASE MARGIN (Degrees) AD818 120 30 R = 1k� L 100 20 80 R = 150� L 10 60 0 40 100k 1M 10M 100M 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) TPC 13. Common-Mode Rejection vs. Frequency TPC 16. Output Voltage vs. Frequency 10 –40 R = 150� L 8 2V p-p –50 6 4 –60 1% 0.1% 0.01% 2 0 –70 SECOND HARMONIC –2 0.01% 1% 0.1% –80 –4 THIRD HARMONIC –6 –90 –8 –10 –100 0 20 40 60 80 100 120 140 160 100 1k 10k 100k 1M 10M SETTLING TIME (ns) FREQUENCY (Hz) TPC 14. Output Swing and Error vs. Settling Time TPC 17. Harmonic Distortion vs. Frequency 50 650 40 550 30 450 20 350 10 0 250 1 10 100 1k 10k 100k 1M 10M –60 –40 –20 0 20 40 60 80 100 120 140 FREQUENCY (Hz) TEMPERATURE (�C) TPC 15. Input Voltage Noise Spectral Density vs. TPC 18. Slew Rate vs. Temperature Frequency REV. D –7– INPUT VOLTAGE NOISE (nV/ Hz) CMR (dB) OUTPUT SWING FROM 0 TO �V (V) SLEW RATE (V/�s) OUTPUT VOLTAGE (V p-p) HARMONIC DISTORTION (dB) AD818 C F 0.02 1k� DIFF GAIN 0.01 +V S 3.3�F 0.00 0.06 0.01�F HP V IN PULSE (LS) 1k� 0.05 OR FUNCTION TEKTRONIX TEKTRONIX (SS) DIFF PHASE AD818 P6201 FET 7A24 GENERATOR PREAMP PROBE 50� V OUT 0.04 0.01�F R L 0.03 510 15 3.3�F SUPPLY VOLTAGE (�V) –V S TPC 19. Differential Gain and Phase vs. Supply Voltage TPC 22. Inverting Amplifier Connection C C 0.1dB 10 V C FLATNESS S C 2V 50ns 1k� 1k� �15V 2pF 55MHz 9 V OUT �5V 1pF 43MHz 100 AD818 +5V 1pF 18MHz 90 8 V IN 150� 7 6 5 �15V �5V 4 10 3 0% +5V 2 2V 1 1M 10M 100M 1G FREQUENCY (Hz) TPC 20. Closed-Loop Gain vs. Frequency (G = +2) TPC 23. Inverter Large Signal Pulse Response; V = ±5 V, C = 1 pF, R = 1 kW S F L 10 0.1dB 2pF 8 200mV 10ns V FLATNESS S �15V 72MHz 6 1k� 1k� 100 �5V 34MHz V OUT +5V 19MHz 90 AD818 4 V IN 150� 2 0 –2 �15V +5V –4 10 –6 0% �5V –8 200mV –10 1M 10M 100M 1G FREQUENCY (Hz) TPC 24. Inverter Small Signal Pulse Response; TPC 21. Closed-Loop Gain vs. Frequency (G = –1) V = ±5 V, C = 1 pF, R = 150 W S F L –8– REV. D DIFFERENTIAL PHASE (Degrees) GAIN (dB) GAIN (dB) DIFFERENTIAL GAIN (%) AD818 C F 1k� 1k� 5V 50ns +V S 3.3�F 100 90 0.01�F TEKTRONIX TEKTRONIX HP AD818 P6201 FET 7A24 V IN PREAMP PULSE (LS) 100� PROBE V OUT OR FUNCTION 10 (SS) 0% GENERATOR 0.01�F 50� 5V R L 3.3�F –V S TPC 25. Inverter Large Signal Pulse Response; TPC 28. Noninverting Amplifier Connection V = ±15 V, C = 1 pF, R = 1 kW S F L 200mV 10ns 1V 50ns 100 100 90 90 10 10 0% 0% 200mV 2V TPC 26. Inverter Small Signal Pulse Response; TPC 29. Noninverting Large Signal Pulse Response; V = ±15 V, C = 1 pF, R = 150 W S F L V = ±5 V, C = 1 pF, R = 1 kW S F L 200mV 10ns 100mV 10ns 100 100 90 90 10 10 0% 0% 200mV 200mV TPC 27. Inverter Small Signal Pulse Response; TPC 30. Noninverting Small Signal Pulse V = ±5 V, C = 0 pF, R = 150 W S F L Response; V = ±5 V, C = 1 pF, R = 150 W S F L REV. D –9– AD818 5V 50ns 100mV 10ns 100 100 90 90 10 10 0% 0% 5V 200mV TPC 31. Noninverting Large Signal Pulse Response; TPC 33. Noninverting Small Signal Pulse Response; V = ±15 V, C = 1 pF, R = 1 kW V = ±5 V, C = 0 pF, R = 150 W S F L S F L 100mV 10ns 100 90 10 0% 200mV TPC 32. Noninverting Small Signal Pulse Response; V = ±15 V, C = 1 pF, R = 150 W S F L –10– REV. D AD818 +V S may result in peaking. A small capacitance (1 pF–5 pF) may be used in parallel with the feedback resistor to neutralize this effect. Power supply leads should be bypassed to ground as close as possible to the amplifier pins. Ceramic disc capacitors of 0.1 mF are recommended. OUTPUT +V S –IN AD818 +IN 10k� V ADJUST –V S OS –V S NULL 1 NULL 8 Figure 5. Offset Null Configuration Figure 4. AD818 Simplified Schematic OFFSET NULLING THEORY OF OPERATION The input offset voltage of the AD818 is inherently very low. The AD818 is a low cost video operational amplifier designed to However, if additional nulling is required, the circuit shown excel in high performance, high output current video applications. in Figure 5 can be used. The null range of the AD818 in this configuration is ±10 mV. The AD818 (Figure 4) consists of a degenerated NPN differen- tial pair driving matched PNPs in a folded-cascode gain stage. SINGLE SUPPLY OPERATION The output buffer stage employs emitter followers in a class Another exciting feature of the AD818 is its ability to perform AB amplifier that delivers the necessary current to the load, while well in a single supply configuration. The AD818 is ideally maintaining low levels of distortion. suited for applications that require low power dissipation and The AD818 will drive terminated cables and capacitive loads of high output current. 10 pF or less. As the closed-loop gain is increased, the AD818 Referring to Figure 6, careful consideration should be given to will drive heavier capacitive loads without oscillating. the proper selection of component values. The choices for this particular circuit are: R1 + R3�R2 combine with C1 to form a INPUT CONSIDERATIONS low frequency corner of approximately 10 kHz. C4 was inserted An input protection resistor (R in TPC 28) is required in IN in series with R4 to maintain amplifier stability at high frequency. circuits where the input to the AD818 will be subjected to tran- sients of continuous overload voltages exceeding the ±6 V Combining R3 with C2 forms a low-pass filter with a corner maximum differential limit. This resistor provides protection for frequency of approximately 500 Hz. This is needed to maintain the input transistors by limiting their maximum base current. amplifier PSRR, since the supply is connected to V through IN the input divider. The values for R2 and C2 were chosen to For high performance circuits, it is recommended that a “bal- demonstrate the AD818’s exceptional output drive capability. ancing” resistor be used to reduce the offset errors caused by In this configuration, the output is centered around 2.5 V. In bias current flowing through the input and feedback resistors. order to eliminate the static dc current associated with this level, The balancing resistor equals the parallel combination of R IN C3 was inserted in series with R . L and R and thus provides a matched impedance at each input F terminal. The offset voltage error will then be reduced by more V S than an order of magnitude. R3 GROUNDING AND BYPASSING SELECT C1, R1, R2 100� 1k� R4 FOR DESIRED LOW When designing high frequency circuits, some special precautions 3.3�F 1k� FREQUENCY CORNER. C2 are in order. Circuits must be built with short interconnect leads. C4 3.3�F 0.001�F When wiring components, care should be taken to provide a low 0.01�F resistance, low inductance path to ground. Sockets should be R1 3.3k� V avoided, since their increased interlead capacitance can degrade OUT C1 AD818 0.01�F circuit bandwidth. C3 V IN 0.1�F Feedback resistors should be of low enough value (£1 kW) to R2 R 3.3k� L ensure that the time constant formed with the inherent stray 150� capacitance at the amplifier’s summing junction will not limit performance. This parasitic capacitance, along with the parallel resistance of R �R , forms a pole in the loop transmission, which Figure 6. Single-Supply Amplifier Configuration F IN REV. D –11– AD818 15pF 1M� 2� ERROR AMPLIFIER HP2835 V OUTPUT � 10 ERROR SHORT, DIRECT CONNECTION 100� ERROR 2� TO TEKTRONIX TYPE 11402 AD829 SIGNAL HP2835 OSCILLOSCOPE PREAMP OUTPUT INPUT SECTION 0.47�F 0.01�F 0.47�F 0 TO �10V 0.01�F EI&S –V POWER S DL1A05GM FALSE SUPPLY +V NULL MERCURY SUMMING S 1.9k� ADJUST RELAY NODE 1k� 7, 8 NOTE 1k� 100� 100� 500� USE CIRCUIT BOARD WITH GROUND PLANE TTL LEVEL 50� SIGNAL COAX 5pF–18pF DEVICE 1, 14 GENERATOR CABLE UNDER 500� 50Hz TEKTRONIX P6201 TEST OUTPUT FET PROBE TO AD818 TEKTRONIX TYPE 11402 50� 10pF OSCILLOSCOPE SCOPE PROBE PREAMP INPUT SECTION DIGITAL CAPACITANCE 2.2�F 0.01�F GROUND ANALOG –V GROUND 0.01�F S 2.2�F +V S Figure 7. Settling Time Test Circuit AD818 SETTLING TIME A High Performance Video Line Driver Settling time primarily comprises two regions. The first is the slew The buffer circuit shown in Figure 8 will drive a back-terminated time in which the amplifier is overdriven, where the output voltage 75 W video line to standard video levels (1 V p-p) with 0.1 dB rate of change is at its maximum. The second is the linear time gain flatness to 55 MHz with only 0.05∞ and 0.01% differential period required for the amplifier to settle to within a specified phase and gain at the 3.58 MHz NTSC subcarrier frequency. percentage of the final value. This level of performance, which meets the requirements for high definition video displays and test equipment, is achieved Measuring the rapid settling time of the AD818 (45 ns to 0.1% using only 7 mA quiescent current. and 80 ns to 0.01%—10 V step) requires applying an input pulse with a very fast edge and an extremely flat top. With the AD818 +15V configured in a gain of –1, a clamped false summing junction responds when the output error is within the sum of two diode 0.01�F 2.2�F R BT voltages (approximately 1 V). The signal is then amplified 20 times V IN 75� 75� R AD818 by a clamped amplifier whose output is connected directly to a T 75� R sampling oscilloscope. T 75� 2.2�F 0.01�F –15V 1k� 1k� Figure 8. Video Line Driver –12– REV. D AD818 DIFFERENTIAL LINE RECEIVER A HIGH SPEED, 3-OP AMP IN AMP The differential receiver circuit of Figure 9 is useful for many The circuit of Figure 11 uses three high speed op amps: two applications—from audio to video. It allows extraction of a low AD818s and an AD817. This high speed circuit lends itself well level signal in the presence of common-mode noise, as shown in to CCD imaging and other video speed applications. It has the Figure 10. optional flexibility of both dc and ac trims for common-mode rejection, plus the ability to adjust for minimum settling time. 2pF EACH AMPLIFIER 1k� 1k� PIN 7 V B +15V +V EACH S +5V AMPLIFIER 10�F 0.1�F 1�F 0.1�F 0.01�F 2.2�F COMMON 1�F 0.1�F 10�F 0.1�F DIFFERENTIAL AD818 OUTPUT PIN 4 V INPUT OUT –15V –V EACH S AMPLIFIER 2.2�F 0.01�F –5V –V IN SETTLING A1 1k� 1k� TIME AC AD818 2pF–8pF V CMR ADJUST A 2pF 1k� 1k� Figure 9. Differential Line Receiver 1k� V 5pF OUT A3 R 2pF G AD818 1k� 5pF R L 2k� 3pF 100 1k� 970� 1V 20ns 90 A2 50� V AD818 A DC CMR +V IN ADJUST BANDWIDTH, SETTLING TIME, AND TOTAL HARMONIC DISTORTION VS. GAIN 2V 10 SMALL SETTLING THD + NOISE 0% CADJ SIGNAL TIME BELOW INPUT LEVEL GAIN R (pF) BANDWIDTH TO 0.1% @ 10kHz G OUTPUT 3 1k� 2–8 14.7MHz 200ns 82dB 10 222� 2–8 4.5MHz 370ns 81dB 100 20� 2–8 960kHz 2.5�s 71dB Figure 10. Performance of Line Receiver, R = 150 W, L G = +2 Figure 11. High Speed 3-Op Amp In Amp REV. D –13– AD818 OUTLINE DIMENSIONS 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 8 5 0.280 (7.11) 0.250 (6.35) 1 0.240 (6.10) 4 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.100 (2.54) BSC 0.060 (1.52) 0.195 (4.95) MAX 0.210 (5.33) 0.130 (3.30) MAX 0.115 (2.92) 0.015 0.150 (3.81) (0.38) 0.015 (0.38) MIN 0.130 (3.30) GAUGE PLANE 0.014 (0.36) 0.115 (2.92) SEATING 0.010 (0.25) PLANE 0.008 (0.20) 0.022 (0.56) 0.430 (10.92) 0.005 (0.13) 0.018 (0.46) MAX MIN 0.014 (0.36) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) COMPLIANT TO JEDEC STANDARDS MS-001 CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS. Figure 12. 8-Lead Plastic Dual In-Line Package [PDIP] (N-8) Dimensions shown in inches and (millimeters) 5.00 (0.1968) 4.80 (0.1890) 85 6.20 (0.2441) 4.00 (0.1574) 1 5.80 (0.2284) 3.80 (0.1497) 4 0.50 (0.0196) 1.27 (0.0500) 45° BSC 1.75 (0.0688) 0.25 (0.0099) 1.35 (0.0532) 0.25 (0.0098) 8° 0.10 (0.0040) 0° COPLANARITY 0.51 (0.0201) 1.27 (0.0500) 0.10 0.31 (0.0122) 0.25 (0.0098) SEATING 0.40 (0.0157) PLANE 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 13. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) –14– REV. D 012407-A 070606-A AD818 ORDERING GUIDE 1 Model Temperature Range Package Description Package Option AD818AN −40°C to +85°C 8-Lead Plastic PDIP N-8 AD818ANZ −40°C to +85°C 8-Lead Plastic PDIP N-8 AD818AR −40°C to +85°C 8-Lead SOIC_N R-8 AD818ARZ −40°C to +85°C 8-Lead SOIC_N R-8 AD818AR-REEL −40°C to +85°C 8-Lead SOIC_N, 13’’ Tape and Reel R-8 AD818ARZ-REEL −40°C to +85°C 8-Lead SOIC_N, 13’’ Tape and Reel R-8 AD818AR-REEL7 −40°C to +85°C 8-Lead SOIC_N, 7’’ Tape and Reel R-8 AD818ARZ-REEL7 −40°C to +85°C 8-Lead SOIC_N, 7’’ Tape and Reel R-8 AD818AR-EBZ −40°C to +85°C Evaluation Board for 8-lead SOIC_N 1 Z = RoHS Compliant Part. REVISION HISTORY 10/10—Rev. C to Rev. D Updated Outline Dimensions ....................................................... 14 Changes to Ordering Guide .......................................................... 15 5/03—Rev. B to Rev. C Renumbered Figures and TPCs ........................................ Universal Changes to Specifications ................................................................ 2 Changes to Ordering Guide ............................................................ 4 Changes to Figures 9 and 10 ......................................................... 12 Updated Outline Dimensions ....................................................... 14 ©2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D00872-0-10/10(D) REV. D –15–