ANALOG DEVICES AD813

Single Supply, Low Power a Triple Video Amplifier AD813 FEATURES PIN CONFIGURATION Low Cost 14-Lead DIP and SOIC Three Video Amplifiers in One Package Optimized for Driving Cables in Video Systems 14 OUT2 DISABLE1 1 Excellent Video Specifications (R = 150 V) L 13 –IN2 DISABLE2 2 Gain Flatness 0.1 dB to 50 MHz +IN2 DISABLE3 3 12 0.03% Differential Gain Error V + V – 4 11 0.068 Differential Phase Error S S AD813 +IN1 Low Power 5 10 +IN3 Operates on Single +3 V to 615 V Power Supplies –IN1 6 9 –IN3 5.5 mA/Amplifier Max Power Supply Current OUT1 8 OUT3 7 High Speed 125 MHz Unity Gain Bandwidth (–3 dB) 50 MHz while offering differential gain and phase error of 500 V/ms Slew Rate 0.03% and 0.06°. This makes the AD813 ideal for broadcast High Speed Disable Function per Channel and consumer video electronics. Turn-Off Time 80 ns Easy to Use The AD813 offers low power of 5.5 mA per amplifier max and 50 mA Output Current runs on a single +3 V power supply. The outputs of each ampli- Output Swing to 1 V of Rails fier swing to within one volt of either supply rail to easily accom- modate video signals. While operating on a single +5 V supply APPLICATIONS the AD813 still achieves 0.1 dB flatness to 20 MHz and 0.05% Video Line Driver & 0.05° of differential gain and phase performance. All this is LCD Drivers offered in a small 14-lead plastic DIP or SOIC package. These Computer Video Plug-In Boards features make this triple amplifier ideal for portable and battery Ultrasound powered applications where size and power are critical. RGB Amplifier CCD Based Systems The outstanding bandwidth of 125 MHz along with 500 V/μs of slew rate make the AD813 useful in many general purpose, high speed applications where a single +3 V or dual power supplies PRODUCT DESCRIPTION up to ±15 V are needed. Furthermore the AD813 contains a The AD813 is a low power, single supply triple video amplifier. high speed disable function for each amplifier in order to power Each of the three current feedback amplifiers has 50 mA of output down the amplifier or high impedance the output. This can then current, and is optimized for driving one back-terminated video be used in video multiplexing applications. The AD813 is avail- load (150 Ω). The AD813 features gain flatness of 0.1 dB to able in the industrial temperature range of –40°C to +85°C in plastic DIP and SOIC packages as well as chips. G = +2 R = 150V L 0.2 500mV 500ns 615V 0.1 100 0 90 –0.1 65V –0.2 3V –0.3 5V –0.4 10 –0.5 0% 5V 100k 1M 10M 100M FREQUENCY – Hz Figure 1. Fine Scale Gain Flatness vs. Frequency, Figure 2. Channel Switching Characteristics for a 3:1 Mux G = +2, R = 150 Ω L REV. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. use, nor for any infringements of patents or other rights of third parties Tel: 781/329-4700 World Wide Web Site: http://www.analog.com which may result from its use. No license is granted by implication or Fax: 781/326-8703 © Analog Devices, Inc., 1998 otherwise under any patent or patent rights of Analog Devices. NORMALIZED GAIN – dB AD813–SPECIFICATIONS Dual Supply (@ T = +258C, R = 150 V, unless otherwise noted) A L Model AD813A Conditions V Min Typ Max Units S DYNAMIC PERFORMANCE –3 dB Bandwidth G = +2, No Peaking ±5 V 45 65 MHz ±15 V 75 100 MHz Bandwidth for 0.1 dB Flatness G = +2 ±5 V 15 25 MHz ±15 V 25 50 MHz 1 Slew Rate G = +2, R = 1 kΩ±5 V 150 V/μs L ±15 V 150 250 V/μs G = –1, R = 1 kΩ±5 V 225 V/μs L ±15 V 450 V/μs Settling Time to 0.1% G = –1, R = 1 kΩ L V = 3 V Step ±5 V 50 ns O V = 10 V Step ±15 V 40 ns O NOISE/HARMONIC PERFORMANCE Total Harmonic Distortion f = 1 MHz, R = 1 kΩ±15 V –90 dBc C L Input Voltage Noise f = 10 kHz ±5 V, ±15 V 3.5 nV√Hz Input Current Noise f = 10 kHz, +In ±5 V, ±15 V 1.5 pA√Hz –In ±5 V, ±15 V 18 pA√Hz Differential Gain Error NTSC, G = ±2, R = 150 Ω±5 V 0.08 % L ±15 V 0.03 0.09 % Differential Phase Error ±5 V 0.13 Degrees ±15 V 0.06 0.12 Degrees DC PERFORMANCE Input Offset Voltage ±5 V, ±15 V 2 5 mV T –T 12 mV MIN MAX Offset Drift ±5 V, ±15 V 15 μV/°C –Input Bias Current ±5 V, ±15 V 5 30 μA T –T 35 μA MIN MAX +Input Bias Current ±5 V, ±15 V 0.5 1.7 μA T –T 2.5 μA MIN MAX Open-Loop Voltage Gain V = ±2.5 V, R = 150 Ω±5 V 69 76 dB O L T –T 66 dB MIN MAX V = ±10 V, R = 1 kΩ±15 V 73 82 dB O L T –T 72 dB MIN MAX Open-Loop Transresistance V = ±2.5 V, R = 150 Ω±5 V 300 500 kΩ O L T –T 200 kΩ MIN MAX V = ±10 V, R = 1 kΩ±15 V 400 900 kΩ O L T –T 300 kΩ MIN MAX INPUT CHARACTERISTICS Input Resistance +Input ±15 V 15 MΩ –Input ±15 V 65 Ω Input Capacitance +Input ±15 V 1.7 pF Input Common Mode ±5 V ±4.0 V Voltage Range ±15 V ±13.5 V Common-Mode Rejection Ratio Input Offset Voltage V = ±2.5 V ±5 V 54 58 dB CM –Input Current 23 μA/V ±Input Current 0.07 0.15 μA/V Input Offset Voltage V = ±10 V ±15 V 57 62 dB CM –Input Current 1.5 3.0 μA/V +Input Current 0.05 0.1 μA/V –2– REV. B AD813 Model AD813A Conditions V Min Typ Max Units S OUTPUT CHARACTERISTICS Output Voltage Swing R = 150 Ω, T –T ±5 V 3.5 3.8 ±V L MIN MAX R = 1 kΩ, T –T ±15 V 13.6 14.0 ±V L MIN MAX Output Current ±5 V 25 40 mA ±15 V 30 50 mA Short Circuit Current G = +2, R = 715 Ω±15 V 100 mA F V = 2 V IN MATCHING CHARACTERISTICS Dynamic Crosstalk G = +2, f = 5 MHz ±5 V, ±15 V –65 dB Gain Flatness Match G = +2, f = 40 MHz ±15 V 0.1 dB DC Input Offset Voltage T –T ±5 V, ±15 V 0.5 3.5 mV MIN MAX –Input Bias Current T –T ±5 V, ±15 V 2 25 μA MIN MAX POWER SUPPLY Operating Range ±1.2 ±18 V Quiescent Current Per Amplifier ±5 V 3.5 4.0 mA ±15 V 4.5 5.5 mA T –T ±15 V 6.7 mA MIN MAX Quiescent Current, Powered Down Per Amplifier ±5 V 0.5 0.65 mA ±15 V 0.75 1.0 mA Power Supply Rejection Ratio Input Offset Voltage V = ±1.5 V to ±15 V 72 80 dB S –Input Current 0.3 0.8 μA/V +Input Current 0.005 0.05 μA/V DISABLE CHARACTERISTICS Off Isolation f = 5 MHz ±5 V, ±15 V –57 dB Off Output Impedance G = +1 ±5 V, ±15 V 12.5 pF Channel-to-Channel 2 or 3 Channels ±5 V, ±15 V –65 dB Isolation Mux, f = 5 MHz Turn-On Time ±5 V, ±15 V 100 ns Turn-Off Time 80 ns NOTES 1 Slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain. Specifications subject to change without notice. –3– REV. B AD813–SPECIFICATIONS Single Supply (@ T = +258C, R = 150 V, unless otherwise noted) A L Model AD813A Conditions V Min Typ Max Units S DYNAMIC PERFORMANCE –3 dB Bandwidth G = +2, No Peaking +5 V 35 50 MHz +3 V 25 40 MHz Bandwidth for 0.1 dB Flatness G = +2 +5 V 12 20 MHz +3 V 8 15 MHz 1 Slew Rate G = +2, R = 1 kΩ +5 V 100 V/μs L +3 V 50 V/μs NOISE/HARMONIC PERFORMANCE Input Voltage Noise f = 10 kHz +5 V, +3 V 3.5 nV√Hz Input Current Noise f = 10 kHz, +In +5 V, +3 V 1.5 pA√Hz –In +5 V, +3 V 18 pA√Hz 2 Differential Gain Error NTSC, G = +2, R = 150 Ω +5 V 0.05 % L G = +1 +3 V 0.2 % 2 Differential Phase Error G = +2 +5 V 0.05 Degrees G = +1 +3 V 0.2 Degrees DC PERFORMANCE Input Offset Voltage +5 V, +3 V 1.5 5 mV T –T 10 mV MIN MAX Offset Drift +5 V, +3 V 7 μV/°C –Input Bias Current +5 V, +3 V 7 30 μA –T 40 μA T MIN MAX +Input Bias Current +5 V, +3 V 0.5 1.7 μA T –T 2.5 μA MIN MAX Open-Loop Voltage Gain V = +2.5 V p-p +5 V 65 70 dB O V = +0.7 V p-p +3 V 69 dB O Open-Loop Transresistance V = +3 V p-p +5 V 180 300 kΩ O V = +1 V p-p +3 V 225 kΩ O INPUT CHARACTERISTICS Input Resistance +Input +5 V, +3 V 15 MΩ –Input +5 V 90 Ω Input Capacitance +Input 2 pF Input Common Mode +5 V 1.0 4.0 V Voltage Range +3 V 1.0 2.0 V Common-Mode Rejection Ratio Input Offset Voltage V = 1.25 V to 3.75 V +5 V 54 58 dB CM –Input Current 3 6.5 μA/V +Input Current 0.1 0.2 μA/V Input Offset Voltage V = 1 V to 2 V +3 V 56 dB CM –Input Current 3.5 μA/V +Input Current 0.1 μA/V OUTPUT CHARACTERISTICS Output Voltage Swing p-p R = 150 Ω, T –T +5 V 3.0 3.2 ±V p-p L MIN MAX +3 V 1.0 1.3 ±V p-p Output Current +5 V 20 30 mA +3 V 15 25 mA Short Circuit Current G = +2, R = 715 Ω +5 V 40 mA F V = 1 V IN –4– REV. B AD813 Model AD813A Conditions V Min Typ Max Units S MATCHING CHARACTERISTICS Dynamic Crosstalk G = +2, f = 5 MHz +5 V, +3 V –65 dB Gain Flatness Match G = +2, f = 20 MHz +5 V, +3 V 0.1 dB DC Input Offset Voltage T –T +5 V, +3 V 0.5 3.5 mV MIN MAX –Input Bias Current T –T +5 V, +3 V 2 25 μA MIN MAX POWER SUPPLY Operating Range 2.4 36 V Quiescent Current Per Amplifier +5 V 3.2 4.0 mA +3 V 3.0 4.0 mA T –T +5 V 5.0 mA MIN MAX Quiescent Current, Powered Down Per Amplifier +5 V 0.4 0.6 mA +3 V 0.4 0.5 mA Power Supply Rejection Ratio Input Offset Voltage V = +3.0 V to +30 V 76 dB S –Input Current 0.3 μA/V +Input Current 0.005 μA/V DISABLE CHARACTERISTICS Off Isolation f = 5 MHz +5 V, +3 V –55 dB Off Output Impedance G = +1 +5 V, +3 V 13 pF Channel-to-Channel 2 or 3 Channel +5 V, +3 V –65 dB Isolation Mux, f = 5 MHz Turn-On Time +5 V, +3 V 100 ns Turn-Off Time 80 ns TRANSISTOR COUNT 111 NOTES 1 Slew rate measurement is based on 10% to 90% rise time in the specified closed-loop gain. 2 Single supply differential gain and phase are measured with the ac coupled circuit of Figure 52. Specifications subject to change without notice. 1 ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V 2 Temperature Package Package Internal Power Dissipation Model Range Description Options Plastic (N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 Watts Small Outline (R) . . . . . . . . . . . . . . . . . . . . . . . . . 1.0 Watts AD813AN –40°C to +85°C 14-Lead Plastic DIP N-14 Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . ±V S AD813AR-14 –40°C to +85°C 14-Lead Plastic SOIC R-14 Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . ±6V AD813ACHIPS –40°C to +85°C Die Form Output Short Circuit Duration AD813AR-REEL 13" REEL . . . . . . . . . . . . . . . . . . . . . . . Observe Power Derating Curves AD813AR-REEL7 7" REEL Storage Temperature Range N, R . . . . . . . . –65°C to +125°C 5962-9559601M2A* –55°C to +125°C 20-Lead LCC Operating Temperature Range *Refer to official DSCC drawing for tested specifications and pin configuration. AD813A . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C Lead Temperature Range (Soldering 10 sec) . . . . . . . +300°C NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 Specification is for device in free air: 14-Lead Plastic DIP Package: θ = 75°C/W JA 14-Lead SOIC Package: θ = 120°C/W JA REV. B –5– AD813 2.5 Maximum Power Dissipation T = +150 C J The maximum power that can be safely dissipated by the AD813 is limited by the associated rise in junction temperature. The maximum safe junction temperature for the plastic encap- 2.0 sulated parts is determined by the glass transition temperature 14-LEAD DIP PACKAGE of the plastic, about 150°C. Exceeding this limit temporarily may cause a shift in parametric performance due to a change in 1.5 the stresses exerted on the die by the package. Exceeding a junction temperature of 175°C for an extended period can result 14-LEAD SOIC in device failure. 1.0 While the AD813 is internally short circuit protected, this may not be enough to guarantee that the maximum junction tem- perature (150°C) is not exceeded under all conditions. To 0.5 ensure proper operation, it is important to observe the derating –50 –40 –30 –20 –10 010 20 30 40 50 60 70 80 90 AMBIENT TEMPERATURE – C curves. Figure 3. Maximum Power Dissipation vs. Ambient It must also be noted that in (noninverting) gain configurations (with low values of gain resistor), a high level of input overdrive Temperature can result in a large input error current, which may result in a significant power dissipation in the input stage. This power must be included when computing the junction temperature rise due to total internal power. METALIZATION PHOTO Dimensions shown in inches and (mm). 0.124 (3.15) +IN2 V – V – V – +IN3 S S S 12 11 11 11 10 9 –IN3 –IN2 13 8 OUT3 OUT2 14 0.057 (1.45) 7 OUT1 DISABLE1 1 DISABLE2 2 3 4 6 5 DISABLE3 V + +IN1 –IN1 S CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily WARNING! accumulate on the human body and test equipment and can discharge without detection. Although the AD813 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD ESD SENSITIVE DEVICE precautions are recommended to avoid performance degradation or loss of functionality. –6– REV. B MAXIMUM POWER DISSIPATION – Watts AD813 20 20 18 15 V = 615V S 16 10 14 V = 65V S 12 5 10 0 8 02 5 10 150 –60 –40 –20 0 20 40 60 80 100 120 140 SUPPLY VOLTAGE – 6Volts JUNCTION TEMPERATURE – C Figure 4. Input Common-Mode Voltage Range vs. Figure 7. Supply Current vs. Junction Temperature Supply Voltage 20 13 T = +25 C A 12 15 NO LOAD 11 10 R = 150V L 10 5 9 0 8 02 5 10 150 10 12 14 16 0 2 4 6 8 SUPPLY VOLTAGE – 6Volts SUPPLY VOLTAGE – ±Volts Figure 5. Output Voltage Swing vs. Supply Voltage Figure 8 Supply Current vs. Supply Voltage at Low Voltages 30 25 615V SUPPLY 20 25 15 10 20 –I , V = 65V B S 5 0 15 +I , V = 65V, 615V B S –5 10 –I , V = 615V –10 B S 65V SUPPLY –15 5 –20 0 –25 10 100 1k 10k –60 –40 –20 0 20 40 60 80 100 120 140 LOAD RESISTANCE – V JUNCTION TEMPERATURE – C Figure 6. Output Voltage Swing vs. Load Resistance Figure 9. Input Bias Current vs. Junction Temperature REV. B –7– OUTPUT VOLTAGE – V p-p COMMON-MODE VOLTAGE RANGE – 6Volts OUTPUT VOLTAGE – V p-p INPUT BIAS CURRENT – mA SUPPLY CURRENT – mA SUPPLY CURRENT – mA AD813 4 70 2 V = 65V S 0 60 –2 –4 50 V = 615V S –6 –8 40 –10 –12 30 –14 –16 20 –60 –40 –20 0 20 40 60 80 100 120 140 01 5 105 20 JUNCTION TEMPERATURE – C SUPPLY VOLTAGE – 6Volts Figure 10. Input Offset Voltage vs. Junction Figure 13. Linear Output Current vs. Supply Voltage Temperature 160 1k V = 615V G = +2 S 140 100 SINK 120 10 100 SOURCE 1 80 5V S 0.1 60 15V S 40 0.01 –60 –40 –20 0 20 40 60 80 100 120 140 10k 100k 1M 10M 100M FREQUENCY – Hz JUNCTION TEMPERATURE – C Figure 11. Short Circuit Current vs. Junction Figure 14. Closed-Loop Output Resistance vs. Temperature Frequency 80 1M 70 100k 60 50 10k V = 65V S 40 1k V = 615V S W 30 20 100 –60 –40 –20 0 20 40 60 80 100 120 140 10M 100M 100k 1M JUNCTION TEMPERATURE – C FREQUENCY – Hz Figure 12. Linear Output Current vs. Junction Figure 15. Output Resistance vs. Frequency, Disabled Temperature State –8– REV. B SHORT CIRCUIT CURRENT – mA INPUT OFFSET VOLTAGE – mV OUTPUT CURRENT – mA OUTPUT RESISTANCE – V CLOSED-LOOP OUTPUT RESISTANCE – V OUTPUT CURRENT – mA AD813 100 100 0 120 –45 V = 615V PHASE S –90 INVERTING INPUT CURRENT NOISE 100 –135 GAIN V = 3V S –180 10 10 80 V = 615V S V = 3V S VOLTAGE NOISE 60 NONINVERTING INPUT CURRENT NOISE 1 40 1 10k 100k 1M 10M 100M 10 100 1k 10k 100k FREQUENCY – Hz FREQUENCY – Hz Figure 16. Input Current and Voltage Noise vs. Figure 19. Open-Loop Transimpedance vs. Frequency Frequency (Relative to 1 Ω) 90 –30 681V G = +2 80 681V V = 2V p-p O V V IN OUT V = 615V: R = 1kV S L –50 V = 65V: R = 150V 70 S L 681V 681V 60 –70 2ND HARMONIC 50 V = 65V S V = 3V –90 S 40 3RD HARMONIC V = 615V S V = 615V S V = 65V S 30 –110 20 2ND 3RD 10 –130 10k 100k 1M 10M 100M 1k 10k 100k 1M 10M 100M FREQUENCY – Hz FREQUENCY – Hz Figure 20. Harmonic Distortion vs. Frequency Figure 17. Common-Mode Rejection vs. Frequency 80 10 GAIN = –1 8 70 V = 615V S 615V 6 60 4 50 2 61.5V 40 0 1% 0.1% 0.025% –2 30 –4 20 –6 10 –8 0 –10 10k 100k 1M 10M 100M 20 40 60 80 FREQUENCY – Hz SETTLING TIME – ns Figure 21. Output Swing and Error vs. Settling Time Figure 18. Power Supply Rejection vs. Frequency REV. B –9– POWER SUPPLY REJECTION – dB COMMON-MODE REJECTION – dB VOLTAGE NOISE – nV/ Hz CURRENT NOISE – pA/ Hz HARMONIC DISTORTION – dBc TRANSIMPEDANCE – dB OUTPUT SWING FROM 6V TO 0 PHASE – Degrees AD813 700 1000 V = 615V S 900 R = 500V L 600 800 G = +10 500 700 600 400 G = –1 G = +10 500 300 400 G = –1 G = +2 300 200 G = +2 200 100 G = +1 100 G = +1 0 0 0 1.5 3.0 4.5 6.0 7.5 9.0 10.5 12.0 13.5 15.0 09 1 2 3 45 67 8 10 OUTPUT STEP SIZE – V p-p SUPPLY VOLTAGE – 6Volts Figure 22. Slew Rate vs. Output Step Size Figure 25. Maximum Slew Rate vs. Supply Voltage 2V 500mV 20ns 50ns AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA 100 100 V IN 90 90 V IN AAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA AAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAA 10 10 V OUT V OUT 0% 0%AAAAAA 500mV 2V AAAAAAAAAAAAAAAAAAA Figure 23. Large Signal Pulse Response, Gain = +1, Figure 26. Small Signal Pulse Response, Gain = +1, (R = 750 Ω, R = 150 Ω, V = ±5 V) (R = 750 Ω, R = 150 Ω, V = ±5 V) F L S F L S +90 R = 150V PHASE L 0 V = 615V 140 S –90 3V 65V 120 5V –180 +1 GAIN 100 –270 0 V = 615V R = 866V S R = 750V 80 F F –1 3V –2 60 R = 1kV F 5V 65V –3 40 –4 –5 –6 21 4 6 8 10 12 146 1 10 100 1000 SUPPLY VOLTAGE – 6Volts FREQUENCY – MHz Figure 24. Closed-Loop Gain and Phase vs. Frequency, Figure 27. –3 dB Bandwidth vs. Supply Voltage, G = +1 G = +1 –10– REV. B SLEW RATE – V/ms CLOSED-LOOP GAIN – dB PHASE SHIFT – Degrees SLEW RATE – V/ms –3dB BANDWIDTH – MHz AD813 50mV 20ns 500mV 50ns 100 100 90 90 V V IN IN 10 10 V V OUT OUT 0% 0% 500mV 500mV Figure 31. Small Signal Pulse Response, Gain = +10, Figure 28. Large Signal Pulse Response, Gain = +10, (R = 357 Ω, R = 150 Ω, V = ±5 V) (R = 357 Ω, R = 500 Ω, V = ±15 V) F L S F L S G = +10 PHASE PHASE G = +10 V = 615V S V = 615V R = 150V 0 0 S L R = 1kV L 65V –90 –90 65V 3V 5V +1 –180 +1 5V –180 3V GAIN GAIN –270 –270 0 0 –1 V = 615V –1 S –360 V = 615V S 5V 5V –2 –2 –3 –3 3V 3V 65V 65V –4 –4 –5 –5 –6 –6 1 10 100 1000 1 10 100 1000 FREQUENCY – MHz FREQUENCY – MHz Figure 29. Closed-Loop Gain and Phase vs. Frequency, Figure 32. Closed-Loop Gain and Phase vs. Frequency, G = +10, R = 150 Ω G = +10, R = 1 kΩ L L G = +10 G = +10 R = 150V R = 1kV L L 80 90 R = 357V F 70 80 R = 357V PEAKING 1dB F 60 70 R = 154V F 50 60 R = 649V F R = 649V F R = 154V F 40 50 30 40 20 30 20 21 4 6 8 10 12 146 21 4 6 8 10 12 146 SUPPLY VOLTAGE – 6Volts SUPPLY VOLTAGE – 6Volts Figure 30. –3 dB Bandwidth vs. Supply Voltage, Figure 33. –3 dB Bandwidth vs. Supply Voltage, G = +10, R = 150 Ω G = +10, R = 1 kΩ L L REV. B –11– CLOSED-LOOP GAIN (NORMALIZED) – dB –3dB BANDWIDTH – MHz PHASE SHIFT – Degrees CLOSED-LOOP GAIN (NORMALIZED) – dB –3dB BANDWIDTH – MHz PHASE SHIFT – Degrees AD813 2V 50ns 500mV 20ns 100 100 90 90 10 10 0% 0% 2V 500mV Figure 34. Large Signal Pulse Response, Gain = –1, Figure 37. Small Signal Pulse Response, Gain = –1, (R = 750 Ω, R = 150 Ω, V = ±5 V) (R = 750 Ω, R = 150 Ω, V = ±5 V) F L S F L S V = 615V PHASE G = –1 PHASE G = –10 S V = 615V S 0 0 R = 150V R = 1kV L L 65V –90 –90 65V 3V 3V 5V +1 –180 +1 –180 5V GAIN GAIN –270 –270 0 0 V = 615V S –1 –1 V = 615V S 3V –2 –2 3V 65V –3 –3 65V 5V –4 –4 5V –5 –5 –6 –6 1 10 100 1000 1 10 100 1000 FREQUENCY – MHz FREQUENCY – MHz Figure 35. Closed-Loop Gain and Phase vs. Frequency, Figure 38. Closed-Loop Gain and Phase vs. Frequency, G = –1, R = 150 Ω G = –10, R = 1 kΩ L L G = –1 G = –10 R = 150V R = 1kV L L 110 80 100 70 R = 357V PEAKING 1.0dB F R = 681V F 90 60 R = 154V F 80 50 PEAKING 0.2dB R = 715V R = 649V 70 F F 40 60 30 50 20 40 21 4 6 8 10 12 146 21 4 6 8 10 12 146 SUPPLY VOLTAGE – 6Volts SUPPLY VOLTAGE – 6Volts Figure 36. –3 dB Bandwidth vs. Supply Voltage, G = –1, Figure 39. –3 dB Bandwidth vs. Supply Voltage, R = 150 Ω L G = –10, R = 1 kΩ L –12– REV. B CLOSED-LOOP GAIN – dB –3dB BANDWIDTH – MHz PHASE SHIFT – Degrees CLOSED-LOOP GAIN (NORMALIZED) – dB –3dB BANDWIDTH – MHz PHASE SHIFT – Degrees AD813 General Consideration To estimate the –3 dB bandwidth for closed-loop gains or feed- The AD813 is a wide bandwidth, triple video amplifier that back resistors not listed in the above table, the following two offers a high level of performance on less than 5.5 mA per am- pole model for the AD813 may be used: plifier of quiescent supply current. With its fast acting power down switch, it is designed to offer outstanding functionality G A= CL and performance at closed-loop inverting or noninverting gains   () RG+ rC 2 FINT   S ++ S() R Gr C+1 FIN T of one or greater.   2πf  2  Built on a low cost, complementary bipolar process, and achiev- ing bandwidth in excess of 100 MHz, differential gain and phase where: A = closed-loop gain from “transcapacitance” CL errors of better than 0.1% and 0.1° (into 150 Ω), and output G = 1 + R /R F G current greater than 40 mA, the AD813 is an exceptionally r = input resistance of the inverting input IN efficient video amplifier. Using a conventional current feedback C = “transcapacitance,” which forms the T architecture, its high performance is achieved through careful open-loop dominant pole with the attention to design details. transresistance R = feedback resistor F Choice of Feedback & Gain Resistors R = gain resistor G Because it is a current feedback amplifier, the closed-loop band- f = frequency of second (nondominant) pole 2 width of the AD813 depends on the value of the feedback resis- s =2 πj f tor. The bandwidth also depends on the supply voltage. In addition, attenuation of the open-loop response when driving Appropriate values for the model parameters at different supply load resistors less than about 250 Ω will also affect the band- voltages are listed in Table II. Reasonable approximations for width. Table I contains data showing typical bandwidths at these values at supply voltages not found in the table can be different supply voltages for some useful closed-loop gains when obtained by a simple linear interpolation between those tabu- driving a load of 150 Ω. (Bandwidths will be about 20% greater lated values which ‘bracket’ the desired condition. for load resistances above a few hundred ohms.) Table II. Two Pole Model Parameters at Various Supplies Table I. –3 dB Bandwidth vs. Closed-Loop Gain and V (V) r (V)C (pF) f (MHz) S IN T 2 Feedback Resistor , (R = 150 V) L ±15 85 2.5 150 V (V) Gain R (V) BW (MHz) S F ±5 90 3.8 125 +5 105 4.8 105 ±15 +1 866 125 +3 115 5.5 95 +2 681 100 +10 357 60 As discussed in many amplifier and electronics textbooks (such –1 681 100 as Roberge’s Operational Amplifiers: Theory and Practice), the –10 357 55 –3 dB bandwidth for the 2-pole model can be obtained as: ±5 +1 750 75 1/2 2 2 4 1/2 f = f 1 − 2d +(2 − 4d + 4d ) [] +2 649 65 3 n +10 154 40 1/2 –1 649 70   f 2 f = –10 154 40 n   where: (R + Gr ) C  F IN T  +5 +1 715 60 +2 619 50 1 1/2 d = f (R +Gr ) C and: [] 2 F IN T +10 154 30 2 –1 619 50 –10 154 30 This model will predict –3 dB bandwidth within about 10% to +3 +1 681 50 15% of the correct value when the load is 150 Ω. However, it is +2 619 40 not accurate enough to predict either the phase behavior or the +10 154 25 frequency response peaking of the AD813. –1 619 40 –10 154 20 The choice of feedback resistor is not critical unless it is impor- tant to maintain the widest, flattest frequency response. The resistors recommended in the table are those (metal film values) that will result in the widest 0.1 dB bandwidth. In those appli- cations where the best control of the bandwidth is desired, 1% metal film resistors are adequate. Wider bandwidths can be attained by reducing the magnitude of the feedback resistor (at the expense of increased peaking), while peaking can be reduced by increasing the magnitude of the feedback resistor. REV. B –13– AD813 Printed Circuit Board Layout Guidelines A carefully laid-out PC board should be able to achieve the level As with all wideband amplifiers, printed circuit board parasitics of crosstalk shown in the figure. The most significant contribu- can affect the overall closed-loop performance. Most important tors to difficulty in achieving low crosstalk are inadequate power for controlling the 0.1 dB bandwidth are stray capacitances at supply bypassing, overlapped input and/or output signal paths, the output and inverting input nodes. Increasing the space be- and capacitive coupling between critical nodes. tween signal lines and ground plane will minimize the coupling. The bypass capacitors must be connected to the ground plane at Also, signal lines connecting the feedback and gain resistors a point close to and between the ground reference points for the should be kept short enough that their associated inductance loads. (The bypass of the negative power supply is particularly does not cause high frequency gain errors. important in this regard.) This requires careful planning as Power Supply Bypassing there are three amplifiers in the package, and low impedance Adequate power supply bypassing can be very important when signal return paths must be provided for each load. (Using a optimizing the performance of high speed circuits. Inductance parallel combination of 1 μF, 0.1 μF, and 0.01 μF bypass ca- in the supply leads can (for example) contribute to resonant pacitors will help to achieve optimal crosstalk.) circuits that produce peaking in the amplifier’s response. In The input and output signal return paths (to the bypass caps) addition, if large current transients must be delivered to a load, must also be kept from overlapping. Since ground connections then large (greater than 1 μF) bypass capacitors are required to are not of perfectly zero impedance, current in one ground produce the best settling time and lowest distortion. Although return path can produce a voltage drop in another ground re- 0.1 μF capacitors may be adequate in some applications, more turn path if they are allowed to overlap. elaborate bypassing is required in other cases. Electric field coupling external to (and across) the package can When multiple bypass capacitors are connected in parallel, it is be reduced by arranging for a narrow strip of ground plane to be important to be sure that the capacitors themselves do not form run between the pins (parallel to the pin rows). Doing this on resonant circuits. A small (say 5 Ω) resistor may be required in both sides of the board can reduce the high frequency crosstalk series with one of the capacitors to minimize this possibility. by about 5 dB or 6 dB. As discussed below, power supply bypassing can have a signifi- Driving Capacitive Loads cant impact on crosstalk performance. When used with the appropriate output series resistor, any load Achieving Low Crosstalk capacitance can be driven without peaking or oscillation. In Measured crosstalk from the output of Amplifier 2 to the input most cases, less than 50 Ω is all that is needed to achieve an of Amplifier 1 of the AD813 is shown in Figure 40. All other extremely flat frequency response. As illustrated in Figure 44, crosstalk combinations, (from the output of one amplifier to the the AD813 can be very attractive for driving large capacitive input of another), are a few dB better than this due to the addi- loads. In this case, the AD813’s high output short circuit cur- tional distance between critical signal nodes. rent allows for a 150 V/μs slew rate when driving a 510 pF capacitor. –10 R = 150V L R F –20 –30 +V 0.1mF S –40 –50 1.0mF R G –60 4 R S –70 AD813 V O –80 V R IN 11 C L L 1.0mF R T –90 0.1mF –100 –110 –V S 100k 1M 10M 100M FREQUENCY – Hz Figure 41. Circuit for Driving a Capacitive Load Figure 40. Worst Case Crosstalk vs. Frequency –14– REV. B CROSSTALK – dB AD813 Overload Recovery V = 65V S There are three important overload conditions to consider. G = +2 R = 750V F They are due to: input common-mode voltage overdrive, out- R = 1kV L put voltage overdrive, and input current overdrive. When the C = 10pF L amplifier is configured for low closed-loop gains, and the input 9 common-mode voltage range is exceeded, the recovery time will R = 0 S be very fast, typically under 30 ns. When configured for a 6 higher gain, and overloaded at the output, the recovery time will 3 R = 30V S also be short. For example, in a gain of +10, with 6 dB of 0 input overdrive, the recovery time of the AD813 is about 25 ns R = 50V S (see Figure 45). –3 1V 50ns 1 10 100 1000 100 FREQUENCY – MHz 90 Figure 42. Response to a Small Load Capacitor at V = ±5 V S V = 615V S G = +2 10 R = 750V F 0% R = 1kV L 2V 9 6 Figure 45. 6 dB Overload Recovery, G = +10, C = 150pF, R = 30V L S (R = 500 Ω, R = 357 Ω, V = ±5 V) 3 L F S 0 In the case of high gains with very high levels of input overdrive, C = 510pF, R = 15V L S a longer recovery time will occur. For example, if the input –3 common-mode voltage range is exceeded in the gain of +10, the recovery time will be on the order of 100 ns. This is primarily due to current overloading of the input stage. 1 10 100 1000 As noted in the warning under Maximum Power Dissipation, a FREQUENCY – MHz high level of input overdrive in a high noninverting gain circuit Figure 43. Response to a Large Load Capacitor at can result in a large current flow in the input stage. Though this V = ±15 V S current is internally limited to about 40 mA, its effect on the total power dissipation may be significant. 5V 100ns 100 100 90 10 0% 5V Figure 44. Circuit of Figure 38 Driving a 510 pF Load Capacitor, V = ±15 V (R = 1 kΩ, R = R = 750 Ω, S L F G R =15 Ω) S REV. B –15– CLOSED-LOOP GAIN – dB CLOSED-LOOP GAIN – dB AD813 High Performance Video Line Driver Figures 50 and 51 show the worst case matching; the match At a gain of +2, the AD813 makes an excellent driver for a back between amplifiers 2 and 3 is typically much better than this. terminated 75 Ω video line. Low differential gain and phase errors and wide 0.1 dB bandwidth can be realized over a wide range of power supply voltage. Excellent gain and group delay G = +2 matching are also attainable over the full operating supply volt- R = 150V L age range. 0.2 615V 0.1 R R G F 0 +V S 0.1mF –0.1 65V –0.2 75V 3V 4 –0.3 CABLE 75V 75V V AD813 5V OUT CABLE –0.4 V 75V IN 11 –0.5 0.1mF 75V 100k 1M 10M 100M –V S FREQUENCY – Hz Figure 46. A Video Line Driver Operating at a Gain of Figure 49. Fine-Scale Gain (Normalized) vs. Frequency +2 (R = R from Table I) F G +90 2.5 PHASE G = +2 G = +2 R = 150V 0 2.0 R = 150V L L –90 V = 615V 1.5 3V S 65V –180 +1 1.0 5V GAIN –270 0 0.5 –1 0 V = 615V S V = 615V S –2 5V –0.5 V = 3V S –3 –1.0 65V –4 3V –1.5 –5 –2.0 –6 –2.5 1 10 100 1000 1 10 100 1000 FREQUENCY – MHz FREQUENCY – MHz Figure 47. Closed-Loop Gain & Phase vs. Frequency for Figure 50. Closed-Loop Gain Matching vs. Frequency the Line Driver 10 120 8 R = 590V 110 V = 3V F S 5V 65V 6 100 R = 681V F 615V R = 750V 4 90 F DELAY 2 80 NO PEAKING 70 1.0 60 V = 615V 0.5 S 50 0 40 3V –0.5 30 DELAY MATCHING –1.0 20 100k 1M 10M 100M 021 4 6 8 10 12 146 18 20 FREQUENCY – Hz SUPPLY VOLTAGE – Volts Figure 48. –3 dB Bandwidth vs. Supply Voltage for Figure 51. Group Delay and Group Delay Matching vs. Gain = +2, R = 150 Ω Frequency, G = +2, R = 150 Ω L L –16– REV. B –3dB BANDWIDTH – MHz CLOSED-LOOP GAIN (NORMALIZED) – dB PHASE SHIFT – Degrees NORMALIZED GAIN – dB GROUP DELAY – ns GAIN MATCHING – dB AD813 Disable Mode Operation Operation Using a Single Supply Pulling the voltage on any one of the Disable pins about 2.5 V The AD813 will operate with total supply voltages from 36 V down from the positive supply will put the corresponding ampli- down to 2.4 V. With proper biasing (see Figure 52) it can fier into a disabled, powered down, state. In this condition, the make an outstanding single supply video amplifier. Since the amplifier’s quiescent supply current drops to about 0.5 mA, its input and output voltage ranges extend to within 1 V of the output becomes a high impedance, and there is a high level of supply rails, it will handle a 1.3 V peak-to-peak signal on a isolation from input to output. In the case of the gain of two single 3.3 V supply, or a 3 V peak-to-peak signal on a single line driver for example, the impedance at the output node will 5 V supply. The small signal 0.1 dB bandwidths will exceed be about the same as for a 1.4 kΩ resistor (the feedback plus 10 MHz in either case, and the large signal bandwidths will gain resistors) in parallel with a 12.5 pF capacitor and the input exceed 6 MHz. to output isolation will be about 65 dB at 1 MHz. The capacitively coupled cable driver in Figure 52 will achieve Leaving the Disable pin disconnected (floating) will leave the outstanding differential gain and phase errors of 0.05% and 0.05 corresponding amplifier operational, in the enabled state. The degrees respectively on a single 5 V supply. Resistor R2, in this input impedance of the disable pins is about 35 kΩ in parallel circuit, is selected to optimize the differential gain and phase by with a few pF. When grounded, about 50 μA flows out of a biasing the amplifier in its most linear region. disable pin on ±5 V supplies. 619V 619V Input voltages greater than about 1.5 V peak-to-peak will defeat R3 C3 1kV 30mF the isolation. In addition, large signals (greater than 3 V peak- +5V to-peak) applied to the output node will cause the output im- C2 R1 C 1mF 9kV OUT 75V 4 pedance to drop significantly. 47mF CABLE 75V C1 AD813 V OUT When the Disable pins are driven by complementary output 2mF 75V V IN 11 CMOS logic (such as the 74HC04), the disable time is about R2 80 ns (until the output goes high impedance) and the enable 12.4kV time is about 100 ns (to low impedance output) on ±15 V sup- plies. When operated on ±15 V supplies, the disable pins Figure 52. Biasing for Single Supply Operation should be driven by open drain logic. In this case, pull-up resis- tors from the disable pins to the plus supply will ensure mini- V = 5V S mum switching time. G = +2 0 PHASE R = 619V F 0.5 R = 150V –90 464V 590V L 0 –180 +5V GAIN –0.5 –270 4 6 84V –1.0 7 –1.5 V 1 IN 5 1 –2.0 75V –2.5 SELECT1 –3.0 464V 590V –3.5 1 10 100 1000 FREQUENCY – MHz Figure 53. Closed-Loop Gain and Phase vs. Frequency, 75V 13 CABLE 84V Circuit of Figure 52 14 V OUT V 2 12 IN 2 75V 1V 50ns 75V 100 V SELECT2 IN 90 464V 590V 9 84V V OUT 8 10 11 V 3 10 IN 0% 3 75V –5V 500mV 500mV SELECT3 Figure 54. Pulse Response for the Circuit of Figure 52 Figure 55. A Fast Switching 3:1 Video Mux with +V = 5 V S (Supply Bypassing Not Shown) REV. B –17– CLOSED-LOOP GAIN – dB PHASE SHIFT – Degrees AD813 3:1 Video Multiplexer Single Supply Differential Line Driver Wiring the amplifier outputs together will form a 3:1 mux with Due to its outstanding overall performance on low supply volt- outstanding gain flatness. Figure 55 shows a recommended ages, the AD813 makes possible exceptional differential trans- configuration which results in –0.1 dB bandwidth of 20 MHz mission on very low power. The circuit of Figure 59 will convert and OFF channel isolation of 60 dB at 10 MHz on ±5 V sup- a single-ended, ground referenced signal to a differential signal plies. The time to switch between channels is about 180 ns. whose common-mode reference is set to one half the supply Switching time is only slightly affected by signal level. voltage. This allows for a greater than 2 V peak-to-peak signal swing on a single 3 V power supply. A bandwidth over 30 MHz is achieved with 20 mA of output drive on only 30 mW of quies- 500mV 500ns cent power (excluding load current). 100 715V 715V 90 V + OUT +3V 1mF R L1 4 2 +3V 715V 10 0% 1kV 1mF 715V 715V V 5V IN 1mF 9kV 1 715V 715V Figure 56. Channel Switching Characteristic for the 1mF 10kV 3:1 Mux –10 3 V – OUT –20 11 R L2 –30 –40 715V 715V –50 –60 Figure 59. Single 3 V Supply Differential Line Driver –70 with 2 V Swing –80 –90 1V 50ns –100 100 V IN –110 90 100k 1M 10M 100M FREQUENCY – Hz Figure 57. 3:1 Mux OFF Channel Feedthrough vs. Frequency 0 10 + – V – V OUT OUT PHASE 0% –45 1V –90 0.5 –135 –180 0 Figure 60. Differential Driver Pulse Response (V = 3 V, S GAIN R = R = 200 Ω) L1 L2 –0.5 –1.0 –1.5 –2.0 –2.5 –3.0 1 10 100 FREQUENCY – MHz Figure 58. 3:1 Mux ON Channel Gain and Phase vs. Frequency –18– REV. B CLOSED-LOOP GAIN – dB FEEDTHROUGH – dB PHASE SHIFT – Degrees AD813 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 14-Lead Plastic DIP (N-14) 0.795 (20.19) 0.725 (18.42) 14 8 0.280 (7.11) 0.240 (6.10) 17 0.325 (8.25) 0.195 (4.95) 0.300 (7.62) 0.060 (1.52) 0.115 (2.93) PIN 1 0.015 (0.38) 0.210 (5.33) MAX 0.130 (3.30) 0.160 (4.06) MIN 0.115 (2.93) 0.015 (0.381) 0.022 (0.558) 0.100 0.070 (1.77) SEATING 0.008 (0.204) PLANE (2.54) 0.014 (0.356) 0.045 (1.15) BSC 14-Lead SOIC (R-14) 0.3444 (8.75) 0.3367 (8.55) 14 8 0.1574 (4.00) 0.2440 (6.20) 1 7 0.1497 (3.80) 0.2284 (5.80) 0.0688 (1.75) PIN 1 0.0196 (0.50) x 45 0.0098 (0.25) 0.0532 (1.35) 0.0099 (0.25) 0.0040 (0.10) 8 0.0500 0.0192 (0.49) 0 SEATING 0.0500 (1.27) 0.0099 (0.25) (1.27) 0.0138 (0.35) PLANE BSC 0.0160 (0.41) 0.0075 (0.19) REV. B –19– C1860b–0–5/98 PRINTED IN U.S.A.