ANALOG DEVICES AD811

High Performance Video Op Amp AD811 FEATURES CONNECTION DIAGRAMS High speed 1 8 NC NC 140 MHz bandwidth (3 dB, G = +1) 2 –IN 7 +V S 120 MHz bandwidth (3 dB, G = +2) +IN 3 6 OUTPUT 35 MHz bandwidth (0.1 dB, G = +2) –V 4 5 NC S AD811 2500 V/µs slew rate NC = NO CONNECT 25 ns settling time to 0.1% (for a 2 V step) Figure 1. 8-Lead Plastic (N-8), CERDIP (Q-8), SOIC (R-8) 65 ns settling time to 0.01% (for a 10 V step) Excellent video performance (RL =150 Ω) NC 1 16 NC 0.01% differential gain, 0.01° differential phase NC 2 15 NC Hz Voltage noise of 1.9 nV/√ –IN 3 14 +V S Low distortion: THD = −74 dB @ 10 MHz NC 4 13 NC Excellent dc precision: 3 mV max input offset voltage +IN 5 12 OUTPUT Flexible operation NC 6 11 NC Specified for ±5 V and ±15 V operation –V 7 10 S NC ±2.3 V output swing into a 75 Ω load (V = ±5 V) AD811 S NC 8 9 NC NC = NO CONNECT APPLICATIONS Video crosspoint switchers, multimedia broadcast systems Figure 2. 16-Lead SOIC (R-16) HDTV compatible systems Video line drivers, distribution amplifiers 32 2 1019 ADC/DAC buffers NC 4 18 NC NC 5 17 AD811 NC DC restoration circuits –IN 6 16 +V S Medical NC 7 15 NC +IN 8 14 OUTPUT Ultrasound PET 9 10 11 12 13 Gamma NC = NO CONNECT Counter applications Figure 3. 20-Terminal LCC (E-20A) GENERAL DESCRIPTION NC 1 20 NC A wideband current feedback operational amplifier, the AD811 NC 2 19 NC is optimized for broadcast-quality video systems. The −3 dB NC 3 18 NC bandwidth of 120 MHz at a gain of +2 and the differential gain 4 +V –IN 17 and phase of 0.01% and 0.01° (R = 150 Ω) make the AD811 S L NC 5 16 NC an excellent choice for all video systems. The AD811 is designed +IN 6 15 OUTPUT to meet a stringent 0.1 dB gain flatness specification to a band- 14 width of 35 MHz (G = +2) in addition to low differential gain NC 7 NC 8 13 –V NC and phase errors. This performance is achieved whether driving S 12 one or two back-terminated 75 Ω cables, with a low power NC 9 NC AD811 supply current of 16.5 mA. Furthermore, the AD811 is specified 10 11 NC NC over a power supply range of ±4.5 V to ±18 V. NC = NO CONNECT (Continued on page 3) Figure 4. 20-Lead SOIC (R-20) Rev. E Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Specifications subject to change without notice. No license is granted by implication Tel: 781.329.4700 www.analog.com or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved. –V NC S NC NC NC NC NC NC NC NC 00866-E-001 00866-E-004 00866-E-003 00866-E-002 AD811 TABLE OF CONTENTS Specifications..................................................................................... 4 Achieving the Flattest Gain Response at High Frequency.... 12 Absolute Maximum Ratings............................................................ 6 Operation as a Video Line Driver ............................................ 14 Maximum Power Dissipation ..................................................... 6 An 80 MHz Voltage-Controlled Amplifier Circuit................ 15 Metalization Photograph............................................................. 6 A Video Keyer Circuit................................................................ 16 Typical Performance Characteristics ............................................. 7 Outline Dimensions ....................................................................... 18 Applications..................................................................................... 12 Ordering Guide .......................................................................... 20 General Design Considerations................................................ 12 REVISION HISTORY 7/04—Data Sheet Changed from Rev. D to Rev. E Updated Format............................................................. Universal Change to Maximum Power Dissipation Section .................... 7 Changes to Ordering Guide ......................................................20 Updated Outline Dimensions ...................................................20 Rev. E | Page 2 of 20 AD811 GENERAL DESCRIPTION (continued) 12 The AD811 is also excellent for pulsed applications where tran- sient response is critical. It can achieve a maximum slew rate of G = +2 9 R = 150Ω L greater than 2500 V/µs with a settling time of less than 25 ns to R = R G FB 0.1% on a 2 V step and 65 ns to 0.01% on a 10 V step. V = ±15V S 6 The AD811 is ideal as an ADC or DAC buffer in data acquisi- V = ±5V tion systems due to its low distortion up to 10 MHz and its wide 3 S unity gain bandwidth. Because the AD811 is a current feedback 0 amplifier, this bandwidth can be maintained over a wide range of gains. The AD811 also offers low voltage and current noise of –3 1.9 nV/√Hz and 20 pA/√Hz, respectively, and excellent dc accu- racy for wide dynamic range applications. –6 0.10 0.20 1 10 100 R = 649Ω F FREQUENCY (MHz) 0.09 F = 3.58MHz 0.18 C 100 IRE 0.08 MODULATED RAMP 0.16 Figure 6. Frequency Response R = 150Ω L 0.07 0.14 0.06 0.12 0.05 0.10 0.04 0.08 PHASE 0.03 0.06 0.02 0.04 GAIN 0.01 0.02 0 0 5 6 7 8 9 10 1112 1314 15 SUPPLY VOLTAGE (±V) Figure 5. Differential Gain and Phase Rev. E | Page 3 of 20 DIFFERENTIAL GAIN (%) DIFFERENTIAL PHASE (DEGREES) 00866-E-005 GAIN (dB) 00866-E-006 AD811 SPECIFICATIONS @ TA = +25°C, VS = ±15 V dc, RLOAD = 150 Ω, unless otherwise noted. Table 1. 1 2 AD811J/A AD811S Parameter Conditions VS Min Typ Max Min Typ Max Unit DYNAMIC PERFORMANCE Small Signal Bandwidth (No Peaking) −3 dB G = +1 R = 562 Ω ±15 V 140 140 MHz FB G = +2 R = 649 Ω ±15 V 120 120 MHz FB G = +2 R = 562 Ω ±15 V 80 80 MHz FB G = +10 RFB = 511 Ω ±15 V 100 100 MHz 0.1 dB Flat G = +2 RFB = 562 Ω ±15 25 25 MHz R = 649 Ω ±15 35 35 MHz FB 3 Full Power Bandwidth V = 20 V p-p ±15 40 40 MHz OUT Slew Rate VOUT = 4 V p-p ±15 400 400 V/µs VOUT = 20 V p-p ±15 2500 2500 V/µs Settling Time to 0.1% 10 V Step, AV = − 1 ±15 50 50 ns Settling Time to 0.01% 10 V Step, A = − 1 ±15 65 65 ns V Settling Time to 0.1% 2 V Step, A = − 1 ±15 25 25 ns V Rise Time, Fall Time R = 649, A = +2 ±15 3.5 3.5 ns FB V Differential Gain f = 3.58 MHz ±15 0.01 0.01 % Differential Phase f = 3.58 MHz ±15 0.01 0.01 Degree THD @ fC = 10 MHz VOUT = 2 V p-p, AV = +2 ±15 −74 −74 dBc 4 Third-Order Intercept @ f = 10 MHz ±15 36 36 dBm C ±15 43 43 dBm INPUT OFFSET VOLTAGE ±5 V, ±15 V 0.5 3 0.5 3 mV T to T 5 5 mV MIN MAX Offset Voltage Drift 5 5 µV/°C INPUT BIAS CURRENT −Input ±5 V, ±15 V 2 5 2 5 µA T to T 15 30 µA MIN MAX +Input ±5 V, ±1 5 V 2 10 2 10 µA TMIN to TMAX 20 25 µA TRANSRESISTANCE T to T MIN MAX VOUT = ±10 V RL = ∞ ±15 V 0.75 1.5 0.75 1.5 MΩ RL = 200 Ω ±15 V 0.5 0.75 0.5 0.75 MΩ V = ±2.5 V OUT R = 150 Ω ±5 V 0.25 0.4 0.125 0.4 MΩ L 1 The AD811JR is specified with ±5 V power supplies only, with operation up to ±12 V. 2 See the Analog Devices military data sheet for 883B tested specifications. 3 FPBW = slew rate/(2 π V ). PEAK 4 Output power level, tested at a closed-loop gain of two. Rev. E | Page 4 of 20 AD811 1 2 AD811J/A AD811S Parameter Conditions Vs Min Typ Max Min Typ Max Unit COMMON-MODE REJECTION V (vs. Common Mode) OS TMIN to TMAX VCM = ±2.5 V ±5 V 56 60 50 60 dB TMIN to TMAX VCM = ±10 V ±15 V 60 66 56 66 dB Input Current (vs. Common Mode) TMIN to TMAX 1 3 1 3 µA/V POWER SUPPLY REJECTION VS = ±4.5 V to ±18 V VOS TMIN to TMAX 60 70 60 70 dB +Input Current TMIN to TMAX 0.3 2 0.3 2 µA/V −Input Current T to T 0.4 2 0.4 2 µA/V MIN MAX INPUT VOLTAGE NOISE f = 1 kHz 1.9 1.9 Hz nV/√ INPUT CURRENT NOISE f = 1 kHz 20 20 Hz pA/√ OUTPUT CHARACTERISTICS 3 Voltage Swing, Useful Operating Range ±5 V ±2.9 ±2.9 V ±15 V ±12 ±12 V Output Current TJ = 25°C 100 100 mA Short-Circuit Current 150 150 mA Output Resistance (Open Loop @ 5 MHz) 9 9 Ω INPUT CHARACTERISTIC +Input Resistance 1.5 1.5 MΩ −Input Resistance 14 14 Ω Input Capacitance +Input 7.5 7.5 pF Common-Mode Voltage Range ±5 V ±3 ±3 V ±15 V ±13 ±13 V POWER SUPPLY Operating Range ±4.5 ±18 ±4.5 ±18 V Quiescent Current ±5 V 14.5 16.0 14.5 16.0 mA ±15 V 16.5 18.0 16.5 18.0 mA TRANSISTOR COUNT Number of Transistors 40 40 1 The AD811JR is specified with ±5 V power supplies only, with operation up to ±12 V. 2 See the Analog Devices military data sheet for 883B tested specifications. 3 Useful operating range is defined as the output voltage at which linearity begins to degrade. Rev. E | Page 5 of 20 AD811 ABSOLUTE MAXIMUM RATINGS Table 2. MAXIMUM POWER DISSIPATION Parameter Rating The maximum power that can be safely dissipated by the Supply Voltage ±18 V AD811 is limited by the associated rise in junction temper- AD811JR Grade Only ±12 V ature. For the plastic packages, the maximum safe junction Internal Power Dissipation Observe Derating Curves temperature is 145°C. For the CERDIP and LCC packages, the 8-Lead PDIP Package θJA = 90°C/ W maximum junction temperature is 175°C. If these maximums 8-Lead CERDIP Package θJA = 110°C/W are exceeded momentarily, proper circuit operation is restored 8-Lead SOIC Package θ = 155°C/W JA as soon as the die temperature is reduced. Leaving the device in 16-Lead SOIC Package θ = 85°C/W JA the “overheated” condition for an extended period can result in 20-Lead SOIC Package θ = 80°C/W JA device burnout. To ensure proper operation, it is important to 20-Lead LCC Package θJA = 70°C/W observe the derating curves in Figure 22 and Figure 25. Output Short-Circuit Duration Observe Derating Curves Common-Mode Input Voltage ±VS While the AD811 is internally short-circuit protected, this may Differential Input Voltage ±6 V not be sufficient to guarantee that the maximum junction Storage Temperature Range (Q, E) −65°C to +150°C temperature is not exceeded under all conditions. An important Storage Temperature Range (N, R) −65°C to +125°C example is when the amplifier is driving a reverse-terminated Operating Temperature Range 75 Ω cable and the cable’s far end is shorted to a power supply. AD811J 0°C to +70°C With power supplies of ±12 V (or less) at an ambient tempera- AD811A −40°C to +85°C ture of +25°C or less, and the cable shorted to a supply rail, the AD811S −55°C to +125°C amplifier is not destroyed, even if this condition persists for an 300°C Lead Temperature Range extended period. (Soldering 60 sec) METALIZATION PHOTOGRAPH Stresses above those listed under Absolute Maximum Ratings Contact the factory for the latest dimensions. may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any V V+ OUT 6 other conditions above those indicated in the operational 7 section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 0.0618 (1.57) 4 2 –INPUT 3 AD811 V– +INPUT 0.098 (2.49) Figure 7. Metalization Photograph Dimensions Shown in Inches and (Millimeters) ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprie- tary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. E | Page 6 of 20 00866-E-007 AD811 TYPICAL PERFORMANCE CHARACTERISTICS 20 20 T = 25°C T = 25°C A A 15 15 R = 150Ω L 10 10 NO LOAD 5 5 0 0 01 5 01520 01 5 01520 SUPPLY VOLTAGE (±V) SUPPLY VOLTAGE (±V) Figure 8. Input Common-Mode Voltage Range vs. Supply Voltage Figure 11. Output Voltage Swing vs. Supply Voltage 35 21 30 18 V = ±15V 25 S V = ±15V S 15 20 12 V = ±5V 15 S 9 10 V = ±5V S 5 6 0 3 10 100 1k 10k –60 –40 –20 0 20 40 60 80 100 120 140 LOAD RESISTANCE (Ω) JUNCTION TEMPERATURE (°C) Figure 9. Output Voltage Swing vs. Resistive Load Figure 12. Quiescent Supply Current vs. Junction Temperature 10 10 5 8 NONINVERTING INPUT ±5 TO ±15V 6 0 4 V = ±5V S –5 V = ±5V S 2 INVERTING INPUT –10 0 V = ±15V V = ±15V S S –15 –2 –4 –20 –6 –25 –8 –30 –10 –60 –40 –20 0 20 40 60 80 100 120 140 –60 –40 –20 0 20 40 60 80 100 120 140 JUNCTION TEMPERATURE (°C) JUNCTION TEMPERATURE (°C) Figure 10. Input Bias Current vs. Junction Temperature Figure 13. Input Offset Voltage vs. Junction Temperature Rev. E | Page 7 of 20 MASTER CLOCK FREQUENCY (MHz) OUTPUT VOLTAGE (V p-p) COMMON-MODE VOLTAGE RANGE (±V) 00866-E-010 00866-E-009 00866-E-008 INPUT OFFSET VOLTAGE (mV) QUIESCENT SUPPLY CURRENT (mA) MAGNITUDE OF THE OUTPUT VOLTAGE (±V) 00866-E-013 00866-E-012 00866-E-011 AD811 250 2.0 V = ±15V S R = 200Ω L V = ±10V OUT 200 1.5 V = ±15V S 150 1.0 V = ±5V S V = ±5V S R = 150Ω L V = ±2.5V OUT 100 0.5 50 0 –60 –40 –20 0 20 40 60 80 100 120 140 –60 –40 –20 0 20 40 60 80 100 120 140 JUNCTION TEMPERATURE (°C) JUNCTION TEMPERATURE (°C) Figure 14. Short-Circuit Current vs. Junction Temperature Figure 17. Transresistance vs. Junction Temperature 10 100 100 NONINVERTING CURRENT V = ±5V TO ±15V S 1 V = ±15V S INVERTING CURRENT V = ±5V TO ±15V S 10 10 V = ±5V S 0.1 VOLTAGE NOISE V = ±15V S GAIN = –2 R = 649Ω FB VOLTAGE NOISE V = ±5V S 0.01 1 1 10k 100k 1M 10M 100M 10 100 1k 10k 100k FREQUENCY (Hz) FREQUENCY (Hz) Figure 15. Closed-Loop Output Resistance vs. Frequency Figure 18. Input Noise vs. Frequency 10 100 200 10 RISE TIME 8 60 160 8 BANDWIDTH V = ±15V V = ±15V S S 6 V = 1V p-p 40 120 6 V = 1V p-p O O R = 150Ω R = 150Ω L L GAIN = +2 GAIN = +2 OVERSHOOT 4 20 80 4 PEAKING 2 0 40 2 0 –20 0 0 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VALUE OF FEEDBACK RESISTOR [R ] (kΩ) VALUE OF FEEDBACK RESISTOR [R ] (kΩ) FB FB Figure 16. Rise Time and Overshoot vs. Value of Feedback Resistor, RFB Figure 19. −3 dB Bandwidth and Peaking vs. Value of R FB Rev. E | Page 8 of 20 RISE TIME (ns) CLOSED-LOOP OUTPUT RESISTANCE (Ω) SHORT-CIRCUIT CURRENT (mA) OVERSHOOT (%) 00866-E-016 00866-E-015 00866-E-014 –3dB BANDWIDTH (MHz) NOISE VOLTAGE (nV/ Hz) TRANSRESISTANCE (MΩ) PEAKING (dB) NOISE CURRENT (pA/ Hz) 00866-E-019 00866-E-018 00866-E-017 AD811 110 25 649Ω V = ±15V S 100 649Ω V V OUT IN 20 90 150Ω 150Ω GAIN = +10 80 15 OUTPUT LEVEL FOR 3% THD 70 V = ±15V S 10 60 V = ±5V S 50 5 V = ±5V S 40 30 0 1k 10k 100k 1M 10M 100k 1M 10M 100M FREQUENCY (Hz) FREQUENCY (Hz) Figure 23. Large Signal Frequency Response Figure 20. Common-Mode Rejection Ratio vs. Frequency –50 80 ±5V SUPPLIES R = 100Ω L R = 649Ω F V = 2V p-p 70 OUT A = +2 V GAIN = +2 V = ±5V S –70 SECOND HARMONIC 60 50 V = ±15V S –90 40 CURVES ARE FOR WORST CASE CONDITION WHERE THIRD HARMONIC 30 ONE SUPPLY IS VARIED WHILE THE OTHER IS HELD CONSTANT. 20 –110 ±15V SUPPLIES SECOND 10 HARMONIC THIRD HARMONIC 5 –130 1k 10k 100k 1M 10M 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 21. Power Supply Rejection Ration vs. Frequency Figure 24. Harmonic Distortion vs. Frequency 2.5 3.4 T MAX = –145°C J 3.2 T MAX = –175°C J 16-LEAD SOIC 3.0 2.8 2.0 2.6 2.4 20-LEAD LCC 2.2 20-LEAD SOIC 8-LEAD PDIP 2.0 1.5 1.8 1.6 8-LEAD CERDIP 1.4 1.2 1.0 8-LEAD SOIC 1.0 0.8 0.6 0.5 0.4 –50 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 –60 –40 –20 0 20 40 60 80 100 120 140 AMBIENT TEMPERATURE (°C) AMBIENT TEMPERATURE (°C) Figure 22. Maximum Power Dissipation vs. Temperature for Plastic Packages Figure 25. Maximum Power Dissipation vs. Temperature for Hermetic Packages Rev. E | Page 9 of 20 TOTAL POWER DISSIPATION (W) PSRR (dB) CMRR (dB) 00866-E-022 00866-E-021 00866-E-020 TOTAL POWER DISSIPATION (W) HARMONIC DISTORTION (dBc) OUTPUT VOLTAGE (V p-p) 00866-E-025 00866-E-024 00866-E-023 AD811 9 G = +1 R FB R = 150Ω 6 L R =∞ G +V S 3 V TO OUT 0.1µF V = ±15V S TEKTRONIX R R = 750Ω G FB P6201 FET 2 – 0 7 PROBE 6 AD811 V IN –3 R L 5 3 + HP8130 50Ω V = ±5V PULSE S –6 R = 619Ω GENERATOR FB –V 0.1µF S –9 –12 1 10 100 FREQUENCY (MHz) Figure 26. Noninverting Amplifier Connection Figure 29. Closed-Loop Gain vs. Frequency, Gain = +1 26 G = +1 1V 10ns R = 150Ω L 23 100 V 90 IN V = ±15V S 20 R = 511Ω FB 17 V = ±5V S 14 R = 442Ω FB 10 V OUT 0% 11 1V 8 1 10 100 FREQUENCY (MHz) Figure 27. Small Signal Pulse Response, Gain = +1 Figure 30. Closed-Loop Gain vs. Frequency, Gain = +10 100mV 10ns 1V 20ns 100 100 V 90 V 90 IN IN 10 10 V V OUT OUT 0% 0% 1V 10V Figure 28. Small Signal Pulse Response, Gain = +10 Figure 31. Large Signal Pulse Response, Gain = +10 Rev. E | Page 10 of 20 00866-E-028 00866-E-027 00866-E-026 GAIN (dB) GAIN (dB) 00866-E-031 00866-E-030 00866-E-029 AD811 6 R FB G = –1 R = 150Ω L +V 3 S V = ±15V S 0.1µF R = 590Ω FB V TO OUT 0 TEKTRONIX R V G IN 7 P6201 FET 2 – PROBE –3 HP8130 6 AD811 PULSE GENERATOR V = ±5V S R 3 + L –6 R = 562Ω 4 FB –9 0.1µF –12 1 10 100 –V S FREQUENCY (MHz) Figure 32. Inverting Amplifier Connection Figure 35. Closed-Loop Gain vs. Frequency, Gain = −1 26 1V 10ns G = –1 R = 150Ω L 23 100 V 90 IN V = ±15V S 20 R = 511Ω FB 17 V = ±5V S 14 R = 442Ω FB 10 V OUT 0% 11 1V 8 1 10 100 FREQUENCY (MHz) Figure 33. Small Signal Pulse Response, Gain = −1 Figure 36. Closed-Loop Gain vs. Frequency, Gain = −10 100mV 10ns 1V 20ns 100 100 90 V IN V 90 IN 10 V 10 OUT V OUT 0% 0% 1V 10V Figure 34. Small Signal Pulse Response, Gain = −10 Figure 37. Large Signal Pulse Response, Gain = −10 Rev. E | Page 11 of 20 00866-E-034 00866-E-033 00866-E-032 GAIN (dB) GAIN (dB) 00866-E-037 00866-E-036 00866-E-035 AD811 APPLICATIONS GENERAL DESIGN CONSIDERATIONS ACHIEVING THE FLATTEST GAIN RESPONSE AT HIGH FREQUENCY The AD811 is a current feedback amplifier optimized for use in high performance video and data acquisition applications. Achieving and maintaining gain flatness of better than 0.1 dB at Because it uses a current feedback architecture, its closed-loop frequencies above 10 MHz requires careful consideration of −3 dB bandwidth is dependent on the magnitude of the feed- several issues. back resistor. The desired closed-loop gain and bandwidth are Choice of Feedback and Gain Resistors obtained by varying the feedback resistor (RFB) to tune the Because of the previously mentioned relationship between the bandwidth and by varying the gain resistor (RG) to obtain the 3 dB bandwidth and the feedback resistor, the fine scale gain correct gain. Table 3 contains recommended resistor values for a flatness varies, to some extent, with feedback resistor tolerance. variety of useful closed-loop gains and supply voltages. Therefore, it is recommended that resistors with a 1% tolerance Table 3. −3 dB Bandwidth vs. Closed-Loop Gain and be used if it is desired to maintain flatness over a wide range of Resistance Values production lots. In addition, resistors of different construction V = ±15 V S have different associated parasitic capacitance and inductance. Closed-Loop Gain RFB RG −3 dB BW (MHz) Metal film resistors were used for the bulk of the character- +1 750 Ω 140 ization for this data sheet. It is possible that values other than +2 649 Ω 649 Ω 120 those indicated are optimal for other resistor types. +10 511 Ω 56.2 Ω 100 Printed Circuit Board Layout Considerations −1 590 Ω 590 Ω 115 As is expected for a wideband amplifier, PC board parasitics can −10 511 Ω 51.1 Ω 95 affect the overall closed-loop performance. Of concern are stray V = ±5 V S capacitances at the output and the inverting input nodes. If a Closed-Loop Gain R R −3 dB BW (MHz) FB G ground plane is used on the same side of the board as the signal +1 619 Ω 80 traces, a space (3/16" is plenty) should be left around the signal +2 562 Ω 562 Ω 80 lines to minimize coupling. Additionally, signal lines connecting +10 442 Ω 48.7 Ω 65 the feedback and gain resistors should be short enough so that −1 562 Ω 562 Ω 75 their associated inductance does not cause high frequency gain −10 442 Ω 44.2 Ω 65 errors. Line lengths less than 1/4" are recommended. VS = ±10 V Quality of Coaxial Cable Closed-Loop Gain R R −3 dB BW (MHz) FB G +1 649 Ω 105 Optimum flatness when driving a coax cable is possible only +2 590 Ω 590 Ω 105 when the driven cable is terminated at each end with a resistor +10 499 Ω 49.9 Ω 80 matching its characteristic impedance. If the coax is ideal, then −1 590 Ω 590 Ω 105 the resulting flatness is not affected by the length of the cable. −10 499 Ω 49.9 Ω 80 While outstanding results can be achieved using inexpensive cables, note that some variation in flatness due to varying cable lengths may occur. Figure 18 and Figure 19 illustrate the relationship between the Power Supply Bypassing feedback resistor and the frequency and time domain response characteristics for a closed-loop gain of +2. (The response at Adequate power supply bypassing can be critical when optimiz- other gains is similar.) ing the performance of a high frequency circuit. Inductance in the power supply leads can form resonant circuits that produce The 3 dB bandwidth is somewhat dependent on the power peaking in the amplifier’s response. In addition, if large current supply voltage. As the supply voltage is decreased, for example, transients must be delivered to the load, then bypass capacitors the magnitude of the internal junction capacitances is increased, (typically greater than 1 µF) are required to provide the best causing a reduction in closed-loop bandwidth. To compensate settling time and lowest distortion. Although the recommended for this, smaller values of feedback resistor are used at lower 0.1 µF power supply bypass capacitors are sufficient in many supply voltages. applications, more elaborate bypassing (such as using two paralleled capacitors) may be required in some cases. Rev. E | Page 12 of 20 AD811 100 Driving Capacitive Loads GAIN = +2 90 V = ±15V S The feedback and gain resistor values in Table 3 result in very R VALUE SPECIFIED S 80 IS FOR FLATTEST flat closed-loop responses in applications where the load capaci- FREQUENCY RESPONSE tances are below 10 pF. Capacitances greater than this result in 70 increased peaking and overshoot, although not necessarily in a 60 sustained oscillation. 50 There are at least two very effective ways to compensate for this 40 effect. One way is to increase the magnitude of the feedback 30 resistor, which lowers the 3 dB frequency. The other method is 20 to include a small resistor in series with the output of the ampli- 10 fier to isolate it from the load capacitance. The results of these 0 two techniques are illustrated in Figure 39. Using a 1.5 kΩ 10 100 1000 feedback resistor, the output ripple is less than 0.5 dB when LOAD CAPACITANCE (pF) driving 100 pF. The main disadvantage of this method is that it Figure 40. Recommended Value of Series Resistor vs. sacrifices a little bit of gain flatness for increased capacitive load the Amount of Capacitive Load drive capability. With the second method, using a series resistor, Figure 40 shows recommended resistor values for different load the loss of flatness does not occur. capacitances. Refer again to Figure 39 for an example of the R FB results of this method. Note that it may be necessary to adjust the gain setting resistor, R , to correct for the attenuation which G +V S results due to the divider formed by the series resistor, R , and S the load resistance. 0.1µF R G 7 2 – Applications that require driving a large load capacitance at a R (OPTIONAL) S high slew rate are often limited by the output current available 6 V OUT AD811 V IN from the driving amplifier. For example, an amplifier limited to C R 3 + L L 4 25 mA output current cannot drive a 500 pF load at a slew rate R T greater than 50 V/µs. However, because of the AD811’s 100 mA output current, a slew rate of 200 V/µs is achievable when driv- 0.1µF ing the same 500 pF capacitor, as shown in Figure 41. –V S 2V 100ns Figure 38. Recommended Connection for Driving a Large Capacitive Load 100 12 V 90 IN 9 R = 1.5kΩ FB R = 0 S 6 10 V OUT R = 649Ω FB 3 R = 30Ω 0% S V = ±15V S C = 100pF 5V L 0 R = 10kΩ L GAIN = +2 –3 Figure 41. Output Waveform of an AD811 Driving a 500 pF Load. –6 Gain = +2, R = 649 Ω, R = 15 Ω, R = 10 kΩ FB S S 1 10 100 FREQUENCY (MHz) Figure 39. Performance Comparison of Two Methods for Driving a Capacitive Load Rev. E | Page 13 of 20 GAIN (dB) 00866-E-038 00866-E-039 VALUE OF R (Ω) S 00866-E-041 00866-E-040 AD811 OPERATION AS A VIDEO LINE DRIVER 1V 10ns The AD811 has been designed to offer outstanding perform- 100 ance at closed-loop gains of +1 or greater, while driving V 90 IN multiple reverse-terminated video loads. The lowest differential gain and phase errors are obtained when using ±15 V power supplies. With ±12 V supplies, there is an insignificant increase in these errors and a slight improvement in gain flatness. Due to power dissipation considerations, ±12 V supplies are 10 V OUT recommended for optimum video performance. Excellent 0% performance can be achieved at much lower supplies as well. 1V The closed-loop gain versus the frequency at different supply voltages is shown in Figure 43. Figure 44 is an oscilloscope photograph of an AD811 line driver’s pulse response with ±15 V supplies. The differential gain and phase error versus the supply Figure 44. Small Signal Pulse Response, Gain = +2, VS = ±15 V are plotted in Figure 45 and Figure 46, respectively. 0.10 R = 649Ω F 0.09 F = 3.58MHz C Another important consideration when driving multiple cables 100 IRE 0.08 MODULATED RAMP is the high frequency isolation between the outputs of the cables. Due to its low output impedance, the AD811 achieves 0.07 better than 40 dB of output-to-output isolation at 5 MHz 0.06 driving back-terminated 75 Ω cables. 0.05 75Ω CABLE 649Ω 649Ω 0.04 V No. 1 a. DRIVING A SINGLE, BACK- OUT 75Ω TERMINATED, 75Ω COAX CABLE 0.03 +V b. DRIVING TWO PARALLEL, BACK- 75Ω S TERMINATED, COAX CABLES 0.02 b 0.1µF 0.01 a 7 0 2 – 56 7 8 9 10 11 12 13 14 15 75Ω CABLE V No. 2 6 OUT AD811 SUPPLY VOLTAGE (V) 75Ω 75Ω CABLE V 75Ω IN 3 + Figure 45. Differential Gain Error vs. Supply Voltage for 4 the Video Line Driver of Figure 42 75Ω 0.20 R = 649Ω 0.1µF F 0.18 F = 3.58MHz C 100 IRE 0.16 MODULATED RAMP –V S 0.14 b Figure 42. A Video Line Driver Operating at a Gain of +2 0.12 12 0.10 a. DRIVING A SINGLE, BACK- TERMINATED, 75Ω COAX CABLE 0.08 G = +2 b. DRIVING TWO PARALLEL, BACK- a 9 R = 150Ω L TERMINATED, COAX CABLES 0.06 R = R G FB V = ±15V S 0.04 R = 649Ω FB 6 0.02 V = ±5V S 3 0 R = 562Ω FB 56 7 8 9 10 11 12 13 14 15 SUPPLY VOLTAGE (V) 0 Figure 46. Differential Phase Error vs. Supply Voltage for the Video Line Driver of Figure 42 –3 –6 1 10 100 FREQUENCY (MHz) Figure 43. Closed-Loop Gain vs. Frequency, Gain = +2 Rev. E | Page 14 of 20 GAIN (dB) 00866-E-042 00866-E-043 DIFFERENTIAL PHASE (DEGREES) DIFFERENTIAL GAIN (%) 00866-E-046 00866-E-045 00866-E-044 AD811 AN 80 MHZ VOLTAGE-CONTROLLED AMPLIFIER The gain can be increased to 20 dB (×10) by raising R8 and R9 CIRCUIT to 1.27 kΩ, with a corresponding decrease in −3 dB bandwidth to approximately 25 MHz. The maximum output voltage under The voltage-controlled amplifier (VCA) circuit of Figure 48 these conditions is increased to ±9 V using ±12 V supplies. shows the AD811 being used with the AD834, a 500 MHz, 4-quadrant multiplier. The AD834 multiplies the signal The gain-control input voltage, VG, may be a positive or negative input by the dc control voltage, VG. The AD834 outputs are in ground-referenced voltage, or fully differential, depending on the form of differential currents from a pair of open collectors, the choice of connections at Pins 7 and 8. A positive value of VG ensuring that the full bandwidth of the multiplier (which results in an overall noninverting response. Reversing the sign exceeds 500 MHz) is available for certain applications. Here, the of V simply causes the sign of the overall response to invert. In G AD811 op amp provides a buffered, single-ended, ground- fact, although this circuit has been classified as a voltage- referenced output. Using feedback resistors R8 and R9 of 511 Ω, controlled amplifier, it is also quite useful as a general-purpose, the overall gain ranges from −70 dB for VG = 0 dB to +12 dB four-quadrant multiplier, with good load driving capabilities (a numerical gain of +4) when VG = 1 V. The overall transfer and fully symmetrical responses from the X and Y inputs. function of the VCA is VOUT = 4 (X1 − X2)(Y1 − Y2), which reduces to VOUT = 4 VG VIN using the labeling conventions The AD811 and AD834 can both be operated from power shown in Figure 47. The circuit’s −3 dB bandwidth of 80 MHz is supply voltages of ±5 V. While it is not necessary to power them maintained essentially constant—that is, independent of gain. from the same supplies, the common-mode voltage at W1 and The response can be maintained flat to within ±0.1 dB from dc W2 must be biased within the common-mode range of the to 40 MHz at full gain with the addition of an optional capacitor AD811’s input stage. To achieve the lowest differential gain and of about 0.3 pF across the feedback resistor R8. The circuit phase errors, it is recommended that the AD811 be operated produces a full-scale output of ±4 V for a ±1 V input and can from power supply voltages of ±10 V or greater. This VCA drive a reverse-terminated load of 50 Ω or 75 Ω to ±2 V. circuit operates from a ±12 V dual power supply. FB +12V C1 0.1µF R1 100Ω R8* + V G – R2 100Ω 8765 R4 R6 182Ω 294Ω X2 X1 +V W1 S 7 2 – U1 U3 V 6 OUT AD834 AD811 3 + 4 –V Y1 Y2 S W2 R5 R7 R L 182Ω 294Ω 1234 V IN R9* R3 249Ω C2 0.1µF FB –12V *R8 = R9 = 511Ω FOR×4 GAIN R8 = R9 = 1.27kΩ FOR×10 GAIN Figure 47. An 80 MHz Voltage-Controlled Amplifier Rev. E | Page 15 of 20 00866-E-047 AD811 A VIDEO KEYER CIRCUIT 1 V. Thus, when VG = 0, the response to video input VB is already By using two AD834 multipliers, an AD811, and a 1 V dc source, at its full-scale value of unity, whereas when VG = 1 V, the differ- a special form of a two-input VCA circuit called a video keyer ential input X1−X2 is 0. This generates the second term. can be assembled. Keying is the term used in reference to blend- ing two or more video sources under the control of a third The bias currents required at the output of the multipliers are signal or signals to create such special effects as dissolves and provided by R8 and R9. A dc level-shifting network comprising overlays. The circuit shown in Figure 48 is a two-input keyer, R10/R12 and R11/R13 ensures that the input nodes of the with video inputs VA and VB, and a control input VG. The AD811 are positioned at a voltage within its common-mode transfer function (with VOUT at the load) is given by range. At high frequencies, C1 and C2 bypass R10 and R11, respectively. R14 is included to lower the HF loop gain and is VOUT = GVA + (1−G)VB needed because the voltage-to-current conversion in the where G is a dimensionless variable (actually, just the gain of the AD834s, via the Y2 inputs, results in an effective value of the A signal path) that ranges from 0 when V = 0 to 1 when V = feedback resistance of 250 Ω; this is only about half the value G G 1 V. Thus, V varies continuously between V and V as G required for optimum flatness in the AD811’s response. (Note OUT A B varies from 0 to 1. that this resistance is unaffected by G: when G = +1, all the feedback is via U1, while when G = 0 it is all via U2). R14 Circuit operation is straightforward. Consider first the signal reduces the fractional amount of output current from the path through U1, which handles video input VA. Its gain is multipliers into the current-summing inverting input of the clearly 0 when VG = 0, and the scaling chosen ensures that it has AD811 by sharing it with R8. This resistor can be used to adjust a unity value when VG = 1 V; this takes care of the first term of the bandwidth and damping factor to best suit the application. the transfer function. On the other hand, the V input to U2 is G taken to the inverting input X2 while X1 is biased at an accurate C1 +5V R14 0.1µF SETUP FOR DRIVING SEE TEXT REVERSE-TERMINATED LOAD R7 45.3Ω R10 V Z OUT R5 O TO PIN 6 2.49kΩ 113Ω AD811 V G R6 Z 200Ω O 226Ω (0 TO +1V dc) TO Y2 8765 200Ω X2 X1 +V W1 S +5V INSET R1 R8 R12 U1 U4 1.87kΩ 29.4Ω 6.98kΩ AD834 AD589 +5V R2 –V Y1 Y2 S W2 174Ω 1234 FB V (±1V FS) A C3 0.1µF –5V –5V +5V LOAD R3 GND 100Ω 7 2 – R9 R13 8765 U3 6 V OUT R4 29.4Ω 6.98kΩ AD811 X2 1.02kΩ X1 +V W1 S 3 + 4 C4 C2 0.1µF U1 0.1µF AD834 LOAD FB –V Y1 Y2 S W2 GND 1234 R11 2.49kΩ V (±1V FS) B –5V –5V Figure 48. A Practical Video Keyer Circuit Rev. E | Page 16 of 20 00866-E-048 AD811 at 100 MHz is limited primarily by board layout. For V = 1 V, To generate the 1 V dc needed for the 1−G term, an AD589 G the −3 dB bandwidth is 15 MHz when using a 137 Ω resistor for reference supplies 1.225 V ± 25 mV to a voltage divider consist- R14 and 70 MHz with R14 = 49.9 Ω. For more information on ing of resistors R2 through R4. Potentiometer R3 should be adjusted to provide exactly 1 V at the X1 input. the design and operation of the VCA and video keyer circuits, refer to the application note “Video VCAs and Keyers: Using the In this case, an arrangement is shown using dual supplies of AD834 and AD811” by Brunner, Clarke, and Gilbert, available ±5 V for both the AD834 and the AD811. Also, the overall gain on the Analog Devices, Inc. website at www.analog.com. is arranged to be unity at the load when it is driven from a 10 reverse-terminated 75 Ω line. This means that the dual VCA has R14 = 49.9Ω 0 to operate at a maximum gain of +2, rather than +4 as in the GAIN VCA circuit of Figure 47. However, this cannot be achieved by –10 R14 = 137Ω lowering the feedback resistor because below a critical value –20 (not much less than 500 Ω) the AD811’s peaking may be –30 unacceptable. This is because the dominant pole in the open- –40 loop ac response of a current feedback amplifier is controlled by –50 this feedback resistor. It would be possible to operate at a gain of ADJACENT CHANNEL –60 FEEDTHROUGH ×4 and then attenuate the signal at the output. Instead, the signals have been attenuated by 6 dB at the input to the AD811; –70 this is the function of R8 through R11. –80 –90 Figure 49 is a plot of the ac response of the feedback keyer when 10k 100k 1M 10M 100M driving a reverse-terminated 50 Ω cable. Output noise and FREQUENCY (Hz) adjacent channel feedthrough, with either channel fully off and Figure 49. A Plot of the AC Response of the Video Keyer the other fully on, is about −50 dB to 10 MHz. The feedthrough Rev. E | Page 17 of 20 CLOSED-LOOP GAIN (dB) 00866-E-049 AD811 OUTLINE DIMENSIONS 0.375 (9.53) 5.00 (0.1968) 0.365 (9.27) 4.80 (0.1890) 0.355 (9.02) 85 4.00 (0.1574) 6.20 (0.2440) 8 5 0.295 (7.49) 3.80 (0.1497) 5.80 (0.2284) 1 4 0.285 (7.24) 0.275 (6.98) 1 4 0.325 (8.26) 0.310 (7.87) 1.27 (0.0500) 0.50 (0.0196) 0.100 (2.54) × 45° 0.150 (3.81) BSC 1.75 (0.0688) 0.300 (7.62) 0.25 (0.0099) BSC 0.135 (3.43) 1.35 (0.0532) 0.25 (0.0098) 0.015 0.120 (3.05) 0.10 (0.0040) 0.180 (0.38) (4.57) 8° 0.51 (0.0201) MIN MAX 0° 1.27 (0.0500) COPLANARITY 0.25 (0.0098) 0.31 (0.0122) 0.015 (0.38) SEATING 0.10 0.40 (0.0157) 0.17 (0.0067) PLANE 0.150 (3.81) 0.010 (0.25) SEATING 0.130 (3.30) PLANE 0.008 (0.20) COMPLIANT TO JEDEC STANDARDS MS-012AA 0.110 (2.79) 0.060 (1.52) CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS 0.022 (0.56) 0.050 (1.27) (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR 0.018 (0.46) 0.045 (1.14) REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 0.014 (0.36) Figure 52. 8-Lead Standard Small Outline Package [SOIC] COMPLIANT TO JEDEC STANDARDS MO-095AA Narrow Body (R-8) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR Dimensions shown in millimeters and (inches) REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 50. 8-Lead Plastic Dual In-Line Package [PDIP] (N-8) Dimensions shown in inches and (millimeters) 0.200 (5.08) 0.005 (0.13) 0.055 (1.40) 0.075 (1.91) REF MIN MAX REF 0.100 (2.54) 0.100 (2.54) REF 0.064 (1.63) 0.095 (2.41) 85 0.015 (0.38) 0.075 (1.90) MIN 0.310 (7.87) 19 3 20 18 4 PIN 1 0.220 (5.59) 0.028 (0.71) 1 0.358 (9.09) 0.358 1 4 0.011 (0.28) 0.022 (0.56) (9.09) 0.342 (8.69) BOTTOM MAX 0.007 (0.18) VIEW SQ 0.050 (1.27) SQ 0.100 (2.54) BSC R TYP 8 14 BSC 0.320 (8.13) 0.075 (1.91) 0.405 (10.29) MAX 13 9 REF 0.290 (7.37) 45° TYP 0.060 (1.52) 0.088 (2.24) 0.055 (1.40) 0.150 (3.81) 0.015 (0.38) 0.200 (5.08) 0.054 (1.37) 0.045 (1.14) BSC MAX 0.150 (3.81) 0.200 (5.08) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS MIN (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR 0.125 (3.18) REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN 0.015 (0.38) 0.023 (0.58) SEATING 15° 0.070 (1.78) PLANE 0.008 (0.20) 0.014 (0.36) 0° 0.030 (0.76) Figure 53. 20-Terminal Ceramic Leadless Chip Carrier [LCC] (E-20A) CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR Dimensions shown in inches and (millimeters) REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 51. 8-Lead Ceramic Dual In-Line Package [CERDIP] (Q-8) Dimensions shown in inches and (millimeters) Rev. E | Page 18 of 20 AD811 10.50 (0.4134) 13.00 (0.5118) 10.10 (0.3976) 12.60 (0.4961) 20 11 16 9 7.60 (0.2992) 7.60 (0.2992) 7.40 (0.2913) 7.40 (0.2913) 10.65 (0.4193) 10.65 (0.4193) 1 10 1 8 10.00 (0.3937) 10.00 (0.3937) 2.65 (0.1043) 0.75 (0.0295) 1.27 (0.0500) × 45° 2.35 (0.0925) 0.25 (0.0098) 2.65 (0.1043) 0.75 (0.0295) 0.30 (0.0118) BSC × 45° 0.25 (0.0098) 2.35 (0.0925) 0.10 (0.0039) 0.30 (0.0118) 0.10 (0.0039) 8° 1.27 SEATING 0.51 (0.0201) 0° 1.27 (0.0500) 8° COPLANARITY 0.33 (0.0130) (0.0500) PLANE 0.31 (0.0122) 0.51 (0.0201) SEATING 0.40 (0.0157) 0° 0.10 BSC COPLANARITY 1.27 (0.0500) 0.20 (0.0079) 0.33 (0.0130) PLANE 0.10 0.31 (0.0122) 0.40 (0.0157) 0.20 (0.0079) COMPLIANT TO JEDEC STANDARDS MS-013AC CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS COMPLIANT TO JEDEC STANDARDS MS-013AA (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN Figure 54. 16-Lead Standard Small Outline Package [SOIC] Figure 55. 20-LeadStandard Small Outline Package [SOIC] Wide Body (R-16) Wide Body (R-20) Dimensions shown in millimeters and (inches) Dimensions shown in millimeters and (inches) Rev. E | Page 19 of 20 AD811 ORDERING GUIDE Model Temperature Range Package Description Package Option AD811AN −40°C to +85°C 8-Lead Plastic Dual In-Line Package (PDIP) N-8 1 AD811ANZ −40°C to +85°C 8-Lead Plastic Dual In-Line Package (PDIP) N-8 AD811AR-16 −40°C to +85°C 16-LeadStandard Small Outline Package (SOIC) R-16 AD811AR-16-REEL −40°C to +85°C 16-LeadStandard Small Outline Package (SOIC) R-16 AD811AR-16-REEL7 −40°C to +85°C 16-LeadStandard Small Outline Package (SOIC) R-16 AD811AR-20 −40°C to +85°C 20-LeadStandard Small Outline Package (SOIC) R-20 AD811AR-20-REEL −40°C to +85°C 20-LeadStandard Small Outline Package (SOIC) R-20 AD811JR 0°C to +70°C 8-LeadStandard Small Outline Package (SOIC) R-8 AD811JR-REEL 0°C to +70°C 8-LeadStandard Small Outline Package (SOIC) R-8 AD811JR-REEL7 0°C to +70°C 8-LeadStandard Small Outline Package (SOIC) R-8 1 AD811JRZ 0°C to +70°C 8-LeadStandard Small Outline Package (SOIC) R-8 AD811SQ/883B −55°C to +125°C 8-Lead Ceramic Dual In-Line Package (CERDIP) Q-8 5962-9313101MPA −55°C to +125°C 8-Lead Ceramic Dual In-Line Package (CERDIP) Q-8 AD811SE/883B −55°C to +125°C 20-Terminal Ceramic Leadless Chip Carrier (LCC) E-20A 5962-9313101M2A −55°C to +125°C 20-Terminal Ceramic Leadless Chip Carrier (LCC) E-20A AD811ACHIPS −40°C to +85°C DIE AD811SCHIPS −55°C to +125°C DIE 1 Z = Pb-free part. © 2004 Analog Devices, Inc. All rights reserved. Trademarks and regis- tered trademarks are the property of their respective owners. C00866–0–7/04(E) Rev. E | Page 20 of 20