ANALOG DEVICES AD8092

Low Cost, High Speed Rail-to-Rail Amplifiers AD8091/AD8092 FEATURES CONNECTION DIAGRAMS Low cost single (AD8091) and dual (AD8092) amplifiers NC 1 AD8091 8 NC Fully specified at +3 V, +5 V, and ±5 V supplies –IN 2 7 +V S Single-supply operation +IN 3 6 V OUT –V 4 5 NC Output swings to within 25 mV of either rail S High speed and fast settling on 5 V NC = NO CONNECT 110 MHz, −3 dB bandwidth (G = +1) Figure 1. SOIC-8 (R-8) 145 V/μs slew rate 50 ns settling time to 0.1% AD8091 V 1 5 +V OUT S Good video specifications (G = +2) Gain flatness of 0.1 dB to 20 MHz; RL = 150 Ω –V 2 S 0.03% differential gain error; RL = 1 kΩ +IN 3 4 –IN 0.03%differential phase error; R = 1 kΩ L Figure 2. SOT23-5 (RJ-5) Low distortion −80 dBc total harmonic @ 1 MHz; RL = 100 Ω AD8092 Outstanding load drive capability OUT1 1 8 +V S Drives 45 mA, 0.5 V from supply rails –IN1 2 7 OUT Drives 50 pF capacitive load (G = +1) +IN1 3 6 –IN2 –V 4 5 +IN2 Low power of 4.4 mA per amplifier S APPLICATIONS NC = NO CONNECT Figure 3. MSOP-8 and SOIC-8 (RM-8, R-8) Coaxial cable drivers Active filters Video switchers Professional cameras CCD imaging systems CDs/DVDs Clock buffers The AD8091/AD8092 offer a low power supply current and can GENERAL DESCRIPTION operate on a single 3 V power supply. These features are ideally The AD8091 (single) and AD8092 (dual) are low cost, voltage suited for portable and battery-powered applications where size feedback, high speed amplifiers designed to operate on +3 V, and power are critical. +5 V, or ±5 V supplies. The AD8091/AD8092 have true single- The wide bandwidth and fast slew rate make these amplifiers supply capability, with an input voltage range extending 200 mV useful in many general-purpose, high speed applications where below the negative rail and within 1 V of the positive rail. dual power supplies of up to ±6 V and single supplies from +3 Despite their low cost, the AD8091/AD8092 provide excellent V to +12 V are needed. overall performance and versatility. The output voltage swing This low cost performance is offered in an 8-lead SOIC extends to within 25 mV of each rail, providing the maximum (AD8091/AD8092), a tiny SOT23-5 (AD8091), and an MSOP output dynamic range with excellent overdrive recovery. This (AD8092). makes the AD8091/AD8092 useful for video electronics, such as cameras, video switchers, or any high speed portable equip- ment. Low distortion and fast settling make them ideal for active filter applications. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ©2002–2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. 02859-001 02859-002 02859-003 AD8091/AD8092 TABLE OF CONTENTS Features .............................................................................................. 1 Power Supply Bypassing............................................................ 12 Applications....................................................................................... 1 Grounding ................................................................................... 12 Connection Diagrams...................................................................... 1 Input Capacitance ...................................................................... 12 General Description ......................................................................... 1 Input-to-Output Coupling........................................................ 12 Revision History ............................................................................... 2 Driving Capacitive Loads .............................................................. 13 Specifications..................................................................................... 3 Overdrive Recovery ................................................................... 13 Absolute Maximum Ratings............................................................ 6 Active Filters ............................................................................... 13 ESD Caution.................................................................................. 6 Sync Stripper............................................................................... 14 Maximum Power Dissipation ..................................................... 7 Single-Supply Composite Video Line Driver ......................... 14 Typical Performance Characteristics ............................................. 8 Outline Dimensions....................................................................... 16 Layout, Grounding, and Bypassing Considerations .................. 12 Ordering Guide .......................................................................... 17 REVISION HISTORY 9/07—Rev. B to Rev. C Changes to Applications Section .................................................... 1 Updated Outline Dimensions ....................................................... 16 Changes to Ordering Guide .......................................................... 17 3/05—Rev. A to Rev. B Changes to Format .............................................................Universal Changes to Features.......................................................................... 1 Updated Outline Dimensions ....................................................... 17 Changes to Ordering Guide .......................................................... 18 5/02–Rev. 0 to Rev. A Edits to Product Description .......................................................... 1 Edit to TPC 6 .................................................................................... 7 Edits to TPCs 21–24....................................................................... 10 Edits to Figure 3.............................................................................. 11 2/02—Revision 0: Initial Version Rev. C | Page 2 of 20 AD8091/AD8092 SPECIFICATIONS TA = 25°C, VS = 5 V, RL = 2 kΩ to 2.5 V, unless otherwise noted. Table 1. Parameter Conditions Min Typ Max Unit DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth G = +1, V = 0.2 V p-p 70 110 MHz O G = −1, +2, VO = 0.2 V p-p 50 MHz Bandwidth for 0.1 dB Flatness G = +2, VO = 0.2 V p-p, 20 MHz RL = 150 Ω to 2.5 V, RF = 806 Ω Slew Rate G = −1, V = 2 V step 100 145 V/μs O Full Power Response G = +1, V = 2 V p-p 35 MHz O Settling Time to 0.1% G = −1, VO = 2 V step 50 ns NOISE/DISTORTION PERFORMANCE Total Harmonic Distortion (See Figure 11) f = 5 MHz, V = 2 V p-p, G = +2 −67 dB C O Input Voltage Noise f = 10 kHz 16 nV/√Hz Input Current Noise f = 10 kHz 850 fA/√Hz Differential Gain Error (NTSC) G = +2, RL = 150 Ω to 2.5 V 0.09 % R = 1 kΩ to 2.5 V 0.03 % L Differential Phase Error (NTSC) G = +2, R = 150 Ω to 2.5 V 0.19 Degrees L R = 1 kΩ to 2.5 V 0.03 Degrees L Crosstalk f = 5 MHz, G = +2 −60 dB DC PERFORMANCE Input Offset Voltage 1.7 10 mV TMIN to TMAX 25 mV Offset Drift 10 μV/°C Input Bias Current 1.4 2.5 μA T to T 3.25 μA MIN MAX Input Offset Current 0.1 0.75 μA Open-Loop Gain RL = 2 kΩ to 2.5 V 86 98 dB TMIN to TMAX 96 dB RL = 150 Ω to 2.5 V 76 82 dB T to T 78 dB MIN MAX INPUT CHARACTERISTICS Input Resistance 290 kΩ Input Capacitance 1.4 pF Input Common-Mode Voltage Range −0.2 to +4 V Common-Mode Rejection Ratio V = 0 V to 3.5 V 72 88 dB CM OUTPUT CHARACTERISTICS Output Voltage Swing R = 10 kΩ to 2.5 V 0.015 to 4.985 V L RL = 2 kΩ to 2.5 V 0.100 to 4.900 0.025 to 4.975 V RL = 150 Ω to 2.5 V 0.300 to 4.625 0.200 to 4.800 V Output Current VOUT = 0.5 V to 4.5 V 45 mA T to T 45 mA MIN MAX Short-Circuit Current Sourcing 80 mA Sinking 130 mA Capacitive Load Drive G = +1 50 pF POWER SUPPLY Operating Range 3 12 V Quiescent Current/Amplifier 4.4 5 mA Power Supply Rejection Ratio ΔVS = ±1 V 70 80 dB OPERATING TEMPERATURE RANGE −40 +85 °C Rev. C | Page 3 of 20 AD8091/AD8092 T = 25°C, V = +3 V, R = 2 kΩ to +1.5 V, unless otherwise noted. A S L Table 2. Parameter Conditions Min Typ Max Unit DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth G = +1, V = 0.2 V p-p 70 110 MHz O G = −1, +2, V = 0.2 V p-p 50 MHz O Bandwidth for 0.1 dB Flatness G = +2, V = 0.2 V p-p, 17 MHz O RL = 150 Ω to 2.5 V, RF = 402 Ω Slew Rate G = −1, VO = 2 V step 90 135 V/μs Full Power Response G = +1, VO = 1 V p-p 65 MHz Settling Time to 0.1% G = −1, V = 2 V step 55 ns O NOISE/DISTORTION PERFORMANCE Total Harmonic Distortion (see Figure 11) fC = 5 MHz, VO = 2 V p-p, G = −1, −47 dB R = 100 Ω to 1.5 V L Input Voltage Noise f = 10 kHz 16 nV/√Hz Input Current Noise f = 10 kHz 600 fA/√Hz Differential Gain Error (NTSC) G = +2, VCM = 1 V RL = 150 Ω to 1.5 V 0.11 % R = 1 kΩ to 1.5 V 0.09 % L Differential Phase Error (NTSC) G = +2, V = 1 V CM R = 150 Ω to 1.5 V 0.24 Degrees L RL = 1 kΩ to 1.5 V 0.10 Degrees Crosstalk f = 5 MHz, G = +2 −60 dB DC PERFORMANCE Input Offset Voltage 1.6 10 mV TMIN to TMAX 25 mV Offset Drift 10 μV/°C Input Bias Current 1.3 2.6 μA T to T 3.25 μA MIN MAX Input Offset Current 0.15 0.8 μA Open-Loop Gain RL = 2 kΩ 80 96 dB TMIN to TMAX 94 dB R = 150 Ω 74 82 dB L T to T 76 dB MIN MAX INPUT CHARACTERISTICS Input Resistance 290 kΩ Input Capacitance 1.4 pF Input Common-Mode Voltage Range −0.2 to +2.0 V Common-Mode Rejection Ratio VCM = 0 V to 1.5 V 72 88 dB OUTPUT CHARACTERISTICS Output Voltage Swing R = 10 kΩ to 1.5 V 0.01 to 2.99 V L RL = 2 kΩ to 1.5 V 0.075 to 2.9 0.02 to 2.98 V RL = 150 Ω to 1.5 V 0.20 to 2.75 0.125 to 2.875 V Output Current V = 0.5 V to 2.5 V 45 mA OUT T to T 45 mA MIN MAX Short Circuit Current Sourcing 60 mA Sinking 90 mA Capacitive Load Drive G = +1 45 pF POWER SUPPLY Operating Range 3 12 V Quiescent Current/Amplifier 4.2 4.8 mA Power Supply Rejection Ratio ΔVS = +0.5 V 68 80 dB OPERATING TEMPERATURE RANGE −40 +85 °C Rev. C | Page 4 of 20 AD8091/AD8092 T = 25°C, V = ±5 V, R = 2 kΩ to ground, unless otherwise noted. A S L Table 3. Parameter Conditions Min Typ Max Unit DYNAMIC PERFORMANCE −3 dB Small Signal Bandwidth G = +1, V = 0.2 V p-p 70 110 MHz O G = −1, +2, V = 0.2 V p-p 50 MHz O Bandwidth for 0.1 dB Flatness G = +2, V = 0.2 V p-p, 20 MHz O RL = 150 Ω, RF = 1.1 kΩ Slew Rate G = −1, VO = 2 V step 105 170 V/μs Full Power Response G = +1, VO = 2 V p-p 40 MHz Settling Time to 0.1% G = −1, V = 2 V step 50 ns O NOISE/DISTORTION PERFORMANCE Total Harmonic Distortion (see Figure 11) fC = 5 MHz, VO = 2 V p-p, G = +2 −71 dB Input Voltage Noise f = 10 kHz 16 nV/√Hz Input Current Noise f = 10 kHz 900 fA/√Hz Differential Gain Error (NTSC) G = +2, R = 150 Ω 0.02 % L RL = 1 kΩ 0.02 % Differential Phase Error (NTSC) G = +2, RL = 150 Ω 0.11 Degrees RL = 1 kΩ 0.02 Degrees Crosstalk f = 5 MHz, G = +2 −60 dB DC PERFORMANCE Input Offset Voltage 1.8 11 mV T to T 27 mV MIN MAX Offset Drift 10 μV/°C Input Bias Current 1.4 2.6 μA TMIN to TMAX 3.5 μA Input Offset Current 0.1 0.75 μA Open-Loop Gain R = 2 kΩ 88 96 dB L T to T 96 dB MIN MAX R = 150 Ω 78 82 dB L TMIN to TMAX 80 dB INPUT CHARACTERISTICS Input Resistance 290 kΩ Input Capacitance 1.4 pF Input Common-Mode Voltage Range −5.2 to +4.0 V Common-Mode Rejection Ratio V = −5 V to +3.5 V 72 88 dB CM OUTPUT CHARACTERISTICS Output Voltage Swing RL = 10 kΩ −4.98 to +4.98 V R = 2 kΩ −4.85 to +4.85 −4.97 to +4.97 V L R = 150 Ω −4.45 to +4.30 −4.60 to +4.60 V L Output Current V = −4.5 V to +4.5 V 45 mA OUT TMIN to TMAX 45 mA Short Circuit Current Sourcing 100 mA Sinking 160 mA Capacitive Load Drive G = +1 (AD8091/AD8092) 50 pF POWER SUPPLY Operating Range 3 12 V Quiescent Current/Amplifier 4.8 5.5 mA Power Supply Rejection Ratio ΔV = ±1 V 68 80 dB S OPERATING TEMPERATURE RANGE −40 +85 °C Rev. C | Page 5 of 20 AD8091/AD8092 ABSOLUTE MAXIMUM RATINGS Table 4. Stresses above those listed under Absolute Maximum Ratings Parameter Rating may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any Supply Voltage 12.6 V other conditions above those indicated in the operational Power Dissipation See Figure 4 section of this specification is not implied. Exposure to absolute Common-Mode Input Voltage ±V S maximum rating conditions for extended periods may affect Differential Input Voltage ±2.5 V device reliability. Output Short-Circuit Duration See Figure 4 Storage Temperature Range −65°C to +125°C ESD CAUTION Operating Temperature Range −40°C to +85°C Lead Temperature (Soldering 10 sec) 300°C Rev. C | Page 6 of 20 AD8091/AD8092 MAXIMUM POWER DISSIPATION The maximum safe power dissipation in the AD8091/AD8092 If the rms signal levels are indeterminate, then consider the package is limited by the associated rise in junction temperature worst case when VOUT = VS/4 for RL to midsupply (TJ) on the die. The plastic encapsulating the die locally reaches 2 V ⎛ ⎞ S the junction temperature. At approximately 150°C, which is the ⎜ ⎟ 4 ⎝ ⎠ glass transition temperature, the plastic changes its properties. P =() V ×I + D S S R L Even temporarily exceeding this temperature limit may change the stresses that the package exerts on the die, permanently In single-supply operation with R referenced to −V , the worst L S shifting the parametric performance of the AD8091/AD8092. case is V = V /2. OUT S Exceeding a junction temperature of 175°C for an extended Airflow increases heat dissipation, effectively reducing θJA. Also, period of time can result in changes in the silicon devices, more metal directly in contact with the package leads from potentially causing failure. metal traces, through holes, ground, and power planes reduces The still-air thermal properties of the package (θ ), the ambient JA the θJA. Care must be taken to minimize parasitic capacitances temperature (T ), and the total power dissipated in the package A at the input leads of high speed op amps as discussed in the (P ) can be used to determine the junction temperature of the die. D Input Capacitance section. The junction temperature can be calculated as Figure 4 shows the maximum safe power dissipation in the package vs. the ambient temperature for the SOIC-8 T =T +(P ×θ ) J A D JA (125°C/W), SOT23-5 (180°C/W), and MSOP-8 (150°C/W) on a The power dissipated in the package (PD) is the sum of the JEDEC standard four-layer board. quiescent power dissipation and the power dissipated in the 2.0 package due to the load drive for all outputs. The quiescent T = 150°C J power is the voltage between the supply pins (V ) times the S quiescent current (I ). Assuming that the load (R ) is referenced S L 1.5 SOIC-8 to midsupply, then the total drive power is V /2 × I , some of S OUT which is dissipated in the package and some in the load MSOP-8 (VOUT × IOUT). The difference between the total drive power and 1.0 the load power is the drive power dissipated in the package. P =quiescent power+(totaldrive power−load power) SOT23-5 D 0.5 2 ⎛ ⎞ ⎛ ⎞ ⎛V V ⎞ V S OUT OUT ⎜ ⎟ ⎜ ⎟ P() V I ⎜ ⎟ = × + × − D S S ⎜ ⎟ ⎜ ⎟ ⎜ ⎟ 2 R R L L ⎝ ⎠ ⎝ ⎠ ⎝ ⎠ 0 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 RMS output voltages should be considered. If RL is referenced to AMBIENT TEMPERATURE (°C) −VS, as in single-supply operation, then the total drive power is Figure 4. Maximum Power Dissipation vs. VS × IOUT. Temperature for a Four-Layer Board Rev. C | Page 7 of 20 MAXIMUM POWER DISSIPATION (W) 02859-004 AD8091/AD8092 TYPICAL PERFORMANCE CHARACTERISTICS 3 6.3 2 6.2 G = +2 R = 2kΩ F 1 6.1 0 6.0 G = +5 –1 5.9 R = 2kΩ F G = +1 G = +10 –2 5.8 R = 0Ω R = 2kΩ F F –3 5.7 –4 5.6 V = 5V V = 5V S S –5 GAIN AS SHOWN 5.5 G = +2 R AS SHOWN R = 150kΩ F L –6 R = 2kΩ 5.4 R = 806Ω L F V = 0.2V p-p V = 0.2V p-p O O –7 5.3 0.1 1 10 100 500 0.1 1 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 5. Normalized Gain vs. Frequency; VS = +5 V Figure 8. 0.1 dB Gain Flatness vs. Frequency; G = +2 3 9 2 8 V = +3V V = +5V S S 1 7 0 6 V = +5V S –1 5 V = 2V p-p O V = ±5V S V = ±5V S –2 4 V = 4V p-p O –3 3 –4 2 V AS SHOWN S –5 1 V AS SHOWN G = +2 S G = +1 R = 2kΩ L –6 0 R = 2kΩ R = 2kΩ L F V = 0.2V p-p V AS SHOWN O O –7 –1 0.1 1 10 100 500 0.1 1 10 100 500 FREQUENCY (MHz) FREQUENCY (MHz) Figure 6. Gain vs. Frequency vs. Supply Figure 9. Large Signal Frequency Response; G = +2 3 70 V = 5V S R = 2kΩ 2 L 60 –40°C 1 50 0 40 +85°C GAIN –1 +25°C 30 0 –2 20 –45 –3 PHASE 10 –90 –4 V = 5V S 0 –135 –5 G = +1 R = 2kΩ L 50° PHASE –10 –180 –6 V = 0.2V p-p O MARGIN TEMPERATURE AS SHOWN –7 –20 0.1 1 10 100 500 0.1 1 10 100 500 FREQUENCY (MHz) FREQUENCY (MHz) Figure 7. Gain vs. Frequency vs. Temperature Figure 10. Open-Loop Gain and Phase vs. Frequency Rev. C | Page 8 of 20 GAIN (dB) GAIN (dB) NORMALIZED GAIN (dB) 02859-007 02859-006 02859-005 OPEN-LOOP GAIN (dB) GAIN (dB) GAIN FLATNESS (dB) 02859-009 02859-008 02859-010 PHASE (Degrees) AD8091/AD8092 –20 0.10 R = 150Ω NTSC SUBSCRIBER (3.58MHz) L V = 2V p-p O 0.08 V = 3V, G = –1 S –30 0.06 R = 2kΩ, R = 100Ω F L 0.04 V = 5V, G = +2 S –40 0.02 R = 2kΩ, R = 100Ω F L 0 V = 5V, G = +1 S –50 –0.02 R = 1kΩ R = 100Ω V = 5, G = +2 L S L –0.04 R = 2kΩ, R AS SHOWN F L –60 –0.06 0 102030405060708090 100 –70 0.10 R = 1kΩ L 0.05 V = 5V, G = +1 S –80 0 R = 2kΩ L –0.05 V = 5V, G = +2 S –90 R = 150Ω L R = 2kΩ, R = 2kΩ –0.10 F L –0.15 –100 V = 5, G = +2 S –0.20 R = 2kΩ, R AS SHOWN F L –110 –0.25 0 102030405060708090 100 11 2 3 4 5 6 7 8 90 FUNDAMENTAL FREQUENCY (MHz) MODULATING RAMP LEVEL (IRE) Figure 11. Total Harmonic Distortion Figure 14. Differential Gain and Phase Errors –30 1000 V = 5V S –40 10MHz –50 –60 100 –70 –80 5MHz –90 1MHz 10 –100 –110 V = 5V S –120 R = 2kΩ L G = +2 –130 1 05 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5.0 10 100 1k 10k 100k 1M 10M OUTPUT VOLTAGE (V p-p) FREQUENCY (Hz) Figure 12. Worst Harmonic vs. Output Voltage Figure 15. Input Voltage Noise vs. Frequency 5.0 100 V = 5V S V = 5V 4.5 S G = –1 R = 2kΩ 4.0 F R = 2kΩ L 3.5 10 3.0 2.5 2.0 1 1.5 1.0 0.5 0 0.1 0.1 1 10 50 10 100 1k 10k 100k 1M 10M FREQUENCY (MHz) FREQUENCY (Hz) Figure 13. Low Distortion Rail-to-Rail Output Swing Figure 16. Input Current Noise vs. Frequency Rev. C | Page 9 of 20 OUTPUT VOLTAGE SWING (THD £ 0.5%) (V p-p) WORST HARMONIC (dBc) TOTAL HARMONIC DISTORTION (dBc) 02859-013 02859-012 02859-011 DIFFERENTIAL DIFFERENTIAL CURRENT NOISE (pA Hz) VOLTAGE NOISE (nA Hz) PHASE ERROR (Degrees) GAIN ERROR (%) 02859-016 02859-015 02859-014 AD8091/AD8092 –10 20 V = 5V V = 5V S S R = 2kΩ F 10 –20 R = 2kΩ L V = 2V p-p O 0 –30 –10 –40 –PSRR –20 –50 +PSRR –30 –60 –40 –70 –50 –80 –60 –90 –70 –100 –80 0.1 1 10 100 500 0.01 0.1 1 10 100 500 FREQUENCY (MHz) FREQUENCY (MHz) Figure 17. AD8092 Crosstalk (Output-to-Output) vs. Frequency Figure 20. PSRR vs. Frequency 0 70 V = 5V V = 5V S S –10 G = –1 60 = 2kΩ R L –20 50 –30 –40 40 –50 30 –60 –70 20 –80 10 –90 –100 0 0.03 0.1 1 10 100 500 0.5 1.0 1.5 2.0 FREQUENCY (MHz) INPUT STEPS (V p-p) Figure 18. CMRR vs. Frequency Figure 21. Settling Time vs. Input Step 100.000 1.0 V = 5V S V = 5V S V = +85°C OH G = +1 0.9 31.000 0.8 V = +25°C OH 10.000 0.7 V = –40°C OH 3.100 V = +85°C OL 0.6 1.000 0.5 0.4 0.310 0.3 V = +25°C OL 0.100 0.2 V = –40°C OL 0.031 0.1 0.010 0 0.1 1 10 100 500 0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 FREQUENCY (MHz) LOAD CURRENT (mA) Figure 19. Closed-Loop Output Resistance vs. Frequency Figure 22. Output Saturation Voltage vs. Load Current Rev. C | Page 10 of 20 OUTPUT RESISTANCE (Ω) CMRR (dB) CROSSTALK (dB) 02859-018 02859-017 02859-019 OUTPUT SATURATION VOLTAGE (V) SETTLING TIME TO 0.1% (ns) PSRR (dB) 02859-022 02859-021 02859-020 AD8091/AD8092 100 V = 5V S R = 2kΩ L G = +2 R = 2kΩ L V = 1V p-p IN 90 3.5V R = 150Ω L 2.5V 80 1.5V 70 V = 5V S 60 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 OUTPUT VOLTAGE (V) Figure 23. Open-Loop Gain vs. Output Voltage Figure 26. Large Signal Step Response; V = +5 V, G = +2 S V = 0.1V p-p V = 5V IN S G = +1 G = –1 R = 2kΩ R = 2kΩ L F V = 3V R = 2kΩ S L 5V 1.50V 2.5V 20mV 20ns 1V 2µs Figure 24. 100 mV Step Response; G = +1 Figure 27. Output Swing; G = −1, R = 2 kΩ L V = ±5V S V = 5V S 4V G = +1 G = +1 R = 2kΩ L R = 2kΩ L 3V 2.60V 2V 1V 2.50V –1V –2V 2.40V –3V –4V 1V 20ns 50mV 20ns Figure 25. 200 mV Step Response; V = +5 V, G = +1 Figure 28. Large Signal Step Response; V = ±5 V, G = +1 S S Rev. C | Page 11 of 20 OPEN-LOOP GAIN (dB) 02859-025 02859-024 02859-023 02859-026 02859-028 02859-027 AD8091/AD8092 LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS The lengths of the high frequency bypass capacitor leads are POWER SUPPLY BYPASSING most critical. A parasitic inductance in the bypass grounding Power supply pins are actually inputs, and care must be taken so works against the low impedance created by the bypass that a noise-free stable dc voltage is applied. The purpose of capacitor. Place the ground leads of the bypass capacitors at the bypass capacitors is to create low impedances from the supply same physical location. Because load currents flow from the to ground at all frequencies, thereby shunting or filtering a supplies as well, the ground for the load impedance should be at majority of the noise. the same physical location as the bypass capacitor grounds. For Decoupling schemes are designed to minimize the bypassing the larger value capacitors, which are intended to be effective at impedance at all frequencies with a parallel combination of lower frequencies, the current return path distance is less capacitors. Chip capacitors of 0.01 μF or 0.001 μF (X7R or critical. NPO) are critical and should be as close as possible to the INPUT CAPACITANCE amplifier package. Larger chip capacitors, such as the 0.1 μF Along with bypassing and ground, high speed amplifiers can capacitor, can be shared among a few closely spaced active be sensitive to parasitic capacitance between the inputs and components in the same signal path. A 10 μF tantalum ground. A few pF of capacitance reduces the input impedance capacitor is less critical for high frequency bypassing and, in at high frequencies, in turn increasing the amplifier’s gain and most cases, only one per board is needed at the supply inputs. causing peaking of the frequency response or even oscillations, GROUNDING if severe enough. It is recommended that the external passive A ground plane layer is important in densely packed PC boards components, which are connected to the input pins, be placed to spread the current-minimizing parasitic inductances. as close as possible to the inputs to avoid parasitic capacitance. However, an understanding of where the current flows in a The ground and power planes must be kept at a distance of at circuit is critical to implementing effective high speed circuit least 0.05 mm from the input pins on all layers of the board. design. The length of the current path is directly proportional to INPUT-TO-OUTPUT COUPLING the magnitude of parasitic inductances and thus the high The input and output signal traces should not be parallel to frequency impedance of the path. High speed currents in an minimize capacitive coupling between the inputs and output inductive ground return create an unwanted voltage noise. and to avoid any positive feedback. Rev. C | Page 12 of 20 AD8091/AD8092 DRIVING CAPACITIVE LOADS 10000 A highly capacitive load reacts with the output of the amplifiers, V = 5V S £30% causing a loss in phase margin and subsequent peaking or even OVERSHOOT oscillation, as shown in Figure 29 and Figure 30. There are two R = 3Ω S 1000 methods to effectively minimize its effect. • Put a small value resistor in series with the output to isolate R = 0Ω S the load capacitor from the amplifier’s output stage. 100 • Increase the phase margin with higher noise gains or by R R G F adding a pole with a parallel resistor and capacitor from −IN to the output. R 10 S V IN V OUT 100mV STEP 8 C 50Ω L 6 1 4 16 23 4 5 A (V/V) CL 2 Figure 31. Capacitive Load Drive vs. Closed-Loop Gain 0 OVERDRIVE RECOVERY –2 –4 Overdrive of an amplifier occurs when the output range and/or input range is exceeded. The amplifier must recover from this –6 V = 5V S overdrive condition. The AD8091/AD8092 recover within 60 ns –8 G = +1 R = 2kΩ from negative overdrive and within 45 ns from positive L –10 C = 50pF L overdrive, as shown in Figure 32. V = 200mV p-p O –12 0.1 110 100 500 V = ±5V S FREQUENCY (MHz) G = +5 R = 2kΩ F Figure 29. Closed-Loop Frequency Response: CL = 50 pF INPUT 1V/DIV R = 2kΩ L OUTPUT 2V/DIV V = 5V S G = +1 R = 2kΩ L C = 50pF L 2.60V 2.55V 2.50V 2.45V V/DIV AS SHOWN 100ns 2.40V Figure 32. Overdrive Recovery 50mV 100ns ACTIVE FILTERS Active filters at higher frequencies require wider bandwidth op Figure 30. 200 mV Step Response: CL = 50 pF amps to work effectively. Excessive phase shift produced by As the closed-loop gain is increased, the larger phase margin lower frequency op amps can significantly impact active filter allows for large capacitor loads with less peaking. Adding a low performance. value resistor in series with the load at lower gains has the same Figure 33 shows an example of a 2 MHz biquad bandwidth filter effect. Figure 31 shows the effect of a series resistor for various that uses three op amps. Such circuits are sometimes used in voltage gains. For large capacitive loads, the frequency response medical ultrasound systems to lower the noise bandwidth of the of the amplifier is dominated by the series resistor and capaci- analog signal before A/D conversion. Note that the unused tive load. amplifiers’ inputs should be tied to ground. Rev. C | Page 13 of 20 GAIN (dB) 02859-030 02859-029 CAPACITIVE LOAD (pF) 02859-032 02859-031 AD8091/AD8092 VIDEO WITHOUT SYNC VIDEO WITH SYNC C1 R6 50pF 1kΩ R2 R4 2kΩ C2 2kΩ R1 50pF V BLANK +0.4V GROUND 3kΩ 2 R3 V IN 2kΩ 1 6 R5 2kΩ GROUND 7 2 3 3V OR 5V 5 6 V OUT 3 AD8092 + AD8092 0.1µF 10µF AD8091 7 V IN 3 TO A/D Figure 33. 2 MHz Biquad Band-Pass Filter 6 AD8091 100Ω 2 The frequency response of the circuit is shown in Figure 34. 4 R2 0 1kΩ R1 1kΩ –10 +0.8V (OR 2 × V ) BLANK Figure 35. Sync Stripper –20 SINGLE-SUPPLY COMPOSITE VIDEO LINE DRIVER Many composite video signals have their blanking level at –30 ground and have video information that is both positive and negative. Such signals require dual-supply amplifiers to pass them. However, by ac level-shifting, a single-supply amplifier –40 can be used to pass these signals. The following complications 10k 100k 1M 10M 100M may arise from such techniques. FREQUENCY (Hz) Signals of bounded peak-to-peak amplitude that vary in duty Figure 34. Frequency Response of 2 MHz Band-Pass Biquad Filter cycle require larger dynamic swing capacity than their SYNC STRIPPER (bounded) peak-to-peak amplitude after they are ac-coupled. As a worst case, the dynamic signal swing approaches twice the Synchronizing pulses are sometimes carried on video signals so peak-to-peak value. One of two conditions that define the as not to require a separate channel to carry the synchronizing maximum dynamic swing requirements is a signal that is information. However, for some functions, such as A/D mostly low but goes high with a duty cycle that is a small conversion, it is not desirable to have the sync pulses on the fraction of a percent. The opposite condition defines the second video signal. These pulses reduce the dynamic range of the condition. video signal and do not provide any useful information for such a function. The worst case of composite video is not quite this demanding. One bounding condition is a signal that is mostly black for an A sync stripper removes the synchronizing pulses from a video entire frame but has a white (full amplitude) minimum width signal while passing all the useful video information. Figure 35 spike at least once in a frame. shows a practical single-supply circuit that uses only a single AD8091. It is capable of directly driving a reverse terminated The other extreme is a full white video signal. The blanking video line. intervals and sync tips of such a signal have negative-going excursions in compliance with the composite video The video signal plus sync is applied to the noninverting input specifications. The combination of horizontal and vertical with the proper termination. The amplifier gain is set equal to 2 blanking intervals limit such a signal to being at the highest via the two 1 kΩ resistors in the feedback circuit. A bias voltage (white) level for a maximum of about 75% of the time. must be applied to R1 for the input signal to have the sync pulses stripped at the proper level. As a result of the duty cycles between the two extremes, a 1 V p-p composite video signal that is multiplied by a gain of 2 The blanking level of the input video pulse is the desired place requires about 3.2 V p-p of dynamic voltage swing at the output to remove the sync information. The amplifier multiplies this for an op amp to pass a composite video signal of arbitrary level by 2. This level must be at ground at the output in order varying duty cycle without distortion. for the sync stripping action to take place. Because the gain of the amplifier from the input of R1 to the output is −1, a voltage equal to 2 × VBLANK must be applied to make the blanking level come out at ground. Rev. C | Page 14 of 20 GAIN (dB) 02859-034 02859-033 02859-035 AD8091/AD8092 Some circuits use a sync tip clamp to hold the sync tips at a The feedback circuit provides unity gain for the dc biasing of relatively constant level to lower the amount of dynamic signal the input and provides a gain of 2 for any signals that are in the swing required. However, these circuits can have artifacts like video bandwidth. The output is ac-coupled and terminated to drive the line. sync tip compression unless they are driven by a source with a very low output impedance. The AD8091/AD8092 have The capacitor values provide minimum tilt or field time adequate signal swing when running on a single 5 V supply to distortion of the video signal. These values are required for handle an ac-coupled composite video signal. video that is considered to be studio or broadcast quality. The input to the circuit shown in Figure 36 is a standard However, if a lower consumer grade of video, sometimes composite (1 V p-p) video signal that has the blanking level at referred to as consumer video, is all that is desired, the values ground. The input network level shifts the video signal by and the cost of the capacitors can be reduced by as much as a means of ac coupling. The noninverting input of the op amp is factor of 5 with minimum visible degradation in the picture. biased to half of the supply voltage. 5V 4.99kΩ + 4.99kΩ 10µF + 0.1µF 10µF 47µF 7 COMPOSITE + R BT 3 1000µF VIDEO IN 75Ω R + T 10kΩ 6 V AD8091 OUT 75Ω R L 2 75Ω 4 0.1µF R F 1kΩ R G 1kΩ 220µF Figure 36. Single-Supply Composite Video Line Driver Rev. C | Page 15 of 20 02859-036 AD8091/AD8092 OUTLINE DIMENSIONS 5.00 (0.1968) 3.20 4.80 (0.1890) 3.00 2.80 85 6.20 (0.2441) 4.00 (0.1574) 8 5 5.15 1 5.80 (0.2284) 3.80 (0.1497) 3.20 4 4.90 3.00 4.65 2.80 1 4 0.50 (0.0196) 1.27 (0.0500) 45° BSC 1.75 (0.0688) 0.25 (0.0099) PIN 1 1.35 (0.0532) 0.25 (0.0098) 8° 0.65 BSC 0.10 (0.0040) 0° 0.95 0.51 (0.0201) COPLANARITY 0.85 1.10 MAX 1.27 (0.0500) 0.10 0.31 (0.0122) 0.25 (0.0098) 0.75 SEATING 0.40 (0.0157) PLANE 0.17 (0.0067) 0.80 8° 0.15 0.38 0.60 0.23 0° 0.00 0.22 0.40 0.08 COMPLIANT TO JEDEC STANDARDS MS-012-AA SEATING COPLANARITY CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS PLANE 0.10 (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 37. 8-Lead Standard Small Outline Package [SOIC_N] Figure 38. 8-Lead Mini Small Outline Package [MSOP] Narrow Body (R-8) (RM-8) Dimensions shown in millimeters and (inches) Dimensions shown in millimeters 2.90 BSC 5 4 2.80 BSC 1.60 BSC 12 3 PIN 1 0.95 BSC 1.90 1.30 BSC 1.15 0.90 1.45 MAX 0.22 0.08 10° 0.15 MAX 5° 0.50 0.60 SEATING 0° 0.30 PLANE 0.45 0.30 COMPLIANT TO JEDEC STANDARDS MO-178-AA Figure 39. 5-Lead Small Outline Transistor Package [SOT-23] (RJ-5) Dimensions shown in millimeters Rev. C | Page 16 of 20 012407-A AD8091/AD8092 ORDERING GUIDE Model Temperature Range Package Description Package Option Branding AD8091AR −40°C to +85°C 8-Lead SOIC R-8 AD8091AR-REEL −40°C to +85°C 8-Lead SOIC, 13” Tape and Reel R-8 AD8091AR-REEL7 −40°C to +85°C 8-Lead SOIC, 7” Tape and Reel R-8 1 AD8091ARZ −40°C to +85°C 8-Lead SOIC R-8 1 AD8091ARZ-REEL −40°C to +85°C 8-Lead SOIC, 13” Tape and Reel R-8 1 AD8091ARZ-REEL7 −40°C to +85°C 8-Lead SOIC, 7” Tape and Reel R-8 AD8091ART-R2 −40°C to +85°C 5-Lead SOT-23 RJ-5 HVA AD8091ART-REEL −40°C to +85°C 5-Lead SOT-23, 13” Tape and Reel RJ-5 HVA AD8091ART-REEL7 −40°C to +85°C 5-Lead SOT-23, 7” Tape and Reel RJ-5 HVA 1 AD8091ARTZ-R2 −40°C to +85°C 5-Lead SOT-23 RJ-5 HVA# 1 AD8091ARTZ-R7 −40°C to +85°C 5-Lead SOT-23, 7” Tape and Reel RJ-5 HVA# 1 AD8091ARTZ-RL −40°C to +85°C 5-Lead SOT-23, 13” Tape and Reel RJ-5 HVA# AD8092AR −40°C to +85°C 8-Lead SOIC R-8 AD8092AR-REEL −40°C to +85°C 8-Lead SOIC, 13” Tape and Reel R-8 AD8092AR-REEL7 −40°C to +85°C 8-Lead SOIC, 7” Tape and Reel R-8 1 AD8092ARZ −40°C to +85°C 8-Lead SOIC R-8 1 AD8092ARZ-REEL −40°C to +85°C 8-Lead SOIC, 13” Tape and Reel R-8 1 AD8092ARZ-REEL7 −40°C to +85°C 8-Lead SOIC, 7” Tape and Reel R-8 AD8092ARM −40°C to +85°C 8-Lead MSOP RM-8 HWA AD8092ARM-REEL −40°C to +85°C 8-Lead MSOP, 13" Tape and Reel RM-8 HWA AD8092ARM-REEL7 −40°C to +85°C 8-Lead MSOP, 7" Tape and Reel RM-8 HWA 1 AD8092ARMZ −40°C to +85°C 8-Lead MSOP RM-8 HWA# 1 AD8092ARMZ-REEL −40°C to +85°C 8-Lead MSOP, 13" Tape and Reel RM-8 HWA# 1 AD8092ARMZ-REEL7 −40°C to +85°C 8-Lead MSOP, 7" Tape and Reel RM-8 HWA# 1 Z = RoHS Compliant Part. # denotes lead-free, may be top or bottom marked. Rev. C | Page 17 of 20 AD8091/AD8092 NOTES Rev. C | Page 18 of 20 AD8091/AD8092 NOTES Rev. C | Page 19 of 20 AD8091/AD8092 NOTES ©2002–2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D02859-0-9/07(C) Rev. C | Page 20 of 20