ANALOG DEVICES AD8008

Ultralow Distortion, High Speed Amplifiers AD8007/AD8008 FEATURES CONNECTION DIAGRAMS Extremely low distortion AD8007 NC 1 (Top View) 8 NC Second harmonic –IN 2 7 +V S −88 dBc @ 5 MHz −83 dBc @ 20 MHz (AD8007) +IN 3 6 V OUT −77 dBc @ 20 MHz (AD8008) –V 4 5 S NC Third harmonic −101 dBc @ 5 MHz NC = NO CONNECT −92 dBc @ 20 MHz (AD8007) Figure 1. 8-Lead SOIC (R) −98 dBc @ 20 MHz (AD8008) AD8007 High speed V OUT 1 5 +V (Top View) S 650 MHz, −3 dB bandwidth (G = +1) –V 2 S 1000 V/μs slew rate Low noise 3 4 +IN –IN 2.7 nV/√Hz input voltage noise Figure 2. 5-Lead SC70 (KS) 22.5 pA/√Hz input inverting current noise Low power: 9 mA/amplifier typical supply current AD8008 (Top View) Wide supply voltage range: 5 V to 12 V 1 8 V +V OUT1 S 0.5 mV typical input offset voltage V –IN127 OUT2 Small packaging: 8-lead SOIC, 8-lead MSOP, and 5-lead SC70 +IN136 –IN2 APPLICATIONS –V45 +IN2 S Instrumentation Figure 3. 8-Lead SOIC (R) and 8-Lead MSOP (RM) IF and baseband amplifiers Filters A/D drivers DAC buffers The AD8007 is available in a tiny SC70 package as well as a GENERAL DESCRIPTION standard 8-lead SOIC. The dual AD8008 is available in both an The AD8007 (single) and AD8008 (dual) are high performance 8-lead SOIC and an 8-lead MSOP. These amplifiers are rated to current feedback amplifiers with ultralow distortion and noise. work over the industrial temperature range of −40°C to +85°C. Unlike other high performance amplifiers, the low price and –30 low quiescent current allow these amplifiers to be used in a G = +2 R = 150Ω L wide range of applications. Analog Devices, Inc., proprietary –40 V = ±5V S V = 2V p-p second-generation eXtra-Fast Complementary Bipolar (XFCB) OUT –50 process enables such high performance amplifiers with low power consumption. –60 The AD8007/AD8008 have 650 MHz bandwidth, 2.7 nV/√Hz –70 voltage noise, −83 dB SFDR at 20 MHz (AD8007), and −77 dBc SECOND –80 SFDR at 20 MHz (AD8008). –90 With the wide supply voltage range (5 V to 12 V) and wide bandwidth, the AD8007/AD8008 are designed to work in a THIRD –100 variety of applications. The AD8007/AD8008 amplifiers have –110 a low power supply current of 9 mA/amplifier. 11 1000 FREQUENCY (MHz) Figure 4. AD8007 Second and Third Harmonic Distortion vs. Frequency Rev. E Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. rights of third parties that may result from its use. Specifications subject to change without notice. No Tel: 781.329.4700 www.analog.com license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Fax: 781.461.3113 ©2002–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. DISTORTION (dBc) 02866-002 02866-001 02866-003 02866-004 AD8007/AD8008 TABLE OF CONTENTS Features .............................................................................................. 1  Typical Performance Characteristics ..............................................7  Applications ....................................................................................... 1  Theory of Operation ...................................................................... 15  Connection Diagrams ...................................................................... 1  Using the AD8007/AD8008 ...................................................... 15  General Description ......................................................................... 1  Layout Considerations ............................................................... 16  Revision History ............................................................................... 2  Layout And Grounding Considerations ...................................... 17  Specif ica t ions ..................................................................................... 3  Grounding ................................................................................... 17  V = ±5 V ....................................................................................... 3  Input Capacitance ...................................................................... 17  S V = 5 V .......................................................................................... 4  Output Capacitance ................................................................... 17  S Absolute Maximum Ratings ............................................................ 6  Input-to-Output Coupling ........................................................ 17  Maximum Power Dissipation ......................................................... 6  External Components and Stability ......................................... 17  Output Short Circuit ........................................................................ 6  Outline Dimensions ....................................................................... 18  ESD Caution .................................................................................. 6  Ordering Guide .......................................................................... 19  REVISION HISTORY 11/09—Rev. D to Rev. E 9/02—Rev. A to Rev. B Change to Output Capacitance Section ....................................... 17 Updated Outline Dimensions ....................................................... 19 Updated Outline Dimensions ....................................................... 18 Changes to Ordering Guide .......................................................... 19 8/02—Rev. 0 to Rev. A Added AD8008 .................................................................. Universal Added SOIC-8 (RN) and MSOP-8 (RM) ...................................... 1 6/03—Rev. C to Rev. D Change to Layout Considerations Section .................................. 15 Changes to Features .......................................................................... 1 Deleted Figure 7 .............................................................................. 16 Changes to General Description .................................................... 1 Deleted Evaluation Board Section ................................................ 16 Changes to Specifications ................................................................ 2 Updated Outline Dimensions ....................................................... 16 Edits to Maximum Power Dissipation Section ............................. 4 New Figure 2 ..................................................................................... 4 10/02—Rev. B to Rev. C Changes to Ordering Guide ............................................................ 5 Connection Diagrams Captions Updated .................................... 1 New TPCs 19 to 24 and TPCs 27, 29, 30, and 35 .......................... 9 Ordering Guide Updated ................................................................ 5 Changes to Evaluation Board Section ......................................... 16 Figure 5 Edited ............................................................................... 14 MSOP-8 (RM) Added ................................................................... 19 Updated Outline Dimensions ....................................................... 19 Rev. E | Page 2 of 20 AD8007/AD8008 SPECIFICATIONS V = ±5 V S T = 25°C, R = 200 Ω, R = 150 Ω, R = 499 Ω, Gain = +2, unless otherwise noted. A S L F Table 1. AD8007/AD8008 Parameter Conditions Min Typ Max Unit DYNAMIC PERFORMANCE −3 dB Bandwidth G = +1, V = 0.2 V p-p, R = 1 kΩ 540 650 MHz O L G = +1, VO = 0.2 V p-p, RL = 150 Ω 250 500 MHz G = +2, VO = 0.2 V p-p, RL = 150 Ω 180 230 MHz G = +1, VO = 2 V p-p, RL = 1 kΩ 200 235 MHz Bandwidth for 0.1 dB Flatness V = 0.2 V p-p, G = +2, R = 150 Ω 50 90 MHz O L Overdrive Recovery Time ±2.5 V input step, G = +2, R = 1 kΩ 30 ns L Slew Rate G = +1, V = 2 V step 900 1000 V/μs O Settling Time to 0.1% G = +2, VO = 2 V step 18 ns Settling Time to 0.01% G = +2, VO = 2 V step 35 ns NOISE/HARMONIC PERFORMANCE Second Harmonic fC = 5 MHz, VO = 2 V p-p −88 dBc fC = 20 MHz, VO = 2 V p-p −83/−77 dBc Third Harmonic fC = 5 MHz, VO = 2 V p-p −101 dBc IMD f = 20 MHz, V = 2 V p-p −92/−98 dBc C O f = 19.5 MHz to 20.5 MHz, R = 1 kΩ, V = 2 V p-p −77 dBc C L O Third-Order Intercept fC = 5 MHz, RL = 1 kΩ 43.0/42.5 dBm fC = 20 MHz, RL = 1 kΩ 42.5 dBm Crosstalk (AD8008) f = 5 MHz, G = +2 −68 dB Input Voltage Noise f = 100 kHz 2.7 nV/√Hz Input Current Noise −Input, f = 100 kHz 22.5 pA/√Hz +Input, f = 100 kHz 2 pA/√Hz Differential Gain Error NTSC, G = +2, RL = 150 Ω 0.015 % Differential Phase Error NTSC, G = +2, RL = 150 Ω 0.010 Degree DC PERFORMANCE Input Offset Voltage 0.5 4 mV Input Offset Voltage Drift 3 μV/°C Input Bias Current +Input 4 8 μA −Input 0.4 6 μA Input Bias Current Drift +Input 16 nA/°C −Input 9 nA/°C Transimpedance V = ±2.5 V, R = 1 kΩ 1.0 1.5 MΩ O L R = 150 Ω 0.4 0.8 MΩ L INPUT CHARACTERISTICS Input Resistance +Input 4 MΩ Input Capacitance +Input 1 pF Input Common-Mode Voltage Range −3.9 to +3.9 V Common-Mode Rejection Ratio VCM = ±2.5 V 56 59 dB OUTPUT CHARACTERISTICS Output Saturation Voltage VCC − VOH, VOL − VEE, RL = 1 kΩ 1.1 1.2 V Short-Circuit Current, Source 130 mA Short-Circuit Current, Sink 90 mA Capacitive Load Drive 30% overshoot 8 pF Rev. E | Page 3 of 20 AD8007/AD8008 AD8007/AD8008 Parameter Conditions Min Typ Max Unit POWER SUPPLY Operating Range 5 12 V Quiescent Current per Amplifier 9 10.2 mA Power Supply Rejection Ratio +PSRR 59 64 dB −PSRR 59 65 dB V = 5 V S T = 25°C, R = 200 Ω, R = 150 Ω, R = 499 Ω, Gain = +2, unless otherwise noted. A S L F Table 2. AD8007/AD8008 Unit Parameter Conditions Min Typ Max DYNAMIC PERFORMANCE −3 dB Bandwidth G = +1, V = 0.2 V p-p, R = 1 kΩ 520 580 MHz O L G = +1, V = 0.2 V p-p, R = 150 Ω 350 490 MHz O L G = +2, VO = 0.2 V p-p, RL = 150 Ω 190 260 MHz G = +1, VO = 1 V p-p, RL = 1 kΩ 270 320 MHz Bandwidth for 0.1 dB Flatness V = 0.2 V p-p, G = +2, R = 150 Ω 72 120 MHz O L Overdrive Recovery Time 2.5 V input step, G = +2, R = 1 kΩ 30 ns L Slew Rate G = +1, V = 2 V step 665 740 V/μs O Settling Time to 0.1% G = +2, VO = 2 V step 18 ns Settling Time to 0.01% G = +2, VO = 2 V step 35 ns NOISE/HARMONIC PERFORMANCE Second Harmonic fC = 5 MHz, VO = 1 V p-p −96/−95 dBc fC = 20 MHz, VO = 1 V p-p −83/−80 dBc Third Harmonic fC = 5 MHz, VO = 1 V p-p −100 dBc f = 20 MHz, V = 1 V p-p −85/−88 dBc C O IMD f = 19.5 MHz to 20.5 MHz, R = 1 kΩ, −89/−87 dBc C L VO = 1 V p-p Third-Order Intercept fC = 5 MHz, RL = 1 kΩ 43.0 dBm fC = 20 MHz, RL = 1 kΩ 42.5/41.5 dBm Crosstalk (AD8008) Output-to-output, f = 5 MHz, G = +2 −68 dB Input Voltage Noise f = 100 kHz 2.7 nV/√Hz Input Current Noise −Input, f = 100 kHz 22.5 pA/√Hz +Input, f = 100 kHz 2 pA/√Hz DC PERFORMANCE Input Offset Voltage 0.5 4 mV Input Offset Voltage Drift 3 μV/°C Input Bias Current +Input 4 8 μA −Input 0.7 6 μA Input Bias Current Drift +Input 15 nA/°C −Input 8 nA/°C Transimpedance VO = 1.5 V to 3.5 V, RL = 1 kΩ 0.5 1.3 MΩ RL = 150 Ω 0.4 0.6 MΩ INPUT CHARACTERISTICS Input Resistance +Input 4 MΩ Input Capacitance +Input 1 pF Input Common-Mode Voltage Range 1.1 to 3.9 V Common-Mode Rejection Ratio V = 1.75 V to 3.25 V 54 56 dB CM Rev. E | Page 4 of 20 AD8007/AD8008 AD8007/AD8008 Unit Parameter Conditions Min Typ Max OUTPUT CHARACTERISTICS Output Saturation Voltage V − V , V − V , R = 1 kΩ 1.05 1.15 V CC OH OL EE L Short-Circuit Current, Source 70 mA Short-Circuit Current, Sink 50 mA Capacitive Load Drive 30% overshoot 8 pF POWER SUPPLY Operating Range 5 12 V Quiescent Current per Amplifier 8.1 9 mA Power Supply Rejection Ratio +PSRR 59 62 dB −PSRR 59 63 dB Rev. E | Page 5 of 20 AD8007/AD8008 ABSOLUTE MAXIMUM RATINGS RMS output voltages should be considered. If RL is referenced to Table 3. VS, as in single-supply operation, then the total drive power is Parameter Rating VS × IOUT. Supply Voltage 12.6 V If the rms signal levels are indeterminate, then consider the Power Dissipation See Figure 5 worst case, when VOUT = VS/4 for RL to midsupply Common-Mode Input Voltage ±V S 2 Differential Input Voltage ±1.0 V V ⎛ ⎞ S ⎜ ⎟ Output Short-Circuit Duration See Figure 5 4 ⎝ ⎠ P = (V × I )+ D S S Storage Temperature Range −65°C to +125°C R L Operating Temperature Range −40°C to +85°C In single-supply operation, with R referenced to V , worst case is L S Lead Temperature (Soldering, 10 sec) 300°C V = V /2. OUT S Stresses above those listed under Absolute Maximum Ratings Airflow increases heat dissipation, effectively reducing θ . In JA may cause permanent damage to the device. This is a stress addition, more metal directly in contact with the package leads rating only; functional operation of the device at these or any from metal traces, through-holes, ground, and power planes other conditions above those indicated in the operational reduces the θJA. Care must be taken to minimize parasitic section of this specification is not implied. Exposure to absolute capacitances at the input leads of high speed op amps, see the maximum rating conditions for extended periods may affect Layout Considerations section. device reliability. Figure 5 shows the maximum safe power dissipation in the MAXIMUM POWER DISSIPATION package vs. the ambient temperature for the SOIC-8 (125°C/W), The maximum safe power dissipation in the AD8007/AD8008 MSOP-8 (150°C/W), and SC70-5 (210°C/W) packages on a packages is limited by the associated rise in junction temperature JEDEC standard 4-layer board. θJA values are approximations. (TJ) on the die. The plastic encapsulating the die locally reaches 2.0 the junction temperature. At approximately 150°C, which is the glass transition temperature, the plastic changes its properties. Even temporarily exceeding this temperature limit can change 1.5 MSOP-8 the stresses that the package exerts on the die, permanently shifting the parametric performance of the AD8007/AD8008. SOIC-8 Exceeding a junction temperature of 175°C for an extended 1.0 time can result in changes in the silicon devices, potentially causing failure. SC70-5 0.5 The still-air thermal properties of the package and PCB (θJA), ambient temperature (T ), and the total power dissipated in the A package (P ) determine the junction temperature of the die. D 0 The junction temperature can be calculated as –60 –40 –20 0 20 40 60 80 100 AMBIENT TEMPERATURE (°C) T = T + (P × θ ) J A D JA Figure 5. Maximum Power Dissipation vs. Temperature for a 4-Layer Board The power dissipated in the package (PD) is the sum of the OUTPUT SHORT CIRCUIT quiescent power dissipation and the power dissipated in the package due to the load drive for all outputs. The quiescent Shorting the output to ground or drawing excessive current for power is the voltage between the supply pins (VS) times the the AD8007/AD8008 will likely cause catastrophic failure. quiescent current (I ). Assuming the load (R ) is referenced to S L ESD CAUTION midsupply, the total drive power is V /2 × I , some of which is S OUT dissipated in the package and some in the load (V × I ). OUT OUT The difference between the total drive power and the load power is the drive power dissipated in the package. PD = Quiescent Power + (Total Drive Power − Load Power) 2 ⎛ V V ⎞ V S OUT OUT ⎜ ⎟ P = (V × I )+ × − D S S ⎜ ⎟ 2 R R L ⎠ L ⎝ Rev. E | Page 6 of 20 MAXIMUM POWER DISSIPATION (W) 02866-005 AD8007/AD8008 TYPICAL PERFORMANCE CHARACTERISTICS VS = ±5 V, RL = 150 Ω, RS = 200 Ω, RF = 499 Ω, unless otherwise noted. 3 6.4 G = +2 2 6.3 1 G = +1 6.2 0 6.1 G = +2 –1 6.0 V = +5V S –2 5.9 –3 5.8 V = ±5V S –4 5.7 G = +10 –5 5.6 G = –1 –6 5.5 –7 5.4 1 10 100 1000 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 6. Small Signal Frequency Response for Various Gains Figure 9. 0.1 dB Gain Flatness; VS = +5, VS = ±5 V 3 9 G = +1 G = +2 2 8 1 7 R = 1kΩ, V = ±5V L S R = 1kΩ, V = +5V L S 0 6 –1 5 R = 150kΩ, R = 150kΩ, V = ±5V L L S –2 4 V = +5V S –3 3 R = 150kΩ, V = ±5V L S –4 2 R = 150kΩ, V = 5V –5 1 R = 1kΩ, V = ±5V L S L S –6 0 –7 –1 10 100 1000 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 7. Small Signal Frequency Response for V and R Figure 10. Small Signal Frequency Response for V and R S L S L 3 9 G = +2 G = +1 8 R = R = 324Ω 2 F G R = 1kΩ L 1 7 R = 200Ω S R = R = 249Ω F G 6 0 5 –1 4 –2 R = 301Ω S R = R = 499Ω –3 3 F G R = 249Ω S –4 2 R = R = 649Ω 1 –5 F G 0 –6 –1 –7 10 100 1000 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 8. Small Signal Frequency Response for Various R Values Figure 11. Small Signal Frequency Response for Various Feedback Resistors, S R = R F G Rev. E | Page 7 of 20 GAIN (dB) GAIN (dB) NORMALIZED GAIN (dB) 02866-008 02866-007 02866-006 GAIN (dB) GAIN (dB) GAIN (dB) 02866-011 02866-010 02866-009 AD8007/AD8008 10 10M 90 G = +2 20pF 20pF AND 9 10Ω SNUB 1M 30 20pF AND TRANSIMPEDANCE 8 20Ω SNUB 0 100k –30 7 PHASE 6 10k –90 5 1k –150 499Ω 4 –180 499Ω 0pF R 3 SNUB 100 –210 200Ω 2 C LOAD 49.9Ω 10 –270 1 1 –330 0 1M 1 10 100 1000 10k 100k 10M 100M 1G 2G FREQUENCY (MHz) FREQUENCY (Hz) Figure 12. Small Signal Frequency Response for Figure 15. Transimpedance and Phase vs. Frequency Capacitive Load and Snub Resistor 3 9 V = +5V, +85°C S G = +1 G = +2 2 8 = ±5V, +85°C V S 1 7 V = +5V, +85°C S 0 6 V = ±5V, +85°C S –1 5 V = +5V, –40°C S V = +5V, –40°C S –2 4 V = ±5V, –40°C S –3 3 V = ±5V, –40°C S –4 2 –5 1 –6 0 –7 –1 10 100 1000 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 13. Small Signal Frequency Response over Temperature, Figure 16. Small Signal Frequency Response over Temperature, VS = +5 V, VS = ±5 V V = +5 V, V = ±5 V S S 3 9 V = 2V p-p G = +2 OUT 2 8 G = +1 G = +2 1 7 0 6 –1 5 G = +10 –2 4 R = 150Ω,V = ±5V, V = 2V p-p G = –1 L S O –3 3 R = 1kΩ,V = ±5V, V = 2V p-p L S O –4 2 R = 150Ω,V = +5V, V = 1V p-p L S O –5 1 R = 1kΩ,V = +5V, V = 1V p-p L S O –6 0 –7 –1 1 10 100 1000 10 100 1000 FREQUENCY (MHz) FREQUENCY (MHz) Figure 14. Large Signal Frequency Response for Various Gains Figure 17. Large Signal Frequency Response for VS and RL Rev. E | Page 8 of 20 NORMALIZED GAIN (dB) GAIN (dB) GAIN (dB) 02866-012 02866-014 02866-013 TRANSIMPEDANCE (Ω) GAIN (dB) GAIN (dB) 02866-017 02866-016 PHASE (Degrees) 02866-015 AD8007/AD8008 –40 –40 G = +2 G = +1 V = 5V S V = 5V S HD2, R = 150Ω L V = 1V p-p –50 O V = 1V p-p –50 O HD3, R = 150Ω L HD2, R = 1kΩ –60 L –60 HD2, R = 1kΩ L –70 –70 HD2, R = 150Ω L HD3, R = 1kΩ L –80 –80 –90 –90 HD3, R = 150Ω L –100 –100 HD3, R = 1kΩ L –110 –110 1 10 100 1 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 21. AD8007 Second and Third Harmonic Distortion vs. Frequency and RL Figure 18. AD8007 Second and Third Harmonic Distortion vs. Frequency and RL –40 –40 G = +2 G = +1 V = ±5V S V = ±5V S –50 V = 2V p-p –50 V = 2V p-p O O –60 –60 HD2, R = 1kΩ L HD2, R = 150Ω –70 L –70 HD2, R = 150Ω L –80 –80 HD2, R = 1kΩ L HD3, R = 150Ω L –90 HD3, R = 150Ω –90 L HD3, R = 1kΩ –100 L –100 HD3, R = 1kΩ L –110 –110 1 10 100 1 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 22. AD8007 Second and Third Harmonic Distortion vs. Frequency and R L Figure 19. AD8007 Second and Third Harmonic Distortion vs. Frequency and RL –30 –30 G = +2 V = ±5V S V = ±5V V = 2V p-p S O –40 –40 R = 150Ω R = 150Ω L L HD3, V = 4V p-p HD2, G = +10 –50 O –50 HD2, V = 4V p-p –60 O –60 HD3, G = +10 –70 –70 HD2, V = 2V p-p O –80 –80 HD3, G = +1 –90 –90 HD2, G = +1 HD3, V = 2V p-p –100 O –100 –110 –110 1 10 100 1 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 20. AD8007 Second and Third Harmonic Distortion vs. Frequency and Gain Figure 23. AD8007 Second and Third Harmonic Distortion vs. Frequency and V O Rev. E | Page 9 of 20 DISTORTION (dBc) DISTORTION (dBc) DISTORTION (dBc) 02866-020 02866-019 02866-018 DISTORTION (dBc) DISTORTION (dBc) DISTORTION (dBc) 02866-023 02866-021 02866-022 AD8007/AD8008 V = ±5 V, R = 200 Ω, R = 499 Ω, R = 150 Ω, @ 25°C, unless otherwise noted. S S F L –40 –40 G = 1 G = 2 V = 5V V = 5V S S –50 –50 V = 1V p-p O V = 1V p-p O –60 –60 HD2, R = 150Ω HD2, R = 150Ω L L –70 –70 HD2, R = 1kΩ HD2, R = 1kΩ L L –80 –80 –90 –90 HD3, R = 1kΩ HD3, R = 1kΩ L L –100 –100 HD3, R = 150Ω HD3, R = 150Ω L L –110 –110 1 10 100 1 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 27. AD8008 Second and Third Harmonic Distortion vs. Frequency and R L Figure 24. AD8008 Second and Third Harmonic Distortion vs. Frequency and RL –40 –40 G = 2 G = 1 V = ±5V S VS = 5V –50 V = 2V p-p –50 O VO = 1V p-p –60 HD2, R = 1kΩ –60 L –70 –70 HD2, R = 150Ω HD2, R = 150Ω L L –80 –80 HD2, R = 1kΩ L –90 –90 HD3, R = 1kΩ L –100 –100 HD3, R = 1kΩ HD3, R = 150Ω L L HD3, R = 150Ω L –110 –110 1 10 100 1 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 28. AD8008 Second and Third Harmonic Distortion vs. Frequency and RL Figure 25. AD8008 Second and Third Harmonic Distortion vs. Frequency and RL –30 –30 G = 2 V = ±5V S R = 150Ω V = 2V p-p O L –40 –40 V = ±5V R = 150Ω L S –50 –50 HD2, G = 10 –60 –60 HD2, V = 4V p-p O –70 –70 HD2, V = 2V p-p O –80 –80 HD2, G = 1 –90 –90 HD3, V = 4V p-p O –100 –100 HD3, G = 10 HD3, V = 2V p-p O HD3, G = 1 –110 –110 1 10 100 1 10 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 26. AD8008 Second and Third Harmonic Distortion vs. Frequency and Gain Figure 29. AD8008 Second and Third Harmonic Distortion vs. Frequency and V O Rev. E | Page 10 of 20 DISTORTION (dBc) DISTORTION (dBc) DISTORTION (dBc) 02866-026 02866-024 02866-025 DISTORTION (dBc) DISTORTION (dBc) DISTORTION (dBc) 02866-028 02866-029 02866-027 AD8007/AD8008 –60 –65 G = +2 G = +2 HD3, R = 1kΩ HD3, R = 1kΩ V = 5V L L S V = ±5V S –70 F = 20MHz O F = 20MHz O –65 –75 HD2, R = 1kΩ HD2, R = 150Ω L L –70 –80 –85 HD3, R = 150Ω L –75 HD2, R = 1kΩ L –90 HD3, R = 150Ω –80 –95 L HD2, R = 150Ω L –100 –85 –105 –90 –110 1.0 1.5 2.0 2.5 1 2 34 56 V (V p-p) V (V p-p) OUT OUT Figure 30. AD8007 Second and Third Harmonic Distortion vs. VOUT and RL Figure 33. AD8007 Second and Third Harmonic Distortion vs. VOUT and RL 44 44 G = +2 G = +2 V = ±5V V = ±5V S S 43 43 V = 2V p-p V = 2V p-p O O R = 1kΩ R = 1kΩ L L 42 42 41 41 40 40 39 39 38 38 37 37 36 36 35 35 5 10 15 20 25 30 35 40 45 50 55 60 65 70 5 10 15 20 25 30 35 40 45 50 55 60 65 70 FREQUENCY (MHz) FREQUENCY (MHz) Figure 31. AD8007 Third-Order Intercept vs. Frequency Figure 34. AD8008 Third-Order Intercept vs. Frequency –65 –65 G = +2 HD2, R = 1kΩ L V = 5V S –70 F = 20MHz HD2, R = 150Ω O L HD2, R = 150Ω L –70 –75 HD2, R = 1kΩ L –80 –75 HD3, R = 150Ω L –85 HD3, R = 1kΩ L –90 –80 HD3, R = 150Ω L –95 HD3, R = 1kΩ L –100 –85 G = +2 –105 V = 5V S F = 20MHz O –90 –110 1.0 1.5 2.0 2.5 1 2 34 5 6 V (V p-p) V (V p-p) OUT OUT Figure 32. AD8008 Second and Third Harmonic Distortion vs. V and R OUT L Figure 35. AD8008 Second and Third Harmonic Distortion vs. V and R OUT L Rev. E | Page 11 of 20 DISTORTION (dBc) DISTORTION (dBc) THIRD ORDER INTERCEPT (dBm) 02866-031 02866-030 02866-032 DISTORTION (dBc) THIRD-ORDER INTERCEPT (dBm) DISTORTION (dBc) 02866-034 02866-033 02866-035 AD8007/AD8008 V = ±5 V, R = 150 Ω, R = 200 Ω, R = 499 Ω, unless otherwise noted. S L S F 100 1000 100 INVERTING CURRENT NOISE 22.5pA/ Hz 10 2.7nV/ Hz 10 NONINVERTING CURRENT NOISE 2.0pA/ Hz 1 1 10 100 1k 10k 100k 1M 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) FREQUENCY (Hz) Figure 36. Input Voltage Noise vs. Frequency Figure 39. Input Current Noise vs. Frequency 1k –20 G = +2 G = +2 R = 150Ω –30 V = ±5V S V = 1V p-p 100 M –40 SIDE B DRIVEN –50 10 –60 1 SIDE A DRIVEN –70 –80 0.1 –90 0.01 –100 11 00k M 10M 100M 1G 100k 1M 10M 100M 1G FREQUENCY (Hz) FREQUENCY (Hz) Figure 37. Output Impedance vs. Frequency Figure 40. AD8008 Crosstalk vs. Frequency (Output to Output) 0 20 V = ±5V, +5V S 10 –10 0 –20 –10 –20 –30 –30 +PSRR –40 –40 –50 –50 –60 –PSRR –60 –70 –70 –80 100k 1M 10M 100M 1G 10k 100k 1M 10M 100M 1G FREQUENCY (Hz) FREQUENCY (Hz) Figure 38. CMRR vs. Frequency Figure 41. PSRR vs. Frequency Rev. E | Page 12 of 20 OUTPUT IMPEDANCE (Ω) CMRR (dB) VOLTAGE NOISE (nV/ Hz) 02866-038 02866-036 02866-037 CROSSTALK (dB) PSRR (dB) CURRENT NOISE (pA/ Hz) 02866-041 02866-039 02866-040 AD8007/AD8008 G = +2 R = 150Ω,V = +5V AND ±5V G = +1 L S R = 150Ω,V = +5V AND ±5V L S R = 150Ω,V = +5V AND ±5V R = 1kΩ,V = +5V AND ±5V L S L S 50mV/DIV 50mV/DIV 010 20 30 40 50 20 30 40 50 010 TIME (ns) TIME (ns) Figure 45. Small Signal Transient Response for Figure 42. Small Signal Transient Response for R = 150 Ω, R = 1 kΩ and V = +5 V, V = ±5 V L L S S RL = 150 Ω, RL = 1 kΩ and VS = +5 V, VS = ±5 V G = +1 G = –1 R = 150Ω L INPUT R = 1kΩ L OUTPUT 1V/DIV 1V/DIV 010 20 30 40 50 0 1020 30 4050 TIME (ns) TIME (ns) Figure 46. Large Signal Transient Response, G = −1, R = 150 Ω Figure 43. Large Signal Transient Response for RL = 150 Ω, RL = 1 kΩ L G = +2 G = +2 C = 0pF C = 0pF L LOAD C = 20pF L C = 10pF C = 20pF L LOAD R = 10Ω SNUB C = 20pF LOAD 499Ω 499Ω R – SNUB 200Ω + C LOAD 49.9Ω 50mV/DIV 1V/DIV 0 10 20 30 40 50 010 20 30 40 50 TIME (ns) TIME (ns) Figure 44. Large Signal Transient Response for Figure 47. Small Signal Transient Response, Effect of Series Snub Resistor C = 0 pF, C = 10 pF, and C = 20 pF when Driving Capacitive Load LOAD LOAD LOAD Rev. E | Page 13 of 20 02866-044 02866-043 02866-042 02866-047 02866-046 02866-045 AD8007/AD8008 4 G = +2 G = +10 3 V = ±5V +V S S V = ±0.75V IN R = 1kΩ L 2 R = 150Ω 1 L 0 –1 OUTPUT (2V/DIV) INPUT (1V/DIV) –V –2 S –3 0 100 200 300 400 500 TIME (ns) –4 0 200 400 600 800 1000 Figure 48. Output Overdrive Recovery, R = 1 kΩ, 150 Ω, V = ±2.5 V L IN R (Ω) L Figure 50. VOUT Swing vs. RL, VS = ±5 V, G = +10, VIN = ±0.75 V 0.5 G = +2 0.4 0.3 0.2 0.1 0 –0.1 18ns –0.2 –0.3 –0.4 –0.5 0 5 10 15 20 2530 3540 45 TIME (ns) Figure 49. 0.1% Settling Time, 2 V Step Rev. E | Page 14 of 20 SETTLING TIME (%) 02866-048 02866-049 V (V) OUT 02866-050 AD8007/AD8008 THEORY OF OPERATION USING THE AD8007/AD8008 The AD8007 (single) and AD8008 (dual) are current feedback Supply Decoupling for Low Distortion amplifiers optimized for low distortion performance. A simplified conceptual diagram of the AD8007 is shown in Figure 51. It Decoupling for low distortion performance requires careful closely resembles a classic current feedback amplifier comprised consideration. The commonly adopted practice of returning the of a complementary emitter-follower input stage, a pair of signal high frequency supply decoupling capacitors to physically separate mirrors, and a diamond output stage. However, in the case of (and possibly distant) grounds can lead to degraded even-order the AD8007/AD8008, several modifications were made to improve harmonic performance. This situation is shown in Figure 52 using the distortion performance over that of a classic current feedback the AD8007 as an example; however, it is not recommended. For a topology. sinusoidal input, each decoupling capacitor returns to its ground a +V quasi-rectified current carrying high even-order harmonics. S M1 R F – I 3 499Ω I – 1 GND 1 C 1 Q5 J 0.1µF 10µF +V S Q1 Q3 + +V D1 S R HIGH-Z I G IN– DO IN+ I DI 499Ω OUT D2 R S OUT Q2 Q4 AD8007 –V S 200Ω IN C 2 J Q6 –V S I – 2 0.1µF 10µF – I 4 + M2 –V S GND 2 R F Figure 52. High Frequency Capacitors Returned to Physically Separate Grounds (Not Recommended) R G The decoupling scheme shown in Figure 53 is recommended. Figure 51. Simplified Schematic of AD8007 In Figure 53, the two high frequency decoupling capacitors are first tied together at a common node and are then returned to The signal mirrors were replaced with low distortion, high the ground plane through a single connection. By first adding precision mirrors. In Figure 51, they are shown as M1 and M2. the two currents flowing through each high frequency decoupling Their primary function from a distortion standpoint is to reduce capacitor, this ensures that the current returned into the ground the effect of highly nonlinear distortion caused by capacitances, plane is only at the fundamental frequency. CJ1 and CJ2. These capacitors represent the collector-to-base R F capacitances of the output devices of the mirrors. 499Ω A voltage imbalance arises across the output stage, as measured from the high impedance node, high-Z, to the output node, OUT. This imbalance is a result of delivering high output currents and 10µF + is the primary cause of output distortion. Circuitry is included +V S R G to sense this output voltage imbalance and generate a compensating 499Ω 0.1µF current, I . When injected into the circuit, I reduces the DO DO R S AD8007 OUT distortion that could be generated at the output stage. Similarly, the 200Ω IN 0.1µF nonlinear voltage imbalance across the input stage (measured from –V S the noninverting to the inverting input) is sensed, and a current, 10µF IDI, is injected to compensate for input-generated distortion. + The design and layout are strictly top-to-bottom symmetric to Figure 53. High Frequency Capacitors Returned to Ground at a Single Point minimize the presence of even-order harmonics. (Recommended) Rev. E | Page 15 of 20 02866-051 02866-053 02866-052 AD8007/AD8008 Whenever physical layout considerations prevent the decoupling LAYOUT CONSIDERATIONS scheme shown in Figure 53, the user can connect one of the The standard noninverting configuration with recommended high frequency decoupling capacitors directly across the supplies power supply bypassing is shown in Figure 54. The 0.1 μF high and connect the other high frequency decoupling capacitor to frequency decoupling capacitors should be X7R or NPO chip ground (see Figure 54). components. Connect C2 from the +V pin to the −V pin. S S R F Connect C1 from the +V pin to signal ground. S 499Ω The length of the high frequency bypass capacitor leads is critical. 10µF Parasitic inductance due to long leads works against the low + +V S impedance created by the bypass capacitor. The ground for the C1 0.1µF load impedance should be at the same physical location as the R G bypass capacitor grounds. For larger value capacitors, which are 499Ω intended to be effective at lower frequencies, the current return R S AD8007 OUT path distance is less critical. 200Ω IN C2 0.1µF –V S 10µF + Figure 54. High Frequency Capacitors Connected Across the Supplies (Recommended) Rev. E | Page 16 of 20 02866-054 AD8007/AD8008 LAYOUT AND GROUNDING CONSIDERATIONS EXTERNAL COMPONENTS AND STABILITY GROUNDING The AD8007/AD8008 are current feedback amplifiers and, to a A ground plane layer is important in densely packed printed first order, the feedback resistor determines the bandwidth and circuit boards (PCB) to minimize parasitic inductances. However, stability. The gain, load impedance, supply voltage, and input an understanding of where the current flows in a circuit is critical impedances also have an effect. to implementing effective high speed circuit design. The length of the current path is directly proportional to the magnitude of Figure 11 shows the effect of changing RF on the bandwidth and parasitic inductances and thus the high frequency impedance of peaking for a gain of 2. Increasing RF reduces peaking but also the path. High speed currents in an inductive ground return reduces bandwidth. Figure 6 shows that for a given RF increasing create unwanted voltage noise. Broad ground plane areas reduce the gain also reduces peaking and bandwidth. Table 4 shows the parasitic inductance. recommended R and R values that optimize bandwidth with F G minimal peaking. INPUT CAPACITANCE Along with bypassing and ground, high speed amplifiers can be Table 4. Recommended Component Values sensitive to parasitic capacitance between the inputs and ground. Gain R (Ω) R (Ω) R (Ω) F G S Even 1 pF or 2 pF of capacitance reduces the input impedance at −1 499 499 200 high frequencies, in turn increasing the gain of the amplifier, which +1 499 Not applicable 200 causes peaking of the frequency response or even oscillations if +2 499 499 200 severe enough. Place the external passive components that are +5 499 124 200 connected to the input pins as close as possible to the inputs to +10 499 54.9 200 avoid parasitic capacitance. The ground and power planes must The load resistor also affects bandwidth, as shown in Figure 7 and be kept at a distance of at least 0.05 mm from the input pins on Figure 10. A comparison between Figure 7 and Figure 10 also all layers of the board. demonstrates the effect of gain and supply voltage. OUTPUT CAPACITANCE When driving loads with a capacitive component, stability To a lesser extent, parasitic capacitances on the output can cause improves by using a series snub resistor, RSNUB, at the output. peaking of the frequency response. The following two methods The frequency and pulse responses for various capacitive minimize its effect: loads are illustrated in Figure 12 and Figure 47, respectively. • Put a small value resistor in series with the output to isolate For noninverting configurations, a resistor in series with the the load capacitance from the output stage of the amplifier input, R , is needed to optimize stability for a gain of 1, as S (see Figure 12). illustrated in Figure 8. For larger noninverting gains, the effect • Increase the phase margin by increasing the gain of the of a series resistor is reduced. amplifier or by increasing the value of the feedback resistor. INPUT-TO-OUTPUT COUPLING To minimize capacitive coupling, the input and output signal traces should not be parallel. When they are not parallel, they help reduce unwanted positive feedback. Rev. E | Page 17 of 20 AD8007/AD8008 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 85 6.20 (0.2441) 4.00 (0.1574) 1 5.80 (0.2284) 3.80 (0.1497) 4 0.50 (0.0196) 1.27 (0.0500) 45° BSC 1.75 (0.0688) 0.25 (0.0099) 1.35 (0.0532) 0.25 (0.0098) 8° 0.10 (0.0040) 0° 0.51 (0.0201) COPLANARITY 1.27 (0.0500) 0.10 0.31 (0.0122) 0.25 (0.0098) SEATING 0.40 (0.0157) PLANE 0.17 (0.0067) COMPLIANT TO JEDEC STANDARDS MS-012-AA CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. Figure 55. 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body (R-8) Dimensions shown in millimeters and (inches) 3.20 3.00 2.80 8 5 5.15 3.20 4.90 3.00 4.65 1 2.80 4 PIN 1 IDENTIFIER 0.65 BSC 0.95 15° MAX 0.85 1.10 MAX 0.75 0.70 0.15 0.23 6° 0.55 0.40 0.05 0.13 0° 0.40 0.25 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 56. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters Rev. E | Page 18 of 20 091709-A 012407-A AD8007/AD8008 2.20 2.00 1.80 2.40 1.35 5 4 2.10 1.25 1.80 1.15 12 3 0.65 BSC 1.00 0.40 1.10 0.90 0.10 0.80 0.70 0.46 0.22 SEATING 0.10 MAX 0.36 0.30 0.08 PLANE COPLANARITY 0.26 0.15 0.10 COMPLIANT TO JEDEC STANDARDS MO-203-AA Figure 57. 5-Lead Thin Shrink Small Outline Transistor Package [SC70] (KS-5) Dimensions shown in millimeters ORDERING GUIDE Model Temperature Range Package Description Package Outline Branding AD8007AKS-R2 −40°C to +85°C 5-Lead SC70 KS-5 HTA 1 AD8007AKSZ-R2 −40°C to +85°C 5-Lead SC70 KS-5 HTC 1 AD8007AKSZ-REEL −40°C to +85°C 5-Lead SC70 KS-5 HTC 1 AD8007AKSZ-REEL7 −40°C to +85°C 5-Lead SC70 KS-5 HTC AD8007AR −40°C to +85°C 8-Lead SOIC R-8 AD8007AR-REEL −40°C to +85°C 8-Lead SOIC R-8 AD8007AR-REEL7 −40°C to +85°C 8-Lead SOIC R-8 1 AD8007ARZ −40°C to +85°C 8-Lead SOIC R-8 1 AD8007ARZ-REEL −40°C to +85°C 8-Lead SOIC R-8 1 AD8007ARZ-REEL7 −40°C to +85°C 8-Lead SOIC R-8 AD8008AR −40°C to +85°C 8-Lead SOIC R-8 AD8008AR-REEL7 −40°C to +85°C 8-Lead SOIC R-8 AD8008AR-REEL −40°C to +85°C 8-Lead SOIC R-8 1 AD8008ARZ −40°C to +85°C 8-Lead SOIC R-8 1 AD8008ARZ-REEL7 −40°C to +85°C 8-Lead SOIC R-8 1 AD8008ARZ-REEL −40°C to +85°C 8-Lead SOIC R-8 AD8008ARM −40°C to +85°C 8-Lead MSOP RM-8 H2B AD8008ARM-REEL −40°C to +85°C 8-Lead MSOP RM-8 H2B AD8008ARM-REEL7 −40°C to +85°C 8-Lead MSOP RM-8 H2B 1 AD8008ARMZ −40°C to +85°C 8-Lead MSOP RM-8 H2B# 1 AD8008ARMZ-REEL −40°C to +85°C 8-Lead MSOP RM-8 H2B# 1 AD8008ARMZ-REEL7 −40°C to +85°C 8-Lead MSOP RM-8 H2B# 1 Z = RoHS Compliant Part, # denotes RoHS compliant part may be top or bottom marked. Rev. E | Page 19 of 20 072809-A AD8007/AD8008 NOTES ©2002–2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D02866-0-11/09(E) Rev. E | Page 20 of 20