PCM-CTC 6 Channel, 16-Bit Counter/Timer PC/104 MODULE FEATURES � Six independent 16-bit Counter/Timers � Uses two 82C54 Programmable Interval Timers � Six programmable counter modes per channel � Handles inputs from DC to 8 MHz � Binary or BCD counting � Clock, Gate, and Out signals from 6 channels buffered and accessed via 2 connectors � Direct interface to WinSystems’ TRM-500-3 flow meter termination card � Onboard 82C59A Interrupt Controller generates eight vectored interrupts � Two additional external interrupt input sources � 8-bit stackthrough PC/104 � Two system time base selections � Jumper selectable board I/O address � Single +5 volt supply o o � Operating Temperature: -40 C to +85 C � Low cost The PCM-CTC card is designed to solve the common timing problems in industrial systems design. Six inde- pendent 16-bit channels are capable of frequency/event counting from DC to 8 MHz, pulse marker or square- Read operation for event-counting applications. Spe- wave generation, time interval measurements, and one- cial logic is included so that the contents of each shot simulation. All six channels have a buffered Clock, counter can be read “on the fly” without having to Gate, and Output available. Jumper headers provide inhibit the clock input. source selection and cascading to yield maximum con- figuration flexibility. Time Base Clock - Two jumper selectable clock sources are available for use as a time base for the six FUNCTIONAL CAPABILITY channels. Either the PC/104 System Clock (pin B20) or the PC/104 14.3818 MHz OSC (pin B30) can be select- PC/104 Interface - The PCM-CTC is an 8-bit stack- ed for the board. The clock is divided by 2 and then is through card which is I/O port mapped. The I/O available at each of the 82C54’s CLK input. address is jumper selectable for 8 different locations. Configuration Headers - Access to the Clock, Gate and Counters/Timers - The PCM-CTC utilizes two 82C54 Out signals for each channel plus the time-base clock programmable interval timers that can be individually (divided by 2) is provided for maximum board configu- configured to be realtime clocks, event counters, digital ration flexibility. one-shots, square wave generators, or programmable rate generators. Each 82C54 contains three indepen- Connector Configuration - The PCM-CTC has two, dent software programmable counter/ timers yielding a connectors that permit access to the Clock, Gate and total of six, 16-bit channels. The individual channels Out signals for each channel. The first connector, J1, can be cascaded for longer count sequences. has 26-pins and is grouped with 4 CTC channels. Its pin-out is compatible with WinSystems TRM-500-3 ter- The three counters inside the 82C54 chip are identical mination board. in operation. Each consists of a single, 16-bit, preset- table, DOWN counter. The counter can operate in J2, the second connector, is wired to the remaining 2 either binary or BCD and its input, gate and output are counter/timer Clock, Gate, and Out signals. Two addi- configured by the selection of modes stored in the tional interrupt inputs are wired from J2 to the 82C59A Control Word Register. The status of the contents of PIC. This offers more external interrupt sources for each counter is available to the computer with a simple greater system flexibility. onboard 82C59A PIC. The PCM-CTC can generate an IRQ on channels 2, 3, 4, 5, 6 or 7. Even though this card is PC compatible, the 82C59A can generate a vectored interrupt to improve interrupt handling. This is done on the PCM-CTC by generating an interrupt acknowledge signal to the PIC after the sec- ond sequential Read to the board. TRM-500-3 - The TRM-500-3 board is a signal condi- tioning unit for up to three flow meters. It accepts a low level input and provides a TTL level that is accept- ed by the timers on the PCM-CTC. A jumper block is available to allow selection of either a low level analog or TTL input on each channel. The PCM-CTC provides a jumper enabled +5 volt line to power to the TRM-500-3 via the J1 connector. SPECIFICATIONS Electrical PC/104 Bus: 8-bit, stackthrough System Clock: Up to 8 MHz PCM-CTC BLOCK DIAGRAM Interface: Inputs - All inputs are 74HC/TTL levels Outputs - All outputs are 74HC/TTL levels All the counter/timer signals are fully buffered on and Power Requirements: +5V ±5% @ 40mA (typ.) off the board. Each signal line is paired with a ground line to prevent adjacent noise and crosstalk. All input Mechanical lines have Schmitt trigger circuits with 100 mV hys- Dimensions: 3.6”x 3.8” plus connector overhang teresis to prevent oscillation from signals with slow rise and fall times. Connectors J1: 26-pin dual on 0.100 inch grid J1 and J2 Connector Pin out J2: 16-pin dual on 0.100 inch grid J1 J2 Jumpers: 0.025 inch square posts Pin Description Pin Description 1 GATE 0 1 GATE 4 Environmental 3 CLK 0 3 CLK 4 o o Operating Temperature: -40 C to +85 C 5 OUT 0 5 OUT 4 7 GATE 1 7 GATE 5 Non-condensing relative humidity: 5% to 95% 9 CLK 1 9 CLK5 11 OUT 1 11 OUT 5 ORDERING INFORMATION 13 GATE 21 3 INT 6 15 CLK 2 15 INT 7 17 OUT 2 2-16 Ground PCM-CTC Six channel PC/104 module 19 GATE 3 with 82C59A PIC 21 CLK 3 23 OUT 3 25 +5 V 2 - 26 Ground Interrupts - All six of the CTC channels plus 2 addi- tional external interrupt input sources are wired to the 715 Stadium Drive • Arlington, Texas 76011 • (817) 274-7553 • http://www.winsystems.com