OP ERA TIONS MAN UAL LBC- 486Plus LBC- 586Plus y .Ó Copy right 1997 by Win Sys tems. All Rights Re served and speci fi ca tions at any time with out no tice. Win Sys tems re serves the right to make changes in the cir cuitr RE VI SION HIS TORY P/N 403- 0259- 000 ECO Num ber Date Code Rev Level 970422 C 970602 C1 970829 C2 3 980107 C4 980311 C5 980807 C6 980817 C7 990609 D 991206 E 99- 83 99- 30 98- 86 98- 57 98- 18 98- 01 C97- 105 971204 97- 78 97- 36 ORIGI NATED TA BLE OF CON TENTS n 1n s s 2e T 2.12-1 2.2t2-1 2.32-2 2.4t2-3 2.5n2-3 2.6g2-4 2.72-5 2.8 In In2-6 0t2-13 1 e 2-16 5 D2-17 7l2-17 8 n2-18 0O I/2-21 1n2-24 2 2-29 32-41 42-42 3 n p3-1 3.33-1 3.4p p3-6 3.6p3-10 3.7s3-13 3.83-13 3.9g3-14 0n3-14 IDE HDD Auto De tec tio3.1 Pass word Set tin Load Setup De faults Load BIOS De fault Chipset Fea tures Setu BIOS Fea tures Setu3.5 3-2Stan dard CMOS Setu Setup Main Menu En ter ing Setu3.2 3-1Gen eral In for ma tio3.1 Award BIOS Con figu ra tion Jumper/Con nec tor Sum mary2.2 Multi I/O Con nec tor2.2 Eth er net Con figu ra tion2.2 VGA Con figu ra tio2.2 Par al lel2.2 Sili con Disk Con figu ra tio2.19 2-18Power/Re set Con nec tion2.1 Bat tery Se lect Con tro2.1 Status LE2.16 2-16Watch dog Timer Con figu ra tion2.1 IDE Hard Disk In ter face2.14 2-14Floppy Disk In ter face2.13 2-14PC/104 Bus In ter fac2.12 2-14Speaker/Sound In ter face2.1 Par al lel Printer Por2.1 Se rial ter face2.9 2-5Key board ter face Real Time Clock/Cal en dar In ter rupt rout in Mem ory In stal la tio PCI Clock Se lec CPU Speed Se lec tion ALI 1487/1489 Chipse In tro duc tion LBC- Plusech ni cal Ref er enc 1-2Speci fi ca tion1.3 1-1Gen eral De scrip tion1.2 1-1Fea ture1.1 Gen eral In for ma tio Num berTi tleNum ber PagePara graphSec tio 3.11 Save & Exit Setup 3-14 3.12 Exit without Saving 3-14 4 LBC-Plus Silicon Disk Reference 4.1 Introduction 4-1 4.2 ROMDISK Usage 4-1 4.3 Bootable RAMDISK/FLASHDISK Usage 4-4 4.4 Non-Bootable RAMDISK Usage 4-5 4.5 Non-Bootable FLASHDISK Usage 4-7 4.6 DiskOnChip Usage 4-7 5 WS16C48 Programming Reference 5.1 Introduction 5-1 5.2 Function Definitions 5-1 5.3 Sample Programs 5-6 APPENDIX A I/O Port Map APPENDIX B Interrupt Map APPENDIX C Parts Placement Guide APPENDIX D LBC-Plus Mechanical Drawing APPENDIX E WS16C48 I/O Routines and Sample Programs Listings WARRANTY 1Gen eral In for ma tion 1Fea tures n486DX4 at 100MHz or 5X86 at 133 MHz n Com100% PC- n FPM or EDO DRAMUp to 32 Mbytes of user instal n 256K L2 Cache nSolid State Disk Sup ne VGA conPCI High- nr rn Con, AUI, EthT sn ports with op Se ns EPP and ECP mode Par ny48 Digi nDual Floppy Disk in ns Bu PC/104 Ex nt re 2Gen eral De scrip tion on a sine sys com is a small, high- emThe LBC- Solid- VGA, Eth in I/O op a number of popuboard. It inDisk, and , c is sup SIMM mem Up to 32Mbytes of user instalor the AMD 5x85 133 MHz proc- 256KB level two cache is also availported. An ops oh am i supysk ar a. en ay disk sizes rangbe popu 991206s1 1 -Page OPERATIONS MANUAL LBC-Plu lated, port ing sup ing from 1 Mega byte to 12 Mega bytes. disk based sys tem very user friendly. Al ter nately, the M- Systems Disk On Chip FLASH mod ules m the sili coBoot ca pa bil ity is pro vided on board and a set of utili ties and driv ers are pro vided to mak sup ports disks up to 2 mega bytes in size and can util ize SRAM, PEROM or EPROM as the disk me di raWin Sys tems and a va ri ety of ven dors port ing the PC/104 stan dard. An on board sili con d il able fromod ules, SCSI con trol lers, Ana log I/O mod ules, and lit er ally hun dreds of other op tions av und and speecpro vided for fur ther ex pan sion to an en tire in dus try of add-on pe riph er als in clud ing s bus i tional able. A full 16- bit PC/104 ex pan sion es sor. la ble ory es sorand par al lel printer in ter faces. The LBC-Plus is popu lated with ei ther a 100 MHz AMD DX4 pro hard disk,High- Density Par al lel I/O. Four PC com pati ble ser ial ports are stan dard, as are the floppy te grates lar tions clud ing er net, State performance, 486/586Plus beddable puter gl tem 1. Watch dog Timer with Power- fail se 16- Bit pan sion ter face tal I/O lines with 24 line event sense ca pa bil it Bi- directional al lel printer port sup ports Four 16550 Com pati ble rial tional RS422, RS485, J1708 in ter face NE2000 Com pati ble 10Base er net trol le PCI IDE Con trol le Resolution trol ler for CRT or Flat Panel us ag port of up to 12MB Op tional la ble AT pati ble 1. WinSystems" 3Speci fi ca tions 1.3.1l s ex :z :t :M M :) 1.3.2y :M M PEROM, 4- stan s 1.3.3l ) :d . : :Multi I/O :P P : : P : 1 - 2s991206 OPERATIONS MANUAL LBC-PluPage RJ4510BaseT Two 50 pin RN type IDH- 50- LDigi tal I/O : 40 pin RN type IDH- 40- LPFixed Disk 34 pin RN type IDH- 34- LPFloppy Disk 20- pin RN type IDH- 20LCOM3/COM4 : 50 pin RN type IDH- 50LCon nec tors 0.025" square posts on 0.10" cen tersJump ers com po nent leg end, and plated through holes FR4 Ep oxy Glass with 4 sig nal lay ers and 2 power planes with screenePC- Board 5.75 X 8.0 X 0.60 inches (with out PC/104 mod ules or ca blesDi men sions : Me chani ca k On Chip) mod ule. 4- Mbit EPROM, 8- Mbit EPROM, or one M- Systems 32- Pin DOC (Di SSD Mem ory : Two 32- pin JE DEC dard sock ets sup port Mbit SRAM, 4- Mbit Mem ory SIMM Socket : 72- pin Fast Page Mode or EDO DRAM in sizes from 1M to 32 128K OT PROBIOS ROM 32 Mega byte ad dress ingAd dress ing : Mem or -12V +/-5% (Not required. PC/104 Ex pan sion or FLat- Panel use onlyVCC2 +12V +/-5% (Not re quired. PC/104 Ex pan sion, Flat- Panel, or AUI use only)VCC1 : 1.8A typi cal with a 100MHz DX4 proc es sor and 16M DRA +5V +/- 5% at 2.0A typi cal with a 133MHz 5X86 proc es sor with 16M DRAVCC TTL Level in puIn ter rupts Jumper pro gram ma ble from 4MHz to 50MHSys tem Clock PC/104 8- Bit or 16- Bit pan sion buBus In ter face : Elec tri ca 1. - "The Embedded Systems Authority WinSystems : D D 1.3.4 :0° ° C :% 6s1 3 -Page OPERATIONS MANUAL LBC-Plu99120 5% to 95Non- condensing rela tive hu mid ity to +70-4Op er at ing Tem pera ture En vi ron men tal : 40 Pin SAM TEC type ESQ- 120- 12- G- 64 Pin SAM TEC type ESQ- 132- 12- G-PC/104 Bus : 8 pin in- line Mo lexPower/Re set : 50 pin RN type IDH- 50- LPFlat Panel 10 pin RN type IDH- 10- LPCRT : 16 pin RN type IDH- 16- LPEth er net AUI : - "The Embedded Systems Authority" 2LBC- PLUS Tech ni cal Ref er ence 1In tro duc tion c group to help an Sup a Tech main of the LBC-Plus board. Winand usr e . Time5PM Cen 2ALI 1487/1489 Chipset high- a highly- Chipset which pro the ALI FINALI-The LBC-Plus util n in of 'AT' class pe com as well as the stanstate con s s s M e key d - . com dis on the equiva Ir . I/O de ex 991206s2 1 -Page OPERATIONS MANUAL LBC-Plu add ing ter nal vices licts whencon trol and con figu ra tion. Ref er to the I/O map in Ap pen dix A for port us age to avoid con f OS foThere are a number of in ter nal reg is ters within the Finali- 486 chipset that are used by the B neric lit era ture lent crete po nent manu fac tur ers gesetup. Us ers de sir ing to ac cess these in ter nal pe riph er als di rectly should ref er to any These func tional units are 100% PC/AT com pati ble and are sup ported by the AWARD BIOS an A PC/AT com pati ble board in ter fac A PCI BUS IDE in ter face A PC- AT com pati ble real time clock/cal en dar with CMOS RA Three 8254 com pati ble timer/coun ter chan nel 15 in ter rupt in puts com pati ble with mas ter/slaved 8259 in ter rupt con trol ler 8 DMA Chan nels com pati ble with PC/AT 8237A DMA con trol ler trol dard ple ment riph er als, clud ing : d bus performance back bone for full PC/AT com pati bil ity. The Chipset con tains the logic for DRAM a izes 486 vides integrated, 2. tral AM andade quately ad dressed in this man ual, con tact Tech ni cal Sup port at (817) 274- 7553 be tween 8 s tions notques tions re gard ing con figu ra tion, age, us or pro gram ming of the board. For an swers to qu we age Sys tems tains ni cal port s on figu ra tionThis sec tion of the man ual is in tended to pro vide suf fi cient in for ma tion re gard ing the 2. WinSystems 3CPU Speed Se lec tion J36 1 2 3 o o o J12 o o 2 o o 4 o o J31 1 o J14 o 1 o o o o The f rang of any of 8 CPU base clock fre for the sejumper block at J12 al MHz to 100 MHz. J12. by jump CPU clock speeds avail gives all of the posThe ta UJ12J12 d1-23-4 8 MhzONONON ONONF ONOFF ONOFFF F FF FOFF z NOTE :d for the rated speed of the in board will be jumpered at the facThe LBC- a in CPU over of the rated speed may re J12 to any speed in ex Jump, te war prod stan are not cov 2 - 2s991206 OPERATIONS MANUAL LBC-PluPage ranty.their rated speed or tem pera ture ered un der the Win Sys tems dard uct ed abovmisop era tion, and pos si ble de struc tion of the CPU. Fail ures of CPUs which have been op er a t ingproc es sor. er ing cess sult he Plus tory stalle OFFOFFOFF100 MH ONOF80 MHz OFONOF66 MHz ONONOF50 MHz OF40 MHz ON33 MHz OF16 MHz 5-6 Spee J12CP ble be low si ble able er ing rom 8 lows lec tion quen cies ing The LBC- Plus uses a Crys tal con trolled fre quency syn the sizer to con trol the CPU clock rate. 3 2 3 2 65 3 1 2. - "The Embedded Systems Authority" WinSystems" 2.3.1t T fre of the base os run at a mul ac486DX4 and 5X86 proche : of the mul sejumper block at J36 al J36 J36 33 o o o o o o 6 6 4PCI Clock Se lect jumper blocks at J14 and J31. The CPUCLThe PCI bus clock source must be seK us CPU . of 33MHz the CPUCLK/2 sebase fre 1414 1 o1 o1 o1 o o2 o2 o o o3 o3 o o K2 5Mem ory In stal la tion SIMMs. SIMM mod stan 72-The LBC-Plus util should be a user instal y - DRAM sizes from which can sup A sinvided by X36 bit mod 1MB to 32MB. 30 de ap the SIMM mod with power off by an is ac - r - e ted to the hs n re back to an ap once re and the SIMM mod. s2 3 -Page OPERATIONS MANUAL LBC-Plu991206 gleout ward ule, leased, should ro tate pro pri ate moval a e re tain ing clipver ti cal un til the re tain ing clips snap into place. Re moval is the re verse pro cess. Pull t back wards with out ex treme force. Once the fin gers are in the socket, the mod ule is then ro ta in sertedvice in stalled in the U27 socket. ). The SIMM mod ule is keyed slightly off- center and can not b e move any degrees from ver ti cal and in sert ing the fin gers into the con nec tor (It may be nec es sary to In stal la tion com plished gling ule proxi mately ules. gle SIMM socket is pro vided port bits prominimum speed of 70nS and X32 ar chi tec ture is pre ferred as there is no sup port for the par it la ble izes ules pin dard 2. CPUCLK/ CPUCL 3 3 2 2 J1J3J1 J3 quency in ex cess lec tion must be made source may be se lected any time the CPU base fre quency is less than or equal to 33MHz. For any lected ing 2. 4X - 5X8 3X 2X - 48 1 2 1 2 lows lec tion ti plier as shown here es sors tu ally ti ple cil la tor quency. Clock Mul ti plier Se lec - "The Embedded Systems Authority WinSystems" 6In ter rupt rout ing J30 1 o o 2 3 o o 4 5 o o 6 7 o o 8 9 o o o o o o o o 16 o o 18 o o 20 o o 22 h ls 0 are shown here. J30 1 o o 249 3 o o 4T0 5 o o31 7 o o42 9 o o5 o oIDE4 o o o o 16Y o o 183 o o 201 o o 222 2 - 4s991206 OPERATIONS MANUAL LBC-PluPage IRQ3COM 21 IRQ4COM 19 IRQ5COM 17 IRQ6FLOPP 15 IRQ7LPT 1413 IRQ1 1211 IRQ1WS16C48 10 IRQ1COM 8 IEQ1COM 6 IRQ1ENE IRQCOM de fault jumper set tings header and theblock al lows dis con nect ing or re rout ing of the on board in ter rupts. The lay out for the J3 ock at J30. Thise rial, par al lel, and disk are routed to their typi cal us age in ter rupts us ing the jumper b er als,All in ter rupts on the LBC-Plus are routed to their re spec tive PC/104 bus pins. On board pe rip 21 19 17 15 1413 1211 10 2. - "The Embedded Systems Authority WinSystems Real Time Clock/Cal en dar J13 o o o within the ALI1487 chip. This clock is fully an on conThe LBC- of to the time a In ad ca and alarm in pe innd date keep is owing, CMOS RAM. and a on . the CMOS set NOTE : Sthe ens - tery is not installed. 8Key board In ter face is con Key con style key PC- an onThe LBC-Plus con Win - s t. s2 5 -Page OPERATIONS MANUAL LBC-Plu991206 his man ualcus tom con nec tions should ref er to the Multi-I/O con nec tor pin defi ni tions given later in ers de sir ingSys tems to make ready ac cess to all of the de vices ter mi nated at the Multi-I/O con nec tor. U made through the Multi-I/O con nec tor at J3. An adapter ca ble P/N CBL- 162-1 is avail able from tains board AT board trol ler. board nec tion 2. if a batbacked up bef ore re mov ing the bat tery jumper. J13 must be jumpered 2-3 in the clear po si tion RAM i tire board in clud ing the SSD ar ray. Be sure that any data con tained in bat tery backed J13 is the mas ter bat tery en able jumper. Re mov ing the jumper re moves bat tery power from J13 pins 1-2, power- up, and re con fig ure tings as de sired re move the jumper from pins 1-2 on J13 and place on pins 2-3 for 30 seconds. Re place the jumper rd . Thento start fresh with fac tory de faults. This may be ac com plished by re mov ing power from the bo It may be come nec es sary at some time to make the CMOS RAM for get its cur rent con figu ra tion wait states, etc. Ref er to the sec tion on the AWARD BIOS Setup for what is con fig ured via the RAM holds all of the setup in for ma tion re gard ing hard and floppy disk types, video type, shad on. Thifunc tions, the sys tem con figu ra tion is kept within the CMOS RAM con tained in the clock sec t ingfea tures clud ing ri odic ter rupt pa bili ties. di tion com pati ble with the MC146818A used in the origi nal PC- AT com put ers. This clock has a number Plus tains board Clock/Cal en dar 1 2 3 2.7 - "The Embedded Systems Authority" WinSystems 9Se rial In ter face U3 U8 U4 1 2 3 J10 o o o 1 2 3 o o o U5 U9 U6 J111 2 3 o o o 1 2 3 o o o ad ports at the fol RS- four 16550 comThe LBC-Plus pro: * * J23 .pins 1-2 are jumpered, COM3 is en t - to dis 2 - 6s991206 OPERATIONS MANUAL LBC-PluPage ing block de scribed ear lier con nect the de fault in ter rupts sired. if de **The in ter rupts are not dis con nected when COM3 or COM4 are dis abled. Use the in ter rupt rou abled. When J23 pins 3-4 are jumpered, COM4 is en abled *COM ports 3 and 4 can be en abled or dis abled in di vidu ally via the jumper block at J23. When COM4 2E8H* at IRQ 9* COM3 3E8H* at IRQ 5* COM2 2F8H at IRQ 3 COM1 3F8H at IRQ 4 vides pati ble 232 se rial low ing dresses J9 J8 2. - "The Embedded Systems Authority" WinSystems or J1708, RS- for RS- ports, COM1 and COM2 are con seThe two pri te .shown on the fol COM1 - RS- 232 9 J8J10 o o 6CDR o o 7aRTS 1 2 3 o oaCTS o o o o o o o oRIR oD COM2 - RS- 232 9 1o o 6 CDR o o 7 aS o o 8 aS o o 9 o o o o o oRIR o D COM3/COM4 - RS- 232 from is avail at J2. An adapter ca only and are terCOM3 and COM4 are RS- i DB9M con - tions for J2 are shown here : 2J o o 2DR o o 4 COM3 RXS o o 6 COM3 TXR o o 8RI o o 01GNDN/C o o 12DR o o 41COM4 RXS o o 16 COM4 TXS o o 81RI o o 20GNDN.C 6s2 7 -Page OPERATIONS MANUAL LBC-Plu99120 19 COM4 RCOM4 DT 17 COM4 CT 15 COM4 RT 13 COM4 DSCOM4 DC 11 9 COM3 RCOM3 DT 7 COM3 CT 5 COM3 RT 3 COM3 DSCOM3 DC 1 Win Sys tems ( P/N CBL- 173-1), which adapts J2 to two stan dard nec tors. The pin defi n 232 mi nated ble able GN 5 DT U9 - Not In stalled 4 CT TX Dat 1 2 31 2 3 U6 - Not In stalled 3 RT RX Dat 2 U5 - In stalled DS 1 J1J9 COM2 DB GN 5 DT 94 U8 - Not In stalled TX Dat 83 1 2 3 U4 - Not In stalled RX Dat 2 U3 - In stalled DS 1 COM1 DB low ing pages ed modes arwith the ad di tion of op tional driver ICs. The con figu ra tion op tions for each of the sup por mary rial fig ur able 422, 485 - "The Embedded Systems Authority" WinSystems" 2.9.1 ip for a sin the driver ICs nec This kit pro part number CK-Kit”, Win 2- l runs than are pos al point-to-point full-- e- pr e - nl ts e - . when used in RS- COM1 - RS- 422 9 J8J10 +o o 6N/C -o o 7TX+ 1 2 3N/Co o 8- o o o o o oN/Co o 9N/C oGND RS- 422 NOTE :, C (Bit1). Regbit in the Mo 8R + 9R - R10 2 - 8s991206 OPERATIONS MANUAL LBC-PluPage RX RX dem trol Con is ter the trans mit ter must be en abled by set ting the RTS VC When used in RS- 422 mode 5 4 U8 - In stalled TX 3 1 2 3 U4 - In stalled 2 RX U3 - Not In stalled 1 RX COM1 DB ca tionstor lo for each of the chan nels 422 mode r mi na tion re sisthe cor rect mode jump er ing, driver IC in stal la tion, I/O con nec tor pin defi ni tions, and t ra tion showval ues of 100 ohms be used in all three lo ca tions at the re ceiver end. The fol low ing il lus ded that triamin ing the cor rect re sis tor val ues is be yond the scope of this docu ment but it is rec om me thod for de teron the ca ble or by in stall ing re sist ers on the board in lo ca tions re served for them. The m lished ei the 422 usu ally re quires the lines be ter mi nated at both ends. This ter mi na tion can be ac com im mu nity. RS 232. The dif fer en tial trans mit ter and re ceiver twisted pairs of fer a high de gree of nois e with RS wire duplex in ter face low ing much longer ca ble si b 2 is a 4chan nel of RS- 422. If two chan nels of RS- 422 are re quired then two kits will be needed. RS- 4 gle Sys tems 75176-2. vides es sary RS- 422 lev els are sup ported on both COM1 and COM2 with the in stal la tion of the op tional “Ch RS- 422 figu ra tion Mode Con - "The Embedded Systems Authority WinSystems COM2 - RS- 422 9 J9J11 +o o 6N/C -o o 7+ 1 2 31 2 3N/C o o- o o o o o oN/C o o N/C oD RS- 422 NOTE :, mode When used in RS- C S . Con 7R + 6R - 3R 2.9.2 el h () f g - l - and t pine I/O con driver IC in show the cor jump mode. lo s2 9 -Page OPERATIONS MANUAL LBC-Plu991206 re sis tor ca tions for each of the chan nels when used in RS- 485 r mi na tion recttra tions er ing, stal la tion, nec tor out, low ing il lusance, line length, etc. A good trial value is 100 ohms in all three re sis tor lo ca tions. The fo : line im pedthe run. The re quired ter mi na tion val ues are de pend ent upon a number of fac tors in clud in t each end owhile all oth ers lis ten (re ceive). RS- 485 usu ally re quires the twisted pair be ter mi nated a trans mitsfor RS- 485. RS- 485 is a 2- wire multi- drop in ter face where only one sta tion at a time talks chan nels“Chip Kit”, Win Sys tems part number CK- 75176-2. A sin gle kit is suf fi cient to con fig ure bot op tionaThe RS- 485 Multi- drop in ter face is sup ported on both chan nels with the in stal la tion of th RS- 485 figu ra tion Mode Con RX RX bit in the Mo dem trol Reg is ter (Bit1) the trans mit ter must be en abled by set ting the RT VC 422 GN 5 94 U9 - In stalled TX 83 U6 - In stalled TX 2 RX U5 - Not In stalled 1 RX COM2 DB - "The Embedded Systems Authority" WinSystems COM1 - RS- 485 9 J8J10 N/Co o 6N/C N/Co o 7+ 1 2 31 2 3N/Co o- o o o o o oN/Co oN/C oD RS- 485 NOTE uses a sin : Be C - 8R - + - 9R (RTS). When RTS is set, the Regdem Con - R10 is and the re is disstate) the trans Note that it is nece to al som time af set - t have been com shifted out ofall char ) g to avoid chop the trans dis . 2 - 01s991206 OPERATIONS MANUAL LBC-PluPage off the last char ac ter bef ore abling mit ter pin the UART (Check Bit 6 in the Line Status Reg is ter ac ters pletely low ing a trans mis sion, it is nec es sary to be sure tha bef ore trans mit ting the first char ac ter. Like wise, fol mini mal tling ter bling ena the trans mit ter es sary lowen abled. mit ter abled ceiver trans mit ter is en abled, and when cleared (the nor mal TX/RX trol is ter able is con trolled in soft ware us ing bit 1 in the Mo TX/RX its trans mit ter en abled. The trans mit ter En able/Dis lel. Only one sta tion at a time may trans mit or have twisted- pair, all trans mit ters are con nected in par al VC cause RS- 485 gle GN 5 94 U8 - Not In stalled TX/RX 83 U4 - In stalled TX/RX 2 U3 - Not In stalled 1 COM1 DB - "The Embedded Systems Authority" WinSystems" COM2 - RS- 485 9 J9J11 N/Co o 6N/C N/Co o 7+ 1 2 31 2 3N/Co o- o o o o o oN/Co oN/C oD RS- 485 NOTE uses a sin : Be C - 4 - + - R15 (RTS). When RTS is set, the Regdem Con - R16 is and the re is disstate) the trans Note that it is nece to al som time af set - t have been com shifted out ofall char ) g to avoid chop the trans dis . 2.9.3 ne y - e. One - t when used in J1708 mode. s2 11 -Page OPERATIONS MANUAL LBC-Plu991206 for each of the chan nels ion net work de tailsrect jump er ing, driver IC in stal la tion, I/O con nec tor pin defi ni tions, and the ter mi na ow show the cor“Chip Kit” is suf fi cient to con fig ure both chan nels for J1708. The il lus tra tions that fol l The LBC- Plus may be user con fig ured for J1708 by the ad di tion of the CK- 75176-2 “Chip Kit”. ci fi ca tioncle Ap pli ca tions”. It is be yond the scope of this docu ment to go into de tail on the J1708 sp Ve hiwhich is used for “Se rial Data Com mu ni ca tions be tween Mi cro com puter Sys tems in Heavy Dut ter facThe So ci ety of Auto mo tive En gi neers (SAE) J1708 in ter face is a varia tion of the RS- 485 i SAE J1708 Con figu ra tion off the last char ac ter bef ore abling mit ter pin the UART (Check Bit 6 in the Line Status Reg is ter ac ters pletely low ing a trans mis sion, it is nec es sary to be sure tha bef ore trans mit ting the first char ac ter. Like wise, fol mini mal tling ter bling ena the trans mit ter es sary lowen abled. mit ter abled ceiver trans mit ter is en abled, and when cleared (the nor mal TX/RX trol is ter able is con trolled in soft ware us ing bit 1 in the Mo TX/RX its trans mit ter en abled. The trans mit ter En able/Dis R1 lel. Only one sta tion at a time may trans mit or have twisted- pair, all trans mit ters are con nected in par al VC cause RS- 485 gle GN 5 94 U9 - Not In stalled TX/RX 83 U6 - In stalled TX/RX 2 U5 - Not In stalled 1 COM2 DB - "The Embedded Systems Authority WinSystems" COM1 - J1708 9 J8J10 N/Co o 6N/C N/Co o 7+ 1 2 31 2 3N/Co o- o o o o o oN/Co oN/C oD C 1 4.7KM + d t d - M K COM2 - J1708 9 J9J11 C1 o o 6C C2 o o 7+ C3 o o- o o o o o oC4 o oC 5 oD C 4 4.7KM + d t d - M K 2 - 21991206 OPERATIONS MANUAL LBC-PlusPage 4.7 R4 470 OH R16 TX/RX C3 .0022 uf Absen R15 C4 .0022 uf TX/RX R5 470 OH R1 VC GN N/ 9 N/U9 - Not In stalled TX/RX 8 N/1 2 31 2 3 U6 - In stalled TX/RX N/ U5 - Not In stalled N/ N/ COM2 DB 4.7 R2 470 OH R13 TX/RX C2 .0022 uf Absen R12 C1 .0022 uf TX/RX R1 470 OH R1 VC GN 5 94 U8 - Not In stalled TX/RX 83 U4 - In stalled TX/RX 2 U3 - Not In stalled 1 COM1 DB - "The Embedded Systems Authority WinSystems" 2.10Par al lel Printer Port J24 2 o o o o 4 J21 2 o o o o 4 o o 2 o o 4 o o 6 p - T - w cable are shown be the CBL- when us port DB25 con for the par o o 14D o o50R o o61T o o72SLIN o o83GND o o 194GND o o 205GND o o16GND o o 227GND o o3ACKGND o o4YGND o o5PEGND oT 2.10.1n : ta via the jumper block at J6 per the fol port mode is seThe par EPP/ECP Mode 3-53-51-31-3 g 4-62-44-62-4 6s2 31 -Page OPERATIONS MANUAL LBC-Plu99120 Jumperin J6 ECP ModeEPP ModeSPP Mode al lel lected low ing ble Par al lel Port Mode Se lec tio SLC 13 2 12 BUS 2 11 2 10 PD 9 PD 2 8 PD 7 PD 6 PD 1 5 PD 1 4 INIPD 1 3 ERROPD 1 2 AUTOFSTROBE 1 :ni tions al lel nec tor ing 162-1 lo he pin defitions. The par al lel port is mapped at 278H and is ter mi nated at the Multi-I/O con nec tor J3. eraThe LBC- Plus sup ports a fully bi- directional par al lel printer port ca pa ble of EPP and ECP o 5 3 1 J6 3 1 3 1 - "The Embedded Systems Authority WinSystems 2.10.2ECP DMA Con uo 1441 22221 o o o o o o o o o o o o o o o o 44443 1 1Speaker/Sound In ter face r - . via this de tones can be pre or user de 2.12PC/104 Bus In ter face The o pin defi The PC/104 con PC/104 mod and 16- both 8- supns are 2.13Floppy Disk In ter face floppy disk drives. The 3 1/2" or 5 1/4" PC com up to 2 stan supThe LBC- d - t are shown here : The pin defi GND o o C GND o oC GND o oC GND o oX GND o o00 GND 11 o o21 GND 13 o o40 GND 15 o o61 GND 17 o o8 GND 19 o o0 GND 21 o o2A GND 23 o o4E GND 25 o o6TRK0 GND 27 o o8 GND 29 o o0A GND 31 o o2 GND 33 o o4G 2 - 41s991206 OPERATIONS MANUAL LBC-PluPage DSKCH 3 HDSEL 3 RDAT 3 WPRT 2 2 WGAT 2 WDAT 2 STEP 2 DIR 1 MTR 1 DRV 1 DRV 1 MTR 1 9 INDE 8 7 N/ 6 5 N/ 4 3 RPM/L 2 1 J17 po si tion. ni tions for the J17 con nec tor he drive Adard floppy I/O ca ble used on desk- top PCs. The ca ble must have the twisted sec tion prior to rives is a standrives are con nected via the I/O con nec tor at J17. Note that the in ter con nect ca ble to the Plus ports dard pati ble pro vided on the fol low ing page for ref er ence pur poses. LBC- Plus ports bit bit ules. nec tor ni ti The LBC- Plus sup ports I/O ex pan sion through the stan dard PC/104 con nec tors at J26 and J29. ror sig nal ing, fined sented vice The LBC- Plus util izes a high- impedance piezo type de vice for audio out put. BIOS beep codes, e 2.1 DMA Chan nel 3DMA Chan nel 3 3 3 1 1 1 J2 J2J2J2 se lect the de sired DMA chan nel as shown here : sed tWhen the par al lel port is used in an ECP con figu ra tion, the jumper blocks at J21 and J24 are figu ra tion - "The Embedded Systems Authority" WinSystems J29 J26 o o1 o o0GNDK E o o2 o o 1 D7 o o3 o o26 9 o o4 o o35 V o o5 o o 4 D4 2 o o6 o o53 o o7 o o62 S o o8 o o71 o o9 o o80 RDo o o o90Y MEMWWo o o o 0 8o o o o59 9Wo o o o 28 Ro o o o67 o o o o6 3o o o o75 o o o o 6VCC4 1o o o o 7R3 Ho o o o2 Yo o o o1 7o o0 6o o 5o o 4o o 3o o o o o o o o Vo o Co o Do o Do oGND s2 51 -Page OPERATIONS MANUAL LBC-Plu991206 A32 B32 GN SA0 A31 B31 GN SA1 A30 B30 OS SA2 A29 B29 +5 SA3 A28 B28 BALE SA4 A27 B27 TC SA5 A26 B26 DACK2 SA6 A25 B25 IRQ SA7 A24 B24 IRQ SA8 A23 B23 IRQ SA9 A22 B22 IRQ SA1 A21 B21 IRQ SA1 GND D19 C19 A20 B20 SYSCLK KE SA1 GND D18 C18 A19 B19 REFRES SD15 SA1 MASTE D1 C17 A18 B18 DRQ SD14 SA1 D1 C16 A17 B17 DACK1 SD13 SA1 DRQ D15 C15 A16 B16 DRQ SD12 SA1 DACK7 D14 C14 A15 B15 DACK3 SD11 SA1 DRQ D13 C13 A14 B14 IO SD10 SA1 DACK6 D1 C12 A13 B13 IO SD SA1 DRQ D11 C11 A12 B12 MEMR SD AEN DACK5 D1 C10 A11 B11 MEM IOCHRD DRQ D C9 A10 B10 GN MEM BD DACK0 D C8 A B9 +12V LA17 BD IRQ14 D C7 A B8 0W LA18 BD IRQ15 D C6 A B7 -12V LA19 BD IRQ12 D C5 A B6 DRQ LA20 BD IRQ11 C4 A B5 -5 LA21 BD IRQ10 D C3 A B4 IRQ LA22 BD IOCS16 D C2 A B3 +5V LA23 BD MEMCS16 C1 A B2 RESET SBH IOCH D C0 A B1 GND GND - "The Embedded Systems Authority" WinSystems 2.14IDE Hard Disk In ter face ity : at D1. The pin defiLED is pres 8 o o 2 7D8D o o 4 6D o o 69D 5D o o 80 4D1 o o 01 3Do o2 12 2Do o4 13 1D4o o6 1 0Do o8 15 o o0 2 o o2 2 Wo o4 2 o o6 2 ALE o o8 2 o o0 3 Qo o2 3 1Ao o4 3 0Ao o6 32A HDCS0 o o8 3 o o0 4 2.15Watch dog Timer Con figu ra tion t brown- a power- board fea l. s also feaThis sue i - o modes avail time. There are three watch within the aldog has not been servn the and can never re dis is to on J19, the watch With no jumper inet the g- - ot y I/O port 1EFH with any value. - f nO g by writ may be ac pet ena Af the watchport 1EEH will dis any on can be eS h- 2 - 61s991206 OPERATIONS MANUAL LBC-PluPage e draw or DOS calls, es pe cially video or Disk IO calls which could ex ceed the 1.5 sec onds al lowed. T BIOused with the BIOS or DOS pro vided that the watch dog is dis abled bef ore mak ing any ex ten siv value to I/O port 1EFH at least every 1.5 sec onds or a re set will oc cur. This mode of op era ti able dog. ter bling, ting com plished in g a 0 to I/bef ore tim ing will be gin. Ena bling is ac com plished by writ ing a 1 to I/O port 1EEH. Writ i t wareing J19 pins 1-2. In this mode the watch dog timer powers- up dis abled and must be en abled in so jump erAn al ter nate mode of op era tion is via soft ware en able/dis able con trol. This mode is set by writ ing tobe ac cessed every 1.5 sec onds or a re set will oc cur. Pet ting in this mode is ac com plished b g mus DOS but is avail able for di rectly em bed ded code that takes the place of the BIOS. The watch d gins im me di ate ly with power- on. This mode is NOT com pati ble with the AWARD BIOS or with MS be CPU. When J19 is jumpered on pins 2-3, the watch dog cir cuit is per ma nently en abled and tim in LBC- Plus. stalled dog tally abled s iced lot ted dog able f the watchlock ups. An in ter nal timer with a pe ri od of 1.5 sec onds will, when en abled, re set the CPU oft war per vi sor cir cuitry tures a watch dog timer which can be used to guard against t age lev elscir cuit to pro tect mem ory and I/O from faulty CPU op era tion dur ing pe ri ods of il le gal vo The LBC- Plus tures on volt age de tect and power- down/power out re se GND 39 N/C HDCS1 37 35 33 N/C IOCS16 31 INTR GND 29 N/C 27 N/C GND 25 IOR GND 23 IO 21 GNDGND N/C 19 GND D1 17 15 D1 D1 13 D1 11 9 D1 D1 7 5 3 GND 1 RESET J1 ent ni tions for J18 are shown here The LBC-Plus sup ports stan dard IDE fixed disks through the I/O con nec tor at J18. A red ac tiv - "The Embedded Systems Authority" WinSystems for will not al is disback to this mode is that a lockup dur the time the watch . an ex and will re 1 2 3 o o o 1 2 3 o o o 2.16Status LED r - df a 0 to 1EDH.by writ 2.17Bat tery Se lect Con trol is pro bat for the CMO coin- lith 200mAh nomiSAn on ca a he life is highly will be drawn from it. Bat and no cur is to bh a life. High tem in bat fac play a promi tem and op will J13 must be jumpered 2-3 in the clear poe if a bat life sigshorten batry is not installed. 6s2 71 -Page OPERATIONS MANUAL LBC-Plu99120 si tion tery nifi cantly. t turesstor age era tional pera tures nent tor tery per oard. Botupon duty cy cle as there is no cur rent drawn from the bat tery when +5 volts is ap plied to the de pend entbat tery tally con nected dis rent tery the in di vid ual jumper blocks for bat tery backup of SSD SRAMs. When J13 is jumpered pins 2-3, t r and topro vided at J13. When J13 is jumpered pins 1-2, bat tery power is sup plied to the Clock/Cal en d umper isClock/Cal en dar and for bat tery backing- up Solid State Disk SRAMs. A mas ter bat tery en able j nal pac ity, board ium vided cell tery ing ofpose. The LED can be turned on in soft ware by writ ing a 1 to I/O port 1EDH. The LED can be turne A green LED is popu lated on the board at D2 which can be used for any ap pli ca tion spe cific pu J19 J13 recovery quire ter nal re set auto- ing dog abled low - "The Embedded Systems Authority" WinSystems" 2.18Power/Re set Con nec tion e - - SET* and ground. o* 7 o 6 o 5 o 4 o +5V 3 o +5V 2 o 1 o -12V 2.19Sili con Disk Con figu ra tion o o o o o o o o o o 1 o 1 o 2 o 2 o 3 o 3 o J16 o o 3 o o o o o o o o o o o o o - ie o - ot on 2 - 81s991206 OPERATIONS MANUAL LBC-PluPage U27 and U23 are used to con tain the RAM, ROM,Flash, or DOC de vices used for the disk. The sili c ck ets aquired hard ware con figu ra tions for the vari ous type of de vices. Two 32- pin JE DEC mem ory s cu ments the renec es sary in for ma tion for the gen era tion and us age of the Sili con drives. This sec tion d des thChip (DOC) de vices to be used as Solid State Disk (SSD) drives. Sec tion 4 of this man ual pro v The LBC- Plus sup ports the use of EPROM, PEROM (Flash), SRAM, and the M- Systems Disk On 2 1 J25 1 3 5 7 9 2 4 6 8 10 J39 2 1 J40 J34 1 3 5 7 9 2 4 6 8 10 J38 +12V GND GND GND PBRESET 8 J7 BRE low. An op tional normally- open push- button- reset switch may also be con nected to J7 be tween P n bePower is sup plied to the LBC-Plus via the con nec tor at J7. The pin defi ni tions for J7 are giv - "The Embedded Systems Authority WinSystems" 1ECH. 2.19.1 ard h via th The mode is con de Disk mode uses the M- The sece : 55 1 o o 2 o o ee NOTE :y ef in for DOC mode with EPROMs, RAMs, of Flash de Jump jumper is . the DOC is dis de for stan IM POR TANT NOTE . J25 must be jumpered 1-2 : Win 2.19.2 r is made at J16 as shown here : The de1M EPROM de 66 o o o o 3 o3 o es 6s2 91 -Page OPERATIONS MANUAL LBC-Plu99120 1M Device512K or DOC Devic 2 2 1 1 J1J1 vices. vice size se lec tion The on board Solid State Disk ar ray sup ports ei ther 512K EPROMs, SRAMs or FLASH de vice o De vice Size Se lec tion sureTo in dows 95 com pati bil ity, se lected dard vices abled acts as a dis able to the Solid State Disk and simi larly when a DOC de vice is in stalled and the er ing vices stalled fec tivel SSD Mod DOC Mod 2 1 J2J2 jumper block at J25 as shown here De vices. ond Systems On Chip vice. trolled BIOS ex ten sion and sup ports the use of 512K or 1M EPROMS, 512K SRAMS, or 512K AT MEL Flas There are two ba sic modes of Sili con Disk op era tion on the LBC- Plus. The first uses the on bo Sili con Disk Mode s ter atdisk ar ray is mem ory mapped into a 16k byte hole at seg ment E400H and has an I/O con trol reg i - "The Embedded Systems Authority WinSystems 2.19.3 o9 us : o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o o 512K X 88 MMM 2.19.4n Backup Se tn pr op backup or stan o 1 o o 2 o 3 o3 o NOTE : the jumper(s) se backup when us for bat other than low- d 2.19.5 Disk Notes e - disk.vice of a boota l . Disk de Sili 2 - 02s991206 OPERATIONS MANUAL LBC-PluPage as a Sec ondary con vice. See sec tion 4.4 for more in for ma tion e 2. The Disk On Chip op tion must use the socket at U23. When a DOC is in stalled, U27 is avail ab ble first de1. When in stall ing de vices, U27 is the first de vice in the ar ray and must al ways con tain th Sili con bat tery. standby SRAMs (such as with EPROMs, or PEROMs) will re sult in the quick drain ing of the on boar power- ing lected teryHav ing Enabled Disabled Bat tery Backup Bat tery Backup 2 1 bat tery dard era tion. er ing foa socket- by- socket ba sis. J40 for U27 and J34 for U23. The il lus tra tion be low shows the jum ed oWhen us ing SRAM de vices and non vola tile op era tion is de sired, bat tery backup can be se lec Bat tery lec tio PEROSRA EPROMEPRO DEVICE 512K X 8 512K X 8 1 MEG X DOC 1 3 5 7 91 3 5 7 9 1 3 5 7 91 3 5 7 91 3 5 7 9 2 4 6 8 102 4 6 8 10 2 4 6 8 102 4 6 8 102 4 6 8 10 are shown here mp er ingsets the de vice type for U27 and J38 sets the de vice type for U23. The sup ported de vice type j cket. J3Each of the de vices in the ar ray has an in di vid ual de vice type jumper block at the de vice s De vice Type Se lec tion - "The Embedded Systems Authority" WinSystems 2.20Par al lel I/O I/O chip mapped at a base WS16C48 ASIC high- the WinThe LBC-Plus util ag a stan for easy mat with in al con Two 50- prord I/O racks. o o 5 o o 2.20.1e the jumper block at J us or dis can be en of the LBC- feaThe par15. 120H. When J15 is open the 16 at I/O ada I/O is enWhen J15 is jumpered the pard - 120H are free for use by other de at I/O ad 2.20.2s e - e 9912062 12 -Page OPERATIONS MANUAL LBC-Plus the fol low ing page. shown onnec tor han dles I/O ports 0-2 while J5 han dles ports 3-5. The pin defi ni tions for J4 and J5 ar J4 conThe 48 lines of par al lel I/O are ter mi nated through two 50- pin con nec tors at J4 and J5. Th Par al lel I/O Con nec tor dresses start ing dress vices. al lel abled dress al lel tures Plus abled abled ing Par al lel I/O En abl 2 1 J1 2 1 J1 soft ware gram ma ble. pin nec tors ing low dus try d r ity be inad dress of 120H. The first 24 lines are ca pa ble of fully latched event sens ing with sense po l izes Sys tems density - "The Embedded Systems Authority" WinSystems 1 o o 2GND o o 2GND 3 o o 4GND o o 4GND 5 o o 6GND o o 6GND 7 o o 8GNDGND o o 8 9 o o 10GND o o 01GND o o 12GNDo o 12GND o o 14GNDo o 41GND o o 16GNDo o 61GND o o 18GNDo o 81GND o o 20GNDo o 02GND o o 22GNDo o 22GND o o 24GNDo o 42GND o o 26GNDo o 62GND 72 o o 28GND72 o o 28GND o o 03GNDo o 03GND o o 23GNDo o 23GND o o 43GNDo o 43GND o o 63GNDo o 63GND o o 83GNDo o 83GND o o 04GNDo o 04GND o o 24GNDo o 24GND o o 44GNDo o 44GND o o 46GNDo o 46GND o o 84GNDo o 84GND o o 05+5VGNDo o 05GNDV 2.20.3e mg so the CPU board.limit cur 2.20.4 s - reg and the text that folrizes the reg 2 - 22s991206 OPERATIONS MANUAL LBC-PluPage s ters. is ters lows pro vides de tails on each of the in ter nal i le sum ma48 lines of digi tal I/O. There are 17 unique reg is ters within the WS16C48. The fol low ing ta b The LBC- Plus uses the Win Sys tems’ ex clu sive ASIC de vice, the WS16C48. This de vice pro vide WS16C48 Reg is ter Defi ni tions rent to a safe value (less than 1A) to avoid dam ag ing i bil ity tJ1. When J1 is jumpered +5 volts is pro vided at pin 49 of both J4 and J5. It the user's re spon p er inThe I/O con nec tors can pro vide +5 volts to an I/O rack or for mis cel la ne ous pur poses by ju Par al lel I/O VCC En abl +5 49 49 Port 3 Bit 0 47 Port 0 Bit 0 47 Port 3 Bit 1 45 Port 0 Bit 1 45 Port 3 Bit 2 43 Port 0 Bit 2 43 Port 3 Bit 3 41 Port 0 Bit 3 41 Port 3 Bit 4 39 Port 0 Bit 4 39 Port 3 Bit 5 37 Port 0 Bit 5 37 Port 3 Bit 6 35 Port 0 Bit 6 35 Port 3 Bit 7 33 Port 0 Bit 7 33 Port 4 Bit 0 31 Port 1 Bit 0 31 Port 4 Bit 1 29 Port 1 Bit 1 29 Port 4 Bit 2 Port 1 Bit 2 Port 4 Bit 3 25 Port 1 Bit 3 25 Port 4 Bit 4 23 Port 1 Bit 4 23 Port 4 Bit 5 21 Port 1 Bit 5 21 Port 4 Bit 6 19 Port 1 Bit 6 19 Port 4 Bit 7 17 Port 1 Bit 7 17 Port 5 Bit 0 15 Port 2 Bit 0 15 Port 5 Bit 1 13 Port 2 Bit 1 13 Port 5 Bit 2 11 Port 2 Bit 2 11 Port 5 Bit 3 9 Port 2 Bit 3 Port 5 Bit 4 7 Port 2 Bit 4 Port 5 Bit 5 5 Port 2 Bit 5 Port 5 Bit 6 3 Port 2 Bit 6 Port 5 Bit 7 1 Port 2 Bit 7 J5 J4 - "The Embedded Systems Authority" WinSystems" I/O Ad Page 0Page 1Page 2Page 3 t HPort 0 I/OPort 0 I/OPort 0 I/OO HPort 1 I/OPort 1 I/OPort 1 I/OO HPort 2 I/OPort 2 I/OPort 2 I/OO HPort 3 I/OPort 3 I/OPort 3 I/OO HPort 4 I/OPort 4 I/OPort 4 I/OO HPort 5 I/OPort 5 I/OPort 5 I/OO H HPage/LockPage/LockPage/LockPage/Lock HN/A0Enab_0 HN/A1Enab_1 HN/A2Enab_2 Reg is ter De tails Port 0-5 I/O - mpedance state d se (up to 12mA) pin to sink cur causes the out a '1' to a bit poy, ef it low. INT_PEND ING state of the INT_ID0 throug the com re h reg- This read- ee - - rupt. PAGE/LOC K as shown here : D7 D6 Page 0 1 2 3 6s2 32 -Page OPERATIONS MANUAL LBC-Plu99120 1 1 Page 1 0 Page 0 1 Page 0 0 Page - This reg is ter serves two pur poses. The up per two bits se lect the reg is ter page in use ing in terice Rou tine to quickly de ter mine if any in ter rupts are pend ing and which I/O port has a pend n In ter rupt ServI/O port cor re spond ing to the bit po si tion(s) that are set. Read ing this reg is ter al lows a nd ing on thINT_ID2 reg is ters. When any of the lower 3 bits are set, it in di cates that an in ter rupt is p only is ter flects bined pull ing fec tivelreg is ter. Writ ing si tion put rent a '0' in thmode, a read re flects the in verted state of the I/O pin, such that a high on the pin will read a in the in put(pulled high by ex ter nal 10K ohm re sis tors). This al lows it to be used as an in put. When use put. Writ ing a '0' to a bit po si tion causes the cor re spond ing out put pin to go to a High- I - Each I/O bit in each of the 6 ports can be in di vidu ally pro grammed for in put or out Int_ID2Pol_0A Int_ID1Pol_09 Int_ID0Pol_08 07 Int_PendingInt_PendingInt_PendingInt_Pending06 Port 5 I/05 Port 4 I/04 Port 3 I/03 Port 2 I/02 Port 1 I/01 Port 0 I/00 Offse dress - "The Embedded Systems Authority WinSystems i to the I/O port poBits 5-0 alrt fur .writes to the cor POL0- POLy2 t - edge de fal se in. ENAB0- ENAB2 d - ct t the pend INT_ID0 - INT_ID2 They are used to when page 3 is se are ac - These reg t - in this reg (value ig 2.21VGA Con figu ra tion 0 2 o o o o 4 2 - 42s991206 OPERATIONS MANUAL LBC-PluPage 3 1 J2 is ter nored) clears ALL of the pend ing in ter rupts is ter. e to this regpro grammed into the cor re spond ing po lar ity reg is ter has been rec og nized. Note that a wri of the po lar ityiden tify cur rently pend ing edge in ter rupts. A bit when read as a '1' in di cates that an edge is ters ces si ble lected. reena bling ing in ter rupt. by dis abling andis dis abled. Note that this reg is ter can be used to in di vidu ally clear a pend ing in ter rup tion in ter ruprupt is en abled for the cor re spond ing port and bit. When cleared to a '0' the bit's edge de te e tec tion in ter port and bit- by- bit ena bling of the edge de tec tion in ter rupts. When set to a '1' the edge - These reg is ters are ac ces si ble when page 2 is se lected. They al low for port- by- n ter ruptstec tion ter rupts while writ ing a '0' to a bit po si tion lects ling tec tion i s the ris ing edge dese lec tion on a port- by- port and bit- by- bit ba sis. Writ ing a '1' to a bit po si tion se lec - These reg is ters are ac ces si ble when page 1 is se lected. They al low in ter rupt po lar it re spond ing I/O port the low for lock ing ten the I/O ports. A '1' writ si tion will pro hib - "The Embedded Systems Authority" WinSystems" 2.21.1 A oe on - modes as well as Color and Mono and Super- stan sup The C&T con- flat panel su pro Win in with 8,9,12,15,16,18, and 24-chrome pant - . pan FPAs and supneer for the most cur - f u - the panel. HAZ ARD WARN ING- : wn - . changes with power re pan 2.21.2 s at U15. Vari ROM popu with a video BIOS ex comes stanThe LBC- n - m the BIOS ROM for t con The fac the FPA supthe panel famhe size O. 00 22 o o o o o o o o 44 s2 52 -Page OPERATIONS MANUAL LBC-Plu991206 27C040 27C020 27C08027C010 3 3 1 1 J2 J2 M sizespro vided but the il lus tra tion be low shows the proper jump er ing of J20 for the sup ported R ily ports. tory will or di nar ily fig ure age for age. The FPA adapter mod ules, when con nected to J33, auto mati cally se lect the cor rect BIOS i BIOS imROM sizes can be used to sup port a va ri ety of flat panel con figu ra tions each need ing its ow pan sion Plus dard lated ou VGA BIOS ROM Type Se lec tion pen sive els, make all con nec tion moved le and exwir ing or han dling the inverter out put. To avoid dan ger of shock and to avoid dam ag ing frag i he frequency volt age can ex ceed 1000 volts and can pres ent a shock haz ard. Care should be taken LCD pan els can re quire a high volt age for the panel back light. This high er cised to avoid dam ag ing or de stroy ing ld be exnot di rectly sup ported by a Win Sys tems FPA mod ule is at the user's risk and ex treme care sho lat paneler enced in the docu men ta tion ac com pa ny ing the FPA mod ule. At tempted con nec tion to any should be refDe tails re gard ing in ter fac ing to spe cific Flat Pan els is not pro vided in this man ual but rent list of avail able ported els En githrough a se ries of FPA (Flat Panel Adapter) mod ules. Con tact your Win Sys tems Ap pli ca tions p por els bit ter faces. Sys tems vides trol lers. trol ler ports dard VGA video on the LBC-Plus uses the Chips and Tech nolo gies 6554X se ries of high per form ance VGA c d ules. Thout put as well as a va ri ety of Flat Panel Dis plays us ing op tional Flat Panel Adapter (FPA) m The LBC- Plus uses a third gen era tion CRT/Flat panel VGA con trol ler. It sup ports stan dard VG In tro duc tion - "The Embedded Systems Authority WinSystems 2.21.3n par at J27. An adapter ca is made via the con to a stanVideo outt - The pin defi J27 o o 2 o o 4N o o 6 o o 8C o o 10C 2.21.4nFlat Panel Out a o - de i shown here : o o 2SW0 o o 4SW2 o o 6P23 o o 8P21 o o 10P19 o o 12DGND o o 14P17 o o 16P15 o o 18P13 o o 20DGND o o 22P11 o o 24P9 o o 26P7 o o 28DGND o o 304P5P o o 322P3P o o 340P1P o o 36DGND o o 38LPK o o 40MM o o 42C o o 44E o o 46 o o 48 o o 50CC 2 - 62s991206 OPERATIONS MANUAL LBC-PluPage VC VC 49 +12V +12V 47 PVS -12V 45 ENVE PHS 43 ENVC ENBKL 41 FL 39 SHFCL 37 GN 35 33 31 29 GN 27 P6 25 P8 23 P10 21 GN 19 P12 17 P14 15 P16 13 GN 11 P18 9 P20 7 P22 5 SW3 3 SW1 1 J33 ons for J33 arepanel. Ref er to the FPA docu men ta tion for spe cific hook- up in struc tions. The pin defi ni t for thment to the panel it self. The FPA mod ule also sup plies any spe cial con trols that may be neede r at tachap pro pri ate FPA (Flat Panel Adapter) mod ule which then breaks out the nec es sary ca bling f bled to theCon nec tion to all flat pan els is made via the 50- pin con nec tor at J33. This con nec tor is c put nec tio Con GNDVSYN 9 GNDHSYN 7 GNDBLUE 5 GNDGREE 3 GNDRED 1 nec tor. ni tions for the J27 con nec tor are shown here : number CBL- 207-1 is avail able from Win Sys tems to adapt from J27 to the stan dard DB15 VGA con put dard VGA moni tor nec tor ble CRT Out put Con nec tio - "The Embedded Systems Authority" WinSystems 2.21.5s - show the video modes along with the re from the C&T 65540/65545 da exing ta- quired amount of RAM. t yttlT #Clockyy eyenMemoryE )))) 2 5BC 5 2 +5BC 5 44585BC 5Graphics485BC 6Graphics285BC 5 +7o2BC D6185BC E6185BC F5BC 01615BC 1125BC 21615BC d 3185BC l CRT Codes A - PS/2 Fixed Frequency analog CRT or equivalent (31.5/35.5 Khz Horizontal Frequency Specification) B - Multi-Frequency CRT Monitor (37.5 Khz minimum Horizontal Frequency Specification) (NEC MultiSync 3D or equivalent) C - Multi-Frequency High-Performance CRT Monitor (48.5 KHZ minimum Horizontal Frequency Specification) MultiSyc 5D or equivalent 6s2 72 -Page OPERATIONS MANUAL LBC-Plu99120 Pixe A,B,256K7031.525.17320 X 2008 X 40 X 25256 Packe A,B,256K6031.525.17640 X 4808 X 1680 X 30Planar A,B,256K6031.525/17640 X 4808 X 1680 X 30Planar A,B,256K7031.525.17640 X 3508 X 1480 X 25Planar A,B,256K7031.525.17640 X 3508 X 1480 X 25MonoPlanar A,B,256K7031.525.17640 X 2008 X 80 X 25Planar A,B,256K7031.525.17320 X 2008 X 40 X 25Planar 720 X 3509 X 880 X 25 A,B,256K7031.528.32720 X 3509 X 1480 X 25MonText 720 X 4009 X 1680 X2 A,B,256K7031.525.17640 X 2008 X 80 X 25 A,B,256K7031.515.17320 X 2008 X 40 X 25 A,B,256K7031.525.17320 X 2008 X 40 X 2Graph ics 25.17620 X 2008 X 880 X 25 A,B,256K7031.525.17640 X 3508 X 1480 X 2516Text2+, 3 28.32720 X 4009 X 1680 X 25 25.17320 X 2008 X 840 X 25 16 A,B,256K7031.525.17320 X 3508 X 1440 X 25Text0+, 1+ 28.32360 X 4009 X 1640 X 25 (Hz(KHz(MHz(Hex CODReso lu tioSizDis plaMod Fre quencFre quencCol ors CRVideoPixeFonTexDis pla Ver ti calHori zon talDoMode Stan dard Video Modes - VGA Stan dard bles tracted ta book The LBC- Plus video sec tion sup ports a number of stan dard and ex tended VGA modes. The fol low Video Mode Ta ble - "The Embedded Systems Authority" WinSystems s Mode Reso eDotl ttlT #kyy eeMemoryE )))) 02r61005BC 22r61600C X 42r6160BC 768 I0BC 03r6005KC 23r6600C X 43r660BC 768 0BC 04r32K00BC 14r64K00BC 05rM00BC X 06t60BC 400 X 16Text60BC 400 06160C X 56160BC 768 BC 87l505BC 97l005BC C7l7600C X E7l860BC 768 lBC Support for the modes above is included directly in the BIOS. The ‘I’ in the mode # column indicates “interlaced” CRT Codes Speci Fre (31.5/35.5 Khz Hori CRT or equivaA - PS/2 Fixed fre) B - Multi-Frequency CRT Monitor (37.5 Khz minimum Horizontal Frequency Specification) (NEC MultiSync 3D or equivalent) C - Multi-Frequency High-Performance CRT Monitor (48.5 KHZ minimum Horizontal Frequency Specification) MultiSyc 5D or equivalent 2 - 82s991206 OPERATIONS MANUAL LBC-PluPage i ca tion quency ana log lent zon tal quency f B,1M4335.544.90Packed Pixe7EI 60 1M48.565.08 X 1128 X 4256Packed Pixe 1024 B,512KB6037.540.0800 X 608 X 1100 X 3256Packed Pixe A,B,512K6031.525.17640 X 488 X 1680 X 3256Packed Pixe A,B,256K7031.525.17640 X 408 X 1680 X 216Packed Pixe B,512K4335.544.9072,75I 512K6048.565.08 X 1128 X 48Planar72,7 1024 B,256KB6038.040.0800 X 6008 X 1100 X 37Planar6A,7 A,B,256K6830.540.08 X 1132 X 5016 1056 A,B,256K6830.540.08 X 1132 X 2516Tex 1056 B.1M51.627.165.0640 X 4808 X 1680 X 31624- Bit Linea A,B,1M6031.550.35640 X 4808 X 1680 X 316- Bit Linea A,B,1M6031.550.35640 X 4808 X 1680 X 316- Bit Linea B,1M4335.544.934I 1M6048.565.08 X 1128 X 48258- Bit Linea 1024 B,512KB6037.540.0800 X 608 X 1100 X 37258- Bit Linea A,B,5126031.525/17640 X 488 X 1680 X 3258- Bit Linea B,512K4335.544.924 512K6048.565.08 X 1128 X 484- Bit Linea 1024 B,512KB6037.540.0800 X 608 X 1100 X 374- Bit Linea A,B,512K6031.525.17640 X 488 X 1680 X 34- Bit Linea (Hz(KHz(MHz(Hex CODReso lu tionSizDis playMod Fre quencFre quencClocCol ors CRVideoPixeFonTexDis play Ver ti calHori zon taMod Ex tended lu tion - "The Embedded Systems Authority" WinSystems ModesHigh Re ModeDotl yttlT #kyy eyenMemoryE ))) 21r610C 03r6000C l000C 061600C r6600BC 7Cl100 X 37600BC 2.22Eth er net Con figu ra tion k - 10BASE5 in in net Sup area net of CSMA/CD lo or B , nce with IEEE 802.3 stan loop heart col trans the re block inThis funcack jab - physi a com pro and pulse trans fil transtion reecal in and the twisted- EN Confrom the AT/LAN n via a dif and de en the Man al mod ENThe in cr m - . (NIC) Con In by the Net is pro (MAC) func Con AcThe Me m- y. s - - . 991206s2 92 -Page OPERATIONS MANUAL LBC-Plu dia type, I/O ad dress, in ter rupt, etc ing mode, melows for “jumper less” con figu ra tion us ing soft ware to con fig ure the board for its op er at alAn on board EPROM holds the Eth er net Ad dress and op tional con figu ra tion in for ma tion. Thi map chip mem ory which can be ac cessed ei ther through an I/O port or mapped into the sys tem mem or eans of offmod ule which pro vides sim ple and ef fi cient packet trans mis sion and re cep tion con trol by dia cess trol tion vided work ter face trol ceiv ers e dia transand pro vides full IEEE com pli ant AUI (At tach ment Unit In ter face) for con nec tion to other eiver mod uleand di ag nos tic loop back ca pa bil ity. The EN DEC mod ule in ter faces di rectly to the trans c t trans la totrans ceiver and phase- lock- loop de coder at 10 Mbit/sec. Also in cluded are a col li sion de te tial te grated DEC ule lows ches ter cod ing cod ing fer e TIC trol ler DEC mod ule pair me dium. ter fac sis tors, mit/re ceive ters, form ers vide plete equali zaand link in teg rity blocks as de fined in the stan dard. The trans ceiver when com bined with the ber, tional cor po rates ceiver, mit ter, li sion beat. b dards. Encode- Decode (EN DEC) with an AUI in ter face, and 10BASE-T trans ceiver func tions in ac cor da MAC)us ing the on board trans ceiver. The AT/LAN TIC pro vides the Eth er net Me dia Ac cess Con trol ( ASE-T) 10BASE2 via an ex ter nal trans ceiver con nected to the AUI port, and twisted pair Eth er net (10 ple men ta tion cal works. ported work ter faces clude the imTwisted- Pair In ter face con trol ler. The AT/LAN TIC con trol ler is a CMOS/VLSI de vice used in The Eth er net sec tion of the LBC- Plus uses the Na tional 83905 AT/LAN TIC Lo cal Area Net wor 1M7546.949.5800 X 608 X 1256Packed Pixe 1M7546.949.5800 X 608 X 1100 X 37258- Bit Linea32 512KB7546.949.5800 X 608 X 1100 X 37Planar6A,7 512KB7537.531.5640 X 488 X 1680 X 3256Packed Pixe79 256KB7537.531.5640 X 488 X 1680 X 3258- Bit Linea B,256KB7537.531.5640 X 4808 X 1680 X 30Plana (Hz(KHz(MHz(Hex) CODReso lu tioSizDis plaMod Fre quencFre quencClocCol ors CRVideoPixeFonTexDis pla Ver ti calHori zon ta fresh - "The Embedded Systems Authority" WinSystems" J35 1 o o 2 3 o o 4 5 o o 6 7 o o 8 9 o o o o 12 o o 14 o o 16 o o 18 o o 20 J32 1 2 o o 2.22.1 ModeJumpered vs. Jumper t u - : via the jumper at J32 as shown here is se J32J32 1 21 2 o o o o The choice of “jumpered” or “jumperf This means that i is to ex NOTE : t- IM POR TANT NOTE :t selection.J30 (Sec 2 - 03s991206 OPERATIONS MANUAL LBC-PluPage tion 1.6) which matches the “jumpered” or “jumper less” in ter rupt In ter rupts must AL WAYS be jumpered manu ally via the jumper block a PROM (ex cept for the Eth er net Ad dress) is ig nored. he EE comes to tally from the EE PROM. Simi larly if “jumpered” mode is se lected the in for ma tion in n for ma tion“jumper less” mode is se lected, all of the jump ers on J35 are ig nored and the con figu ra tion i tally less” clu sive. Jumpered Mode Jumperless Mode for ma tion lected ra tion invia the con figu ra tion in for ma tion stored in the on board EE PROM. The source for the con fig er) orThe Eth er net sec tion can be con fig ured ei ther through the jumper block at J35 (de scribed la less 19 17 15 13 11 10 - "The Embedded Systems Authority WinSystems when the “jumpered” mode is se the J35 jumpThe fol 2.22.2nI/O Port Se . jumper. The choices av three pins on the J35 con us is seThe base ad : H H H H H H H e J35J35 J35J35 . . . . . . . . 11 o o 1211 o o 1211 o o 1211 o o 12 13 o o 1413 o o 1413 o o 1413 o o 14 15 o o 1615 o o 1615 o o 1615 o o 16 17 o o 1817 o o 1817 o o 1817 o o 18 19 o o 2019 o o 2019 o o 2019 o o 20 H J35 J35 J35J35 . . . . . . . . 11 o o 1211 o o 1211 o o 1211 o o 12 13 o o 1413 o o 1413 o o 1413 o o 14 15 o o 1615 o o 1615 o o 1615 o o 16 17 o o 1817 o o 1817 o o 1817 o o 18 19 o o 2019 o o 2019 o o 2019 o o 20 H . for each of these choices is shown in the fol 62 13 -Page OPERATIONS MANUAL LBC-Plus99120 The proper jump er ing low ing il lus tra tions 360340H320H2C0H 280240HNONE 300H Non 360 340 320 300 2C0 280 240 are ail able dress lected ing figu ra tion The NE2000 sec tion of the LBC-Plus uses 32 con secu tive I/O ad dresses in the CPU’s I/O space lec tio low ing sec tions de tail er ing lected. - "The Embedded Systems Authority" WinSystems" 2.22.3n r. There are 8 pos 0 1 2 5 l - rupt choices are shown here : 5555 . . . . . . . . 5 o o 6 5 o o 6 o o 6 o o 6 7 o o 8 7 o o 8 o o 8 o o 8 9 o o 10 9 o o 10 o o 01 o o 10 11 o o 1211 o o 1211 o o 12o o 21 13 o o 1413 o o 14o o 4113 o o 14 . . . . . . . . 3459 5555 . . . . . . . . o o 6 5 o o 6 o o 6 o o 6 o o 8 o o 8 7 o o 8 o o 8 o o 01 9 o o 10 o o 01 o o 01 o o 2111 o o 12o o 21o o 21 o o 41o o 4113 o o 14o o 41 . . . . . . . . 0215 2 - 23s991206 OPERATIONS MANUAL LBC-PluPage IRQ1IRQ1 IRQ1IRQ1 13 13 13 11 11 11 9 9 9 7 7 7 5 5 5 J3J3J3 J3 IRQIRQIRQIRQ 13 11 9 9 7 7 5 5 J3 J3J3J3 e in terThe proper jump er ing for the three rele vant jumper po si tions cor re spond ing to the avail ab IRQ 1 IRQ 1 IRQ 1 IRQ 1 IRQ 9 IRQ 5 IRQ 4 IRQ 3 si ble choices as shown here : e driverThe NE2000 sec tion needs an in ter rupt line for sig nal ing vari ous con di tions to the soft wa In ter rupt Se lec tio - "The Embedded Systems Authority WinSystems 2.22.4 Mode l NE2000 comThe Ethe b- n - ps by the driver. For NE20 is con of this win The ad packet memused to ac in : 55 o o 4 o o 4 o o 6o o 6 o o 8 o o 8 e 2.22.5n choices are : via 2 pins on J35. The avail type is also jumper seThe me 1 x 2 3 . is shown be 5555 o o 2o o 2o o 2o o 2 o o 4 o o o o 4 o o o o 6 o o o o 6 o o 12 TT 1 y transto se 2 - . DB15 con in a stanable which ter 3 ngths with higher losses. or the use of ca in the twisted-than speci 6s2 33 -Page OPERATIONS MANUAL LBC-Plu99120 fied pair speci fi ca tion, ble The non- spec twisted- pair mode with re duced squelch lev els al lows the use of longer ca ble le mi nates dard nec tor The AUI is con nected via J28. An adapter ca ble, WinSystems part number CBL- 147-1, is avail lect the AUI mode and use an ex ter nal ceiver. nec es sarThe thin Eth er net mode is not us able with the LBC- Plus. If thin Eth er net is re quired, it is Non- Spec 10 BASE-AUITHIN ETHERNE10 BASE-T . . . . . . 65 5 65 5 43 3 43 3 1 1 1 1 J3J3J3J3 The J35 jump er ing for each of the op tions low Twisted- pair 10BASE-T Re duced Squelch J28AUI Thin Eth er net Coa Twisted- pair 10BASE-T J22 dia lecta ble able Me dia Type Se lec tio Shared Mem ory ModeI/O Mod . . . . 7 7 5 5 3 3 . . . . J3 J3 be low s showcom pati bil ity the I/O mode should be se lected. The jump er ing for each of the ac cess modes 00 cess ory. dress dow trolled ace idard Mi cro sys tems (for merly West ern Digi tal). In this mode a 32K win dow in the PC adapter s ing the shared mem ory mode. In this mode it is soft ware com pati ble with the WD8013EBT from Sta le us mode, the RAM is ac cessed through the NIC via I/O ports. An al ter nate ac cess scheme is avail a er net buffer RAM can be ac cessed in ei ther of 2 ways. In the typi cal pati b I/O vs. Shared Mem ory - "The Embedded Systems Authority" WinSystems 2.22.6e Vs. En mode, only 8K of uses two 32K byte buffer RAMs on board. In comThe NE2000 sec ls C AT/LAN by the sup sup mode is gen from each RAM. This en When in doubt, choose or drivt NE2000 soft with ge but may not be ushe modes are shown here : mode. The J35 jump J35 J35 o o 18o o 81 o o 20o o 02 ee 2.22.7Status LEDs t :color, lo n r 2.22.8 from NOVELL, QNX, and avail boot fea the use of the re supThe LBC- BIOS ex for a user in pro by al syssome other opROM into he i it will have to be re in a smaller de is supcode. If the BIOS exnto a C. Mr menu of CMOS Setup. in the BIOS fea the SSD Socket Reby con NOTE : this fea Winone or the other may be used. Con 2 - 43991206 OPERATIONS MANUAL LBC-PlusPage tact Sys tems for boards that sup port ture. The Eth er net BOOT ROM sup port and on board SSD sup port are mu tu ally ex clu sive, only fig ur ing lo ca tion op tion tures will ap pea(See sec tion 2.19 for de tails). It is also pos si ble to se lect the ad dress where the BIOS RO mode27C010 de vice. In or der to use this BIOS ex ten sion, the board must be con fig ured for the DO ten sion pro grammed plied vice U23. Only a 27C010 EPROM de vice is sup ported in this mode al though only 32K is avail able for t er at ing tems low ing vi sions stalled ten sion Plus ports mote ture able Boot ROM Se lec tion D6 YEL LOW Link D5 GREEN Re ceive D4 GREEN Trans mit D3 RED Col li sio ca tion, and gen eral scrip tion de of each LED is given here us. TheThere are 4 LEDs in stalled on the LBC-Plus used to give a vis ual in di ca tion of Eth er net sta Com pati ble Mod En hanced Mod 19 19 17 17 . . . . com pati ble er ing for the com pati ble and en hanced driv ers able neric ware ers. avail able hanced er ally ported plied TI l 32K ieach RAM (to tal of 16K) is ac ces si ble to the driver. When the En hanced mode is cho sen the fu tion pati ble Com pati ble hanced Mod - "The Embedded Systems Authority" WinSystems 2.22.9y UtilPlusCfg Con which m by typ ] IThe con side of the screen as shown here : s I e N Q r n Diagnostics S * * d .in the fol s2 53 -Page OPERATIONS MANUAL LBC-Plu991206 low ing sec tions From the main menu choose the de sired func tion. Each of the main menu op tions will be dis cusse ******* Scroll through options using ****** ******* Make Selection using arrow keys and ****** Quit and Return to DO 0x360 I/O Port 5 0x320 I/O Port 10Display/Change Adapter Configuratio Configure New Adapte I/O Port Mode IR AT/LANTIC ADAPTERSCONFIGURATIO SoftwarAugust 20, 1993 11:34PM ConfigurationPLUSCFG V1.17Thick/Thin/TP AT/LANTICWinSystem AT/LANTIC, or NE2000 adapt ers are rec og nized, they will be dis played in a win dow on the right f any figu ra tion pro gram will load and dis play the ba sic menu and con figu ra tion screen. pluscfg [En ter exe cuted ing : the pro vided floppy or can be cop ied to a hard disk. From the DOS com mand line PLUSCFG.EXE is is then saved to the on board EE PROM. PLUSCFG.EXE along with MES SAGE.MSG can be run fro When “jumper less” mode is se lected (Sec tion 2.22.1), the con figu ra tion is made via soft ware figu ra tion it - "The Embedded Systems Authority" WinSystems" 2.22.10 New Adapter et this would be a board that had it's I/O port set to “None”. the new adapter.Two choices are pro nt, lieves are h y In m - . the meable to de s I e NS Q 0 y y u 2 - 63991206 OPERATIONS MANUAL LBC-PlusPage ******* Scroll through options using ******* ******* Make Selection using arrow keys and ******* Return to previous men Configure New Adapter Manuall Configure New Adapter Automaticall _____ 0x320 I/O Port 1 CONFIGURE NEW ADAPTER I/O Port Mode IR AT/LANTIC ADAPTERCONFIGURATIO SoftwarAugust 20, 1993 11:34PM ConfigurationPLUSCFG V1.17Thick/Thin/TP AT/LANTICWinSystem ter mine dia type is unThe sec ond prompt will only be pres ent if there is no ac tive ca ble at tached or if the pro gra Se lect Ca ble ter face - Thin Eth er net or Thick Eth er net or 10BASE-T Adapter Ar chi tec ture - I/O Port or Shared Mem or ese in clude :free for use. The sys tem will then dis play a se ries of con figu ra tion op tions to the user. T sur vey the sys tem, and make auto mat ic choices for I/O ad dress and in ter rupts for what it be The “Con fig ure New Adapter Auto mati cally” will search out an un con fig ured adapter, if pres e vided to con fig ure callyside of the screen. Typi righThis screen is used to con fig ure an in stalled adapter that is not pres ent in the win dow on th Con fig ure - "The Embedded Systems Authority WinSystems" : pres New Adapter ManuThe “Con s I e NS Y 0 ) m s n u * * e - . with the se to pro “Save Consired and then se NOTE : - n , . 2.22.11n Adapter Con of the main menu presr New Adapte the same screen as shown for “ConThis op id .then se NOTE : - n , . 991206s2 73 -Page OPERATIONS MANUAL LBC-Plu for con figu ra tion ear lierfor what you know are valid choices, it will be nec es sary to use the “jumpered” mode, de scribed se lec tiolieves are be ing used by other hard ware in the sys tem. If PLUSCFG re fuses to al low a de sired PLUSCFG will not al low se lec tion of I/O ports, in ter rupts, or mem ory ad dresses that it be lect “Save Con figu ra tion” to pro gram the EE PROM with the new in for ma tion red anManu ally”. Use the up and down ar row keys and the Tab key to al ter the con figu ra tion as de s fig ure ents tion Dis play/Change figu ra tio for con figu ra tion ear lierfor what you know are valid choices, it will be nec es sary to use the “jumpered” mode, de scribed se lec tiolieves are be ing used by other hard ware in the sys tem. If PLUSCFG re fuses to al low a de sired PLUSCFG will not al low se lec tion of I/O ports, in ter rupts, or mem ory ad dresses that it be lect figu ra tion” gram the EE PROM lected choices Use the up and down ar row keys and tab key to change the dis played con figu ra tion to what is d ******* Scroll through options using ****** ******* Make Selection using arrow keys and ****** Return to previous men Save Configuration Temporarily Change Configuratio Advanced Configuration Option Boot Prom - No Boot Pro Adapter Architecture - I/O Port Physical Media - TPI (10BaseT Interrupt assignment - IRQ3 I/O Base Address - 0x24 Novell Configuration - None CONFIGURE NEW ADAPTER MANUALL AT/LANTIC ADAPTERCONFIGURATIO SoftwarAugust 20, 1993 11:34PM ConfigurationPLUSCFG V1.17Thick/Thin/TP AT/LANTICWinSystem fig ure ally” ents a screen simi lar to the one shown be low - "The Embedded Systems Authority WinSystems" 2.22.12s sn in this screen : s I e NS Q S0 s * 2.22.13 p screen is shown on the at this time. A sam ca to the netadapter should be con- owing page : 2 - 83s991206 OPERATIONS MANUAL LBC-PluPage foll nected work ble ple e, etc. TheThis choice ini tial izes the se lected adapter and con firms I/O ad dress, in ter rupt, me dia ty Adapter Ini tiali za tion and Di ag nos tics ******* Scroll through options using ******* ******* Make Selection using arrow keys and ****** Return to previous menu Advanced Network Diagnostics Adapter Initialization & disagnostic 0x360 I/O Port 5 0x320 I/O Port 1 INITIALIZATION AND DIAGNOSTIC I/O Port Mode IR AT/LANTIC ADAPTERCONFIGURATIO SoftwarAugust 20, 1993 11:34PM ConfigurationPLUSCFG V1.17Thick/Thin/TP AT/LANTICWinSystem howThis third choice from the main menu al lows the se lec tion from the di ag nos tics sub- menu as Di ag nos tic - "The Embedded Systems Authority WinSystems s I e SN Q S S K . K .K K * * d . can be exe 2.22.14s Di screen is shown here : NetThe Ad WinSystemsC 7n Me NS Q S 5 S . . * * 991206s2 93 -Page OPERATIONS MANUAL LBC-Plu ******* Scroll through options using ****** ******* Make Selection using arrow keys and ****** Return to previous menu Show packets on network Setup as a slave station Set up as a master station.. ADVANCED NETWORK DIAGNOSTIC 0x360 I/O Port 0x320 I/O Port 10 INITIALIZATION AND DIAGNOSTIC I/O Port Mode IR AT/LANTIC ADAPTERCONFIGURATIO SoftwarAugust 20, 1993 11:34P ConfiguratioPLUSCFG V1.1Thick/Thin/TPI AT/LANTI vanced work Di ag nos tics Ad vanced Net work ag nos tic di ag nos tics cuted The Ini tiali za tion and Di ag nos tics must be run and must pass bef ore any of the Ad vanceNOTE : ******* Scroll through options using ****** ******* Make Selection using arrow keys and ****** Press to return to previous menu. Boot Prom Check (No Boot Prom)...............................................................O ....OInterrupt Assignment (5).......................................................................... Check cable connection (Cable Connected)................................................O ...OKBuffer Memory Check............................................................................... Network Interface Controller (080017086050)..............................................O INITIALIZATION AND DIAGNOSTIC INITIALIZATION AND DIAGNOSTIC I/O Port Mode IR CONFIGURATIO AT/LANTIC ADAPTER SoftwarAugust 20, 1993 11:34PM ConfigurationPLUSCFG V1.17Thick/Thin/TP AT/LANTICWinSystem - "The Embedded Systems Authority" WinSystems" Net for AdThree choices are pro 2.22.15 Sta test will ini The mas test to be set up as the Mas the board unThis enng. The . the Mas prior to startSlave must be en s will be en length and af will then re.t 2.22.16n ts . by the Mas 2.22.17kShow Packet on Net le screen is shown here : WinSystems I e S z O M , Y t 2.22.18SQuit and Re you to the DOS prompt.This main menu op 2 - 04s991206 OPERATIONS MANUAL LBC-PluPage tion ex its PlusCfg and re turns turn to DO Press when finished examining receive packe 04E0 41 4E 53 3A 07 00 64 77 23 23 23 2C 23 23 23 52 ANS:..dw###,###R 04D0 23 23 23 59 0C 00 54 77 56 41 4C 49 44 20 54 53 ###...TwALID.TR 04C0 20 4B 45 59 0C 00 54 77 56 41 4C 49 44 20 54 52 KEY :..Hw### 04B0 50 52 53 54 55 58 4D 47 0C 00 38 77 49 54 45 4D PRSTUXMG..8wITE 04A0 53 54 55 58 4F 47 0E 00 26 77 41 43 44 49 4E 4F STUXMG..&aACDINO 0490 41 43 50 52 0E 00 14 77 41 43 44 49 4E 4F 50 52 ACPR...wACDIN 0480 74 BF 05 00 02 77 4D 44 54 47 53 00 04 00 0C 77 t....wMDTGS....w 0470 06 00 F0 76 41 47 44 53 54 4D 00 00 00 40 E1 7A ..vAGDSTM...@. 0460 51 33 33 87 02 01 00 00 00 04 00 20 44 6F 63 2D Q33..........(Doc- 0450 98 7D D0 40 03 00 00 00 01 00 00 00 00 00 01 04 ..}.@............. Length/Type : 05C3 Hex HW CRC : D703A649 SW CRC : NORMAL Destination 0040F698A3E6 Source : 0040F6988448 Received Status : 01 Next Pointer : 54 Receiver Length : 1493 RECEIVED PACKET CONTENT SoftwarAugust 20, 1993 11:34PM ConfigurationPLUSCFG V1.17Thick/Thin/TP AT/LANTIC This op tion dis plays in HEX and AS CII pack ets as they are re ceived from the net work. A sam p wor ini ti ated ter This choice should be made for a known good board. It will echo back across the net work all pack e Setup as Slave Sta tio The sys tem quest a packet repe ti tion ter tered gin the te abled ing ter ables der ter. ter ti ate i Setup as a Mas ter tion vided vanced work Di ag nos tics - "The Embedded Systems Authority WinSystems" 2.23Multi I/O Con nec tor a - to the for J3 are shown here : The pin defi J3 o o 2RD o o 4D o o 6D o o 8IR o o0 1DD o o2 1R o o 41DS o o6 1RS o o8 1DI o o0 2DE o o 22R0 o o4 2T1 o o6 2N2 o o8 23 o o0 34 o o2 35 o o4 36 o o6 37 o o8 3 LPT - ACK o o0 4Y o o 24LPT - PE o o4 4DT o o6 4D o o8 4KA o o0 5V 2 14 -Page OPERATIONS MANUAL LBC-Plus991206 KEYBD - +5V KEYBD - +5 49 KEYBD - KDAT KEYBD - CL 47 KEYBD - GND KEYBD - GN 45 LPT - SLC KEYBD - GN 43 LPT - GND 41 LPT - BUS LPT - GND 39 LPT - GND 37 LPT - PD LPT - GND 35 LPT - PD LPT - GND 33 LPT - PD LPT - GND 31 LPT - PD LPT - GND 29 LPT - PD LPT - GND 27 LPT - PD LPT - SLCTI 25 LPT - PD LPT - INI 23 LPT - PD LPT - ERRO 21 LPT - STROB LPT - AUTOF 19 COM2 - R COM2 - GN 17 COM2 - CT COM2 - DT 15 COM2 - RT COM2 - TX 13 COM2 - DS COM2 - RSX 11 COM1 - GN COM2 - DC 9 COM1 - DT COM1 - R 7 COM1 - TX COM1 - CTS 5 COM1 - RX COM1 - RTS 3 COM1 - DC COM1 - DS 1 con ven tional I/O con nec tors. ni tions nec tor at J3. An adapter ca ble, part number CBL- 162-1, is avail able from Win Sys tems to adapt the conThe I/O to the pri mary se rial chan nels, the printer port, and key board are all ter mi nated vi - "The Embedded Systems Authority WinSystems 2.23.1 Sum /e r J2r7 J3r1 J42 J52 J63 J7r J8r7 J9r7 0r7 17 22 3r bat7 r3 5r1 r9 r r6 r5 r4 r 3 Se6 4r4 9 r rN/A J29r rout4 1r3 2r r0 r t se3 7 N/A 8r0 r0 r0 2 - 24s991206 OPERATIONS MANUAL LBC-PluPage 2-2U27 VBAT Se lect JumpeJ40 2-2U27 De vice type se lect jumpeJ39 2-2U23 De vice type se lect jumpeJ3 SMI In ter ruptJ3 2-CPU Clock mul ti plier lecJ36 2-31NE2000 Con figu ra tion jumpeJ35 2-2U23 VBAT se lect jumpeJ34 2-26FPA50 Panel adapter I/O con nec torJ33 2-30NE2000 Mode se lect jumpeJ3 2-PCI Bus clock se lect jumpeJ3 2-In ter rupt ing headerJ30 2-15PC/104- 16 Con nec to Eth er net AUI con nec toJ28 2-26Video out put con nec toJ27 2-15PC/104-8 con nec torJ26 2-1SSD/DOC Mode se lect jumperJ25 2-1ECP DMA se lect jumpeJ2 2-COM3/COM4 En able Dis able lect jumperJ2 N/A10BASET I/O con nec toJ22 2-1ECP mode DMA se lect jumpeJ21 2-2VGA BIOS size se lect jumpeJ20 2-16Watch dog timer con figu ra tion jumperJ19 2-1IDE I/O Con nec toJ18 2-14Floppy disk I/O con nec toJ17 2-1SSD Ar ray size se lect jumpeJ16 2-2Par al lel I/O En able jumpeJ1 2-PCI Bus Clock se lect jumpeJ14 2-1Mas ter tery en able jumpeJ1 2-CPU Speed Se lect jumperJ1 2-COM2 mode se lect jumper J1 2-COM1 mode se lect jumpeJ1 2-COM2 mode se lect jumpe 2-COM1 mode se lect jumpe 2-18Power/Re set Con nec to 2-1Par al lel port mode se lect 2-2Par al lel I/O ports 3-5 2-2Par al lel I/O ports 0-2 2-4Multi-I/O Con nec to 2-COM3/COM4 I/O Con nec to 2-22 Par al lel I/O VCC En able jumperJ1 Jumpe Page Ref er encDe scrip tionCon nec tor Jumper/Con nec tor mary - "The Embedded Systems Authority" 3 Award BIOS Con figu ra tion 1Gen eral In for ma tion - is stored in batter This type of in con sys the baers to mod . Setup in 3.2En ter ing Setup s e - yg - : of in cer Setup” - press the F1 key. 3Setup Main Menu d ethis sec the func or to exe 63 1 -Page OPERATIONS MANUAL LBC-Plus99120 menu cute tion se lected. r the sub- tion. Use the ar row keys to high light the de sired se lec tion and press EN TER to en t inThe main menu screen is dis played on the fol low ing page. Each of the op tions will be dis cusse 3. ror con di tion, he ermay ap pear. To En ter Setup at that time press the DEL key. To at tempt to con tinue, ig nor ing t “Press F1 to con tinue or DEL to En ter nately, un der tain er ror con di tions cor rect setup the mes sage l terthe RE SET but ton, if so equipped, or by press ing the CTRL, ALT and DEL key si mul ta ne ously. A press inspond and you still wish to en ter setup, re start the sys tem by turn ing it OFF and then ON or b you reDEL to En ter Setup” ap pears on the lower left of the screen. If the mes sage dis ap pears bef or PresTo en ter setup, power on the com puter and press the DEL key im me di ate ly af ter the mes sage “ CMOS RAM so that it re tains for ma tion when power is turned off y- backed ify sic tem figu ra tion. for ma tion The LBC- Plus comes equipped with a stan dard AWARD BIOS with Setup in ROM that al lows us 3. WinSystems" ) Y G N S ­ ¯ ® ¬ m . 4Stan dard CMOS Setup y Each cate cate into sev CMOS Setup menu are diThe items in the Stan P value for the item.PgDn, +.-. keys to se Date > y ) C 9 Time clock suc military- on the 24- The time is calThe time is hour,minute,sech that 1:00PM is 13:00:00. 3 - 2991206 OPERATIONS MANUAL LBC-PlusPage ond. cu lated hour, time year = The year, from 1900 to 209 month = the month, JAN through DE Date = the date, from 1 to 31 (or the maxi mum for the cur rent month day = The day, from Sun to Sat, de ter mined by the BIOS and is dis play onl The date for mat is ,< date>,< month>, keys si mul ta ne ously im me di ate ly fol low ing dis play of the d disk, sim plypass the sili con disk boot in or der to re for mat or to boot the ac tual floppy drive, or the ha s sary to byAf ter the next re set the for mat ted sili con disk will boot as the A: drive. If it is ever nec e for mat b: /s/ sim ple DOS com mand : th thThe disk is now pre pared for for mat ting. The sys tem must be re booted prior to for mat ting w - "The Embedded Systems Authority WinSystems" d d to cre two 512K X 8 SRAMs. In orwe have in need the line : f - ray. line : floppy with the CON 2 We by the 512K of ROM which will be pre the 512K RAMThis would cre a our 512K SRAM into U23. ko w - coming CON 2 disk socket U27. in the sili NOTE : e a drive with th cre disk de with DOS instalUSSD, as is the con NEXT AVAIL ABLE e - D tr as e is taken and the disk is used as is. If there is not a disk of the type and size speci 4 - 6s991206 OPERATIONS MANUAL LBC-PluPage cre ated. fied, it is If so, no ac tionsili con disk to de ter mine if a disk al ready ex ists which matches the pa rame ters speci fied. am ines thin for ma tion pro vided on the CON FIG.SYS in vo ca tion line. Dur ing ini tiali za tion, USSD ex nd ad dresnec es sary to for mat a disk cre ated with USSD. The disks are self for mat ting us ing the size e that it is nevewill be the first avail able let ter fol low ing any other drive let ters al ready in use. Also no with USSter would be C:. In a sys tem with one or more hard drive par ti tions, the sili con disk cre ated drive letthe BIOS sup ported boota ble Sili con Disk. In a sys tem with out a hard disk, the next avail abl drive let ter. Drives A: and B: are al ways re served for the physi cal floppy drive or ven tion la ble vices, ates this will cre ate a 512K RAM DISK con de vice = ussd.sys /mod:p /seg:e000 /psz:16 /inc:1 /pad:1ec /spg:80 /dsz:51 FIG.SYS mand line : a DISK-ON-CHIP. In this case we are boot ing from the DISK- ON- CHIP and will in clude the fol lo tA fi nal ex am ple would be to use the non- bootable RAM DISK in U27 as a sec on dary sili con dis ll would cre ate our ROM DISK as pre vi ously de scribed and place the EPROM into U27. We would in st ate DISK ceded DISK. de vice = ussd.sys /mod:p /pad:1ec /seg:e400 /psz:16 /inc:1 /spg:a0 /dsz:51 cre ate our boota ble FIG.SYS For an other ex am ple as sume that we want a 512K ROM DISK and a 512K RAM DISK. We would the arwhich would in di cate that we wish to cre ate a disk of 1M (1024K) start ing at the be gin ning o de vice = ussd.sys /mod:p /seg:e400 /psz:16 /inc:1 /pad:1ec /spg:80 /dsz:1024 stalled der ate the de sired 1 Meg RAM DISK we woul isk andA cou ple of ex am ples might help to il lus trate. Sup pose we're boot ing from a floppy or hard - "The Embedded Systems Authority WinSystems 5Non-Bootable FLASHDISK Usage a The only ch sec in the pre de us to the RAM nearly idenange to the CON of the /EPT:256 pa PEROMs is the ad USSD for the ATwhen us- d would need the line : 6 disk r the USSD driver. re de 6DiskOnChip Usage m d u ny . IDE drive or it can be the only hard disk in the syshard disk to a physi pg and ena 4.6.1DOC Initialization hard de . com the DOS for - i - come a sec s4 7 -Page OPERATIONS MANUAL LBC-Plu991206 on dary fixed disk. ll betached to the sys tem the DOC will be come the boot de vice. If a hard disk is pres ent, the DOC w or atIf the /S switch was used dur ing for mat ting and there is no other fixed disk de vice speci fied DOC is for mat ted us ing mat mand then thdisk), FDISK is run on the DOC drive (be sure to get the right drive), the sys tem is re booted an The DOC is ini tial ized in an iden ti cal fash ion to a fixed disk. DOS is booted (from floppy or bling of the DOC. er inThe DOC is in stalled into the socket at U23. Ref er to the sec tion 2.19 for cor rect de vice jum cal tem darfor the LBC- Plus, emu lates a hard disk rather than a floppy disk. The DOC can be used as a sec o p portthe Flash mem ory all in a sin gle 32- pin de vice. The DOC, un like the other Win Sys tems’ SSD s 1MB to 12MB. The DOC de vice con tains a BIOS ex ten sion, the TFFS (Tiny Flash File Sys tem), an The LBC- Plus sup ports the M- Systems DISK- ON- CHIP (DOC) flash de vice in sizes rang ing fro 4. ad di tional tails gard ing age foin the sec ond socket of the ar ray. Ref er to the pre vious sec tion on non- bootable RAM DISK us in the CON FIG.SYS file on the floppy to be im aged. This in vo ca tion will cre ate a 512K Flash de vice = ussd.sys /mod:p /pad:1ec /seg:e400 /psz:16 /inc:1 /spg:a0 /dsz:512 /ept:25 a 512K PEROM de vice FIG.SYS line which in stalls the USSD driver. An ex am ple us ing a 512K EPROM for a ROM DISK an ing MEL di tion rame ter man ner ti cal DISK age scribed vious tion. The AT MEL 5 Volt Flash Parts (29C040/29C040A) may also be used as a non boota ble drive in 4. - "The Embedded Systems Authority" 5 WS16C48 Pro gram ming Ref er ence 1In tro duc tion h- W . spe 2Func tion Defi ni tions yt ds e - stant defi m i through to bit_number 48 at port 5 bit 7. INIT_IO - Ini tial ize I/O, set all ports to in put Syn tax De scrip tion ar takes a sinThis func dl . set 6s5 1 -Page OPERATIONS MANUAL LBC-Plu99120 in ter rupt tings, and sets the im age val ues is ables alThere is no re turn value. This func tion ini tial izes all I/O pins for in put (Sets them high), io_ad dress - The I/O ad dress of the WS16C48 chip. tion gle gu ment : void init_io(un signed io_ad dress); 0 bit 0 and con tin ues t_number 1 is port1 to 48 (1 to 24 for in ter rupt re lated func tions) that cor re lates to a spe cific I/O pin. B froNote that all of the func tions util ize the con cept of “bit_number”. The “bit_number” is a value ni tions. d conshould in clude the header file “uio48.h”, which in cludes the func tion pro to types and the need river func tionex am ples will be pro vided to il lus trate us age. Any ap pli ca tion mak ing use of any of the , shorThis sec tion briefly de scribes each of the func tions con tained in the driver. Where nec es sar 5. sisor can serve as the ba from which ap pli ca tion cific code can be de rived S16C48com pa ny ing source code equip the pro gram mer with a ba sic li brary of I/O func tions for the at the ac This sec tion pro vides ba sic docu men ta tion for the in cluded I/O rou tines. It is in tended t 5. WinSystems" READ_BIT - Reads an I/O port Bit Syn tax De scrip tion ar takes a sinThis func 0 if the pin is high. WRITE_BIT - Write a 1 or 0 to an I/O pin Syn tax ; De scrip tion This func . . e - .ment. There is no re 5 - 2s991206 OPERATIONS MANUAL LBC-PluPage turn value and other bits in the I/O port are not af fected sec ond ar guThis func tion al lows for writ ing of a sin gle bit to ei ther a '0' or a '1' as speci fied by th Value - is ei ther 1 or 0 bit_number - This is value from 1 to 48, which is the bit to be acted upon tion takes two ar gu ments void write_bit(int bit_number, int value) ' is re turnedThis func tion re turns the state of the I/O pin. A '1' is re turned if the I/O pin is low and a ' bit_number - This is a value from 1 to 48 that in di cates the I/O pin to read from. tion gle gu ment : int read_bit(int bit_number); - "The Embedded Systems Authority WinSystems" SET_BIT - Set the speci fied I/O Bit Syn tax De scrip tion ar takes a sinThis func . a - . value and other bits in the same I/O port are uning low. There is no re CLR_BIT - Clear the speci fied I/O Bit Syn tax ; De scrip tion ar takes a sinThis func un any bits other than the one speci does not af high. This func 991206s5 3 -Page OPERATIONS MANUAL LBC-Plu go ing tion fect fied. al I/O piThis func tion clears the speci fied I/O bit. Note that clear ing the I/O bit re sults in the ac t bit_number - a value from 1 to 48 in di cates the bit number to clear. tion gle gu ment : void clr_bit(int bit_number) turn af fected c tu ally goThis func tion sets the speci fied I/O port bit. Note that set ting a bit re sults in the I/O pin bit_number - a value be tween 1 and 48 speci fy ing the port bit to be set tion gle gu ment : void set_bit(int bit_number); - "The Embedded Systems Authority WinSystems" ENAB_INT - En able Edge In ter rupt, Se lect Po lar ity Syn tax ; De scrip tion : two ar reThis func bit L ” o bit at the speci for the speci cir the edge deThis func It ys . value and only the specino re DISAB_INT - Dis able Edge De tect In ter rupt De tec tion Syn tax ; De scrip tion reThis func . bit e r en - .abled. There is no af 5 - 4s991206 OPERATIONS MANUAL LBC-PluPage fect on any other bits ruptsand no harm is done by call ing this func tion for a bit which did not have edge de tec tion in te turn valuThis func tion shuts down the edge de tec tion in ter rupts for the speci fied bit. There is no re bit_number - A value from 1 to 24 speci fy ing the ap pro pri ate tion quires a sin gle ar gu ment : void disab_int(int bit_number) turn fied bit is af fected oc cur. There idoes not un mask the in ter rupt con trol ler, in stall vec tors, or han dle in ter rupts when the lar ity. tion en ables tec tion cuitry fied fied p in “uio48.h LING are de fined po lar ity - Speci fies ris ing or fal ling edge po lar ity de tect. The con stants RIS ING and FA bit_number - A value from 1 to 24 speci fy ing the ap pro pri ate tion quires gu ments void enab_int(int bit_number, int po lar ity) - "The Embedded Systems Authority WinSystems" CLR_INT - Clear the speci fied pend ing in ter rupt Syn tax ; De scrip tion reThis func . g ls - . bit is af af will have no adrupt pend GET_INT - Re trieve bit number of pend ing in ter rupt Syn tax ; De scrip tion ge u- t s - tions. 6s5 5 -Page OPERATIONS MANUAL LBC-Plu99120 for bit tran sifunc tion may ei ther be used in an ap pli ca tion's ISR or can be used in the fore ground to poll tinu ously. Thi7. It is nec es sary to use ei ther clr_int() or disab_int() to avoid re turn ing the same bit con to Port 2 Biturns with the first in ter rupt found and be gins its search at Port 0 Bit 0 pro ceed ing through nc tion re be tween 1 and 24 rep re sent ing a bit number that has a pend ing edge de tect in ter rupt. The f or a valuThis func tion re quires no ar gu ments and re turns ei ther a '0' for no bit in ter rupts pend in int get_int(void) ing verse fect. Only the speci fied fected tion with no in terwill re sult in its in ter rupt be ing en abled with an un de fined po lar ity. Call ing this func ed for in ter ruptnext tran si tion of the same po lar ity. Call ing this func tion on a bit that has not been en ab is re armed for thethe in ter rupt. The net re sult af ter the call is that the in ter rupt is no longer pend ing and reena blinThis func tion clears a pend ing in ter rupt on the speci fied bit. It does this by dis abling and bit_number - The speci fied bit number from 1 to 24 to re set the in ter rupt tion quires a sin gle ar gu ment : void clr_int(int bit_number) - "The Embedded Systems Authority WinSystems" 3Sam ple Pro grams in the in source code form in on the LBC-Plus disk proThere are three sam e proof the I/O func FLASH.C 3.1 on the com C/C++ ver with Bor was comThis pro of the WS16C48. It uses three funch from t us the most ba ilThis proe a) each on and then off in turn. through all 48 bits turn are used to se POLL.C : 3.1 on the com C/C++ ver with Bor was comThis pro c - y have taken place. if any tran get_int() to de INT.C : 3.1 on the com C/C++ ver with Bor was comThis pro cl u - tine. Sum mary a long c - . 5 - 6s991206 OPERATIONS MANUAL LBC-PluPage ing the fea tures of the WS16C48 a tion uswith the sam ple pro gram pro vided should pro vide for a good ba sis on which to build an ap pli disk ette. The source code is also pro vided in printed form in AP PEN DIX F. These I/O rou tines a ny ingThe source code for all three pro grams as well as the I/O rou tines are in cluded on the ac com p pt serv ice rouup dat ing of the tran si tion coun ters is ac com plished in the back ground dur ing the in ter r tive and alThis pro gram is iden ti cal in func tion to the “poll.c” pro gram ex cept that in ter rupts are a bcc int.c uio48.c gram piled land sion mand line with rou tine ter mine si tions the li brargrams the first 24 bits for in put, arms them for fal ling edge de tec tion, and then polls us ing It proThis pro gram il lus trates ad di tional fea tures of the WS16C48 and the I/O li brary func tions. bcc poll.c uio48. gram piled land sion mand line with func tions quence ing nd clr_bit(driver code. The io_init() func tion is used to ini tial ize the I/O func tions and the set_bit() gram lus trates sic tions age bcc flash.c uio48.c gram piled land sion mand line with : tions vided in UIO48.C. the us ageUIO48 di rec tory. These pro grams are not use ful by them selves but are pro vided to il lus trat ple cluded grams ette 5. - "The Embedded Systems Authority 6AP PEN DIX A - I/O Port Map lt sd e I/O Ad dewith a '+' are used on the LBC-Plus board and are unique to the Wins - e E 1 3s E r E r C FE s FE F F O FE F O Ft F Fs E B E 1 FE o 7e F4 2 d Fk 7E r C 6s6 1 -Page OPERATIONS MANUAL LBC-Plu99120 SDL-380 -3AF Par al lel Printe-378- 37F FRE**330- 37 XT Hard Dis-320- 32 Pro to type Car-300- 31F COM2F8- 2FF FREE**2F0- 2F7 COM2E8- 2E GPIP In ter fac-2E0 -2E EGA Vide-2B0 -2DF FRE**280- 2A LPT278- 27F FRE**240- 277 BUS Mouse-238- 23 FRE**230- 237 Sound blas ter I/O port-220- 22 PCM SSD I/O Ports-210- 21 Joy stick por-200- 20 Fixed Disk I/1F0- 1FF SSD, Led, Watch dog con trol+1E0- 1E FRE**130- 1D WS16C48 HDI+120- 12F FREE**0F2- 11 Co proc es sor Con trol0F0- 0F1 FREE**0E0- 0EF 8237 DMA #20C0- 0D 8259 PIC #20A0- 0BF FRE**090- 09 DMA Page Reg is ter080- 08F FRE**072- 07 CMOS RAM/RT070- 071 8042 Key board Con trol le060- 06F FRE**044- 05F 8254 Time040- 043 FRE**024- 03F Fi nali 486 Chipset Reg is ter+022- 02 8259 PIC #1020- 02 FRE **010- 01F 8237 DMA #1000- 00F Us ageHex Rang tion. ress se lecmarked with '**' are gen er ally un used and should be the ba sis for the first choices in I/O ad d Sys tems sign. dress ses marketheir use should be care fully quali fied so as not to con flict with other I/O boards. I/O ad dre us buThe fol low ing is a list of PC I/O ports. Ad dresses marked with a '-' are not used on the LBC- P WinSystems" FEGA F3 6k F1 6 - 2s991206 OPERATIONS MANUAL LBC-PluPage COM3F8- 3F Floppy Dis3F0- 3F COM3E8- 3E -3C0 -3C DMA-3B0 -3BB - "The Embedded Systems Authority 7AP PEN DIX B - In ter rupt Map No.Ad dress TypeDe scrip tion 0U by 0 140U Step n 2UI 30CU 401Uw 5On 6 6n 7C16 8t 6n 942t 6 A r 6n BC2IRQ3 - COM2 6t Ce 6n D43e 6n E83e 6n FC3e1 0104S n ex S check 6 2184S C4Ss 4105 5145e s Ss C5S 8106) En 9146S Ss B1C6 C1Sk D1Sn E187S s7 1 -Page OPERATIONS MANUAL LBC-Plu991206 Floppy Disk pa rame ter ta bleBIO Video Ini tiali za tioBIO74 User chained timer ticBIO70 Key board break vec torBIOS BIOS time of day func tionBIO681A Boot loader func tionBIO SROM Ba sic try point (IBMBIOS BIOS printer func tionsBIO17 Key board BIOS func tionBIO5816 func tion Cas sette/pro tected modBIOS BIOS se rial func tionsBIOS BIOS Disk func tionBIO13 Mem ory Size func tionBIO Align ment check ex cep tion48 BIOS Equip mentBIO4411 Co proc es sor cep tio286 Video BIOS func tionsBIO IRQ7 - LPTHard war Page fault ex cep tio38 IRQ6 - Floppy Disk In ter ruptHard war Pro tec tion fault ex cep tio28 IRQ5 - XT Hard Disk, AT FreHard ware Stack fault ex cep tio28 IRQ4 - COM1Hard war30 Seg ment not pres en28 Hard ware In va lid TSS ex cep tio28 AT-Slaved Con trol le IRQ2 - XT Re served,Hard ware28 Co proc es sor seg ment28 IRQ1 - Key board in ter rupHard ware LIDT - Dou ble fault ex cep tio28 IRQ0 - 18.2Hz heart beaHard ware20 Co proc es sor un avail able18 In va lid op code ex cep tio18618 Bound Ex cep tion18 Print ScreeBI14 Over floCP Break pointCP NMCP08 386 De bug Ex cep tio Sin gleCP Di videCP00 WinSystems" F1C7St 0208Se 1248Sl 2288Ss 23Ss 4209 2594S Se C9Se 28A0Sl St A8Ss serv 2FSl 030Ce CCSs CFSt S 4S 24S 34S 440S 4A8Ss 500t 514s C C5 CSs 6D1B4 070ek 174 278d 371CCed 470ed 574ed 678ek 771DCed 080 0c 4 FFCd 7 - 2s991206 OPERATIONS MANUAL LBC-PluPage Not use3F 3CF1 Ba si3CF0 20 IRQ15 - Un as signeHard war IRQ14 - IDE Fixed DisHard war1D IRQ13 - Un as signeHard war1D IRQ12 - Un as signeHard war1D IRQ11 - Un as signeHard war IRQ10 - Un as signeHard ware1C IRQ9 - Re di rected IRQ2Hard ware1C IRQ8 - Real Time clocHard war1C VGA Serv iceVGA EMS func tionMS- DO1967 Net BIOS en tryNET170 Boot chainNET165B Func tionsNET1685A Mouse func tionBIOS14 AT Alarm in ter rupBIOS14 AT Alarm exit ad dresBIO12 EGA graph ics char ac ter fontBIO11 EGA Pa rame ter ta ble pointerBIO10C EGA ChainBIO108 Fixed disk 1 pa rame ter ta bleBIO1041 is pres ent Floppy I/O when fixed diskBIO10040 Over lay in ter rupMS- DO3F Mouse func tionMS- DO33 Long jump in ter facMS- DOS Print SpooMS- DOBC MS- Net iceMS- DO2A TTY out puMS- DOA429 Idle Sig naMS- DO Ter mi natMS- DO27 Ab so lute disk writMS- DO9826 Ab so lute disk readMS- DO Fa tal Er ror Vec torMS- DOS Ctrl- Break Ad dresMS- DO8C Ter mi nate Ad dresMS- DO DOS func tion calMS- DO Pro gram ter mi natMS- DO CGA graphic char ac ter fonBIO - "The Embedded Systems Authority 8AP PEN DIX C LBC-Plus Parts Place 6s8 1 -Page OPERATIONS MANUAL LBC-Plu99120 ment Guide - Top WinSystems" Guide -BottomLBC- Plus Parts Place 8 - 2s991206 OPERATIONS MANUAL LBC-PluPage ment - "The Embedded Systems Authority 9 APPENDIX D LBC-PLUS Mechanical Drawing 10 APPENDIX E WS16C48 I/O Routines and Sample Program Listings * * * * * * * * * * * * * * * * * int get_int(void); void clr_int(int bit_number); void disab_int(int bit_number); void enab_int(int bit_number, int polarity); void clr_bit(int bit_number); void set_bit(int bit_number); void write_bit(int bit_number); int read_bit(int bit_number); void init_io(unsigned io_address); #define FALLING 0 #define RISING 1 */ ***************************************************************************** Created1.0010/30/96 ______________________________________________________________ DescriptionRevisionDate Changes : **************************************************************************** : Steve MottinAuthor Revision: 1.00 : October 30, 1996Date : PCM-UIO48 Software Samples/ExamplesProject : uio48.hName /************************************************************************** */ fitness for any considered purpose. source code. It is the user's sole responsibility to determine or damage, real or consequential resulting from the usage of this In no case shall WinSystems be liable for any direct or indirect loss fitness of purposes, or any other warranty is expressed or implied. distributed on an "As-is" basis and no warranty as to performance, third party except by explicit permission of WinSystems. This file is source code, original or derived from this file, be distributed to any in any work derived by the user from this file. In no case may the any binary file or files compiled using this source code directly or UIO cards and CPU products incorporating the UIO device, to distribute Permission is hereby granted to the purchaser of the WinSystems Copyright 1996 by WinSystems Inc. /* UIO48.H * * * * * * * * * * * * * * * * * * * * * * * * { outportb(base_port+7,0); /* Restore normal page 0 register access */ outportb(base_port+0x0a,0); outportb(base_port+9,0); outportb(base_port+8,0); /* Clear all interrupt enables */ outportb(base_port+7,0x80); /* Set page 2 access, for interrupt enables */ port_images[x] = 0; for(x=0; x < 6; x++) /* Clear our image values as well */ outportb(base_port+x, 0); for(x=0; x < 7; x++) /* Clear all of the I/O ports. This also makes them inputs */ base_port = io_address; /* Save the specified address for later use */ int x; void init_io(unsigned io_address) *===========================================================================*/ * sensing, and sets the image values. * This function initializes all I/O pins for input, disables all interrupt on the board. * io_address : This is the base I/O address of the 16C48 UIO Chip * This function take a single argument : * INIT_IO /*=========================================================================== unsigned port_images[6]; */ actually do a read-modify-write to the I/O port. ports. This allows bit manipulation routines to work without having to /* This global array holds the image values of the last write to each I/O unsigned base_port; /* This global holds the base address of the UIO chip */ #include */ ***************************************************************************** Created1.0010/30/96 ______________________________________________________________ DescriptionRevisionDate Changes : **************************************************************************** : Steve MottinAuthor Revision: 1.00 : October 30, 1996Date : PCM-UIO48 Software Samples/ExamplesProject : uio48.cName /************************************************************************** */ fitness for any considered purpose. source code. It is the user's sole responsibility to determine or damage, real or consequential resulting from the usage of this In no case shall WinSystems be liable for any direct or indirect loss fitness of purposes, or any other warranty is expressed or implied. distributed on an "As-is" basis and no warranty as to performance, third party except by explicit permission of WinSystems. This file is source code, original or derived from this file, be distributed to any in any work derived by the user from this file. In no case may the any binary file or files compiled using this source code directly or UIO cards and CPU products incorporating the UIO device, to distribute Permission is hereby granted to the purchaser of the WinSystems Copyright 1996 by WinSystems Inc. /* UIO48.C } * * * * * * * * { } * * * * * * * { port_images[bit_number / 8] = temp; /* Update the image value with the value we're about to write */ temp = temp & ~mask; else temp = temp | mask; /* If the bit is to be set */if(val) /* Check whether the request was to set or clear and mask accordingly */ mask = (1 << (bit_number % 8)); /* Calculate a bit mask for the specified bit */ /* Get current value */temp = port_images[bit_number / 8]; /* Use the image value to avoid having to read the port first. */ port = (bit_number / 8) + base_port; /* Calculate the I/O address of the port based on the bit number */ --bit_number; /* Adjust bit_number for 0 based numbering */ unsigned mask; unsigned temp; unsigned port; void write_bit(int bit_number, int val) *===========================================================================*/ * by the val argument. A non zero value for val sets the bit. * This function sets the specified I/O pin to either high or low as dictated * val : The setting for the specified bit, either 1 or 0. * bit_number : The I/O pin to access is specified by bit_number 1 to 48. * This function takes two arguments : * WRITE_BIT /*=========================================================================== return 0; return 1; if(val) /* Adjust the return for a 0 or 1 value */ val = val & (1 << (bit_number % 8)); /* Get just the bit we specified */ val = inportb(port); /* Get the current contents of the port */ port = (bit_number / 8) + base_port; /* Calculate the I/O port address based on the updated bit_number */ --bit_number; /* Adjust the bit_number to 0 to 47 numbering */ int val; unsigned port; int read_bit(int bit_number) *===========================================================================*/ * the argument bit_number. * This function returns the state of the current I/O pin specified by * return value : The current state of the specified bit, 1 or 0. * Valid arguments are from 1 to 48. * bit_number : The integer argument specifies the bit number to read. * This function takes a single argument : * READ_BIT /*=========================================================================== } * * * * * { } * * * * * { } * * * * * * { /* Get the current state of the polarity register */ outportb(base_port+7,0x40); /* Turn on access to page 1 for polarity control */ outportb(port,temp); /* Now update the interrupt enable register */ temp = temp | mask; /* Set the enable bit for our bit number */ temp = inportb(port); /* Get the current state of the interrupt enable register */ outportb(base_port+7,0x80); /* Turn on page 2 access */ mask = (1 << (bit_number % 8)); /* Calculate a bit mask based on the specified bit number */ port = (bit_number / 8) + base_port + 8; /* Calculate the I/O address based uppon the bit number */ --bit_number; /* Adjust for 0 based numbering */ unsigned mask; unsigned temp; unsigned port; void enab_int(int bit_number, int polarity) *============================================================================*/ * controller, nor does it supply an interrupr handler. * at the specified polarity. This function does not setup the interrupt * This function enables within the 16C48 an interrupt for the specified bit * enables the interrupt on the flling edge. * argument enables rising-edge interrupt. A zero argument * polarity : This specifies the polarity of the interrupt. A non-zero * bit_number : The bit number to enable intterups for. Range from 1 to 48. * This function takes two arguments : * ENAB_INT /*=========================================================================== write_bit(bit_number,0); void clr_bit(int bit_number) *===========================================================================*/ * This function clears the specified bit. * bit_number : The bit number to clear. * This function takes a single argument : * CLR_BIT /*=========================================================================== write_bit(bit_number,1); void set_bit(int bit_number) *===========================================================================*/ * This function sets the specified bit. * bit_number : The bit number to set. * This function takes a single argument : * SET_BIT /*=========================================================================== outportb(port,temp); /* Now actually update the port. Only the specified bit is affected */ } * * * * * { } * * * * * * { --bit_number; /* Adjust for 0 based numbering */ unsigned mask; unsigned temp; unsigned port; void clr_int(int bit_number) *===========================================================================*/ * The interrupt left enabled. * This function is use to clear a bit interrupt once it has been recognized. * is 1 to 24. * bit_number : This argument specifies the bit interrupt to clear. Range * This function takes a single argument : * CLR_INT /*========================================================================== outportb(base_port+7,0x0); /* Set access back to page 0 */ outportb(port,temp); /* Update the enable register with the new information */ temp = temp & ~mask; /* Clear the enable bit int the image for our bit number */ temp = inportb(port); /* Get the current state of the enable register */ outportb(base_port+7,0x80); /* Turn on access to page 2 registers */ mask = (1 << (bit_number % 8)); /* Calculate the proper bit mask for this bit number */ port = (bit_number / 8) + base_port + 8; /* Calculate the I/O Address for the enable port */ --bit_number; /* Adjust the bit_number for 0 based numbering */ unsigned mask; unsigned temp; unsigned port; void disab_int(int bit_number) *===========================================================================*/ * This function shuts off the interrupt enabled for the specified bit. * bit_number : Specifies the bit number to act upon. Range is from 1 to 48. * This function takes a single argument : * DISAB_INT /*=========================================================================== outportb(base_port+7,0x0); /* Set access back to Page 0 */ outportb(port,temp); /* Write out the new polarity value */ temp = temp & ~mask; else temp = temp | mask; /* If the bit is to be set */if(polarity) /* Set the polarity according to the argument in the image value */ /* Get current polarity settings */temp = inportb(port); } * * * * * { { { { } } } /* See if any bit set, if so return the bit number */ temp = inportb(base_port+9); /* None in Port 0, read port 1 interrupt ID register */ /* Return bitnumber with active int */return(x+1); /* Turn off access */outportb(base_port+7,0); if(temp & (1 << x)) for(x=0; x <=7; x++) if(temp !=0) /* See if any bit set, if so return the bit number */ temp = inportb(base_port+8); /* Read interrupt ID register for port 0 */ outportb(base_port+7,0xc0); /* Set access to page 3 for interrupt id registers */ /* There is something pending, now we need to identify what it is */ return(0); if((temp & 7) == 0) /* If there are no interrupts pending, return a 0 */ temp = inportb(base_port+6) & 0x07; /* read the master interrupt pending register, mask off undefined bits */ int x; int temp; int get_int(void) *===========================================================================*/ * is pending, a zero is returned. This function does NOT clear the interrupt. * This function returns the highest level interrupt pending. If no interrupt * currently pending. Range is 1 to 24. * return value : The value returned is the highest level bit interrupt * This function take no arguments. * GET_INT /*========================================================================== outportb(base_port+7,0x0); /* Set access back to page 0 */ outportb(port,temp); /* Write it out */ temp = temp | mask; /* Re-enable our interrupt bit */ outportb(port,temp); /* Write out the temporary value */ /* clear the enable for this bit */temp = temp & ~mask; /* Temporarily clear only OUR enable. This clears the interrupt */ temp = inportb(port); /* Get current state of the enable register */ outportb(base_port+7,0x80); /* Set access to page 2 for the enable register */ mask = (1 << (bit_number % 8)); /* Calculate a bit mask for this bit number */ port = (bit_number / 8) + base_port + 8; /* Calculate the correct I/O address for our enable register */ { { { } } } { { { } } } } return 0; outportb(base_port+7,0); */ no interrupt found. to be sure. We'll turn the page access back to 0 and return a 0 for /* We should never get here unless the hardware is misbehaving but just /* Return bitnumber with active int */return(x+17); /* Turn off access */outportb(base_port+7,0); if(temp & (1 << x)) for(x=0; x <=7; x++) if(temp !=0) /* If any pending, return the appropriate bit number */ /* Read port 2 status */temp = inportb(base_port+0x0a); /* Lastly, read status of port 2 int id */ /* Return bitnumber with active int */return(x+9); /* Turn off access */outportb(base_port+7,0); if(temp & (1 << x)) for(x=0; x <=7; x++) if(temp !=0) { { { } } } getch(); clr_bit(x); /* Now turn off the LED */ delay(100); /* The wait time is subjective. We liked 100mS */ set_bit(x); /* Setting the bit lights the LED */ for(x=1; x <=48; x++) /* We will light the LED attached to each of the 48 lines */ while(!kbhit()) /* We'll repeat our sequencing until a key is pressed */ init_io(BASE_PORT); /* Initialize all I/O bits, and set then for input */ int x; void main() */ of the I/O lines and wathching the lit one race through the bits. clears each I/O line in succession. It was tested by hooking LEDs to all available in the UIO48 source code library. This program simply sets and /* This is an utlra-simple demonstration program of some of the functions #define BASE_PORT 0x200 /* This is where we have our board jumpered to */ #include "uio48.h" #include #include #include */ fitness for any considered purpose. source code. It is the user's sole responsibility to determine or damage, real or consequential resulting from the usage of this In no case shall WinSystems be liable for any direct or indirect loss fitness of purposes, or any other warranty is expressed or implied. distributed on an "As-is" basis and no warranty as to performance, third party except by explicit permission of WinSystems. This file is source code, original or derived from this file, be distributed to any in any work derived by the user from this file. In no case may the any binary file or files compiled using this source code directly or UIO cards and CPU products incorporating the UIO device, to distribute Permission is hereby granted to the purchaser of the WinSystems Copyright 1996 by WinSystems Inc. /* FLASH.C { { } { } { { } } } { int current; void check_ints() getch(); printf("%05u",int_counts[x]); gotoxy(16,x); for(x=1; x < 25; x++) /* Display the current count values */ check_ints(); /* Retrieve any pending transitions and update the counts */ while(!kbhit()) /* We will continue to display until any key is pressed */ printf("Bit number %02d ",x); gotoxy(1,x); for(x=1; x<25; x++) clrscr(); /* Clean up the screen for our display. Nothing fancy */ /* Enable the falling edge interrupts */enab_int(x,FALLING); /* Clear the counts */int_counts[x] = 0; for(x=1; x<25; x++) */ transition interrupts. /* Initialize our transition counts, and enable falling edge init_io(BASE_PORT); /* Initialize the I/O ports. Set all I/O pins to input */ int x; void main() void check_ints(void); /* Definitions for local functions */ unsigned int_counts[25]; /* Our transition totals are stored in this array */ */ using the get_int() function. however, no by using true interrupts but by polling for transitions WS16C48 to count transitions on the first 24 lines. It does this /* This program uses the edge detection interrupt capability of the #define BASE_PORT 0x200 #include "uio48.h" #include #include */ fitness for any considered purpose. source code. It is the user's sole responsibility to determine or damage, real or consequential resulting from the usage of this In no case shall WinSystems be liable for any direct or indirect loss fitness of purposes, or any other warranty is expressed or implied. distributed on an "As-is" basis and no warranty as to performance, third party except by explicit permission of WinSystems. This file is source code, original or derived from this file, be distributed to any in any work derived by the user from this file. In no case may the any binary file or files compiled using this source code directly or UIO cards and CPU products incorporating the UIO device, to distribute Permission is hereby granted to the purchaser of the WinSystems Copyright 1996 by WinSystems Inc. /* POLL.C } ++int_counts[current]; /* Tally a transition for this bit */ clr_int(current); /* Clear and rearm this one so we can get it again */ return; if(current == 0) /* If it's 0 there are none pending */ current = get_int(); /* Get the bit number of a pending transition interrupt */ { { } { } /* We will continuously print the transition totals until a printf("Bit Number %02d ",x); gotoxy(1,x); for(x=1; x<25; x++) /* Clear the Text Screen */clrscr(); /* Set up the display */ enable(); /* Reenable interrupts */ /* Unmask IRQ 5 */outportb(0x21,(inportb(0x21) & 0xdf)); /* Unmask the interrupt controller */ /* Enable the falling edge interrupts */enab_int(x,FALLING); /* Clear the counts */int_counts[x] = 0; for(x=1; x<25; x++) */ interrupts. /* Clear the transition count values and enable the falling edge setvect(0x0d,int_handler); /* Install out new interrupt handler */ /* Hardwired for IRQ5 */old_handler = getvect(0x0d); /* Get the old handler and save it for later resoration */ /* Disable interrupts during initialization */disable(); /* We disable interrupts whenever we're changing the environment */ /* Install an interrupt handler for the board */ init_io(BASE_PORT); /* Initialize the I/O ports. Set all I/O pins to input */ int x; void main() void interrupt (*old_handler)(void); void interrupt int_handler(void); void check_ints(void); /* Function declarations for local functions */ unsigned int_counts[25]; /* Our transition totals are stored in this global array */ */ transition counters in the background. however this program actually uses interrupts and update all of the capability of the WS16C48 to count edge transitions. Unlike poll.c, /* This program like the poll.c sample uses the edge detection interrupt #define BASE_PORT 0x200 #include "uio48.h" #include #include #include */ fitness for any considered purpose. source code. It is the user's sole responsibility to determine or damage, real or consequential resulting from the usage of this In no case shall WinSystems be liable for any direct or indirect loss fitness of purposes, or any other warranty is expressed or implied. distributed on an "As-is" basis and no warranty as to performance, third party except by explicit permission of WinSystems. This file is source code, original or derived from this file, be distributed to any in any work derived by the user from this file. In no case may the any binary file or files compiled using this source code directly or UIO cards and CPU products incorporating the UIO device, to distribute Permission is hereby granted to the purchaser of the WinSystems Copyright 1996 by WinSystems Inc. /* INTS.C { { } } } { { } } /* Do non-specific EOI */outportb(0x20,0x20); */ interrupt controller. This rearms it for the next shot. /* Issue a non-specific end of interrupt command (EOI) to the current = get_int(); /* Get the next one, if any others pending */ ++int_counts[current]; /* Tally up one for the current bit number */ clr_int(current); /* Clear the current one so that it's ready for the next edge */ while(current) */ there are no more present. In which case current == 0 /* We will continue processing pending edge detect interrupts until current = get_int(); */ here or we shouldn't even be executing this function. /* Get the current interrupt pending. There really should be one int current; void interrupt int_handler(void) /* This function is executed when an edge detection interrupt occurs */ enable(); */ started. /* Reenable interrupts. Things are back they way they were before we /* Put back the old interrupt handler */setvect(0x0d,old_handler); /* Restore the old handler */ /* Mask IRQ 5 */outportb(0x21,inportb(0x21) | 0x20); /* Mask off the interrupt at the interrupt controller */ disable(); /* Disable interrupts while we restore things */ getch(); printf("%05u",int_counts[x]); gotoxy(16,x); for(x=1; x < 25; x++) while(!kbhit()) */ occurs. updating the counts is done in the background when an interrupt /* All of the processing of the transition interrupts, including key is pressed */ WARRANTY WinSystems warrants that for a period of two (2) years from the date of shipment any Products and Software purchased or licensed hereunder which have been developed or manufactured by WinSystems shall be free of any material defects and shall perform substantially in accordance with WinSystems' specifications therefore. With respect to any Products or Software purchased or licensed hereunder which have been developed or manufactured by others, WinSystems shall transfer and assign to Customer any warranty of such manufacturer or developer held by WinSystems, provided that the warranty, if any, may be assigned. The sole obligation of WinSystems for any breach of warranty contained herein shall be, at its option, either (i) to repair or replace at its expense any materially defective Products or Software, or (ii) to take back such Products and Software and refund the Customer the purchase price and any license fees paid for the same. Customer shall pay all freight, duty, broker's fees, insurance changes and other fees and charges for the return of any Products or Software to WinSystems under this warranty. WinSystems shall pay freight and insurance charges for any repaired or replaced Products or Software thereafter delivered to Customer within the United States. All fees and costs for shipment outside of the United States shall be paid by Customer. The foregoing warranty shall not apply to any Products or Software which have been subject to abuse, misuse, vandalism, accidents, alteration, neglect, unauthorized repair or improper installations. THERE ARE NO WARRANTIES BY WINSYSTEMS EXCEPT AS STATED HEREIN. THERE ARE NO OTHER WARRANTIES EXPRESS OR IMPLIED INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, IN NO EVENT SHALL WINSYSTEMS BE LIABLE FOR CONSEQUENTIAL, INCIDENTAL, OR SPECIAL DAMAGES INCLUDING, BUT NOT LIMITED TO, DAMAGES FOR LOSS OF DATA, PROFITS OR GOODWILL. WINSYSTEMS' MAXIMUM LIABILITY FOR ANY BREACH OF THIS AGREEMENT OR OTHER CLAIM RELATED TO ANY PRODUCTS, SOFTWARE, OR THE SUBJECT MATTER HEREOF, SHALL NOT EXCEED THE PURCHASE PRICE OR LICENSE FEE PAID BY CUSTOMER TO WINSYSTEMS FOR THE PRODUCTS OR SOFTWARE OR PORTION THEREOF TO WHICH SUCH BREACH OR CLAIM PERTAINS. WARRANTY SERVICE All products returned to WinSystems must be assigned a Return Material Authorization (RMA) number. To obtain this number, please call or FAX WinSystems' factory in Arlington, Texas and provide the following information: 1. Description and quantity of the product(s) to be returned including its serial number. 2. Reason for the return. 3. Invoice number and date of purchase (if available), and original purchase order number. 4. Name, address, telephone and FAX number of the person making the request. 5. Do not debit WinSystems for the repair. WinSystems does not authorize debits. After the RMA number is issued, please return the products promptly. Make sure the RMA number is visible on the outside of the shipping package. The customer must send the product freight prepaid and insured. The product must be enclosed in an anti-static bag to protect it from damage caused by static electricity. Each bag must be completely sealed. Packing material must separate each unit returned and placed as a cushion between the unit(s) and the sides and top of the shipping container. WinSystems is not responsible for any damage to the product due to inadequate packaging or static electricity.