VMIVME-6005 Octal ARINC-429 Intelligent Communications Controller • Eight transmit/sixteen receive channels • Data rates 100 or 12.5 Kbits/s • Simple memory-mapped command-response user interface • 16 MHz 68000 I/O processor • 64 Kbyte operational firmware/128 Kbyte local SRAM • Supports ARINC-429 hardware-in-the-loop processing • Supports ARINC-429 SDI/label sorting for eight receive channels • Interrupt-coupled interface with status flags between I/O processor and VME host • Programmable VMEbus interrupts and VMEbus interrupt vectors • Programmable loopback self-test capability for each ARINC channel • Extensive on-board diagnostic capability • A32 and A24 slave VME interface • D32/D16/D8 (EO) data transfer capability • Double height standard Eurocard form factor • VMEbus compatible ANSI/IEEE 1014-1987 IEC 821 and 297 PRODUCT OVERVIEW — The VMIVME-6005 is a fully integrated communications controller providing The board ID buffer contains information about the VMEbus access to eight ARINC-429 high-speed serial board type, category, manufacturing options, revision level, interfaces. Each ARINC-429 interface is buffered: up to 255 and other information unique to the VMIVME-6005. 32-bit words may be queued for transmission and each receiver has multiple 255 character buffers. ARINC-429 The Command Interface is a memory location which SDI/Label sorting may be commanded for eight receive interrupts the SLAVE I/O processor when written to by the channels with 1,024 character bins per channel. The 68000 user. The code written to the Command interface instructs the I/O processor off-loads from the VMEbus the task of SLAVE that either the ARINC-429 communication channels servicing the ARINC transceivers and managing the character are to be set up, one of the ARINC-429 TX buffers contains buffers. The I/O processor communicates with the VME host new data to be transmitted, one of the RX buffers has been through shared buffer memory, flags, and (optional) serviced, or self-test is to be performed. The Status Interface interrupts. consists of four 8-bit read-only buffers: Slave I/O Processor Status, Receiver A Buffer Status, Receiver B Buffer Status, The VMIVME-6005 has an A32/A24 VME slave and Transmitter Buffer Status. These status buffers are interface capable of D32, D16, and D8(EO) basic data updated by the Slave I/O processor. transfers. The board may be jumper-configured to respond to supervisory, nonprivileged, or both supervisory and The VME Interrupt Interface allows the user to specify nonprivileged VME data transfers. The VMEbus base address an IRQ level and 8-bit interrupt vector to each of the of the VMIVME-6005 is configured with DIP switches to ARINC-429 TX and RX buffers. At reset, the VME Interrupt occupy a single 64 Kbyte block of memory. Interface is quiescent and must be initialized by the Host. The front panel of the VMIVME-6005 features six shielded DB-9 connectors for interface to the eight Ordering Options ARINC-429 transmit channels and sixteen ARINC-429 Nov. 12, 1993 800-006005-000 D ABC – D E F receive channels. Also included on the front panel, is a board VMIVME-6005 –0 – reset switch and a health/status LED indicator. Transmitter A = line driver power is derived from VMEbus +5 V, although 0 = 8 Transmitters and 16 Receivers additional drive capability may be obtained from an external 1 = 4 Transmitters and 8 Receivers 2 = 1 Transmitter and 2 Receivers ±15 V source. B = 0 = All 100 Kbit/s 1 = All 12.5 Kbit/s TECHNICAL DESCRIPTION — The VMIVME-6005 2 = 1/2-100 Kbit/s, 1/2 - 12.5 Kbits/s (Note 1) has five user programming interfaces: C = 0 (Option reserved for future use) Note a. Board ID buffer 1. Not available for one transmitter and two receivers option. \ Option “-220” is not supported. b. Command/status interface For Ordering Information, Call: c. VME interrupt interface 1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859 E-mail: info@vmic.com Web Address: www.vmic.com d. Character buffers and offset pointers Copyright © May 1991 by VMIC e. Word count variables Specifications subject to change without notice. VMIC • 12090 South Memorial Parkway • Huntsville, Alabama 35803-3308 1 VMIVME-6005 Once the user has commanded the SLAVE to set up the VME the Pipeline Protocol. Any of the sixteen ARINC-429 Interrupt Interface, the SLAVE will interrupt the user receivers may be paired with any of the eight ARINC-429 whenever an RX buffer contains new data or when a TX transmitters in pipeline fashion. A three-buffer queue allows buffer has been transmitted. The user may bypass this the slave RX process to be filling one buffer, the VME host interrupt protocol by disabling all interrupt control words and to be accessing the previous receive buffer, and the slave TX polling the buffer Status interface. process to be sending the previous VME-accessed buffer. In this manner, the ARINC-429 data stream may be observed The buffer memory is arranged as 255 sequential 32-bit and modified by the VME host. longwords for each RXA, RXB, and TX channel of the ARINC-429 interface. Both the user and the SLAVE I/O SDI/LABEL SORTING PROTOCOL — The processor may modify the buffer memory by following the VMEbus host may command the VMIVME-6005 to buffer protocols. The buffer offset pointers are maintained by configure eight receivers for ARINC-429 SDI/Label sorting. the slave. In this mode, I/O processing is enabled for only eight receivers and pipeline mode is disabled. For each incoming The Word Count variables are 16-bit quantities which character, the SDI code is appended to the label code to form represent the number of 32-bit longwords contained in each a 10-bit address which is then adjusted for longword offset. buffer. There is a word count variable corresponding to each The received character is then placed into one of 1,024 RXA, RXB, and TX ARINC-429 channel. Both the user and buffer bins. These sorting bins are static locations which the SLAVE I/O processor may alter the Word Count variables may be interrogated by the VMEbus host at any time. The following the buffer protocols. word count variables indicate the number of characters to be received before the RxReady interrupt is asserted, if TRANSMIT BUFFER PROTOCOL — The USER enabled. places a sequence of one or more 32-bit ARINC-429 words in the TX buffer, sets the Word Count variable to the number LABEL-CODE-ONLY SORTING MODE — The of 32-bit ARINC-429 words, and then asserts the TxReady VMIVME-6005 supports sorting of ARINC-429 characters command to the SLAVE. The SLAVE responds to the into a buffer with 256 character bins: only the eight-bit label TxReady interrupt by moving the message words to the code is used to create an offset address into the buffer. Just designated ARINC-429 transmitter. When the message is as with SDI/Label Sorting Protocol, the VMEbus host may completely transmitted, the SLAVE clears that TX buffer command the VMIVME-6005 to configure up to eight status bit and, if enabled, asserts the TxDone interrupt back receivers for Label-Code-Only Sorting. The eight RXA to the USER. The USER will not modify the TX buffer, word receivers may be individually configured for either count variable, or TX buffer status until the SLAVE resets the SDI/Label Sorting or Label-Code-Only Sorting in any TX buffer status, indicating the ARINC-429 words have been combination, since the sorting buffer locations remain static. transmitted. The word count variables indicate the number of characters to be received before the RxReady interrupt is asserted, if RECEIVE BUFFER PROTOCOL — For each enabled. ARINC-429 receiver, up to 255 characters are buffered in sequence. The SLAVE services the ARINC-429 receiver, INTERRUPT-ON-LABEL-COMPARISON places the 32-bit longword into the RX buffer, and then MODE — In either of the VMIVME-6005 Sorting modes, updates the number of 32-bit longwords into the word count the user may choose a specific SDI/Label code to compare variable. When the specified number of characters have been all incoming ARINC-429 characters against. When a stored in the buffer, the SLAVE asserts the RxReady interrupt received ARINC-429 character has an SDI/Label code (or to the USER. The USER responds to the RxReady interrupt just Label code, at the case may be) which matches the by reading the RX record in the buffer, and then asserting the comparison value, the VMEbus interrupt associated with the RxDone interrupt back to the SLAVE. While the RX buffer receiver sorting buffer is asserted. This status bit is set for a particular ARINC-429 RX buffer, the interrupt-on-label-comparison mode precludes the existing SLAVE I/O processor may continue to receive data from that buffer limit count interrupt; when the buffer limit count is channel and store the data into SLAVE local memory. specified to be zero, the interrupt-on-label-comparison Additional characters may be buffered by the SLAVE while mode is enabled. As with the existing sorting modes, the USER is unloading the shared RX buffer memory. interrupt-on-label- comparison is available only for the eight RXA channels. PIPELINE BUFFER PROTOCOL — Hardware-in- the-loop simulation is supported by the VMIVME-6005 with 2 For Ordering Information, Call: 1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859 VMIVME-6005 HARDWARE DESCRIPTION — The block diagram PHYSICAL/ENVIRONMENTAL of the VMIVME-6005 Octal ARINC-429 Interface is shown Length: 233.4 mm in Figure 1. The VMIVME-6005 hardware may be partitioned into four functional groups: ARINC-429 bus interfaces, Slave Width: 160.0 mm I/O processor with firmware and support logic, control and record buffer memory, and VMEbus interface logic. Each Depth: 19.2 mm functional group will be briefly described. Weight: 20.0 oz a. The ARINC-429 communication protocol is supported by eight transceivers compatible with the Harris Operating: 0 to +55 °C (with 200 linear ft/min. airflow) HS-3282/HS-3182 chip set. Each chip set has an 0 to 90 percent humidity (noncondensing) ARINC-429 transmitter, dual receiver, and an ARINC-429 transmit line driver. Storage: -40 to + 85 °C 0 to 95 percent humidity (noncondensing) b. The Slave I/O processor is a 16 MHz 68000 CPU with associated decode/timing logic and 64 kbytes of 68000 CPU EPROM firmware. The CPU executes code copied into a 64 Kbyte block of SRAM not accessible from Address: 24 bits the VMEbus I/F. The ARINC-429 interfaces are serviced with prioritized interrupts and status flags. Data: 8, 16 bits c. The control and character buffer memory is a 64 Kbyte Clock: 16 MHz block of the slave I/O processor SRAM accessible from the VMEbus I/F. This user memory block MEMORY contains the VMEbus interrupt control bytes, VMEbus interrupt vectors, RX/TX status flags, EPROM: 64 Kbyte RX/TX word counts, and the RX/TX buffers. The VMEbus data interface to this memory may be D32, Static RAM: 128 Kbyte D16, or D8 (EO). ELECTRICAL POWER REQUIREMENTS d. The VMEbus Slave I/F logic includes the Bus +5 VDC at 3.5 A Interrupter Module, latches, comparators, transceivers, and control logic. The A24/A32 base Optional Power Source: address is configured by octal DIP switch blocks and ±15 VDC at 400 mA jumpers. VMEbus P2 connector INTERFACES TRADEMARKS VMEbus Slave: A32:A24:D32:D16:D8(EO) The VMIC logo is a registered trademark of VMIC. Other registered trademarks are the property of their Commercial Airline: Eight ARINC-429 transmit and respective owners. sixteen ARINC-429 receive channels LED: A Status LED (red) is illuminated at power up and extinguished upon successful diagnostic execution VMIC • 12090 South Memorial Parkway • Huntsville, Alabama 35803-3308 3 VMIVME-6005 TX TX TX TX TX TX TX TX RX RX RX RX RX RX RX RX RX RX RX RX RX RX RX RX B A B A B A B A B A B A B A B A ARINC ARINC ARINC ARINC ARINC ARINC ARINC ARINC I/F NO. 1 I/F NO. 2 I/F NO. 3 I/F NO. 4 I/F NO. 5 I/F NO. 6 I/F NO. 7 I/F NO. 8 +15 V -15 V I/O DATA BUS –15 V DC-TO-DC 128 kbyte 64 kbyte ARINC I/F CONVERTER SRAM EPROM TRANSCEIVER STATUS CPU LOCAL BUS ARINC I/F VMEbus 68000 LOCAL INTERRUPTS VMEbus INTERRUPT I/O INTERRUPT INTERFACE USER MODULE PROCESSOR CONTROL INTERRUPTS VMEbus Figure 1. Octal ARINC-429 Interface 4 For Ordering Information, Call: 1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859