VMIVME-5532L VMEbus Fiber-Optic Repeater Link with Slave Chassis System Controller • High-performance, easy-to-use method of linking two or more VMEbus systems together via fiber-optic cable • Can provide system controller function in the slave chassis • A local master is allowed in slave chassis • Software transparent allows direct communication from master chassis to slave chassis with no software overhead (unidirectional link control with bidirectional data transfers). This mode allows plug-and-play operation. • Register enable allows operation as described above, but includes registers in short I/O space dealing with slave chassis multimaster operation • Supports 8-, 16-, and 32-bit data transfers • Supports 16-, 24-, and 32-bit addressing • Total electrical isolation between VMEbus systems • Maximum 6,560 ft (2,000 m) fiber-optic cables • Advantages over standard repeaters — Small cables — High-noise immunity — High-voltage isolation — No EMI generated by cables • The VME-to-VME link consists of two boards and two fiber-optic cables OVERVIEW — The VMIVME-5532 Link is a application as shown in Figure 3. The bus arbiter (SGL) and high-performance, yet easy-to-use method of linking two or system controller are used when the slave board occupies slot more VMEbus systems together via fiber-optic cable. The 1 of the slave chassis. The bus requester (ROR) and Repeater Link is a two-board set which allows VMEbus slave Control/Status Registers allow the host CPU in the master I/O boards residing in one VMEbus chassis to be controlled VMEbus chassis to monitor and gain bus mastership of the by a VMEbus master residing in another chassis. In general, slave chassis using bus request level 3 (BR3*). A control bit the VMEbus chassis in which VMEbus masters reside is (burst mode) is included to allow the host CPU to request and referred to as a master chassis, while the VMEbus slave hold bus mastership as long as desired. A key register is also boards reside in a slave chassis. However, the included which requires the host CPU to load a matching VMIVME-5532 also allows a local VMEbus master to work code before the burst mode bit can be set. in a slave chassis for local control, thus providing multimaster in the slave chassis. The two-board set is A link consists of two boards (VMIVME-5532M and configured as shown in Figure 1 with one board designated VMIVME-5532S) and two cables which enable a VMEbus for the master chassis while the other board is designated for system to be expanded beyond a single chassis. Refer to the slave chassis. A master VMEbus chassis can Figures 4 and 5 for a block diagram of each board. communicate with several slave chassis by using multiple REPEATER Links in a star configuration as shown in VMEbus SPECIFICATIONS Figure 2. VMEbus Compliance: Complies with VMEbus The link is software transparent. Any VMEbus master in specification revision C.1A32, A24, A16: D32, D16, the master chassis may access (read or write) to any slave D08 (EO) board in the slave chassis. Only noninterrupter slave boards Arbiter: SGL are allowed in the slave chassis. Requester: ROR, bus request level 3 only (BR3*) BG3IN*-BG3OUT* Maximum Delay: 100 ns The link between the master chassis and slave chassis is BG3IN*-BBUSY* Maximum Delay: 200 ns automatically established when a VMEbus master (typically Link Registers (available when enabled): a CPU board) addresses any board in the slave chassis. Board Identification Burst Mode Any time a master in the master chassis issues a VMEbus Host Bus Grant read/write cycle it will be repeated to the slave chassis. If a VMEbus Activity (Slave Chassis) slave board in any slave chassis responds to that address, the Burst Mode Key data transfer (read or write) will occur between the chassis VMEbus Key and a Data Transfer Acknowledge (DTACK) will be Sysreset Enable Key generated to the master (in master chassis) to complete the Slave Chassis Reset Key cycle. VMIVME-5532M is DTB slave (for use in Master Chassis) The slave repeater includes a bus arbiter, bus requester, VMIVME-5532S is DTB master (for use in Slave system controller, and Control/Status Registers for Chassis) manipulating and monitoring the slave chassis when it is Form factor - double height, single slot being used in a redundant repeater link or multimaster VMIC • 12090 South Memorial Parkway • Huntsville, Alabama 35803-3308 1 VMIVME-5532L VMEbus Signals Active in Slave Chassis But Not Repeated: BR0*-BR3*, BGIN0*-BGIN3*, Ordering Options BG0OUT*-BG3OUT*, BBSY* July 15, 1997 800-005532-000 C ABC – D E F VMIVME-5532L – – Address Modifiers: 09, 0D, 29, 2D, 39, 3D A = Fiber-Optic Connector Type 0 = Ceramic Ferrule St Connector 1 = Stainless Steel Ferrule St Connector Read Cycle Overhead: 4.0 µs maximum BC = Cable Length 00 = No Cables 17 = 6,560 ft (2,000 m) 01 = 5 ft (1.5 m) 18 = 574 ft (174.9 m) Write Cycle Overhead: 4.0 µs maximum 02 = 25 ft (7.6 m) 19 = 656 ft (199.9 m) 03 = 50 ft (15.2 m) 20 = 820 ft (249.9 m) 04 = 100 ft (30.4 m) 21 = 1,148 ft (349.9 m) Transfer Rate (Maximum) (10-foot Cable 05 = 150 ft (45.7 m) 22 = 1,312 ft (399.9 m) Length): Assuming a slave board in the slave chassis 06 = 200 ft (60.9 m) 23 = 1,640 ft (499.9 m) 07 = 350 ft (106.7 m) 24 = 1,804 ft (549.8 m) responds in 250 ns: 08 = 500 ft (152.4 m) 25 = 2,132 ft (649.8 m) 1 Mbyte/s minimum (D32) 09 = 1,000 ft (304.8 m) 26 = 2,296 ft (699.8 m) 10 = 1,500 ft (457.3 m) 27 = 2,624 ft (799.8 m) 11 = 2,000 ft (609.7 m) 28 = 2,952 ft (899.8 m) 2 CABLE SPECIFICATIONS 12 = 2,460 ft (750.0 m) 29 = 3,116 ft (949.7 m) 13 = 3,280 ft (1,000 m) 30 = 250 ft (76.2 m) 14 = 4,100 ft (1,250 m) 31 = 10 ft (3.0 m) Mode: Multi 15 = 4,920 ft (1,500 m) 32 = 80 ft (24.4 m) 16 = 5,740 ft (1,750 m) BOARDS ONLY Length: 5 to 6,560 ft (1.5 to 2,000 m) ABC – D E F VMIVME-5532M –000 – Fiber Size: 62.5 micron ABC = 000 (Options reserved for future use) ABC – D E F Clad Size: 125 micron VMIVME-5532S –000 – ABC = 000 (Options reserved for future use) Buffer Size: 900 micron Note Link: Includes one VMIVME-5532M (Master) Board, one VMIVME-5532S (Slave) Maximum Attenuation at 1,300 nm: 9.0 dB Board, and two cable assemblies (including connectors) Connector Data Compatible Connector ST Connector Bandwidth at 1,300 nm: 500 MHz-km PC Board Fiber-Optic Connector Fiber-Optic Receiver HFBR-2416 (Hewlett-Packard) Fiber-Optic Transmitter HFBR-1414 Boot Length: 20 to 60 mm (Hewlett Packard For Ordering Information, Call: U.L./NEC Rating: OFNP 1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859 E-mail: info@vmic.com Web Address: www.vmic.com Copyright © February 1995 by VMIC Connector Style: ST, 2.5 mm Bayonet, both ends Specifications subject to change without notice. Quantity Required: 2 per link VMEbus Signals Repeated to Slave 1 PHYSICAL/ENVIRONMENTAL Chassis : A1 to A31, D0 to D31, DS0*, DS1*, WRITE*, Temperature: 0 to 65 °C, operating SYSRESET*, SYSCLK, AM0, AM2, AM4, AM5, -20 to 85 °C, storage LWORD*, and IACK* Humidity: 20 to 80 percent, relative noncondensing VMEbus Signals Returned to Master Chassis: D0 to D31, DTACK* Altitude: Operation to 10,000 ft (3,048 m) Cooling: Forced air convection 2. Cables conforming to this specification are supplied with 1. The following signals are regenerated at the slave chassis instead VMIVME-5532L. To order cables separately, please refer to of being sent over the fiber-optic cable: SYSCLK, AM0, AM1, specification number VMICBL-000-F3-XXX. AM3, and IACK*. 2 For Ordering Information, Call: 1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859 VMIVME-5532L VMIVME-5532M: 2 A typical at 5 Dimensions: Double height (6U) board 160 x 233.35 VDC mm 2.5 A maximum POWER REQUIREMENTS TRADEMARKS VMIVME-5532S: 2 A typical at 5 VDC The VMIC logo is a registered trademark of VMIC. 2.5 A maximum Other registered trademarks are the property of their respective owners. GLOBAL CPU CPU MEMORY I/O CPU MEMORY HUB MASTER VMEbus 1 MASTER VMEbus CHASSIS VMIVME-5532 VMIVME-5532 VMIVME-5532 MASTER MASTER MASTER VMIVME-5532 MASTER VMIVME-5532 VMIVME-5532 SLAVE SLAVE SLAVE SLAVE VMIVME-5532 VMEbus VMEbus SLAVE I/O I/O I/O I/O I/O I/O * * VMIVME-5532 SLAVE VMEbus 2 SLAVE SLAVE VMEbus I/O I/O I/O CPU *CPU (Optional). (OPTIONAL) MODULES MODULES MODULES I/O I/O I/O * Figure 1. Single Link Application Diagram Figure 2. Star Configuration GLOBAL GLOBAL VMIVME- VMIVME- CPU CPU MEMORY 5588* 5588* MEMORY MASTER VMEbus 1 MASTER VMEbus 2 VMIVME-5532 VMIVME-5532 MASTER MASTER 1.5 to 2,000 meters VMIVME-5532 VMIVME-5532 SLAVE SLAVE SLAVE VMEbus CPU I/O I/O I/O • • • (OPTIONAL) MODULES MODULES MODULES *VMIVME-5588 Reflective Memory is an effective way to synchronize memory for multiple master CPUs. Figure 3. Redundant Link Configuration VMIC • 12090 South Memorial Parkway • Huntsville, Alabama 35803-3308 3 VMIVME-5532L TRANSCEIVERS D[15:0] FIBER-OPTIC TRANSMITTER V D[31:16] TRANSMIT M DATA FIBER-OPTIC STATE BUFFERS RECEIVER E MACHINE b u s RECEIVE A[31:1] STATE MACHINE VME BUFFERS AND CONTROL Figure 4. Block Diagram of VMIVME-5532M Master Chassis Repeater Link Board BG3IN* VMEbus BR3* REQUESTER CONTROL BG3OUT* REGISTERS VMEbus ARBITER TRANSCEIVERS D[15:0] FIBER-OPTIC TRANSMITTER V RECEIVE D[31:16] FIBER-OPTIC STATE M RECEIVER MACHINE E b u DATA BUFFER s A[31:1] CONTROL VME TRANSMIT AND CONTROL STATE ADDRESS STATE MACHINE MOD. MACHINE BUFFERS Figure 5. Block Diagram of VMIVME-5532S Slave Chassis Repeater Link Board 4 For Ordering Information, Call: 1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859