VMIC VME-3122

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Details

Part Number VME-3122
Manufacturer VMIC
Category ANALOG INPUT BOARDS
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Description

VMIC VME-3122 High Performance 16-bit Analog-to-Digital Converter (ADC) Board

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Features

  • 1,024-Word Data Buffer (16-Word Deep Buffer x 64 Channels)
  • 16-bit A/D Conversion
  • 64 Differential or Single-Ended Inputs
  • Barrier Terminal Strips Available
  • Compatible with VMIC's Universal I/O Controllers (VMIVME-9300 Series)
  • Continually Digitizes Selected Input Channels and Stores the Results
  • External Trigger to Synchronize Multiple Boards Simultaneously
  • Input Pull-Down Resistors Control Floating Inputs
  • Jumper-Selectable A/D Ranges of 0 to +5 V, 0 to +10 V, ±2.5 V, ±5 V, and ±10 V
  • Low-Cost Standard Performance Option Available
  • Optional Low Pass Filter
  • Overvoltage Protected Inputs
  • Powers Up in Autoscanning Mode with Unity Gain
  • Program-Selectable Scanning of 16, 32, 48, or 64 Channels
  • Programmed VMEbus Interrupts
  • See Pages 20 and 21 for Analog I/O Signal Conditioning Boards
  • Selectable Output Coding
  • Six Operating Modes (Autoscanning Mode, Single Channel Random Polling Mode, Timed Burst Mode, Locally Triggered Burst Mode, Remotely Triggered Burst Mode, Gain Loading Mode)
  • Software-Programmable Gain 1, 10
  • Software-Selectable Conversion Rate (100 kHz Maximum)
  • User-Programmable Interval Timer

Datasheet

Download "VMIC-VMIVME-3122-datasheet-7930845631.pdf" (229 KiB)

Extracted Text

GE Fanuc Automation VMIVME-3122 Specifications High-Performance 16-bit Analog-to-Digital Converter (ADC) Features: • Software-programmable gain 1 and 10 • 64 different or single-ended inputs • 16-bit A/D conversion • External trigger to synchronize multiple boards simultaneously • Software-selectable conversion rate (100 kHz maximum) • Jumper-selectable A/D ranges of 0 to +5V, 0 to +10V, ±2.5V, • Program-selectable scanning of 1, 8, 16, 32 or 64 channels ±5V and ±10V • Continually digitizes selected input channels and stores the • Optional low pass filter results • Overvoltage protected inputs • Three trigger modes • 1,024-word data buffer (16-word deep buffer x 64 channels) − Software trigger • Selectable output coding − External trigger • Power up in autoscanning mode with unity gain − Interval timer trigger • Three scan modes Applications: − Autoscan • Factory automation and instrumentation − Single scan • Process control − Random access • Laboratory instrumentation • Machine monitoring • Programmed VMEbus interrupts • User-programmable interval timer • Data acquisition VMIVME-3122 High-Performance 16-bit Analog-to-Digital Converter (ADC) The board supports the following operating modes, which are Ordering Options described below: May 1, 2006 800-003122-000 J A B C D E F Trigger Modes VMIVME-3122 – 0 0 Software Trigger A = Input Filter Option External Trigger 0 = No Filter Interval Timer Trigger 1 = 10 Hz (-3 dB) 2 = 50 Hz (-3 dB) Scan Modes 3 = 100 Hz (-3 dB) Autoscan 4 = 500 Hz (-3 dB) Single Scan B = Number of Channel Option Random Access 0 = 64 Channels High Performance 1 = 32 Channels High Performance One thousand twenty-four dual-port Data Registers provide 2 = 16 Channels High Performance storage for continuous scanning of all channels. The trigger and 3 = 64 Channels Standard Performance scanning modes are executed automatically at power up, 4 = 32 Channels Standard Performance 5 = 16 Channels Standard Performance system reset, or are entered under program control. The C = Input Option dual-port registers allow VMEbus access at any time to read the 0 = Differential Analog Input Channels with 96-pin Nonlatching latest stored data. Connector (See Note 1) 1 = Single-Ended analog Input Channels with 96-pin Nonlatching Channel gain is under software control and can be fixed at x1 or Connector (See Note 1) x10 or each channel individually programmed for either gain. 2 = Differential analog Input Channels with 64-pin Latching Connector Conversion rate is selectable up to 100 kSPS 3 = Single-Ended Analog Input Channels with 64-pin Latching Connector (thousand samples/s) with the high-performance option, and DE = 0 (Option reserved for future use) F = Special Sales Order 50 kSPS with the standard performance option. Low pass input 0 = Standard VME front panel without conformal coating filters are available. 1 = Reserved 2 = Standard VME front panel with conformal coating Functional Characteristics Connector Data (At +25°C and rated power supplies, unless otherwise stated) Recommended P3 and P4 Style Connecting Component I/O Connectors Operating Modes: 64-pin Mating Connector (64-pin) Panduit 120-964-435 IDC Trigger Mode: Software Trigger: The selected scan mode is Strain Relief (For 64-pin Panduit 100-000-072 initiated by writing to the software trigger address. Connectors) 96-pin Mating Connector (96-pin AMP 925486-1 External Trigger: An external trigger, received on the P2 Discrete Discrete) connector, initiates the selected scan mode. Wire Female Crimp Contacts AMP 530151-6 (96-pin Discrete) (See Note 2) Interval Timer Trigger: The selected scan mode is initiated each Connector Housing Harting 09 03 096 0501 time the programmed time interval expires. (For 96-pin Connectors) 96-pin Mating Connector ERNI 913.031 Scan Mode: Autoscan: This is the default scan mode. All active IDC (96-pin Mass-Terminated) channels are scanned continuously in sequential order. 0.033-inch Ribbon Cable ERNI 913.049 (96-pin Mass-Terminated) Single Scan: A single data burst (scan of all selected channels) is Strain Relief Insert Harting 09 02 000 9912 initiated by the selected trigger mode. After all selected (0.033-inch Ribbon Cable) channels have been scanned, the scanning process stops and Connector Housing Harting 09 03 096 0501 waits for another trigger. (For 96-pin Connector) PC Board I/O Connector Part Number Panduit 101-096-033A Random Access: A single channel can be selected, digitized, and Panduit is also known as ITW/Pancon. stored each time the selected trigger mode is enabled. Notes Channel Autogain: The unique gain code for each channel is 1. Latches are located on the cable. loaded from the VMEbus into a gain buffer. The assigned code is 2. AMP crimp tool part number 90301-2. retrieved from the buffer in real-time for each channel For Ordering Information, Call: acquisition. 1-800-322-3616 or 1-256-880-0444 • FAX (256) 882-0859 Email: info.embeddedsystems@gefanuc.com Synchronization: A single scan or burst can be initiated by an Web Address: www.gefanuc.com/embedded external TTL trigger through the P2 connector (External Trigger), Copyright © 2006 by GE Fanuc Embedded Systems Specifications subject to change without notice. or locally through the CSR (Software Trigger). Either event generates a P2 Trigger output, which can be used to synchronize up to 15 boards. Introduction: This product is designed to support 64 channels VMEbus Access: Response to address modifiers is jumper of differential or single-ended wide range (±250mV to ±10V) selectable as: analog inputs. 2 VMIVME-3122 High-Performance 16-bit Analog-to-Digital Converter (ADC) A32, A24 or A16 address space Full-Scale Input Range: Gain = 1: ±1 to ±10V Bipolar; 0 to +5V, 0 Supervisory or Nonprivilege, or both to +10V Unipolar Gain = 10: ±250mV to ±1V Bipolar; 0 to +.5V Unipolar VMEbus Compliance: This product complies with VMEbus Specification ANSI/IEEE STD 1014-1987 IEC 821 and 297 with the Accuracy: Maximum error = ±0.005 percent Reading ± 0.005 following mnemonics: percent range ±100µV A32/A24/A16:D16/D8 (EO) DTB Slave Example: For a +7.000V reading in the ±10V range: Interrupter I (1 to 7) ROAK (DYN) Maximum Error = ±350µV ±1 mV ±100µV = ±1.45mV Interrupter Vector: D08 (O) (DYN) Stability: Temperature drift, per degree Celsius = ±10 PPM (ADC 6U for factor reading) plus ±7.5 PPM (ADC range) plus ±2.5µV VMEbus Interrupt: An interrupt request can be generated at the Example: For a +7.000V reading in the ±10V range: Temperature end or middle of a buffer scan. The request can also be initiated drift = ±70µV ±150µV ±2.5µV = ±222.5µV after a specific number of samples (1 to 65,535) have been acquired. Response vectors are controlled through Interrupt Input Noise: (0.4 + 0.3/G)mV; where: G = PGA Gain Noise is Vector Registers. independent of Ţlter option Data Ready Flag: A data ready flag in the CSR is set when the Input Bias Current: 40nA maximum at zero input data buffer is filled (endscan) or half-filled (midscan). Input Impedence: 5MΩ minimum in parallel with 50pF Interval Timer: Timed intervals of up to 687 seconds are Interchannel Crosstalk (DC to 1 kHz): provided by a programmable interval timer. Alternate Reset Operations: Board reset occurs in response to a system Adjacent Channel reset or by writing to the Software Reset Address. For Option Channel (See Note) programming-free initial operation, a reset operation High Performance -88dB -110dB automatically establishes the following default conditions: (391 to 100 kSPS) Autoscanning Mode Standard Performance -50dB -90dB 64-, 32-, or 16-channel block size, depending on option selected. (50 kSPS) 64-, 32-, or 16-channel data buffer, depending on option Standard Performance -90dB -96dB selected (35 kSPS) Channel Gain = x1 NOTE: Adjacent channel used as a guard channel. Rate = 100 kHz conversion (See Note) Common-Mode Voltage Range: The ADC will go through a calibration cycle on either RESET (IVCMI + IVINI.G): ≤ 10V condition. The calibration cycle takes 41 ms after a RESET operation has been initiated. Where: VCM = the common-mode voltage VIN = the input voltage NOTE: The standard performance can sample at 100 kSPS, but G = the gain may not convert accurately at rates above 50 kSPS. For the Common-Mode Rejection: DC to 60 Hz with 350 Ω source standard performance options, the user must set the sample rate to 50 kSPS or less after reset. imbalance Gain Min Typical PGA: Channel gains of x1 and x10 are selected through a Programmable Gain AmpliŢer (PGA). PGA gain can be software 1 90dB 100dB conŢgured for a single gain on all channels, or it can be controlled in real-time with unique gains assigned for each 10 100dB 120dB channel. Common-Mode Rejection for the ±2.5V and 0 to +5V scale is a Panel Indicator: Program-controlled front panel LED is minimum of 75dB. This can be field-trimmed to the same energized during reset, and is extinguished through the CSR. common-mode rejection as the gain of 1. Board Identification: A Board IdentiŢcation Register (BIR) Overvoltage Protection: contains the VMIVME-3122 identiŢcation code. ±35V, sustained Power On/Power Off ±80V, transient (1s maximum) Input Characteristics Number of Input Channels: 64, 32 or 16 differential or Input Filters: Optional low pass single-pole filters: single-ended channels -3dB at 10 Hz -3dB at 50 Hz Full-Scale A/D Ranges: ±2.5V, ±5V, ±10V, 0 to +5V, 0 to +10V; -3dB at 100 Hz jumper selectable -3dB at 500 Hz Channel Gain: Software configured for x1 or x10 These values apply for differential inputs. Frequency doubles for single-ended (pseudo-differential) applications. The cutoff 3 VMIVME-3122 High-Performance 16-bit Analog-to-Digital Converter (ADC) frequency has a tolerance of ±25 percent. Typical no Ţlter input Physical/Environmental Specifications bandwidth (20 Vp-p) is 5 kHz (standard performance) or 40 kHz Dimensions: 6U (4HP) single slot Eurocard form factor (high performance). Height 9.2 in. (233.4mm) Common-Mode/Floating Input Protection: On the high- Depth 6.3 in. (160mm) performance option, the low side of each input is pulled to Thickness 0.8 in. (20.3mm) ground through a 22MΩ resistor. On the standard performance option, the user must control the common-mode voltage and Weight: 700g, maximum not let inputs ţoat. Power Requirements: 7.0A (maximum) at +5VDC Transfer Characteristics Resolution: 16 bits Airflow: Forced air cooling required Input Sampling: Sequential, starting at channel 00 Temperature: Operating: 0 to +65° C Input Transfer Function: Storage: -40 to +85° C E = E + E x N IN LO FSR ADC Altitude: 65,536 Operating: 0 – 10,000 ft (3,000m) Where: E = Input Voltage IN Storage: 0 – 40,000 ft (12,000m) ELO = Lower End of Input Range Humidity: E = Full-Scale Input Range FSR Operating: relative humidity 0% to 80%, noncondensing N = A/D Converter Reading ADC Input Connectors (P3, P4): Input connectors P3 and P4 may be Example: For a NADC value of D99A HEX (55,706 decimal) in the ordered as either 96-pin DIN nonlatching or 64-pin DIN latching. ±10V range: The 96-pin nonlatching connectors offer the center row as ground, while the center row ground is not available on the E = -10 + [20.000 x (55,706/65,536)] = +7.000 IN 64-pin latching connector. When using the 64-pin latching Integral Nonlinearity: ±0.005 percent maximum; from best connectors in differential mode, the user may jumper E1 and E2 straight line to provide ground on the front panel, this will result in conŢguring channels 31 and 63 as single-ended. See the Differential Nonlinearity: ±0.005 percent Ordering Options C field (Input Option). No missing codes at 16-bit resolution MTBF: 135,900 hours (217F) A/D Conversion Rate: 381 to 100 kSPS; high-performance option: 381 to 50 kSPS; standard ® UIOC Support performance option In a UIOC, the VMIVME-3122 is used as a monitoring device. Channel Sample Rate (Maximum): 100 kSPS During initialization, the UIOC programs the VMIVME-3122 to (100 kSPS ÷ number of channels in scanning block, 1 channel scan all 64 channels and sets the scan mode to Autoscan. minimum) Through UCLIO™ language, the user may set programmable channel gains and command the UIOC to acquire data from any Timed Interval: 305µs to 687s or all of the VMIVME-3122 channels. Through a menu-driven Data Coding: Program selectable as two’s complement, or calibration process, the user may create and store channel gain straight/offset binary and offset correction factors which are automatically used by the UIOC to provide software gain and offset corrections for Data Buffer Memory each channel. Buffer Size: 16 to 1,024 contiguous 16-bit data words; Compatible Signal Conditioning Boards program controlled VMIVME-3417A: 16-Channel Isolated Signal Conditioning Board Block Size: 1, 8, 16, 32, or 64 channels; with Optional Current Loop Termination. The VMIVME-3417A program controlled provides full-scale input ranges from ±5 mV to ±10 V. Two-pole low pass input Ţlters are available with cutoff frequencies of 4, Access Time: 40, or 400 Hz. Optional current loop termination input resistors Nonscanning: 600ns maximum are available, and replace the input Ţlter. See Figure 2 for a Scanning: 600 ns typical, 1.2µs maximum typical system implementation of the VMIVME-3417A. Maximum access time in scanning mode will occur only when VMEbus access occurs in ADC sample window. VMIVME-3418: 8-Channel Strain Gauge and RTD Isolated Signal Conditioning Board. The VMIVME-3418 provides full-scale input VMEbus Access: D8 to or D16 ranges from ±5 mV to ±10 V. Low pass input Ţlters are available Availability: Accessible at any time from the VMEbus. with cutoff frequencies of 4, 40, or 400 Hz. See Figure 3 for a Buffer and block sizes are controlled through a typical system implementation of the VMIVME-3418. Configuration Control Register (CCR). 4 VMIVME-3122 High-Performance 16-bit Analog-to-Digital Converter (ADC) VMIVME-3419: 32-Channel Signal Conditioning Board with Programmable Gain and Built-in-Test (BIT). The VMIVME-3419 accepts full-scale input ranges from ±5mV to ±10V, depending on the gain selected for the A/D board. Low pass Ţlters are available with cutoff frequencies of 4, 40, 400, or 4 kHz. Optional current loop termination input resistors are available. See Figure 4 for a typical system implementation of the VMIVME-3419. Trademarks All registered trademarks are the property of their respective owners. Application and Configuration Guide The following Application and Configuration Guide is available from GE Fanuc Embedded Systems to assist the user in the selection, specification and implementation of systems based on GE Fanuc Embedded Systems’ products. Title Document No. Connector and I/O Cable Application Guide 825-000000-006 5 VMIVME-3122 High-Performance 16-bit Analog-to-Digital Converter (ADC) P3 ANALOG 32 DIFF. LOW PASS PAIRS MUX PROGRAMMABLE 8 DIFF. FILTERS GAIN AMPLIFIER PAIRS (OPTIONAL) (8) (PGA) ANALOG 2 SAMPLING MUX 8 DIFF. P4 16-bit PAIRS (SE) DIFF. ANALOG ADC (1) 32 DIFF. LOW PASS PAIRS MUX FILTERS CONV COMMAND (OPTIONAL) (8) CONV COMPL 16 MUX 2 SELECT DUAL-PORT DUAL-PORT REGISTERS P1 GAIN AND REGISTERS CONTROL 16 P2 4 VMEbus ADC ADC FOUNDATION TIMING CONTROL EXT CNVT TRIGGER LOGIC EOC COUNT INT COMPL BUS INTERRUPTER PROGRAMMABLE MODULE TIMER (BIM) Figure 1. VMIVME-3122 Functional Block Diagram 6 VMIVME-3122 High-Performance 16-bit Analog-to-Digital Converter (ADC) FIELD FIELD FIELD FIELD SIGNALS SIGNALS SIGNALS SIGNALS 16 16 16 16 CHANNELS CHANNELS CHANNELS CHANNELS P3 P4 P3 P4 P3 P4 P3 P4 P3 P4 3122 3417A 3417A 3417A 3417A ADC FULL POWER POWER POWER POWER VMEbus INTERFACE VMEbus Figure 2. Typical System Implementation Using VMIVME-3122 with VMIVME-3417A FIELD FIELD FIELD FIELD FIELD FIELD FIELD FIELD SIGNALS SIGNALS SIGNALS SIGNALS SIGNALS SIGNALS SIGNALS SIGNALS 8 8 8 8 8 8 8 8 CHANNELS CHANNELS CHANNELS CHANNELS CHANNELS CHANNELS CHANNELS CHANNELS P3 P4 P3 P4 P3 P4 P3 P4 P3 P4 P3 P4 P3 P4 P3 P4 P3 P4 3122 3418 3418 3418 3418 3418 3418 3418 3418 ADC FULL POWER POWER POWER POWER POWER POWER POWER POWER VMEbus INTERFACE VMEbus Figure 3. Typical System Implementation Using VMIVME-3122 with VMIVME-3418 7 VMIVME-3122 High-Performance 16-bit Analog-to-Digital Converter (ADC) FIELD FIELD SIGNALS SIGNALS 32 32 CHANNELS CHANNELS 16 16 16 16 P3 P4 P5 P3 P4 P5 P4 P3 3122 3419 3419 ADC FULL POWER POWER VMEbus INTERFACE VMEbus Figure 4. Typical System Implementation Using VMIVME-3122 with VMIVME-3419 GE Fanuc Embedded Systems Information Centers Additional Resources Americas: For more information, please visit the Huntsville, AL 1 800 322-3616 GE Fanuc Embedded Systems web site at: 1 (256) 880-0444 www.gefanuc.com/embedded Camarillo, CA 1 (805) 987-9300 Greenville, SC 1 (864) 627-8800 Richardson, TX 1 (972) 671-1972 Europe, Middle East and Africa: Edinburgh, UK 44 (131) 561-3520 Paris, France 33 (1) 4324 6007 8

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