IC Voltage-Controlled THAT Corporation Amplifiers THAT 2151, 2150A, 2155 FEATURES APPLICATIONS • Wide Dynamic Range: >116 dB • Faders • Wide Gain Range: >130 dB • Panners • Exponential (dB) Gain Control • Compressors • Low Distortion: (0.008% @ 0 dB • Expanders gain, 0.035% @15dB gain) • Equalizers • Wide Gain-Bandwidth: 6 MHz • Filters • Low Cost: $2.20 in ’000s (2155) • Oscillators • Single In-Line Package • Automation Systems • Dual Gain-Control Ports (pos/neg) Description The THAT 2150 Series integrated-circuit voltage- quire minimal support circuitry. Fabricated in a controlled amplifiers (VCAs) are high-performance super low-noise process utilizing high h , comple- FE current-in/current-out devices with two opposing- mentary NPN/PNP pairs, the 2150 Series VCAs polarity, voltage-sensitive control ports. Based on combine high gain-bandwidth product with low dbx technology, they offer wide-range exponential noise, low distortion, and low offset to offer discrete control of gain and attenuation with low signal dis- performance at IC prices. They are available in tortion. The parts are housed in a space-efficient, three grades, selected for distortion, allowing the plastic 8-pin single-in-line (SIP) package, and re- user to optimize cost vs. performance. PIN 1 MODEL NO. 7 H THAT J N E G L M TYP. B F K BIAS CURRENT 2 D I COMPENSATION C A ITEM MILLIMETERS INCHES 3 Vbe A 20.32 MAX. 0.8 MAX. 8 B 1.1 MIN. 0.043 MIN. MULTI- + _ .1 + _ .004 C 0.5 0.02 PLIER 4 1 D 0.25 0.01 E 2.54 0.1 6 F 1.27 MAX. 0.05 MAX. G 0.51 MIN. 0.02 MIN. H 5.08 MAX. 0.2 MAX. + + _ _ .008 I 2.8 .2 0.11 J 5.75 MAX. 0.227 MAX. K 1.5 MAX. 0.058 MAX. _ _ 5 +.10 .04 +.004 .002 L 0.25 0.01 _ + _ + M 3.2 .5 0.126 .02 N 1.1 MIN. 0.043 MIN. Figure 1. 2150 Series Equivalent Circuit Diagram Figure 2. 2150 Series Physical Outline dbx is a registered trademark of Carillon Electronics Corporation THAT Corporation; 734 Forest Street; Marlborough, Massachusetts 01752; USA Tel: (508) 229-2500; Fax: (508) 229-2590; Web: http://www.thatcorp.com OBSOLETE (see 2180/2181) Page 2 2150 Series IC VCAs 1 SPECIFICATIONS Absolute-Maximum Ratings (T = 25˚C) A Positive Supply Voltage (V ) +18 V Power Dissipation (P ) (T = 75˚C) 330 mW CC D A Negative Supply Voltage (V ) -18 V Operating Temperature Range (T ) -20 to +75˚C EE OP Supply Current (I )10 mA Storage Temperature Range (T ) -40 to +125˚C CC ST Recommended Operating Conditions 2151 2150A 2155 Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Units Positive Supply Voltage V +5 +12 +15 +5 +12 +15 +5 +12 +15 V CC Negative Supply Voltage V -5 -12 -15 -5 -12 -15 -5 -12 -15 V EE Bias Current I V -V = 24 V — 2.4 4 — 2.4 4 — 2.4 4 mA SET CC EE Signal Current I +I I = 2.4 mA — 175 750 — 175 750 — 125 550 μArms IN OUT SET 2 Electrical Characteristics 2151 2150A 2155 Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Units Supply Current I No Signal — 2.4 4 — 2.4 4 — 2.4 4 mA CC Equiv. Input Bias Current I No Signal — 5 8 — 5 8 — 5 8 nA B Input Offset Voltage V No Signal — +10 — — +10 — — +10 — mV OFF(IN) Output Offset Voltage V R =20 kΩ OFF(OUT) out 0 dB gain — 1 3 — 1 3 — 1 3 mV +15 dB gain — 2 3 — 2 3 — 2 3 mV +40 dB gain — 5 15 — 7 15 — 10 15 mV Gain Cell Idling Current I —20 — —20 — —20 — μA IDLE Gain-Control Constant T =25˚C (T ≅35˚C) A CHIP -60 dB < gain < +40 dB E /Gain (dB) Pins 2 & 4 (Fig. 14) 6.0 6.1 6.2 6.0 6.1 6.2 6.0 6.1 6.2 mV/dB C+ E /Gain (dB) Pin 3 -6.0 -6.1 -6.2 -6.0 -6.1 -6.2 -6.0 -6.1 -6.2 mV/dB C- Gain-control TempCo Δ E / Δ T Ref T = 27˚C — +0.33 — — +0.33 — — +0.33 — %/˚C C CHIP CHIP Gain-Control Linearity -60 to +40 dB gain — 0.5 2 — 0.5 2 — 0.5 2 % Off Isolation (Fig. 14) E =-360mV, E =+360mV 110 115 — 110 115 110 115 — dB C+ C- Output Noise e 20 Hz-20 kHz n(OUT) = 20kΩ R out 0 dB gain — -98 -97 — -98 -96 — -98 -96 dBV +15 dB gain — -88 -86 — -88 -86 — -88 -86 dBV 1. All specifications subject to change without notice. 2. Unless otherwise noted, T =25˚C, V = +15V, V = -15V. Test circuit is as shown in Figure 3. SYM is ad- A CC EE ADJ justed for minimum THD @ V =1 V, 1 kHz, 0 dB gain. in THAT Corporation; 734 Forest Street; Marlborough, Massachusetts 01752; USA Tel: (508) 229-2500; Fax: (508) 229-2590; Web: http://www.thatcorp.com OBSOLETE Rev. 10/25/96 Page 3 Electrical Characteristics (Cont’d.) 2151 2150A 2155 Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Units Total Harmonic Distortion THD I + I = 180 μA, 1 kHz IN OUT 0 dB gain — 0.004 0.02 — 0.005 0.03 — — — % ±15 dB gain — 0.025 0.045 — 0.05 0.07 — — — % I + I = 150 μA, 1 kHz IN OUT 0 dB gain — — — — — — — 0.006 0.03 % ±15 dB gain — — — — — — — 0.05 0.07 % Symmetry Control Voltage V A = 0 dB, THD < 0.07% -1.6 0 +1.6 -2 0 +2 -2.5 0 +2.5 mV SYM V Gain at 0 V Control Voltage E = 0 mV -0.1 0.0 +0.1 -0.15 0.0 +0.15 -0.2 0.0 +0.2 dB C– +15V 47p Ec- 2150 Series 7 20k VCA V+ 3 Ec- OUT 1 INPUT -IN Ec+ - 8 Ec+ 4 GND LF351 OUTPUT 2 V- 10u 20k 6 + 5 +15V Rsym 5.1k 50k 51 SYM 150k 300k (2155) ADJ 390k (2150A) 470k (2151) -15V -15V Figure 3. Typical Application Circuit Figure 4. Frequency Response Vs. Gain (2150A) Figure 5. Noise (20kHz NBW) Vs. Gain (2150A) THAT Corporation; 734 Forest Street; Marlborough, Massachusetts 01752; USA Tel: (508) 229-2500; Fax: (508) 229-2590; Web: http://www.thatcorp.com OBSOLETE Page 4 2150 Series IC VCAs Theory of Operation The THAT 2150 Series VCAs are designed for high kT V is the thermal voltage, ; I is the collector cur- T C3 q performance in audio-frequency applications requiring rent of Q3; and I is the reverse-saturation current of S exponential gain control, low distortion, wide dynamic Q3. It is assumed that D3 matches Q3 (and will be as- range and low dc bias modulation. These parts control sumed that they match Q4 and D4, as well). gain by converting an input current signal to a bipolar logged voltage, adding a dc control voltage, and re-con- In typical applications (see Figure 3, Page 3), pin 4 verting the summed voltage back to a current through is connected to a voltage source at ground or nearly a bipolar antilog circuit. ground potential. Pin 8 is connected to a virtual ground (usually the inverting input of an op amp with Figure 6 presents a considerably simplified internal negative feedback around it). With pin 4 near ground, circuit diagram of the IC. The ac input signal current and pin 8 at virtual ground, the voltage at the cathodes flows in pin 1, the input pin. The internal op amp of D3 and D4 will cause an exponentially-related cur- works to maintain pin 1 at a virtual ground potential rent to flow in D4 and Q4, and out via pin 8. A similar by driving the emitters of Q1 and (through the Voltage equation governs this behavior: Bias Generator) Q3. For positive input currents (I de- in fined as flowing into pin 1), the op amp drives the emit- I  C4 V = E − 2V ln . ter of Q1 negative, turning off its collector current, 3 C+ T   I S   while simultaneously driving the emitter of Q3 nega- Exponential Gain Control The similarity between the two preceeding equations - begs further exploration. Accordingly: + I  I  C4 C3 D1 D2 V = E − 2V ln = E − 2V ln 3 C+ T   C− T   I I S S     2 Q1 Q2 3 I  I  Ec+ C4 C3 Ec- E − E = 2V ln − 2V ln C+ C− T T     Voltage I I 1 8 S S     IN Bias OUT Q3 Generator Q4 4 I  Ec+ C4 Ii n = 2V ln . T   (SYM) I C3   D3 Rearranging terms, D4 E −E C+ C− 2V I = I e T . C4 C3 V3 If pin 3 and pin 4 are at ground potential, the cur- V- 5 rent in Q4/D4 will precisely mirror that in Q3/D3. When pin 3 is positive with respect to pin 4, the voltage across the base-emitter junction of Q3 is higher than Figure 6. Simplified Internal Circuit Diagram that across the base-emitter junction of Q4, so the Q4/D4 current remains proportional to, but less than, tive, turning it on. The input signal current, therefore, the current in Q3/D3. In the same manner, a negative is forced to flow through Q3 and D3. voltage at pin 3 with respect to pin 4 causes the Q4/D4 current to be proportional to, but greater than Logging & Antilogging that in Q3/D3. Because the voltage across a base-emitter junction The ratio of currents is exponential with the differ- is logarithmic with collector current, the voltage from ence in the voltages E and E , providing convenient C+ C– the base of Q3 to the cathode of D3 is proportional to “deci-linear” control. Mathematically, this is: the log of the positive input current. The voltage at the E −E C+ C− cathodes of D3 and D4 is therefore proportional to the I C4 A = = e 2V , where A is the current gain. V T V I log of the positive input currents plus the voltage at C3 pin 3, the negative control port. Mathematically, For pin 4 at or very near ground, at room tempera- I  ture (25˚C), allowing for a 10˚C internal temperature C3 V = E − 2V ln , 3 C− T   I S rise, and converting to a base of 10 for the exponential,   where V is the voltage at the junction of D3 and D4; this reduces to: 3 THAT Corporation; 734 Forest Street; Marlborough, Massachusetts 01752; USA Tel: (508) 229-2500; Fax: (508) 229-2590; Web: http://www.thatcorp.com OBSOLETE Rev. 10/25/96 Page 5 −E C− Transistor Matching 0.122 A = 10 . V The bias current flows downwards in the core (from When pin 3 is at O V, the current ratio is unity. Q1 to Q3, and from Q2 to Q4) so long as there is good When pin 3 is at +122 mV, the output current (Q4) is matching between all four compound transistors (tran- 10 times (20 dB) less than the input current. At sistors plus diodes). Mismatches will cause a dc output –122 mV, the output current is 10 times (20 dB) current to flow in pin 8, which will ultimately manifest greater than the input current. Another way of ex- itself as a dc offset voltage. Static offsets are of little pressing this relationship is: consequence in most audio applications, but any mis- match-caused dc output current will be modulated by −E C− Gain = , where Gain is the gain in decibels. gain commands, and may become audible as “thumps” 0.0061 if large, fast gain changes are commanded in the pres- ence of significant mismatches. Negative Input Currents Transistor matching also affects distortion. If the For negative input currents, Q1/D1 operate with top half of the gain cell is perfectly matched, while the Q2/D2 to mirror the lower-half-core behavior. Pin 2 is bottom half is slightly off, then the gain commanded by normally at or very near ground (see the section below the voltage at pin 3 will affect the two halves of the core on Symmetry Adjustment for more detail), so the same differently. Since positive and negative halves of ac gain scaling applied to the base of Q3 is applied to the input signals are handled by separate parts of the core, base of Q2. The polarity (positive/negative, in dB) of this gives rise to even-order distortion products. the gain is the same for the top pair versus the bottom pair of the four “core” transistors because their sexes Symmetry Adjustment (NPN/PNP) are inverted in the top versus the bottom, while the bases are cross-connected between the input The monolithic construction of the devices assures (left) half and the output (right) half of each pair. relatively good matching between the paired transis- tors, but even small V mismatches can cause unac- BE The resulting control over gain is extremely consis- ceptable asymmetries in the output. For this reason, tent from unit to unit, since it derives from the physics the bases of Q1 and Q4 are brought out separately to of semiconductors. Figure 7 shows actual data from a pin 2 and pin 4, respectively. This allows a small static typical 2150 Series VCA, taken at 25˚C. voltage differential to be applied to the two bases. The applied voltage must be set to equal the sum of the V BE mismatches around the core (which varies from sample to sample). Figure 3 (Page 3) includes a typical circuit to apply this symmetry voltage. R controls primarily SYM even-order harmonic distortion, and is usually ad- justed for minimum THD at the output. Figure 8 plots THD vs. the voltage between pins 2 and 4 (the two E C+ ports) for various gain settings of a typical part. Opposite Polarity Control As may be seen from the mathematics, the bases of Q1 and Q4 can also be used as an additional control Figure 7. Gain Versus Control Voltage (Pin 3) at 25˚C Core Bias Currents A quiescent bias current in the core transistors is established by the Voltage Bias Generator shown in Figure 6. This current acts like crossover bias in the output stage of a complementary class AB power am- plifier, smoothing the transition between turning on the top (PNP) pair and the bottom (NPN) pair of transis- tors in the core. This lowers distortion greatly at some cost to noise performance, as the current noise of the core transistors (which run at approximately 20 μA) is Figure 8. Typical THD Versus Symmetry Voltage the dominant noise source in the 2150 Series VCAs. THAT Corporation; 734 Forest Street; Marlborough, Massachusetts 01752; USA Tel: (508) 229-2500; Fax: (508) 229-2590; Web: http://www.thatcorp.com OBSOLETE Page 6 2150 Series IC VCAs port, with an opposite sense of control from that at vent such dc terms, ac input coupling is strongly rec- pin 3. To use this port, both pins must be driven with ommended. A plot of typical output offset voltage ver- the control voltage, while a small differential voltage is sus gain for the circuit of Figure 3 is shown in accommodated between the two pins. (Figure 14, Figure 9. (The LF351’s offset was adjusted to 0 V for Page 9, shows the typical connection.) Either pin 3, or this plot.) pins 2 and 4, or both ports together may be used for gain control. Mathematically, this relationship is as fol- lows: E −E C+ C− 0.122 AV = 10 , where AV is the gain in volts/volt, or E − E c+ c− Gain = , where Gain is the gain in decibels. 0.0061 Control Port Source Impedance The control ports (pins 2 through 4) are connected directly to the bases of the logging and/or antilogging transistors. As was implied in the earlier discussion on Figure 9. DC Offset Vs. Gain, After Symmetry Logging and Antilogging (Page 4) the accuracy of the Adjustment logging and antilogging is dependent on the E and C+ E voltages being exactly as desired to control gain. C- Current Programming The base current in the transistors will follow the col- lector currents, of course. Since the collector currents The size of the current source at the bottom of the are signal-related, the base currents will also be signal- core (Figure 6, Page 4) is programmed externally via related. Should the source impedance of the control I , which is normally determined by a resistor from SET voltage(s) be large, the signal-related base currents will pin 5 to V–. The voltage at pin 5 is typically –2.7 V. I SET cause signal-related voltages to appear at the control divides into two portions: approximately 400 μA is used ports, which will interfere with precise logging and for internal biasing, and the rest is available for the antilogging, in turn causing distortion. current source at the bottom of the core. I should SET therefore be 400 μA larger than the total of the peak The 2150 Series VCAs are designed to be operated input and output signal currents. with zero source impedance at pins 2 and 3, and a 50Ω source impedance at pin 4. (Pin 4 is intended for con- Note that the output impedance of the internal op- nection to the symmetry control, hence the higher de- amp is approximately 2 kΩ, and under peak demands, sign-center source impedance.) One can estimate the the sum of the input and output currents plus ISET distortion caused by a specific, non-zero source imped- must be supplied through this impedance, lowering the ance by determining the base voltage modulation due voltage available to drive the core. For more informa- to signal current based on a core-transistor β of ap- tion, see the Power Supplies section on Page 8. proximately 300 (NPN) or 100 (PNP), and converting the resulting decibel gain modulation to a percentage. Even 100Ω can spoil the good performance of these Headroom parts at high signal levels. Maximum signal currents are also limited by the logarithmic characteristics of the core transistors. In DC Input Signals the 2150 Series, these devices are specially con- Any dc currents in the feedback loop of the internal structed to conform to an ideal log-linear curve over a op amp will show up as dc terms in the output signal, wide range of currents, but they reach their limit at ap- and will be modulated by gain commands. Input bias proximately 1 mA. The symptom of failing log confor- currents will cause a dc current to flow in the feedback mance is increasing distortion with increasing current loop provided by the input side of the core. For this levels. The onset of distortion is gradual at low current reason, input bias currents in the internal op amp levels, and then more rapid as current becomes high. must be kept very low. The bias current compensation Figures 10 through 12 show distortion versus signal at the input stage provides excellent cancellation of the level for the three parts in the 2150 Series for -15 dB, bias current required by the input differential ampli- 0 dB, and +15 dB gain. The acceptable distortion will fier. Of course, this good performance can be negated determine the maximum signal level for a particular by a dc current supplied from outside the VCA. To pre- design. THAT Corporation; 734 Forest Street; Marlborough, Massachusetts 01752; USA Tel: (508) 229-2500; Fax: (508) 229-2590; Web: http://www.thatcorp.com OBSOLETE Rev. 10/25/96 Page 7 Figure 10. 1kHz THD+Noise Vs. Input, -15 dB Gain Figure 11. 1kHz THD+Noise Vs. Level, 0 dB Gain Figure 12. 1kHz THD+Noise Vs. Input, +15 dB Gain Applications the open-loop gain naturally falls off at high frequen- Input cies, asking for too much gain will lead to increased As mentioned above, input and output signals are high-frequency distortion. For best results, this resis- currents, not voltages. While this often causes some tor should be kept to 10 kΩ or above. Distortion vs. fre- conceptual difficulty for designers first exposed to this quency for a 1 V signal at 0 dB gain with a 20 kΩ input convention, the current input/output mode provides resistor is plotted in Figure 13. great flexibility in application. The quiescent dc voltage level at the input is ap- The input pin (pin 1) is a virtual ground with nega- proximately +10 mV. As mentioned above, any dc input tive feedback provided internally (see Figure 6, Page 4). currents will cause dc signals in the output which will The input resistor (shown as 20 kΩ in Figure 3, Page 3) be modulated by gain, causing audible thump. There- should be scaled to convert the available ac input volt- age to a current within the linear range of the device. (Peak input currents should be kept under 1 mA for best distortion performance.) An additional consider- ation is stability: the internal op amp is intended for operation with source impedances of less than 30 kΩ at high frequencies. For most audio applications, this will present no problem. The choice of input resistor has an additional, sub- tle effect on distortion. Since the feedback impedances around the internal opamp (essentially Q1/D1 and Q3/D3) are fixed, low values for the input resistor will Figure 13. THD Vs. Frequency, 0 dB Gain require more closed-loop gain from the opamp. Since THAT Corporation; 734 Forest Street; Marlborough, Massachusetts 01752; USA Tel: (508) 229-2500; Fax: (508) 229-2590; Web: http://www.thatcorp.com OBSOLETE Page 8 2150 Series IC VCAs fore, capacitive coupling is almost mandatory for qual- this source must supply the sum of the input and out- ity audio applications. Choose a capacitor which will put signal currents, plus the bias to run the rest of the give acceptable low frequency performance for the ap- IC. The minimum value for this current is 430 μA over plication. the sum of the required signal currents. 2.4 mA is rec- ommended for most pro audio applications where Multiple signals may be summed by multiple resis- +15 V supplies are common and headroom is import- tors, just as with an inverting op amp configuration. In ant. such a case, a single coupling capacitor may be located next to pin 1 rather than multiple capacitors at the Higher bias levels are of limited value, partly be- driven ends of the summing resistors. However, take cause the resistor mentioned in the positive supply dis- care that the capacitor does not act as an antenna for cussion must supply all the current devoted to the stray signals. core, and partly because the core transistors become ineffective at logging and antilogging at currents over 1 mA. Output Since pin 5 is intended as a current supply, not a The output pin (pin 8) is intended to be connected to voltage supply, bypassing at pin 5 is not necessary. a virtual ground node, so that current flowing in it may be converted to a voltage (see Figures 3, 14, & 15). Pin 6 is used as a ground reference for the VCA. The Choose the external op amp for good audio perfor- non-inverting input of the internal op amp is con- mance. The feedback resistor should be chosen based nected here, as are various portions of the internal bias on the desired current-to-voltage conversion constant. network. It may not be used as an additional input pin. Since the input resistor determines the voltage-to-cur- rent conversion at the input, the familiar ratio of R /R f i Voltage Control for an inverting op amp will determine the overall volt- The primary voltage-control pin is pin 3. This point age gain when the VCA IC is set for 0 dB current gain. controls gain inversely with applied voltage: positive Since the VCA performs best at settings near unity voltage causes loss, negative voltage causes gain. As gain, use the input and feedback resistors to provide described on Page 6, the current gain of the VCA is design-center gain or loss, if necessary. unity when pin 3 is at 0 V with respect to pins 2 and 4, A small feedback capacitor around the output op and varies with voltage at approximately -6.1 mV/dB, amp is necessary to cancel the output capacitance of at room temperature. the VCA. Without it, this capacitance will destabilize As implied by the equation for A (at the foot of most op amps. The capacitance at pin 8 is typically V Page 4), the gain is sensitive to temperature, in propor- 30 pf. tion to the amount of gain or loss commanded. The constant of proportionality is 0.33% of the decibel gain Power Supplies commanded, per degree Celsius, referenced to 27°C The positive supply is connected directly to pin 7. (300°K). This means that at 0 dB gain, there is no No special bypassing is necessary, but it is good prac- change in gain with temperature. However, at -122 mV, tice to include a small (~1 μf) electrolytic close to the the gain will be +20 dB at room temperature, but will VCA IC on the PCB. Performance is not particularly de- be 20.66 dB at a temperature 10˚C lower. The formula pendent on supply voltage. The lowest permissible sup- is: ply voltage is determined by the sum of the input and E −E C+ C− output currents plus I , which must be supplied SET Gain = , (0.0061) (1+0.0033) ΔT through the resistor at the top of the core transistors (see Figure 1) while still allowing enough voltage swing where E is in volts, and ΔT is the difference between C to bias the internal op amp and the core transistors the actual temperature and room temperature (25˚C). themselves. This resistor is approximately 2 kΩ. Re- For most audio applications, this change with tem- ducing signal currents may help accommodate low perature is of little consequence. However, if necessary, supply voltages. it may be compensated by a resistor which varies its The highest permissible supply voltage is fixed by value by .33%/˚C. Such parts are available from RCD the process characteristics and internal power con- Components, Inc, 3301 Bedford St., Manchester, NH, sumption. +15 V is the nominal limit. USA [(603) 669-0054], and KOA/Speer Electronics, PO Box 547, Bradford, PA, 16701 USA [(814)362-5536]. The negative supply terminal is intended to be con- nected to a resistive current source, which determines When pin 3 is used for voltage control, pin 2 is con- the current available for the core. As mentioned before, nected to ground and pin 4 is used to apply a small THAT Corporation; 734 Forest Street; Marlborough, Massachusetts 01752; USA Tel: (508) 229-2500; Fax: (508) 229-2590; Web: http://www.thatcorp.com OBSOLETE Rev. 10/25/96 Page 9 symmetry voltage (<±2.5 mV) to correct for V mis- erwise required to command high attenuation BE matches within the VCA IC. For this purpose, the 2150 (+610 mV for -100 dB gain at pin 3 alone, vs. ±305 mV series devices were designed for optimum performance when using both pin 3 and pins 2 and 4). with an impedance of approximately 50Ω at pin 4. A trim pot is used to adjust the voltage between pin 4 Control Port Drive Impedance and pin 2 as shown in Figure 3, Page 3. For supply It has already been noted that the control port voltages other than shown, scale R to provide the SYM should be driven by a low source impedance for mini- required adjustment range. mum distortion. This often suggests driving the control port directly with an opamp (see below under Noise It is also possible to use pin 2 and pin 4 together as Considerations). However, the closed-loop output im- an opposite-sense voltage control port. A typical circuit pedance of an opamp typically rises at high frequencies using this approach is shown in Figure 14. Pin 3 may due to falling loop gain. The output impedance is be grounded, and pin 2 driven against the symmetry- therefore inductive at high frequencies. Excessive in- adjustment voltage. The change in voltage at pin 4 ductance in the control port source impedance can does have a small effect on the symmetry voltage, but cause the VCA to oscillate internally. In such cases, a this is of little practical consequence in most applica- 51 Ω resistor in series with a 1.5 nf capacitor from the tions. Using the opposite sense of control can some- control port to ground will usually suffice to prevent times save an inverter in the control path. the instability. It is also possible (and advantageous) to combine both control ports with differential drive (see Fig- Noise Considerations ure 15). While the driving circuitry is more complex, It is second nature among good audio designers to this configuration offers better performance at high consider the effects of noisy devices on the signal path. attentuation levels (<-90 dB) where the single-control- As is well known, this includes not only active devices port circuits begin to saturate Q1 (for E drive) or Q3 C– such as op amps and transistors, but extends to the (for E drive). When either of these transistors satu- C+ choice of impedance levels as well. High value resistors rates, the internal opamp will accomodate the change have inherent thermal noise associated with them, and in current demand by responding with a small change the noise performance of an otherwise quiet circuit can in its input offset voltage. This leads to an accumula- be easily spoiled by the wrong choice of impedance lev- tion of charge on the input capacitor, which in turn els. can cause thump when the high attenuation is sud- denly removed (e.g., when a muted channel is opened). Less well known, however, is the effect of noisy cir- Differential control drive avoids the large dc levels oth- cuitry and high impedance levels in the control path of +15V 47p 2150 2150 7 Series Series 20k V+ VCA 3 VCA Ec- OUT 1 INPUT -IN Ec+ - 8 Ec+ 4 GND LF351 OUTPUT 2 V- 10u 20k 6 + 5 +15V 51 Rsym 5.1k 50k SYM 240k 300k (2155) ADJ 390k (2150A) Ec+ 470k (2151) -15V -15V Figure 14. Positive Control Port Using Pins 2 and 4 THAT Corporation; 734 Forest Street; Marlborough, Massachusetts 01752; USA Tel: (508) 229-2500; Fax: (508) 229-2590; Web: http://www.thatcorp.com OBSOLETE Page 10 2150 Series IC VCAs voltage-control circuitry. The 2150 Series VCAs act like To avoid excessive noise, one must take care to use double-balanced multipliers: when no signal is present quiet electronics throughout the control-voltage cir- at the signal input, noise at the control input is re- cuitry. One useful technique is to process control volt- jected. So, when measuring noise (in the absence of ages at a multiple of the eventual control constant signal — as most everyone does), even very noisy con- (e.g., 61 mV/dB — ten times higher than the VCA re- trol circuitry often goes unnoticed. However, noise at quires), and then attenuate the control signal just be- the control port of these parts will cause noise modula- fore the final drive amplifier. With careful attention to tion of the signal. This can become significant if care impedance levels, relatively noisy op amps may be is not taken to drive the control ports with quiet sig- used for all but the final stage. nals. Closing Thoughts The 2150 Series VCAs have a small amount of in- herent noise modulation because of its class AB bias- The design and application of Voltage-Controlled ing scheme, where the shot noise in the core Amplifiers has traditionally been partly black art, in- transistors reaches a minimum with no signal, and in- volving as much magic as science. We hope that the creases with the square root of the instantaneous sig- foregoing discussion will help to de-mystify the subject. nal current. However, in an optimum circuit, the noise THAT Corporation welcomes comments, questions floor rises only to -94 dBV with a 50 μA signal at unity and suggestions regarding these devices, their design gain — 4 dB of noise modulation. By contrast, if a and application. Please feel free to contact us with your unity-gain connected, inverting 5534 opamp is used to thoughts. directly drive the control port, the noise floor will rise to 92 dBV — 6 dB of noise modulation. +15V 2150 47p 2150 Series Series 7 VCA VCA 20k V+ 3 Ec- OUT 1 INPUT -IN Ec+ - 8 Ec+ 4 GND LF351 OUTPUT 2 V- 10u 20k 6 + 5 +15V + 51 Rsym 5.1k - 50k SYM 150k 240k 300k (2155) ADJ 390k (2150A) 1k 1k 470k (2151) Ec+ -15V -15V Figure 15. Using Both Control Ports (Differential Drive) THAT Corporation; 734 Forest Street; Marlborough, Massachusetts 01752; USA Tel: (508) 229-2500; Fax: (508) 229-2590; Web: http://www.thatcorp.com OBSOLETE