TEKTRONIX GB1400
Features
- 1 Mbit Programmable Pattern Memory (Optional)
- Auto-synchronization
- Automatic Eye-width Measurements
- ClockiData Delay 4 ns, 5 ps Resolution
- Internal PLL Synthesized Clock Source
- Operating frequency Range 1400 MHz
- Optional BURST Mode Operation
- Phase Synchronous Clock and Data Edge Tracking
- PRBS 2-raised-to-power-n -1 n: 7, 15, 17, 20, 23
- Reference Data lnpul for Proprietary Framed Data
Datasheet
Extracted Text
Bit Error Rate Tester
PRBS OR USER-DEFINED TEST PATTERNS
II
The GB1400 can generate pseudc-random
IA~ Features
bit sequences (PRBS) up to 223-f bits and
others optional in length, user-programmable
glgaBERT CB1400
patterns. Patterns can be created locally
Operating frequency Range 1400 MHz
using setup menus or externally by using
Internal PLL Synthesized Clock Source
a v~orkstation or PC. A PC Windows-Sased
PRBS 2"-I n: 7, 15, 17, 20, 23
Pattern Editor software package comes with
1M Memory Option. Externally created
the
1 Mbit Programmable Pattern Memory
patterns can be downloaded via the GPIB
(Optional)
or RS-232 port. All user patterns are saved
Auto-synchronization
in battery-backed RAM.
ClockiData Delay 4 ns, 5 ps Resolution
ADJUSTABLE INPUTS FOR
Automatic Eye-width Measurements
MAXIMUM FLEXIBILITY
Reference Data lnpul for Propr~etary
The clock and data ports on the GB1400
Framed Data
Error Detector accept both true and inverted
inputs. Single-ended or differential signals
Phase Synchronous Clock and Data Edge
can be internally terminated. Input data d~lay
Tracking
is adjustable to accommodate different clock
gigaBERT GI31400 Pattern
Optional BURST Mode Operation
and data signal path delays.
Generator and Error Detector
AUTOSEARCHFOREASYSETUP
The GB1400 operates at bit rates up to
Auto search greatly simplifies the Error
1400 Mbls. This instrument is cost-effective
Detector setup. The GB1400 Error Detector
EI Applicatiuns
for lower-speed applications today and will
automatically synchrocizes to the incoming
Gigabit LAN Testing accommodate your future high-speed
signal by 1) Setting the input data decision
requirements as well.
Satellite System Testing
voltage to its optimum value; 2) Adjusting
SYMMETRICAL, LOW-JITTER
input data delay for an op\imum clockidata
Hiyh-speed Circuits and System Design
OUTPUT WAVEFORMS
phase relationship; 3) Selecting the correct
Full Rate HDDV Sirnulalionilesting
The GI31400 generates low-jitter, synimetrical
PRBS test pattern; and 4) selecting the cor-
Manufacturing Test in TE Environment
waveforms over its ent~re operating freqlrency
rect pattern polarity (normal or inverted).
GaAs. ECL, and Optical Component Testing range. The clock and data ports provide both
It synchronizes with any pattern sourced by a
true and inverted output signals The instru-
- Test Clock Recovery Circuit
gigaBERT Pattern Generator. It can perform a
ment can drive single-ended or ditferential
bit-by-bit comparison of an arbitrary signal
Parallel-to-Serial Analysts with MB100
ECL inputs.
with an external Reference input. Thus the
GB1400 can perform bit error analysis on
any data pzttern with a known good refer-
ence pattern.
POWERFUL ANALYSIS AND REPORTING
FUNCTlONS
Not only will the GB1400 Error Detector
synchronize with any pattern sourced by a
gigaBERT Pattern Generator, it can perform a
bit-by-bit comparison and bit error analysis
on an arbitrary signal if provided with a
known good external Reference data stream.
For your locai 'liiktronis ~tpri:t;oltr~tivt! scr: thc list
in the hack ojihjs caialo~ or uuWde th(: U.S. cull:
1-503-627-1933. inside file US. call 1-8110-42BZ2W.
Prorluct[s) corn]>lirrs with IEEE Slondr~d
'a, 488.2-19Li7.
I
See Tektronix on the World M'idc Cl'eb:
3 5 0 Bit Error Rafe Testers
Bit Error Rate Tester
BURST MWE
Moreover, the GB14IJO catculates errored Cloek Delay Increments - 5 ps.
BURST mode allows for operalion with non-
second$ (ES), percentage error-free seconds
Std. Programmable Memory - 16-Bits.
(%EFS), severely-errored seconds (SES), continuous extsrnal cEocks. Use of BURST
Optional Memory - 1 Mbit.
degraded minutes (DM), unavailable seconds mode requires ECL-level signals with a min-
PRBS Patterns 12n-1) - 7.3 5,17,20,23.
(US). and loss of signal {LOS) seconds. All imum rate during the burst of 750 kHz. This
bit error rcsults - including the three EER is an option on the GB1400
Bud Muda (ECt larefs only) - Optional.
measures -are calcula2ed simultaneously
ERROR DETECTOR
and gay be displayed during a lest or after a
Frequency Range - 1 Mbls to 1400 h?b/s.
Characteris tics
test has heen completed, R hard copy of all
159 Lbls to 1400 Mbls {with BURST Mode)
test results can be generated iocally by con+
PATTERN GENERATOR
Clock lnput Levels (max] -
necting a printer to the parallel printer port or
Frequency Range -
500 mV to 1.5 Vp-p.
GPlB or RS-232 pod Reports may be printed
internal Clack Source: 1 Mbis to 1400 FvPb{s.
when an error is detected, at ZCe end of test
External Clock with BURST !!ode: 150 Kb/$ CTnck input Terminations - GRO, AC.
intervals, or both.
to 1400 Mbis. -2 VD-p
FROWT PAMEL OR Alt50MAfEll QPER#nDH
Freq. AeSdlution (Inlerrral Clack) - 10 kHz. ClbcK mght Thmbald - Fided threshold
The Gal400 provides easy operation aug- levels.
Clock Output Amplitude -
merited by set-up store and recall. Clear, con-
500 mV to 2.0 Up-p in 50 mV steps. Data tnflut level (max] - 500 mV to 1.5 Vp-p
cise LCD dispiays of setup and resuits make
500 mV to 2.8 V with FECL opt. (does not sopport PECL).
it easy to use
Clock Output Ufket - Data lnput Thrahald --1.5 V to 1.U V in
The 1 ME memory aption for both the
-2.0 V to 1 .I) V n 50 mV steps. 50 mV steps
Pattern Generator and the Error Detector is
-2.0 V to 1.8 V with PECL apt.
Data lnput Terminations - GNO, AC. -2 V,
Sufficient for storing and outputt~ng Complex
Data Oatput Amplitude -
S~ngle-ended or differential operation for
data such as SONET frames, ATM cells,
500 mV to 2.0 V in 50 mV steps
MPtb digital video. etc, allowrng designers clack and data Inputs
500 mV to 2.8 V wit11 PECL opt.
to simulats "live" traffrc. The GBl400 Rltern
PHYSICAL EHARACTERlSTiCS
Generator and Error Detector can be con- Data nutput onset -
trolled via the GPl5 or RS-232 ~nterface
-2 0 V to 1 0 V in 50 mY steps.
Dlrnensiuns m_m la. mm in.
ports. The gigaBERT remote command set -2 O V to 1.8; V with PECL opt.
Hcgct , 152 60 152 6.D
Includes commands for all setup menus and
Data delay mge - 24 ns Wldtll 368 144 366 14.4
front panel selections. The status of front
Depth 340 1304 419 16.5
Data Delay increments - 5 ps
panel rfldica!ors and test results can be
Weight kg. lk. kg lbs.
Clack Delay - r4 ns.
remotely accessed.
Net 70 2;! ,,, lfl 23
fur prir.r irrjr~rr?dotirrr:: Ui~tsiitc Phr LIS. r:o;::r~;~? :x;r Ir:r.:ri li.klr;)nis !.I,;,: rbr!t:,r:ivr.
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Frequently asked questions
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