VNH2SP30-E Automotive fully integrated H-bridge motor driver Features Type R I V DS(on) out ccmax 19mΩ max VNH2SP30-E 30A 41V (per leg) ■ 5V logic level compatible inputs MultiPowerSO-30™ ■ Undervoltage and overvoltage shut-down The low side switches are vertical MOSFETs ■ Overvoltage clamp manufactured using STMicroelectronic’s ■ Thermal shut down proprietary EHD (‘STripFET™’) process. The three die are assembled in the MultiPowerSO-30 ■ Cross-conduction protection package on electrically isolated leadframes. This ■ Linear current limiter package, specifically designed for the harsh ■ Very low stand-by power consumption automotive environment offers improved thermal performance thanks to exposed die pads. ■ PWM operation up to 20 kHz Moreover, its fully symmetrical mechanical design ■ Protection against loss of ground and loss of allows superior manufacturability at board level. V CC The input signals IN and IN can directly A B ■ Current sense output proportional to motor interface to the microcontroller to select the motor current direction and the brake condition. The ® DIAG /EN or DIAG /EN , when connected to an ■ Package: ECOPACK A A B B external pull-up resistor, enable one leg of the bridge. They also provide a feedback digital Description diagnostic signal. The normal condition operation is explained in Table 12: Truth table in normal The VNH2SP30-E is a full bridge motor driver operating conditions on page 14. The motor intended for a wide range of automotive current can be monitored with the CS pin by applications. The device incorporates a dual delivering a current proportional to its value. The monolithic high side driver and two low side speed of the motor can be controlled in all switches. The high side driver switch is designed possible conditions by the PWM up to 20 kHz. In using STMicroelectronic’s well known and proven ™ all cases, a low level state on the PWM pin will proprietary VIPower M0 technology which turn off both the LS and LS switches. When permits efficient integration on the same die of a A B PWM rises to a high level, LS or LS turn on true Power MOSFET with an intelligent A B again depending on the input pin state. signal/protection circuitry. Table 1. Device summary Order codes Package Tube Tape and Reel MultiPowerSO-30 VNH2SP30-E VNH2SP30TR-E October 2008 Rev 8 1/33 www.st.com 1 Contents VNH2SP30-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.3 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 3.1 Reverse battery protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.1 PowerSSO-30 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.1.1 Thermal calculation in clockwise and anti-clockwise operation in steady- state mode 26 4.1.2 Thermal resistances definition (values according to the PCB heatsink area) 26 4.1.3 Thermal calculation in transient mode . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.1.4 Single pulse thermal impedance definition (values according to the PCB heatsink area) . . . . . . . . . . . . . . . . . . . . . 26 5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.2 MultiPowerSO-30 package mechanical data . . . . . . . . . . . . . . . . . . . . . . 29 5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 2/33 VNH2SP30-E List of tables List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 2. Block description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Table 3. Pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 4. Pin functions description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Table 5. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 7. Logic inputs (INA, INB, ENA, ENB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 8. PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 9. Switching (V =13V, R = 0.87W , unless otherwise specified) . . . . . . . . . . . . . . . . 10 CC LOAD Table 10. Protection and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 11. Current sense (9V < V < 16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 CC Table 12. Truth table in normal operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 13. Truth table in fault conditions (detected on OUTA). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 14. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 15. Thermal calculation in clockwise and anti-clockwise operation in steady-state mode . . . . 26 Table 16. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 17. MultiPowerSO-30 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 3/33 List of figures VNH2SP30-E List of figures Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 4. Definition of the delay times measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 5. Definition of the low side switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 6. Definition of the high side switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 7. Definition of dynamic cross conduction current during a PWM operation. . . . . . . . . . . . . . 13 Figure 8. On state supply current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 9. Off state supply current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 10. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 11. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 12. Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 13. Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 14. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 15. High level enable pin current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 16. Delay time during change of operation mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 17. Enable clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 18. High level enable voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 19. Low level enable voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 20. PWM high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 21. PWM low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 22. PWM high level current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 23. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 24. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 25. Current limitation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 26. On state high side resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 27. On state low side resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 28. Turn-On delay time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 29. Turn-Off delay time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 30. Output voltage rise time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 31. Output voltage fall time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 32. Typical application circuit for DC to 20 kHz PWM operation short circuit protection . . . . . 20 Figure 33. Behavior in fault condition (How a fault can be cleared). . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 34. Half-bridge configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 35. Multi-motors configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 36. Waveforms in full bridge operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 37. Waveforms in full bridge operation (continued) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 38. MultiPowerSO-30™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 39. Chipset configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Figure 40. Auto and mutual Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . 25 Figure 41. MultiPowerSO-30 HSD thermal impedance junction ambient single pulse . . . . . . . . . . . . 27 Figure 42. MultiPowerSO-30 LSD thermal impedance junction ambient single pulse. . . . . . . . . . . . . 27 Figure 43. Thermal fitting model of an H-bridge in MultiPowerSO-30 . . . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 44. MultiPowerSO-30 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 45. MultiPowerSO-30 suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Figure 46. MultiPowerSO-30 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 47. MultiPowerSO-30 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 4/33 VNH2SP30-E Block diagram and pin description 1 Block diagram and pin description Figure 1. Block diagram V CC O + U OVERTEMPERATURE A OVERTEMPERATURE B V V CLAMP HS CLAMP HS A B HS HS DRIVER DRIVER A B LOGIC HS HS A B CURRENT CURRENT LIMITATION A LIMITATION B OUT 1/K 1/K OUT A B CLAMP LS CLAMP LS A B DRIVER DRIVER LS LS A B LS LS A B DIAG /EN IN CS PWM IN DIAG /EN GND A A A B B B GND A B Table 2. Block description Name Description Allows the turn-on and the turn-off of the high side and the low side switches Logic control according to the truth table Overvoltage + Shuts down the device outside the range [5.5V..16V] for the battery voltage undervoltage High side and low Protects the high side and the low side switches from the high voltage on the side clamp voltage battery line in all configurations for the motor High side and low Drives the gate of the concerned switch to allow a proper R for the leg of DS(on) side driver the bridge Limits the motor current by reducing the high side switch gate-source voltage Linear current limiter when short-circuit to ground occurs Overtemperature In case of short-circuit with the increase of the junction’s temperature, shuts protection down the concerned high side to prevent its degradation and to protect the die Signals an abnormal behavior of the switches in the half-bridge A or B by Fault detection pulling low the concerned EN /DIAG pin x x 5/33 Block diagram and pin description VNH2SP30-E Figure 2. Configuration diagram (top view) 1 30 OUT OUT A A Nc Nc OUT A V GND CC A Heat Slug3 GND Nc A IN GND A A EN /DIAG OUT A A A Nc Nc V CC PWM V Heat Slug1 CC CS Nc OUT EN /DIAG B B B IN GND B B OUT Nc GND B B Heat Slug2 V GND CC B Nc Nc 15 16 OUT OUT B B Table 3. Pin definitions and functions Pin No Symbol Function 1, 25, 30 OUT , Heat Slug3 Source of high side switch A / Drain of low side switch A A 2, 4, 7, 12, 14, NC Not connected 17, 22, 24, 29 3, 13, 23 V , Heat Slug1 Drain of high side switches and power supply voltage CC 6EN /DIAG Status of high side and low side switches A; open drain output A A 5IN Clockwise input A 8 PWM PWM input 9 CS Output of current sense 11 IN Counter clockwise input B 10 EN /DIAG Status of high side and low side switches B; open drain output B B 15, 16, 21 OUT , Heat Slug2 Source of high side switch B / Drain of low side switch B B (1) 26, 27, 28 GND Source of low side switch A A (1) 18, 19, 20 GND Source of low side switch B B 1. GND and GND must be externally connected together. A B 6/33 VNH2SP30-E Block diagram and pin description Table 4. Pin functions description Name Description V Battery connection CC GND , GND Power grounds; must always be externally connected together A B OUT , OUT Power connections to the motor A B Voltage controlled input pins with hysteresis, CMOS compatible. These two pins IN , IN control the state of the bridge in normal operation according to the truth table (brake A B to V , brake to GND, clockwise and counterclockwise). CC Voltage controlled input pin with hysteresis, CMOS compatible. Gates of low side PWM FETs are modulated by the PWM signal during their ON phase allowing speed control of the motor. Open drain bidirectional logic pins. These pins must be connected to an external pull up resistor. When externally pulled low, they disable half-bridge A or B. In case of EN /DIAG , A A fault detection (thermal shutdown of a high side FET or excessive ON state voltage EN /DIAG B B drop across a low side FET), these pins are pulled low by the device (see truth table in fault condition). Analog current sense output. This output sources a current proportional to the motor CS current. The information can be read back as an analog voltage across an external resistor. 7/33 Electrical specifications VNH2SP30-E 2 Electrical specifications Figure 3. Current and voltage conventions I S V CC I INA V CC I OUTA IN A OUT A I INB I OUTB IN B OUT B I V OUTA ENA I SENSE CS DIAG /EN A A I ENB V V SENSE OUTB DIAG /EN B B V INA GND GND PWM A B V INB I pw V GND ENA V ENB I GND V pw 2.1 Absolute maximum ratings Table 5. Absolute maximum ratings Symbol Parameter Value Unit V Supply voltage +41 V CC I Maximum output current (continuous) 30 max A I Reverse output current (continuous) -30 R I Input current (IN and IN pins) ±10 IN A B I Enable input current (DIAG /EN and DIAG /EN pins) ±10 mA EN A A B B I PWM input current ±10 pw V Current sense maximum voltage -3/+15 V CS Electrostatic discharge (R = 1.5kΩ, C = 100pF) –CS pin 2 kV V ESD – logic pins 4 kV – output pins: OUT , OUT , V 5 kV A B CC T Junction operating temperature Internally limited j T Case operating temperature -40 to 150 °C c T Storage temperature -55 to 150 STG 8/33 VNH2SP30-E Electrical specifications 2.2 Electrical characteristics V = 9V up to 16 V; -40°C < T < 150°C, unless otherwise specified. CC J Table 6. Power section Symbol Parameter Test conditions Min Typ Max Unit Operating supply V 5.5 16 V CC voltage Off state with all Fault Cleared & ENx=0 IN =IN =PWM =0; T = 25°C; V =13V 12 30 µA A B j CC IN =IN =PWM =0 60 µA A B I Supply current S mA Off state: IN =IN =PWM =0 2 A B On state: IN or IN =5V, no PWM 10 mA A B I = 15A; T = 25°C 14 OUT j Static high side R ONHS resistance I = 15A; T = -40 to 150°C 28 OUT j mΩ I = 15A; T = 25°C 5 OUT j Static low side R ONLS resistance I = 15A; T = -40 to 150°C 10 OUT j High side free- V wheeling diode I = 15A 0.8 1.1 V f f forward voltage High side off state T =25°C; V =EN =0V; V =13V 3 j OUTX X CC I output current µA L(off) T = 125°C; V =EN =0V; V =13V 5 (per channel) j OUTX X CC Dynamic cross- I I = 15A (see Figure 7)0.7A RM OUT conduction current Table 7. Logic inputs (IN , IN , EN , EN ) A B A B Symbol Parameter Test conditions Min Typ Max Unit V Input low level voltage 1.25 IL Normal operation (DIAG /EN pin acts X X V Input high level voltage 3.25 IH as an input pin) V Input hysteresis voltage 0.5 V IHYST I =1mA 5.5 6.3 7.5 IN V Input clamp voltage ICL I = -1mA -1.0 -0.7 -0.3 IN I Input low current V =1.25V 1 INL IN µA I Input high current V =3.25V 10 INH IN Enable output low level Fault operation (DIAG /EN pin acts as X X V 0.4 V DIAG voltage an output pin); I =1mA EN 9/33 Electrical specifications VNH2SP30-E Table 8. PWM Symbol Parameter Test conditions Min Typ Max Unit V PWM low level voltage 1.25 V pwl I PWM pin current V = 1.25V 1 µA pwl pw V PWM high level voltage 3.25 V pwh I PWM pin current V = 3.25V 10 µA pwh pw V PWM hysteresis voltage 0.5 pwhhyst I = 1mA V +0.3 V +0.7 V +1.0 V pw CC CC CC V PWM clamp voltage pwcl I = -1mA -6.0 -4.5 -3.0 pw PWM pin input C V =2.5V 25 pF INPWM IN capacitance Table 9. Switching (V =13V, R =0.87Ω , unless otherwise specified) CC LOAD Symbol Parameter Test conditions Min Typ Max Unit f PWM frequency 0 20 kHz Input rise time < 1µs t Turn-on delay time 250 d(on) (see Figure 6) Input rise time < 1µs t Turn-off delay time 250 d(off) (see Figure 6) µs t Rise time (see Figure 5)11.6 r t Fall time (see Figure 5)1.22.4 f Delay time during change t (see Figure 4) 300 600 1800 DEL of operating mode High side free wheeling t diode reverse recovery (see Figure 7)110 ns rr time 9V < V <16V; T = 25°C; (1) CC j t PWM minimum off time 6µs off(min) L = 250µH; I = 15A OUT 1. To avoid false Short to Battery detection during PWM operation, the PWM signal must be low for a time longer than 6µs. Table 10. Protection and diagnostic Symbol Parameter Test conditions Min Typ Max Unit Undervoltage shut-down 5.5 V USD Undervoltage reset 4.7 V V Overvoltage shut-down 16 19 22 OV I High side current limitation 30 50 70 A LIM V Total clamp voltage (V to GND) I = 15A 43 48 54 V CLP CC OUT T Thermal shut-down temperature V = 3.25V 150 175 200 TSD IN T Thermal reset temperature 135 °C TR T Thermal hysteresis 7 15 HYST 10/33 VNH2SP30-E Electrical specifications Table 11. Current sense (9V < V <16V) CC Symbol Parameter Test conditions Min Typ Max Unit I = 30A; R =1.5kΩ; OUT SENSE K I /I 9665 11370 13075 1 OUT SENSE T = -40 to 150°C j I =8A; R =1.5kΩ; OUT SENSE K I /I 9096 11370 13644 2 OUT SENSE T = -40 to 150°C j I = 30A; R =1.5kΩ; (1) OUT SENSE dK /K Analog sense current drift -8 +8 1 1 T = -40 to 150°C j % I >8A; R =1.5kΩ; (1) OUT SENSE dK /K Analog sense current drift -10 +10 2 2 T = -40 to 150°C j Analog sense leakage I =0A; V =0V; OUT SENSE I 065µA SENSEO current T = -40 to 150°C j 1. Analog sense current drift is deviation of factor K for a given device over (-40°C to 150°C and 9V < V < 16V) with respect to its value measured at T = 25°C, V =13V. CC j CC Figure 4. Definition of the delay times measurement V INA t V INB t PWM t I LOAD t DEL t DEL t 11/33 Electrical specifications VNH2SP30-E Figure 5. Definition of the low side switching times PWM t V OUTA, B 90% 80% t f 10% t t 20% r Figure 6. Definition of the high side switching times V INA t t D(on) D(off) t V OUTA 90% 10% t 12/33 VNH2SP30-E Electrical specifications Figure 7. Definition of dynamic cross conduction current during a PWM operation IN =1, IN =0 A B PWM t I MOTOR t V OUTB t I CC I RM t t rr 13/33 Electrical specifications VNH2SP30-E Table 12. Truth table in normal operating conditions IN IN DIAG /EN DIAG /EN OUT OUT CS Operating mode A B A A B B A B 1 H High Imp. Brake to V CC 1 H 0L Clockwise (CW) 11 I =I /K OUT SENSE 1 H Counterclockwise (CCW) 0 L 0 L High Imp. Brake to GND Table 13. Truth table in fault conditions (detected on OUT ) A IN IN DIAG /EN DIAG /EN OUT OUT CS A B A A B B A B 1 H 1 High Imp. 0L 1 1HI /K OUTB 0 0L 0 OPEN High Imp. X 0 OPEN X 1 HI /K OUTB 1 0 L High Imp. Fault Information Protection Action Note: Notice that saturation detection on the low side power MOSFET is possible only if the impedance of the short-circuit from the output to the battery is less than 100mΩ when the device is supplied with a battery voltage of 13.5V. 14/33 VNH2SP30-E Electrical specifications Table 14. Electrical transient requirements ISO T/R - 7637/1 Test Level Test Level Test Level Test Level Test levels Test pulse I II III IV delays and impedance 1 -25V -50V -75V -100V 2ms, 10Ω 2 +25V +50V +75V +100V 0.2ms, 10Ω 3a -25V -50V -100V -150V 0.1µs, 50Ω 3b +25V +50V +75V +100V 4 -4V -5V -6V -7V 100ms, 0.01Ω 5 +26.5V +46.5V +66.5V +86.5V 400ms, 2Ω ISO T/R - 7637/1 Test levels Test levels Test levels Test levels test pulse result I result II result III result IV 1 2 3a CCC C 3b 4 (1) 5 EEE 1. For load dump exceeding the above value a centralized suppressor must be adopted. Class Contents All functions of the device are performed as designed after exposure to C disturbance. One or more functions of the device are not performed as designed after E exposure to disturbance and cannot be returned to proper operation without replacing the device. 15/33 Electrical specifications VNH2SP30-E 2.3 Electrical characteristics curves Figure 8. On state supply current Figure 9. Off state supply current Is (mA) Is (µA) 6 50 5.5 45 Vcc=13V Vcc=13V 5 INA or INB=5V 40 4.5 35 4 30 3.5 3 25 2.5 20 2 15 1.5 10 1 5 0.5 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) Figure 10. High level input current Figure 11. Input clamp voltage Iinh (µA) Vicl (V) 5 8 7.75 4.5 Iin =1mA Vin=3.25V 7.5 4 7.25 3.5 7 3 6.75 2.5 6.5 6.25 2 6 1.5 5.75 1 5.5 0.5 5.25 0 5 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) Figure 12. Input high level voltage Figure 13. Input low level voltage Vih (V) Vil (V) 3 3 2.9 2.75 2.8 2.5 2.7 2.25 2.6 2.5 2 2.4 1.75 2.3 1.5 2.2 1.25 2.1 2 1 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) 16/33 VNH2SP30-E Electrical specifications Figure 14. Input hysteresis voltage Figure 15. High level enable pin current Vihyst (V) Ienh (µA) 2 8 1.75 7 Vcc=13V Ven=3.25V 1.5 6 1.25 5 1 4 3 0.75 2 0.5 1 0.25 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) Figure 16. Delay time during change of Figure 17. Enable clamp voltage operation mode tdel (µs) Vencl (V) 1000 -0.2 900 -0.3 Ien=-1mA 800 -0.4 700 -0.5 600 500 -0.6 400 -0.7 300 -0.8 200 -0.9 100 0 -1 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) Figure 18. High level enable voltage Figure 19. Low level enable voltage Venh (V) Venl (V) 3.6 3 3.4 2.8 Vcc=9V Vcc=9V 3.2 2.6 3 2.4 2.8 2.2 2.6 2 2.4 1.8 2.2 1.6 2 1.4 1.8 1.2 1.6 1 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) 17/33 Electrical specifications VNH2SP30-E Figure 20. PWM high level voltage Figure 21. PWM low level voltage Vpwh (V) Vpwl (V) 5 2.6 4.5 2.4 Vcc=9V Vcc=9V 4 2.2 3.5 2 3 2.5 1.8 2 1.6 1.5 1.4 1 1.2 0.5 0 1 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) Figure 22. PWM high level current Figure 23. Overvoltage shutdown Ipwh (µA) Vov (V) 8 30 7 27.5 Vcc=9V Vpw=3.25V 6 25 5 22.5 4 20 3 17.5 2 15 1 12.5 0 10 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) Figure 24. Undervoltage shutdown Figure 25. Current limitation Vusd(V) Ilim (A) 8 80 75 7 70 6 65 5 60 4 55 50 3 45 2 40 1 35 0 30 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) 18/33 VNH2SP30-E Electrical specifications Figure 26. On state high side resistance vs Figure 27. On state low side resistance vs T T case case Ronhs (mOhm) Ronls (mOhm) 40 9 8 35 Vcc=9V; 16V Vcc=9V; 16V Iout=15A Iout=15A 7 30 6 25 5 20 4 15 3 10 2 5 1 0 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) Figure 28. Turn-On delay time Figure 29. Turn-Off delay time td(on) (µs) td(off) (µs) 260 200 240 190 220 180 200 170 180 160 160 150 140 140 120 130 100 120 80 110 60 100 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) Figure 30. Output voltage rise time Figure 31. Output voltage fall time tr (µs) tf (µs) 2 8 1.8 7 1.6 6 1.4 5 1.2 4 1 3 0.8 2 0.6 1 0.4 0.2 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 50 75 100 125 150 175 Tc (°C) Tc (°C) 19/33 Application information VNH2SP30-E 3 Application information In normal operating conditions the DIAG /EN pin is considered as an input pin by the X X device. This pin must be externally pulled high. PWM pin usage: in all cases, a “0” on the PWM pin will turn off both LS and LS switches. A B When PWM rises back to “1”, LS or LS turn on again depending on the input pin state. A B Figure 32. Typical application circuit for DC to 20 kHz PWM operation short circuit protection VCC Reg 5V +5V + 5V V 3.3K CC 3.3K DIAG /EN 1K B B 1K DIAG /EN A A 1K HSA HSB PWM μC OUTA OUTB 1K INA IN B 1K LSA LSB CS 10K C M 33nF 1.5K GND GND A B S 100K G b) N MOSFET D Note: The value of the blocking capacitor (C) depends on the application conditions and defines voltage and current ripple onto supply line at PWM operation. Stored energy of the motor inductance may fly back into the blocking capacitor, if the bridge driver goes into tri-state. This causes a hazardous overvoltage if the capacitor is not big enough. As basic orientation, 500µF per 10A load current is recommended. In case of a fault condition the DIAG /EN pin is considered as an output pin by the X X device.The fault conditions are: ● overtemperature on one or both high sides ● short to battery condition on the output (saturation detection on the low side power MOSFET) Possible origins of fault conditions may be: ● OUT is shorted to ground → overtemperature detection on high side A. A ● OUT is shorted to V → low side power MOSFET saturation detection. A CC 20/33 VNH2SP30-E Application information When a fault condition is detected, the user can know which power element is in fault by monitoring the IN , IN , DIAG /EN and DIAG /EN pins. A B A A B B In any case, when a fault is detected, the faulty leg of the bridge is latched off. To turn on the respective output (OUT ) again, the input signal must rise from low to high level. X Figure 33. Behavior in fault condition (How a fault can be cleared) IN IN A A IN IN B B DI DIAG AG A A EN EN A A DI DIAG AG B B EN EN B B Dev Deviice ce U Un nlla at tc ch he ed d De Dev viic ce e L La at tc ch he ed d D De evi vice ce L La at tc ch he ed d Io Iou utt ÆÆou outt A A B B FA FAUL ULTT A A (I (In nt ter erna nall S Siig gn na all) ) FA FAU ULLTT B B t t t t (I (In nt te er rn na all S Siign gna all) ) DE DEL L DE DEL L No Norm rmal al OU OUT T sh shor ort te ed d Fa Fau ullt t C Clle ea ar re ed d St Stb by y ( (* *) ) No Norm rmal al OU OUT T sh sho or rt te ed d Fa Fau ullt t C Clle ea ar re ed d No Nor rm ma al l B B B B O Op perat erati io on n to to V V O Op perat erati io on n to to G GN ND D Ope Oper ra at tiio on n CC CC Note: In case of the fault condition is not removed, the procedure for unlatching and sending the device in Stby mode is: - Clear the fault in the device (toggle : INA if ENA=0 or INB if ENB=0) - Pull low all inputs, PWM and Diag/EN pins within tDEL. If the Diag/En pins are already low, PWM=0, the fault can be cleared simply toggling the input. The device will enter in stby mode as soon as the fault is cleared. 3.1 Reverse battery protection Three possible solutions can be considered: 1. a Schottky diode D connected to V pin CC 2. an N-channel MOSFET connected to the GND pin (see Figure 32: Typical application circuit for DC to 20 kHz PWM operation short circuit protection on page 20) 3. a P-channel MOSFET connected to the V pin CC The device sustains no more than -30A in reverse battery conditions because of the two body diodes of the power MOSFETs. Additionally, in reverse battery condition the I/Os of VNH2SP30-E are pulled down to the V line (approximately -1.5V). A series resistor must CC 21/33 Application information VNH2SP30-E be inserted to limit the current sunk from the microcontroller I/Os. If I is the maximum Rmax target reverse current through µC I/Os, the series resistor is: Figure 34. Half-bridge configuration V CC IN IN A A IN IN B B DIAG /EN DIAG /EN A A A A DIAG /EN DIAG /EN B B B B PWM PWM OUT OUT A OUT OUT B M B A GND GND GND GND A B A B Note: The VNH2SP30-E can be used as a high power half-bridge driver achieving an On resistance per leg of 9.5mΩ. Figure 35. Multi-motors configuration V CC IN IN A A IN IN B B DIAG /EN DIAG /EN A A A A DIAG /EN DIAG /EN B B B B PWM PWM OUT A OUT OUT OUT B M A B 2 GND GND GND GND A B A B M M 1 3 Note: The VNH2SP30-E can easily be designed in multi-motors driving applications such as seat positioning systems where only one motor must be driven at a time. DIAG /EN pins allow X X to put unused half-bridges in high impedance. 22/33 VNH2SP30-E Application information Figure 36. Waveforms in full bridge operation NORMAL OPERATION (DIAG /EN =1, DIAG /EN =1) A A B B LOAD CONNECTED BETWEEN OUT , OUT A B DIAG /EN A A DIAG /EN B B IN A IN B PWM OUT A OUT B I -> OUTA OUTB CS (*) t t DEL DEL (*) CS BEHAVIOR DURING PWM MODE WILL DEPEND ON PWM FREQUENCY AND DUTY CYCLE. NORMAL OPERATION (DIAG /EN =1, DIAG /EN = 0 and DIAG /EN =0, DIAG /EN =1) A A B B A A B B LOAD CONNECTED BETWEEN OUT , OUT A B DIAG /EN A A DIAG /EN B B IN A IN B PWM OUT A OUT B I -> OUTA OUTB CS CURRENT LIMITATION/THERMAL SHUTDOWN or OUT SHORTED TO GROUND A IN A IN B I LIM I -> OUTA OUTB T TSD T TR T > T j TR T j DIAG /EN A A DIAG /EN B B CS normal operation OUT shorted to ground normal operation A 23/33 Application information VNH2SP30-E Figure 37. Waveforms in full bridge operation (continued) OUT shorted to V and undervoltage shutdown A CC IN A IN B undefined OUT A OUT B undefined I -> OUTA OUTB DIAG /EN B B DIAG /EN A A CS V < nominal normal operation OUT shorted to V normal operation undervoltage shutdown A CC 24/33 VNH2SP30-E Package and PCB thermal data 4 Package and PCB thermal data 4.1 PowerSSO-30 thermal data Figure 38. MultiPowerSO-30™ PC board Note: Layout condition of R and Z measurements (PCB FR4 area = 58mm x 58mm, PCB th th thickness = 2mm. Cu thickness = 35μm, Copper areas: from minimum pad layout to 2 16cm ). Figure 39. Chipset configuration HIGH SIDE CHIP HS AB LOW SIDE LOW SIDE CHIP A CHIP B LS LS A B Figure 40. Auto and mutual R vs PCB copper area in open box free air thj-amb condition 45 RthHS 40 RthLS 35 RthHSLS RthLSLS 30 25 20 15 10 5 0 0 5 10 15 20 2 cm of C u area (refer to PC B layout) 25/33 °C/W Package and PCB thermal data VNH2SP30-E 4.1.1 Thermal calculation in clockwise and anti-clockwise operation in steady-state mode Table 15. Thermal calculation in clockwise and anti-clockwise operation in steady- state mode HS HS LS LS T T T A B A B jHSAB jLSA jLSB P x R + P P x R + P x R + P dHSA thHS dLSB dHSA thHSLS dHSA thHSLS dLSB ON OFF OFF ON x R + T P x R + T x R + T thHSLS amb dLSB thLSLS amb thLS amb P x R + P P x R + P x R + P dHSB thHS dLSA dHSB thHSLS dHSB thHSLS dLSA OFF ON ON OFF x R + T P x R + T x R + T thHSLS amb dLSA thLS amb thLSLS amb 4.1.2 Thermal resistances definition (values according to the PCB heatsink area) R = R = R = High Side Chip Thermal Resistance Junction to Ambient (HS or thHS thHSA thHSB A HS in ON state) B R = R = R = Low Side Chip Thermal Resistance Junction to Ambient thLS thLSA thLSB R = R = R = Mutual Thermal Resistance Junction to Ambient thHSLS thHSALSB thHSBLSA between High Side and Low Side Chips R = R = Mutual Thermal Resistance Junction to Ambient between Low Side thLSLS thLSALSB Chips (a) 4.1.3 Thermal calculation in transient mode T = Z x P + Z x (P + P ) + T jHSAB thHS dHSAB thHSLS dLSA dLSB amb T = Z x P + Z x P + Z x P + T jLSA thHSLS dHSAB thLS dLSA thLSLS dLSB amb T = Z x P + Z x P + Z x P + T jLSB thHSLS dHSAB thLSLS dLSA thLS dLSB amb 4.1.4 Single pulse thermal impedance definition (values according to the PCB heatsink area) Z = High Side Chip Thermal Impedance Junction to Ambient thHS Z = Z = Z = Low Side Chip Thermal Impedance Junction to Ambient thLS thLSA thLSB Z = Z = Z = Mutual Thermal Impedance Junction to Ambient thHSLS thHSABLSA thHSABLSB between High Side and Low Side Chips Z = Z = Mutual Thermal Impedance Junction to Ambient between Low Side thLSLS thLSALSB Chips a. Calculation is valid in any dynamic operating condition. P values set by user. d 26/33 VNH2SP30-E Package and PCB thermal data Equation 1: pulse calculation formula Z = R Þ δ + Z () 1 – δ THδ TH THtp where δ = t ⁄ T p Figure 41. MultiPowerSO-30 HSD thermal impedance junction ambient single pulse 100 Footprint 4 cm2 ZthHS 8 cm2 16 cm2 Footprint 10 4 cm2 8 cm2 ZthHSLS 16 cm2 1 0.1 0.001 0.01 0.1 1 10 100 1000 ti m e (sec) Figure 42. MultiPowerSO-30 LSD thermal impedance junction ambient single pulse 100 Footprint 4 cm2 8 cm2 ZthLS 16 cm2 Footprint 10 4 cm2 8 cm2 ZthLSLS 16 cm2 1 0.1 0.001 0.01 0.1 ti m e ( se c ) 1 10 100 1000 27/33 °C/W °C/W Package and PCB thermal data VNH2SP30-E Figure 43. Thermal fitting model of an H-bridge in MultiPowerSO-30 (1) Table 16. Thermal parameters 2 Area/island (cm)Footprint 4 8 16 R1 = R7 (°C/W) 0.05 R2 = R8 (°C/W) 0.3 R3 (°C/W) 0.5 R4 (°C/W) 1.3 R5 (°C/W) 14 R6 (°C/W) 44.7 39.1 31.6 23.7 R9 = R15 (°C/W) 0.2 R10 = R16 (°C/W) 0.4 R11 = R17 (°C/W) 0.8 R12 = R18 (°C/W) 1.5 R13 = R19 (°C/W) 20 R14 = R20 (°C/W) 46.9 36.1 30.4 20.8 R21 = R22 = R23 (°C/W) 115 C1 = C7 (W.s/°C) 0.005 C2 = C8 (W.s/°C) 0.008 C3 = C11 = C17 (W.s/°C) 0.01 C4 = C13 = C19 (W.s/°C) 0.3 C5 (W.s/°C) 0.6 C6 (W.s/°C) 5 7 9 11 C9 = C15 (W.s/°C) 0.003 C10 = C16 (W.s/°C) 0.006 C12 = C18 (W.s/°C) 0.075 C14 = C20 (W.s/°C) 2.5 3.5 4.5 5.5 1. The blank space means that the value is the same as the previous one. 28/33 VNH2SP30-E Package and packing information 5 Package and packing information ® 5.1 ECOPACK packages ® In order to meet environmental requirements, ST offers these devices in ECOPACK ® packages. ECOPACK packages are lead-free. The category of Second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com. 5.2 MultiPowerSO-30 package mechanical data Figure 44. MultiPowerSO-30 package outline 29/33 Package and packing information VNH2SP30-E Table 17. MultiPowerSO-30 mechanical data Millimeters Symbol Min Typ Max A 2.35 A2 1.85 2.25 A3 0 0.1 B 0.42 0.58 C 0.23 0.32 D 17.1 17.2 17.3 E 18.85 19.15 E1 15.9 16 16.1 e1 F1 5.55 6.05 F2 4.6 5.1 F3 9.6 10.1 L 0.8 1.15 N 10deg S 0deg 7deg Figure 45. MultiPowerSO-30 suggested pad layout 30/33 VNH2SP30-E Package and packing information 5.3 Packing information Note: The devices can be packed in tube or tape and reel shipments (see the Device summary on page 1 for packaging quantities). Figure 46. MultiPowerSO-30 tube shipment (no suffix) Dimension mm Base Q.ty 29 A Bulk Q.ty 435 Tube length (± 0.5) 532 C B A3.82 B23.6 C (± 0.13) 0.8 Figure 47. MultiPowerSO-30 tape and reel shipment (suffix “TR”) Reel dimensions SO-28 tube shipment (no suffix) Dimension mm Base Q.ty 1000 Bulk Q.ty 1000 A (max) 330 B (min) 1.5 C (± 0.2) 13 D (min) 20.2 G (+ 2 / -0) 32 N (min) 100 T (max) 38.4 Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Description Dimension mm Tape width W 32 Tape Hole Spacing P0 (± 0.1) 4 Component Spacing P 24 Hole Diameter D (± 0.1/-0) 1.5 Hole Diameter D1 (min) 2 Hole Position F (± 0.1) 14.2 Compartment Depth K (max) 2.2 End Start Top No components Components No components cover tape 500 mm min 500 mm min Empty components pockets User direction of feed 31/33 Revision history VNH2SP30-E 6 Revision history Table 18. Document revision history Date Revision Description of changes Sep-2004 1 First issue Inserted t test condition modification and note off(min) Dec- 2004 2 Modified I figure number RM Feb-2005 3 Minor changes Apr-2005 4 Public release Document converted into new ST corporate template. Added table of contents, list of tables and list of figures Removed figure number from package outline on page 1 ® Changed Features on page 1 to add ECOPACK package Added Section 1: Block diagram and pin description on page 5 Added Section 2.2: Electrical characteristics on page 9 Added “low” and “high” to parameters for I and I in Table 7 on INL INH page 9 01-Sep-2006 5 Inserted note in Figure 32 on page 20 Added vertical limitation line to left side arrow of t to Figure 7 on D(off) page 13 Added Section 4.1: PowerSSO-30 thermal data on page 25 Added Section 5: Package and packing information on page 29 Added Section 5.3: Packing information on page 31 Updated disclaimer (last page) to include a mention about the use of ST products in automotive applications 15-May-2007 6 Document reformatted and converted into new ST template. Corrected Heat Slug numbers in Table 3: Pin definitions and 06-Feb-2008 7 functions. Added new infomation in Table 6: Power section 02-Oct-2008 8 Added Figure 33: Behavior in fault condition (How a fault can be cleared) 32/33 VNH2SP30-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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