SEMTECH SC338A

SC338(A) Ultra Low Output Voltage Dual Linear FET Controller POWER MANAGEMENT Description Features The SC338(A) is an ultra low output voltage dual power ‹ ±1.5% and ±2.5% reference voltage options supply controller designed to simplify power management available TM for notebook PCs. It is part of Semtech’s Smart LDO ‹ Two independant and fully adjustable outputs family of products. The SC338(A) has two user ‹ Wide supply voltage range permits operation from adjustable outputs that can be set anywhere between 5V or 12V rails 0.5V and 3.3V (V = 12V, anywhere between 0.5V and IN ‹ Very low quiescent current (500µA typical with both 1.8V for V = 5V) using two external resistors per IN outputs enabled and 5V input) output. ‹ Indivdual Enable control for each output ‹ Individual Power Good monitoring and signalling for SC338(A) features for each output include tight output each output voltage regulation (±2.5% over -40°C to +85°C for ‹ Gate drives from input supply enable use of SC338, ±1.5% over 0°C to +85°C for SC338A), enable N-channel MOSFETs controls, open drain power good signals, under-voltage ‹ User selectable dropout voltage protection and soft start. The enable pins allow the part ‹ Individual under-voltage protection for each output to enter a very low power standby mode. Pulling them ‹ MSOP-10 surface mount package high enables the outputs. The power good pins are open drain and assert low when the voltage at their Applications respective adjust pins is below 88% (typ.) of nominal. If the voltage at the adjust pin is below 50% (typ.) of ‹ Notebook PCs nominal, the under voltage protection circuitry will shut ‹ Simple dual power supplies down that output. The SC338(A) is available in an MSOP-10 surface mount package. Typical Application Circuit 5V or 12V IN 1.2V +/-5% IN 1.8V +/-5% IN C1 C2 0.1uF (1) 0.1uF (1) 8 7 6 5 1 3 1.05V @ 3A 1.5V @ 1.5A Q1 C3 IRF7311 C4 or similar 2 4 100uF, 25mOhm POSCAP R1 100uF, 25mOhm POSCAP U1 SC338(A) R5 2k (2) R3 1 10 11.0k DRV1 IN R6 2k (2) 20.0k 2 9 ADJ1 DRV2 3 8 1.05V Enable EN1 ADJ2 4 7 1.05V Power Good 1.5V Enable PGD1 EN2 5 6 1.5V Power Good GND PGD2 R2 C5 C6 C7 R4 10.0k 10nF (2) 0.1uF 10nF (2) 10.0k  R1  R3   Notes: V = 0.5 • 1+  V = 0.5 • 1+  OUT1 OUT2 (1) Additional capacitance may be required if far from supply R2   R4   (2) Optional soft-start components Revision: November 12, 2004 1 www.semtech.com SC338(A) POWER MANAGEMENT PRELIMINARY Absolute Maximum Ratings Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied. Exposure to Absolute Maximum rated conditions for extended periods of time may affect device reliability. Pl arameter Sm ymboMs aximu Unit IV nput Supply Voltage -V 0.3 to +13.2 IN DV rive Pins -V 0.3 to +8.0 DRV (1) AV djust and Power Good Pins , V -0.3 to +5.5 V ADJ PGD EV nable Pins -0.3 to V V EN IN Thermal Impedance Junction to Ambient 1W 13 °C/ θ JA Thermal Impedance Junction to Case θ 4W 2 °C/ JC OT perating Ambient Temperature Range -C 40 to +85 ° A OT perating Junction Temperature Range -C 40 to +125 ° J ST torage Temperature Range -C 65 to +150 ° STG LT ead Temperature (Soldering) 10 Sec. 3C 00 ° LEAD EV SD Rating (Human Body Model) 2V k ESD Note: (1) Or V , if V = 5V. IN IN Electrical Characteristics (1) Unless specified: T = 25°C, V = V = 5V ± 5%, V = 1.5V ± 5%, 0A ≤ I ≤ 3A. A IN EN PWR OUT Values in bold apply over full operating ambient temperature range. Pl arameter Ss ymboTn est Condition Mp i Tx y Ms a Unit IN SV upply Voltage 42 .5 13. V IN QI uiescent Current V=0 5V 50 700 µA Q IN V=0 12V 60 900 µA IN SI tandby Current B1 oth EN low 0. 1.0 µA Q(OFF) Both EN low, V = 12V 15.0 IN Undervoltage Lockout SV tart Threshold Vr5 ising 3V .7 UVLO IN HV ysteresis Vf0 alling 0V .5 HYST IN EN EV nable Input Threshold Output on 1.3 V IH V Output off 0.7 IL  2004 Semtech Corp. 2 www.semtech.com SC338(A) POWER MANAGEMENT Electrical Characteristics (Cont.) (1) Unless specified: T = 25°C, V = V = 5V ± 5%, V = 1.5V ± 5%, 0A ≤ I ≤ 3A. A IN EN PWR OUT Values in bold apply over full operating ambient temperature range. Pl arameterSs ymboTn est Condition Mp i Tx y Ms a Unit EN (Cont.) EI nable Input Bias Current V=0 0V µA EN EN V = V = 5V or 12V -1 1 + IN EN ADJ AI djust Input Bias Current V = 0.5V -100 0 +100 nA ADJ ADJ RV eference Voltage -2.5% 0.500 +2.5% V ADJ SC338A only: 0°C ≤ T ≤ +85°C-% 1.5% +1.5 A DRV OI utput Current Sourcing, startup 1A 0 µ DRV (until V is reached) TH(PGD) Sourcing, after startup 0.72A .0 m Sinking 4007A 50 µ OV utput Voltage Full On, I = 0mA, V = 12V 6.66V .9 DRV DRV IN Full On, I = 0mA, V = 5V 4.70 4.85 DRV IN Under Voltage Protection (2) Trip Threshold V Measured at ADJ pin 40 50 60 %V TH(UV) ADJ PGD (3) Power Good Threshold V Measured at ADJ pin -15 -12 -9 %V TH(PGD) ADJ OV utput Logic Low Voltage V = 0.4V, I = -1mA 0.4 V PGD ADJ PGD Power Good Leakage I V = 0.5V, 0V ≤ V ≤ V -1 0 +1 µA PGD ADJ PGD IN Current Soft Start Output Rise Time t C=0 not placed 1s 5 µ r DRV-GND 10% V to 90% V , OUT OUT C=0 10nF 85 V = 1.05V DRV-GND OUT Notes: (1) V = input voltage to pass device drains (or sources depending upon orientation of FETs). PWR (2) If V is exceeded for longer than 50µs (nom.) the protection circuitry will shut down that output. TH(UV) (3) During startup only, V is -6% (typ.), then switches to -12% (typ.). TH(PGD)  2004 Semtech Corp. 3 www.semtech.com SC338(A) POWER MANAGEMENT PRELIMINARY Pin Configuration Ordering Information (1) (2) Part Number Output Voltage Package Top View (3) SC338IMSTR Both outputs adjustable MSOP-10 from 0.5V to 3.3V (3)(5) SC338IMSTRT (4) SC338AIMSTR (4)(5) SC338AIMSTRT Notes: (1) Only available in tape and reel packaging. A reel contains 2500 devices. (MSOP-10) = 12V (0.5V to 1.8V for V = 5V). (2) V IN IN (3) V is ±2.5% over -40°C ≤ T ≤ +85°C. ADJ A (4) V is ±1.5% over 0°C ≤ T ≤ +85°C. ADJ A (5) Lead free product. This product is fully WEEE and RoHS compliant. Pin Descriptions Pe inPn in Nam Pin Functio 11 DRV Output of regulator #1. Drives the gate of an N-channel MOSFET to maintain V set by R1 and R2. OUT1 21 ADJ Regulator #1 sense input. Used for sensing the output voltage for power good and under-voltage, and to set the output voltage as follows (refer to application circuit on page 1):  R1  V = 0.5 • 1+   OUT1 R2   V = 3.3V for V = 12V, 1.8V for V = 5V. OUT(MAX) IN IN 31 EN Active high enable control. Connect to IN if not being used. Do not allow to float. 41PV GD Power good signal output for . Open drain output pulls low when V is below (V -12%). OUT1 OUT1 OUT1(NOM) 5DG. N Ground 62PV GD Power good signal output for . Open drain output pulls low when V is below (V -12%). OUT2 OUT2 OUT2(NOM) 72 EN Active high enable control. Connect to IN if not being used. Do not allow to float. 82 ADJ Regulator #2 sense input. Used for sensing the output voltage for power good and under-voltage, and to set the output voltage as follows (refer to application circuit on page 1):  R3  V = 0.5 • 1+   OUT2 R4 V = 3.3V for V = 12V, 1.8V for V = 5V.   OUT(MAX) IN IN 92 DRV Output of regulator #2. Drives the gate of an N-channel MOSFET to maintain V set by R3 and R4. OUT2 1N 0I. +5V or +12V supply  2004 Semtech Corp. 4 www.semtech.com SC338(A) POWER MANAGEMENT Block Diagram (0.95 VBG at start-up) (0.95 VBG at start-up) Marking Information SC338 SC338A Top Mark Top Mark AK00 AK0A 338A yyww yyww Bottom Mark Bottom Mark xxxx xxxx xxxx xxxx AK00: Identifier for SC338 338A: Identifier for SC338A yyww: Date code (Example: 0012) yyww: Date code (Example: 0012) xxxx: Semtech Lot # (Example: E901 xxxx: Semtech Lot # (Example: E901 xxxx: 01-1) xxxx: 01-1)  2004 Semtech Corp. 5 www.semtech.com SC338(A) POWER MANAGEMENT PRELIMINARY Applications Infomation Theory Of Operation and 3.75mA at 12V in during normal operation. The high side drive voltage is generated from V by a 7V (nominal) IN The SC338(A) dual linear FET controller provides a simple low dropout regulator, thus at 12V in, 6.9V is available way to drive two N-channel MOSFETs to produce tightly and at 5V in, 4.85V is available (since the LDO will be in regulated output voltages from one or two available, dropout). higher, supply voltages. It takes its power from either a 5V or 12V supply, drawing typically 500µA while At start-up, the source current available from the drive operating. pins is limited to 10µA (typical) until the power good threshold is reached, at approximately 6% below It contains an internal bandgap reference which is nominal output voltage. At this point the full drive compared to the output voltages via resistor dividers. capability is enabled. With this constant current source These resistor dividers are external and user selectable . at start-up, it is a simple matter to use a small capacitor Depending upon the input voltage used for the device, on the drive pin to slow this rate of rise. The rate of rise the drive pin (DRV1, DRV2) can pull up to a guaranteed of the drive pin voltage will be: minimum of 6.6V (from 12V supply) or 4.7V (from 5V dV I DRV DRV supply). Thus the device can be used to regulate a large = V / s dt C SS range of output voltages by careful selection of the A 10nF soft start capacitor will give a 1ms output rise external MOSFETs (see component selection, below). time for V = 12V and V = 1.05V, for example. The IN OUT output rise time will of course depend upon the gate The SC338(A) includes an active high enable control (EN1, threshold of the MOSFET being used. Please refer to EN2) for each output. If this pin is pulled low, the related the Output Rise Time chart on Page 13 showing typical drive pin is pulled low, turning off the N-channel MOSFET. output rise times. For very low ESR output capacitors If the pin is pulled up to 1.8V ≤ V ≤ V , the drive pin will EN IN (<5mΩ) and very high soft start capacitance (>100nF), be enabled. This pin should not be allowed to float. it may be necessary to add a resistor in series with the soft start capacitor to ensure stability. Generally, Each output has a power good output (PGD1, PGD2) however, this resistor is not required, as this is a very which are open drain outputs that pull low if the related unlikely situation. output is below the power good threshold (-12% of the programmed output voltage typical, -6% typical at start- The soft start capacitance does not adversely affect up). The power good circuitry is active if the device is transient response since the drive current capability is enabled, regardless of the state of the over current latch. 200 times higher once the device has started. The power good circuitry is not active if that particular output is disabled. OCP and Power Supply Sequencing Also included for each output is an overcurrent The SC338(A) has output undervoltage protection that protection circuit that monitors the output voltage. If the looks at a particular output to see if it is a) less than output voltage drops below 50% (typ.) of nominal, as 50% (typical) of it’s nominal value and b) V for that would occur during an overcurrent or short condition, the DRV output is within 350mV (typical) of maximum. If both of device will pull the drive pin low and latch off. The device these criteria are met, there is a 50µs (typical) delay and will need to have the power supply or enable pin toggled then the output is shut down. This provides inherent to reset the latch condition. Each output latches immunity to UV shutdown at start-up (which may occur independently (i.e. if one output latches off, the other while the output capacitors are being charged) since V output will function normally). DRV has a very slow rate of rise with I limited to 10µA. DRV Drive Outputs and Soft Start At start-up, it is necessary to ensure that the power supplies and enables are sequenced correctly to avoid The drive outputs for each output are source and sink erroneous latch-off. For UV latch-off not to occur at start- capable. The sink current is typically 0.8mA at 5V in (1mA up due to sequencing issues, the key is that the voltage at 12V in). The source current is typically 2mA at 5V in  2004 Semtech Corp. 6 www.semtech.com SC338(A) POWER MANAGEMENT Applications Infomation (Cont.) supplied to the MOSFET drain should be greater than from 1.8V set for 1.5V out, output 2 not shown for the output undervoltage threshold when that simplicity. Worst case undervoltage threshold is 60% (over output is enabled. This assumes that the drop through temperature) of 1.5V, or 0.9V. The typical enable the pass MOSFET is negligible. If not, then this drop needs threshold is ~1V. See Figure 1 below. to be taken into account also since: V = V - (I x R ). Component Selection OUT DRAIN OUT DS(ON) If the supply to the SC338(A) IN pin comes up before the Output Capacitors: low ESR capacitors such as Sanyo supply to the MOSFET drain, then that output should be POSCAPs or Panasonic SP-caps are recommended for enabled as the supply to the MOSFET drain is applied bulk capacitance, with ceramic bypass capacitors for - the Power Good signal for this rail would be ideal. If the decoupling high frequency transients. power supply to the MOSFET drain comes up before the Input Capacitors: placement of low ESR capacitors such power supply to the SC338(A) IN pin, then the output as Sanyo POSCAPs or Panasonic SP-caps at the input to can either be enabled with the supply to the IN pin or the MOSFET (V ) will help to hold up the power supply DRAIN afterwards. Please see the example below. during fast load changes, thus improving overall transient response. If V is located at the bulk capacitors for DRAIN the upstream voltage regulator, additional capacitance Example: SC338(A) powered from 5V, output 1 powered SC338(A) Supply Comes Up Before MOSFET Drain Supply MOSFET Drain Supply Comes Up Before SC338(A) Supply Figure 1: Power Supply Sequencing  2004 Semtech Corp. 7 www.semtech.com SC338(A) POWER MANAGEMENT PRELIMINARY Applications Infomation (Cont.) may not be required. In this case a 0.1µF ceramic capacitor will suffice. The input supply to the SC338(A) Vk OUT (V) R1 or R3 ( Ω Ω Ω Ω Ω)k R2 or R4 ( Ω Ω Ω Ω Ω) should be bypassed with a 0.1µF ceramic capacitor. 10 .05 10 1. 10. MOSFETs: very low or low threshold N-channel MOSFETs 10 .2 10 4. 10. are required. Selecting FETs rated for V of 2.7V or 4.5V GS will depend upon the available drive voltage (6.9V from 10 .5 20 0. 10. 12V in or 4.85V from 5V in), the output voltage and 23 .5 43 5. 11. output current. For the device to work under all operating conditions, a maximum R must be met to DS(ON) 34 .3 63 3. 11. ensure that the output will never go into dropout: V − V Table 1: Recommended Resistor Values For SC338(A) IN(MIN) OUT(MAX) R = Ω DS(ON)(MAX) I OUT(MAX) Design Example Note that R must be met at all temperatures and at DS(ON) the minimum V condition. GS Goal: 1.05V±5% @ up to 2.5A from 1.2V±5% and 5V±5% Setting The Output Voltage: the adjust pins connect Solution 1: no passive droop. directly to the inverting input of the error amplifiers, and the output voltage is set using external resistors (please Total window for DC error, ripple and transient is ±52.5mV refer to the Typical Application Circuit on page 1). Since this device is linear, and assuming that it has been Using output 1 as an example, the output voltage can designed to not ever enter dropout, we do not have ripple be calculated as follows: on the output.  R1 V = 0.5 • 1+   OUT The DC error for this output is the sum of: R2   The input bias current for the adjust pin is so low that it V accuracy = ±2.5% = ±26.3mV REF can be safely ignored. To avoid picking up noise, it is recommended that the total resistance of the feedback Feedback chain tolerance = ±1% = ±10.5mV chain be less than 100kΩ. Load regulation = ±0.25% = ±2.6mV Please see Table 1 on this page for recommended resistor values for some standard output voltages. All Set resistors per Table 1 should be 11.0kΩ (top) and resistors are 1%, 1/10W. 10.0kΩ (bottom). The maximum output voltage that can be obtained from Total DC error = ±3.75% = 39.4mV each output is determined by the input supply voltage and the R and gate threshold voltage of the DS(ON) This leaves ±1.25% = 13.1mV for the load transient ESR external MOSFET. Assuming that the MOSFET gate spike, therefore: threshold voltage is sufficiently low for the output 13.1mV voltage chosen and the worst-case drive voltage, V OUT(MAX) R = = 5.2mΩ ESR(MAX) is given by: 2.5A Bulk capacitance required is given by: V = V − I •R OUT(MAX) DRAIN(MIN) OUT(MAX) DS(ON)(MAX) dI• t C = µF BULK(MIN) dV Where dI is the maximum load current step, t is the maximum regulator response time and dV is the  2004 Semtech Corp. 8 www.semtech.com SC338(A) POWER MANAGEMENT Applications Infomation (Cont.) allowable voltage droop. Therefore with dI = 2.5A, Solution 2: using passive droop. t = 1µs, and dV = 13.1mV: −6 2.5 •1•10 C = = 191µF 1.2V +/-5% IN BULK(MIN) C1 −3 13.1•10 0.1uF 6 5 8 7 So if we use 1% V set resistors we would select 2 x OUT RDROOP >100µF, 12mΩ POSCAPs for output capacitance (which 3 1.075V 1 1.05V @ 2.5A assumes that local ceramic bypass capacitors will Q1 C3 20mOhm IRF7311 absorb the balance of the (6 - 5.3)mΩ ESR or similar requirement - otherwise 10mΩ capacitors should be 4 2 used). R1 SC338(A) U1 10 1 100uF, 25mOhm POSCAP 11.0k DRV1 IN 9 2 If we use 0.1% set resistors, then the total DC error ADJ1 DRV2 3 8 becomes ±2.85% = ±29.9mV, leaving ±2.15% = 22.6mV EN1 ADJ2 4 7 R2 for the ESR spike. In this case: PGD1 EN2 5 6 10.0k GND PGD2 22.6mV R = = 9.0mΩ and ESR(MAX) 2.5A −6 Passive droop allows us to use almost the full output 2.5 •1•10 C = = 111µF BULK(MIN) −3 tolerance window for transients, hence making the 22.6 •10 output capacitor selection simpler and (hopefully) So for 0.1% resistors we could use 2 x 100µF, 18mΩ cheaper. The trade-offs are the cost of the droop POSCAPs for output capacitance, or 1 x >100µF, 10mΩ resistor versus the reduction in output capacitor cost, POSCAP. and the reduction in headroom which impacts MOSFET selection. The top of the feedback chain connects to the Obviously this is a very severe example, since the output “input” side of R , and the output is set for 1.075V. DROOP voltage is so low and therefore the allowable window is Thus at no load, V will be 1.075V (or 1.05V + 2.4%) OUT very small. See solution 2 below for an alternate and at I = 2.5A, V will be 1.025V (or 1.05V - 2.4%). OUT OUT solution. For higher output voltages the components required will be less stringent. If 1% set resistors are used, the total DC error will be ±3.75% = 39mV. Thus at no load, the minimum output The input capacitance needs to be large enough to stop voltage will be given by: the input supply from collapsing below -5% (i.e. the V = 1.075 − 0.039 = 1.036V design minimum) during output load steps. If the input to OUT(MIN _ NO _ LOAD) the pass MOSFET is not local to the supply bulk This leaves 38.5mV for transient response, giving: capacitance then additional bulk capacitance may be 38.5mV required. R = = 15.4mΩ and ESR(MAX) 2.5A MOSFET selection: since the input voltage to the −6 2.5 •1•10 SC338(A) is 5V±5%, the minimum available gate drive C = = 65µF BULK(MIN) −3 38.5 •10 is: Instead of 2 x 100µF, 12mΩ capacitors, we can use 1 x V = (4.4 − 1.1025) = 3.3V GS 100µF, 15mΩ capacitor. So a MOSFET rated for V = 2.7V will be required, with GS an R (over temp.) given by: DS(ON)(MAX) Layout Guidelines (V − V ) (1.14 −1.05) IN(MIN) OUT R = = = 36mΩ DS(ON)MAX) The advantages of using the SC338(A) to drive external I 2.5 OUT(MAX) MOSFETs are a) that the bandgap reference and control Obviously, if a 12V rail is available to power the SC338(A), circuitry are in a die that does not contain high power the number of FET options increases dramatically. dissipating devices and b) that the device itself does not  2004 Semtech Corp. 9 www.semtech.com SC338(A) POWER MANAGEMENT PRELIMINARY Applications Infomation (Cont.) need to be located right next to the power devices. Thus very accurate output voltages can be obtained since changes due to heating effects will be minimal. The 0.1µF bypass capacitor should be located close to the supply (IN) and GND pins, and connected directly to the ground plane. The feedback resistors should be located at the device, with the sense line from the output routed from the load (or top end of the droop resistor if passive droop is being used) directly to the feedback chain. If passive droop is being used, the droop resistor should be located right at the load to avoid adding additional unplanned droop. Sense and drive lines should be routed away from noisy traces or components. For very low input to output voltage differentials, the input to output / load path should be as wide and short as possible. Where greater headroom is available, wide traces may suffice. Power dissipation within the device is practically negligible, thus requiring no special consideration during layout. The MOSFET pass devices should be laid out according to the manufacturer’s guidelines for the power being dissipated within them.  2004 Semtech Corp. 10 www.semtech.com SC338(A) POWER MANAGEMENT Typical Characteristics Quiescent Current vs. Junction Temperature Standby Current vs. Junction Temperature vs. Input Voltage vs. Input Voltage 900 100 Both V = 5V Both V = 0V EN EN 800 Both V < V ADJ BG V = 12V IN 700 10 V = 12V IN 600 500 1 400 V = 5V IN 300 0.1 200 V = 5V IN 100 0 0.01 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 T (°C) T (°C) J J Start Threshold vs. Enable Input Threshold Voltage Junction Temperature vs. Junction Temperature 5.0 1.8 V = 5V IN 4.5 V rising 1.6 IN 4.0 1.4 3.5 V IH 3.0 1.2 V falling IN 2.5 1.0 2.0 V IL 1.5 0.8 1.0 0.6 0.5 0.0 0.4 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 T (°C) T (°C) J J Reference Voltage vs. Drive Pin Output Current (Sourcing) at Startup Junction Temperature vs. Junction Temperature vs. Input Voltage 0.510 20 V = V = 5V V = 5V IN EN EN 0.508 18 V < V ADJ TH(PGD) 0.506 16 0.504 14 V = 12V IN 0.502 12 0.500 10 0.498 8 V = 5V IN 0.496 6 4 0.494 0.492 2 0.490 0 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 T (°C) T (°C) J J  2004 Semtech Corp. 11 www.semtech.com V (mV) V (V) I (µA) ADJ UVLO Q I (µA) V (V) I (µA) DRV IH/L Q(OFF) SC338(A) POWER MANAGEMENT PRELIMINARY Typical Characteristics (Cont.) Drive Pin Output Current (Sourcing) vs. Drive Pin Output Current (Sinking) vs. Junction Temperature vs. Input Voltage Junction Temperature vs. Input Voltage 5.0 1200 V = 5V V = 5V V = 12V EN EN IN 4.5 V < V V > V ADJ BG ADJ BG V = 12V IN 1000 4.0 3.5 800 V = 5V IN 3.0 2.5 600 2.0 400 1.5 V = 5V IN 1.0 200 0.5 0.0 0 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 T (°C) T (°C) J J Drive Pin Output Voltage (Full On) vs. Under Voltage Trip Threshold Junction Temperature vs. Input Voltage vs. Junction Temperature 8 -40 V = V = 5V IN EN -42 7 V = 12V IN -44 6 -46 V = 5V IN 5 -48 4 -50 -52 3 -54 2 V = 5V EN -56 I = 0mA DRV 1 -58 V < V ADJ BG 0 -60 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 T (°C) T (°C) J J Power Good Threshold vs. Power Good Logic Low Output Voltage Junction Temperature vs. Junction Temperature 0.0 200 V = V = 5V V = V = 5V IN EN IN EN 175 V = 0.4V ADJ -2.5 I = -1mA PGD 150 -5.0 125 -7.5 100 Startup only 75 -10.0 50 -12.5 Normal operation 25 -15.0 0 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 T (°C) T (°C) J J  2004 Semtech Corp. 12 www.semtech.com V (%V ) V (V) I (mA) TH(PGD) ADJ DRV DRV V (mV) V (%V ) I (µA) PGD TH(UV) ADJ DRV SC338(A) POWER MANAGEMENT Typical Characteristics (Cont.) Output Rise Time At Startup vs. Soft Start Capacitance vs. Input Voltage 100 V = 5V EN T = 25°C J V = 1.05V OUT C = 100µF, 25mΩ OUT 10 I = 0A OUT MOSFET = IRF7311 V = 5V 1 IN V = 12V IN 0.1 0.1 1 10 100 C (nF) DRV Load Transient Response, No Passive Droop Load Transient Response, With Passive Droop V = 5V, 1.2V in to 1.05V out V = 5V, 1.2V in to 1.05V out IN IN I = 0.01A to 2.51A to 0.01A I = 0.01A to 2.51A to 0.01A OUT OUT C = 2 x 100µF, 25mΩ C = 1 x 100µF, 25mΩ OUT OUT Trace 1: V , 20mV/div., offset 1V R = 20mΩ OUT DROOP Trace 2: V , 2V/div. Trace 1: V , 20mV/div., offset 1V DRV OUT Trace 3: 1.2V in, 50mV/div., offset 1V Trace 2: not connected Trace 4: load FET drain Trace 3: 1.2V in, 50mV/div., offset 1V Timebase: 20µs/div. Trace 4: load FET drain Load rise/fall times ≥ 35A/µs Timebase: 20µs/div. Load rise/fall times ≥ 35A/µs  2004 Semtech Corp. 13 www.semtech.com t (ms) r(OUT) SC338(A) POWER MANAGEMENT PRELIMINARY Outline Drawing - MSOP-10 DIMENSIONS e INCHES MILLIMETERS DIM A MIN NOM MAX MIN NOM MAX D - - .043 - - 1.10 A N A1 .000 - .006 0.00 - 0.15 A2 .030 - .037 0.75 - 0.95 b .007 - .011 0.17 - 0.27 2X E/2 c - - .003 .009 0.08 0.23 D .114 .118 .122 2.90 3.00 3.10 E1 E E1 .114 .118 .122 2.90 3.00 3.10 PIN 1 E .193 BSC 4.90 BSC INDICATOR e .020 BSC 0.50 BSC .016 .024 .032 0.40 0.60 0.80 L ccc C 12 L1 (.037) (.95) N 10 10 2X N/2 TIPS B 01 0° - 8° 0° - 8° aaa .004 0.10 bbb .003 0.08 ccc .010 0.25 D aaa C H A2 A SEATING PLANE c GAGE A1 C PLANE bxN bbb C A-B D 0.25 L 01 (L1) DETAIL A SEE DETAIL A SIDE VIEW NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS AND TO BE DETERMINED AT DATUM PLANE -A- -B- -H- 3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 4. REFERENCE JEDEC STD MO-187, VARIATION BA. Land Pattern - MSOP-10 X DIMENSIONS DIM INCHES MILLIMETERS (.161) (4.10) C (C) G .098 2.50 G Z P .020 0.50 X .011 0.30 Y .063 1.60 Z .224 5.70 Y P NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. Contact Information Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804  2004 Semtech Corp. 14 www.semtech.com