SEMTECH SC2738

SC2738 Ultra Low Output Voltage Dual Linear FET Controller POWER MANAGEMENT Description Features The SC2738 is an ultra low output voltage dual power ‹ ±3.5% reference voltage supply controller designed to simplify power management ‹ Two independant and fully adjustable outputs for desktop PCs and graphics cards. It is part of Semtech’s ‹ Wide supply voltage range permits operation from TM Smart LDO family of products. The SC2738 has two 5V or 12V rails user adjustable outputs that can be set anywhere be- ‹ Very low quiescent current (500µA typical with both tween 0.5V and 3.3V (V = 12V, anywhere between 0.5V IN outputs enabled and 5V input) and 1.8V for V = 5V) using two external resistors per IN ‹ Indivdual Enable control for each output output. ‹ Individual Power Good monitoring and signalling for each output SC2738 features for each output include tight output ‹ Gate drives from input supply enable use of voltage regulation (±3.5% over -40°C to +85°C), enable N-channel MOSFETs controls, open drain power good signals, under-voltage ‹ User selectable dropout voltage protection and soft start. The enable pins allow the part ‹ Individual under-voltage protection for each output to enter a very low power standby mode. Pulling them ‹ MSOP-10 surface mount package high enables the outputs. The power good pins are open drain and assert low when the voltage at their respective adjust pins is below 88% (typ.) of nominal. If Applications the voltage at the adjust pin is below 50% (typ.) of ‹ Desktop PCs nominal, the under-voltage protection circuitry will shut ‹ Graphics cards down that output. The SC2738 is available in an ‹ Simple dual power supplies MSOP-10 surface mount package. Typical Application Circuit 5V or 12V IN VIN1 VIN2 C1 C2 0.1uF (1) 0.1uF (1) 8 7 6 5 1 3 VOUT1 VOUT2 Q1 C3 C4 2 4 100uF, 25mOhm POSCAP R1 100uF, 25mOhm POSCAP U1 SC2738 R5 2k (2) R3 1 10 11.0k DRV1 IN R6 2k (2) 20.0k 2 9 ADJ1 DRV2 3 8 OUT1 Enable EN1 ADJ2 4 7 OUT1 Power Good OUT2 Enable PGD1 EN2 5 6 OUT2 Power Good GND PGD2 R2 C5 C6 C7 R4 10.0k 10nF (2) 0.1uF 10nF (2) 10.0k  R1  R3   Notes: V = 0.5 • 1+  V = 0.5 • 1+  OUT1 OUT2 (1) Additional capacitance may be required if far from supply R2   R4   (2) Optional soft-start components Revision: November 16, 2004 1 www.semtech.com SC2738 POWER MANAGEMENT PRELIMINARY Absolute Maximum Ratings Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied. Exposure to Absolute Maximum rated conditions for extended periods of time may affect device reliability. Pl arameter Sm ymboMs aximu Unit IV nput Supply Voltage -V 0.3 to +13.2 IN DV rive Pins -V 0.3 to +8.0 DRV (1) AV djust and Power Good Pins , V -0.3 to +5.5 V ADJ PGD EV nable Pins -0.3 to V V EN IN Thermal Impedance Junction to Ambient θ 1W 13 °C/ JA Thermal Impedance Junction to Case θ 4W 2 °C/ JC OT perating Ambient Temperature Range -C 40 to +85 ° A OT perating Junction Temperature Range -C 40 to +150 ° J ST torage Temperature Range -C 65 to +150 ° STG LT ead Temperature (Soldering) 10 Sec. 3C 00 ° LEAD ED SD Rating (Human Body Model) E2 S kV Note: (1) Or V , if V ≤ 5V. IN IN Electrical Characteristics (1) Unless specified: T = 25°C, V = V = 5V ± 5%, V = 1.5V ± 5%, 0A ≤ I ≤ 3A. A IN EN PWR OUT Values in bold apply over full operating ambient temperature range. Pl arameter Ss ymboTn est Condition Mp i Tx y Ms a Unit IN SV upply Voltage 42 .5 13. V IN QI uiescent Current V=0 5V 50 700 µA Q IN V=0 12V 60 900 µA IN SI tandby Current B1 oth EN low 0. 1.0 µA Q(OFF) Both EN low, V = 12V 15.0 IN Undervoltage Lockout SV tart Threshold Vr5 ising 3V .7 UVLO IN HV ysteresis Vf0 alling 0V .5 HYST IN  2004 Semtech Corp. 2 www.semtech.com SC2738 POWER MANAGEMENT Electrical Characteristics (Cont.) (1) Unless specified: T = 25°C, V = V = 5V ± 5%, V = 1.5V ± 5%, 0A ≤ I ≤ 3A. A IN EN PWR OUT Values in bold apply over full operating ambient temperature range. Pl arameterSs ymboTn est Condition Mp i Tx y Ms a Unit EN EV nable Input Threshold Output on 1.3 IH V V Output off 0.7 IL EI nable Input Bias Current V=0 0V µA EN EN V = V = 5V or 12V -1 1 + IN EN ADJ AI djust Input Bias Current V = 0.5V -100 0 +100 nA ADJ ADJ RV eference Voltage -3.5% 0.500 +3.5% V ADJ DRV OI utput Current Sourcing, startup 1A 0 µ DRV (until V is reached) TH(PGD) Sourcing, after startup 0.72A .0 m Sinking 3507A 00 µ OV utput Voltage Full On, I = 0mA, V = 12V 6.66V .9 DRV DRV IN Full On, I = 0mA, V = 5V 4.70 4.85 DRV IN Under Voltage Protection (1) Trip Threshold V Measured at ADJ pin 40 50 60 %V TH(UV) ADJ PGD (2) Power Good Threshold V Measured at ADJ pin -15 -12 -9 %V TH(PGD) ADJ OV utput Logic Low Voltage V = 0.4V, I = -1mA 0.4 V PGD ADJ PGD Power Good Leakage I V = 0.5V, 0V ≤ V ≤ V -1 0 +1 µA PGD ADJ PGD IN Current Soft Start Output Rise Time t C=0 not placed 1s 5 µ r DRV-GND 10% V to 90% V OUT OUT C=0 10nF 85 V = 1.05V DRV-GND OUT Error Amplifier OA pen Loop Gain 5B 2 d VOL GW ain BandwidthG1 B MHz Notes: is exceeded for longer than 50µs (nom.) the protection circuitry will shut down that output. (1) If V TH(UV) (2) During startup only, V is -6% (typ.), then switches to -12% (typ.). TH(PGD)  2004 Semtech Corp. 3 www.semtech.com SC2738 POWER MANAGEMENT PRELIMINARY Pin Configuration Ordering Information (1) Part NumberOe utput Voltage Packag Top View Both adj. from (2) SC2738IMSTRT MSOP-10 0.5V to 3.3V Notes: (1) Only available in tape and reel packaging. A reel contains 2500 devices. (2) Lead free product. This product is fully WEEE and RoHS compliant. (MSOP-10) Pin Descriptions Pe inPn in Nam Pin Functio 11Dk RV Output of regulator #1, output impedance ~ 1 Ω. Drives the gate of an N-channel MOSFET to maintain V set by R1 and R2. OUT1 21 ADJ Regulator #1 sense input. Used for sensing the output voltage for power good and under-voltage, and to set the output voltage as follows (refer to application circuit on page 1): R1   V = 0.5 • 1+  OUT1 R2   V = 3.3V for V = 12V, 1.8V for V = 5V. OUT(MAX) IN IN 31 EN Active high enable control. Connect to IN if not being used. Do not allow to float. 41PV GD Power good signal output for . Open drain output pulls low when V is below (V -12%). OUT1 OUT1 OUT1(NOM) 5DG. N Ground 62PV GD Power good signal output for . Open drain output pulls low when V is below (V -12%). OUT2 OUT2 OUT2(NOM) 72 EN Active high enable control. Connect to IN if not being used. Do not allow to float. 82 ADJ Regulator #2 sense input. Used for sensing the output voltage for power good and under-voltage, and to set the output voltage as follows (refer to application circuit on page 1):  R3  V = 0.5 • 1+   OUT2 R4   V = 3.3V for V = 12V, 1.8V for V = 5V. OUT(MAX) IN IN 92Dk RV Output of regulator #2, output impedance ~ 1 Ω. Drives the gate of an N-channel MOSFET to maintain V set by R3 and R4. OUT2 1N 0I. +5V or +12V supply  2004 Semtech Corp. 4 www.semtech.com SC2738 POWER MANAGEMENT Block Diagram (0.94 VBG at start-up) (0.94 VBG at start-up)  2004 Semtech Corp. 5 www.semtech.com SC2738 POWER MANAGEMENT PRELIMINARY Applications Infomation and 3.75mA at 12V in during normal operation. The high Theory Of Operation side drive voltage is generated from V by a 7V (nominal) IN low dropout regulator, thus at 12V in, 6.9V is available The SC2738 dual linear FET controller provides a simple way to drive two N-channel MOSFETs to produce tightly and at 5V in, 4.85V is available (since the LDO will be in regulated output voltages from one or two available, dropout). higher, supply voltages. It takes its power from either a At start-up, the source current available from the drive 5V or 12V supply, drawing typically 500µA while pins is limited to 10µA (typical) until the power good operating. threshold is reached, at approximately 6% below It contains an internal bandgap reference which is nominal output voltage. At this point the full drive capability is enabled. With this constant current source compared to the output voltages via resistor dividers. at start-up, it is a simple matter to use a small capacitor These resistor dividers are external and user selectable . on the drive pin to slow this rate of rise. The rate of rise Depending upon the input voltage used for the device, the drive pin (DRV1, DRV2) can pull up to a guaranteed of the drive pin voltage will be: minimum of 6.6V (from 12V supply) or 4.7V (from 5V dV I DRV DRV = V / s supply). Thus the device can be used to regulate a large dt C SS range of output voltages by careful selection of the A 10nF soft start capacitor will give a 1ms output rise external MOSFETs (see component selection, below). time for V = 12V and V = 1.05V, for example. The IN OUT output rise time will of course depend upon the gate The SC2738 includes an active high enable control (EN1, threshold of the MOSFET being used. Please refer to EN2) for each output. If this pin is pulled low, the related the Output Rise Time chart on Page 12 showing typical drive pin is pulled low, turning off the N-channel MOSFET. output rise times. For very low ESR output capacitors If the pin is pulled up to 1.8V ≤ V ≤ V , the drive pin will EN IN (<5mΩ) and very high soft start capacitance (>100nF), be enabled. This pin should not be allowed to float. it may be necessary to add a resistor in series with the soft start capacitor to ensure stability. Generally, Each output has a power good output (PGD1, PGD2) however, this resistor is not required, as this is a very which are open drain outputs that pull low if the related unlikely situation. output is below the power good threshold (-12% of the programmed output voltage typical, -6% typical at start- The soft start capacitance does not adversely affect up). The power good circuitry is active if the device is transient response since the drive current capability is enabled, regardless of the state of the over current latch. 200 times higher once the device has started. The power good circuitry is not active if that particular output is disabled. OCP and Power Supply Sequencing Also included for each output is an overcurrent The SC2738 has output under-voltage protection that protection circuit that monitors the output voltage. If the looks at a particular output to see if it is a) less than output voltage drops below 50% (typ.) of nominal, as 50% (typical) of it’s nominal value and b) V for that would occur during an overcurrent or short condition, the DRV output is within 350mV (typical) of maximum. If both of device will pull the drive pin low and latch off. The device these criteria are met, there is a 50µs (typical) delay and will need to have the power supply or enable pin toggled then the output is shut down. This provides inherent to reset the latch condition. Each output latches immunity to UV shutdown at start-up (which may occur independently (i.e. if one output latches off, the other while the output capacitors are being charged) since V output will function normally). DRV has a very slow rate of rise with I limited to 10µA. DRV Drive Outputs and Soft Start At start-up, it is necessary to ensure that the power supplies and enables are sequenced correctly to avoid The drive outputs for each output are source and sink erroneous latch-off. For UV latch-off not to occur at start- capable. The sink current is typically 0.8mA at 5V in (1mA up due to sequencing issues, the key is that the voltage at 12V in). The source current is typically 2mA at 5V in  2004 Semtech Corp. 6 www.semtech.com SC2738 POWER MANAGEMENT Applications Infomation (Cont.) simplicity. Worst case under-voltage threshold is 60% (over temperature) of 1.5V, or 0.9V. The typical enable supplied to the MOSFET drain should be greater than threshold is ~1V. See Figure 1 below. the output under-voltage threshold when that output is enabled. This assumes that the drop through the pass MOSFET is negligible. If not, then this drop needs Component Selection to be taken into account also since: Output Capacitors: low ESR capacitors such as Sanyo V = V - (I x R ). OUT DRAIN OUT DS(ON) POSCAPs or Panasonic SP-caps are recommended for If the supply to the SC2738 IN pin comes up before the bulk capacitance, with ceramic bypass capacitors for supply to the MOSFET drain, then that output should be decoupling high frequency transients. Input Capacitors: placement of low ESR capacitors such enabled as the supply to the MOSFET drain is applied as Sanyo POSCAPs or Panasonic SP-caps at the input to - the Power Good signal for this rail would be ideal. If the the MOSFET (V ) will help to hold up the power supply power supply to the MOSFET drain comes up before the DRAIN during fast load changes, thus improving overall transient power supply to the SC2738 IN pin, then the output can either be enabled with the supply to the IN pin or after- response. If V is located at the bulk capacitors for DRAIN the upstream voltage regulator, additional capacitance wards. Please see the example below. may not be required. In this case a 0.1µF ceramic capacitor will suffice. The input supply to the SC2738 Example: SC2738 powered from 5V, output 1 powered from 1.8V set for 1.5V out, output 2 not shown for should be bypassed with a 0.1µF ceramic capacitor. SC2738 Supply Comes Up Before MOSFET Drain Supply MOSFET Drain Supply Comes Up Before SC2738 Supply Figure 1: Power Supply Sequencing  2004 Semtech Corp. 7 www.semtech.com SC2738 POWER MANAGEMENT PRELIMINARY Applications Infomation (Cont.) Vk OUT (V) R1 or R3 ( Ω Ω Ω Ω)k R2 or R4 ( Ω Ω Ω Ω) Ω Ω MOSFETs: very low or low threshold N-channel MOSFETs are required. Selecting FETs rated for V of 2.7V or 4.5V10 .05 10 1. 10. GS will depend upon the available drive voltage (6.9V from 10 .2 10 4. 10. 12V in or 4.85V from 5V in), the output voltage and output current. For the device to work under all 10 .5 20 0. 10. operating conditions, a maximum R must be met to DS(ON) 23 .5 43 5. 11. ensure that the output will never go into dropout: 34 .3 63 3. 11. V − V IN(MIN) OUT(MAX) R = Ω DS(ON)(MAX) I OUT(MAX) Table 1: Recommended Resistor Values For SC2738 Note that R must be met at all temperatures and at DS(ON) the minimum V condition. GS Design Example Setting The Output Voltage: the adjust pins connect Goal: 1.5V±5% static and ±7% transient @ up to 4A directly to the inverting input of the error amplifiers, and from 2.5V±5% and 5V±5% the output voltage is set using external resistors (please refer to the Typical Application Circuit on page 1). Total window for DC error and ripple is ±75mV. Total window for transient is ±105mV. Using output 1 as an example, the output voltage can be calculated as follows: Since this device is linear, and assuming that it has been designed to not ever enter dropout, we do not have ripple  R1 V = 0.5 • 1+  OUT on the output. R2   The input bias current for the adjust pin is so low that it The DC error for this output is the sum of: can be safely ignored. To avoid picking up noise, it is recommended that the total resistance of the feedback V accuracy = ±3.5% = ±52.5mV REF chain be less than 100kΩ. Feedback chain tolerance = ±1% = ±15mV Please see Table 1 on this page for recommended resistor values for some standard output voltages. All Load regulation = ±0.25% = ±3.8mV resistors are 1%, 1/10W. Set resistors per Table 1 should be 20.0kΩ (top) and The maximum output voltage that can be obtained from 10.0kΩ (bottom). each output is determined by the input supply voltage and the R and gate threshold voltage of the DS(ON) Total DC error = ±4.75% = 71.3mV external MOSFET. Assuming that the MOSFET gate threshold voltage is sufficiently low for the output This leaves ±2.25% = 33.7mV for the load transient ESR voltage chosen and the worst-case drive voltage, V OUT(MAX) spike, therefore: is given by: 33.7mV R = = 8.4mΩ V = V − I •R ESR(MAX) OUT(MAX) DRAIN(MIN) OUT(MAX) DS(ON)(MAX) 4A Bulk capacitance required is given by: dI• t C = µF BULK(MIN) dV Where dI is the maximum load current step, t is the maximum regulator response time and dV is the allowable voltage droop. Therefore with dI = 4A, t = 1µs, and dV = 33.7mV:  2004 Semtech Corp. 8 www.semtech.com SC2738 POWER MANAGEMENT Applications Infomation (Cont.) −6 4 •1•10 Layout Guidelines C = = 119µF BULK(MIN) −3 33.7 •10 The advantages of using the SC2738 to drive external So if we use 1% V set resistors we would select 2 x OUT MOSFETs are a) that the bandgap reference and control >100µF, 18mΩ POSCAPs for output capacitance (which circuitry are in a die that does not contain high power assumes that local ceramic bypass capacitors will dissipating devices and b) that the device itself does not absorb the balance of the (9 - 8.4)mΩ ESR need to be located right next to the power devices. Thus requirement - otherwise 15mΩ capacitors should be very accurate output voltages can be obtained since used). changes due to heating effects will be minimal. If we use 0.1% set resistors, then the total DC error The 0.1µF bypass capacitor should be located close to becomes ±3.85% = ±57.8mV, leaving ±3.15% = 47.2mV the supply (IN) and GND pins, and connected directly to for the ESR spike. In this case: the ground plane. 47.2mV R = = 11.8mΩ and ESR(MAX) 4A The feedback resistors should be located at the device, −6 4 •1•10 with the sense line from the output routed from the load C = = 85µF BULK(MIN) −3 (or top end of the droop resistor if passive droop is being 47.2 •10 used) directly to the feedback chain. If passive droop is So for 0.1% resistors we could use 1 x 100µF, 12mΩ being used, the droop resistor should be located right at POSCAPs for output capacitance. the load to avoid adding additional unplanned droop. The input capacitance needs to be large enough to stop Sense and drive lines should be routed away from noisy the input supply from collapsing below -5% (i.e. the traces or components. design minimum) during output load steps. If the input to the pass MOSFET is not local to the supply bulk For very low input to output voltage differentials, the capacitance then additional bulk capacitance may be input to output / load path should be as wide and short required. as possible. Where greater headroom is available, wide traces may suffice. MOSFET selection: since the input voltage to the SC2738 is 5V±5%, the minimum available gate drive is: Power dissipation within the device is practically = − = V (4.4 1.575) 2.825V GS negligible, thus requiring no special consideration during So a MOSFET rated for V = 2.7V will be required, with GS layout. The MOSFET pass devices should be laid out an R (over temp.) given by: DS(ON)(MAX) according to the manufacturer’s guidelines for the power (V − V ) (2.375 −1.5) being dissipated within them. IN(MIN) OUT R = = = 22mΩ DS(ON)MAX) I 4 OUT(MAX) Obviously, if a 12V rail is available to power the SC2738, the number of FET options increases dramatically.  2004 Semtech Corp. 9 www.semtech.com SC2738 POWER MANAGEMENT PRELIMINARY Typical Characteristics Quiescent Current vs. Junction Temperature Standby Current vs. Junction Temperature vs. Input Voltage vs. Input Voltage 900 100 Both V = 5V Both V = 0V EN EN 800 Both V < V ADJ BG V = 12V IN 700 10 V = 12V IN 600 500 1 400 V = 5V IN 300 0.1 200 V = 5V IN 100 0 0.01 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 T (°C) T (°C) J J Start Threshold vs. Enable Input Threshold Voltage Junction Temperature vs. Junction Temperature 5.0 1.8 V = 5V IN 4.5 V rising 1.6 IN 4.0 1.4 3.5 V IH 3.0 1.2 V falling IN 2.5 1.0 2.0 V IL 1.5 0.8 1.0 0.6 0.5 0.4 0.0 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 T (°C) T (°C) J J Reference Voltage vs. Drive Pin Output Current (Sourcing) at Startup Junction Temperature vs. Junction Temperature vs. Input Voltage 0.510 20 V = V = 5V V = 5V IN EN EN 0.508 18 V < V ADJ TH(PGD) 0.506 16 0.504 14 V = 12V IN 0.502 12 0.500 10 0.498 8 V = 5V IN 0.496 6 0.494 4 0.492 2 0.490 0 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 T (°C) T (°C) J J  2004 Semtech Corp. 10 www.semtech.com V (mV) V (V) I (µA) ADJ UVLO Q I (µA) V (V) I (µA) DRV IH/L Q(OFF) SC2738 POWER MANAGEMENT Typical Characteristics (Cont.) Drive Pin Output Current (Sourcing) vs. Drive Pin Output Current (Sinking) vs. Junction Temperature vs. Input Voltage Junction Temperature vs. Input Voltage 5.0 1200 V = 5V V = 5V V = 12V EN EN IN 4.5 V < V V > V ADJ BG ADJ BG V = 12V IN 1000 4.0 3.5 800 V = 5V IN 3.0 600 2.5 2.0 400 1.5 V = 5V IN 1.0 200 0.5 0.0 0 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 T (°C) T (°C) J J Drive Pin Output Voltage (Full On) vs. Under Voltage Trip Threshold Junction Temperature vs. Input Voltage vs. Junction Temperature 8 -40 V = V = 5V IN EN -42 7 V = 12V IN -44 6 V = 5V -46 IN 5 -48 4 -50 -52 3 -54 2 V = 5V EN -56 I = 0mA DRV 1 -58 V < V ADJ BG 0 -60 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 T (°C) T (°C) J J Power Good Threshold vs. Power Good Logic Low Output Voltage Junction Temperature vs. Junction Temperature 0.0 200 V = V = 5V V = V = 5V IN EN IN EN 175 V = 0.4V ADJ -2.5 I = -1mA PGD 150 -5.0 125 -7.5 100 Startup only 75 -10.0 50 -12.5 Normal operation 25 -15.0 0 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 T (°C) T (°C) J J  2004 Semtech Corp. 11 www.semtech.com V (%V ) V (V) I (mA) TH(PGD) ADJ DRV DRV V (mV) V (%V ) I (µA) PGD TH(UV) ADJ DRV SC2738 POWER MANAGEMENT PRELIMINARY Typical Characteristics (Cont.) Output Rise Time At Startup vs. Soft Start Capacitance vs. Input Voltage 100 V = 5V EN T = 25°C J V = 1.05V OUT C = 100µF, 25mΩ OUT 10 I = 0A OUT MOSFET = IRF7311 V = 5V 1 IN V = 12V IN 0.1 0.1 1 10 100 C (nF) DRV Load Transient Response, No Passive Droop Load Transient Response, With Passive Droop V = 5V, 1.2V in to 1.05V out V = 5V, 1.2V in to 1.05V out IN IN I = 0.01A to 2.51A to 0.01A I = 0.01A to 2.51A to 0.01A OUT OUT C = 2 x 100µF, 25mΩ C = 1 x 100µF, 25mΩ OUT OUT Trace 1: V , 20mV/div., offset 1V R = 20mΩ OUT DROOP Trace 2: V , 2V/div. Trace 1: V , 20mV/div., offset 1V DRV OUT Trace 3: 1.2V in, 50mV/div., offset 1V Trace 2: not connected Trace 4: load FET drain Trace 3: 1.2V in, 50mV/div., offset 1V Timebase: 20µs/div. Trace 4: load FET drain Load rise/fall times ≥ 35A/µs Timebase: 20µs/div. Load rise/fall times ≥ 35A/µs  2004 Semtech Corp. 12 www.semtech.com t (ms) r(OUT) SC2738 POWER MANAGEMENT Outline Drawing - MSOP-10 DIMENSIONS e INCHES MILLIMETERS DIM A MIN NOM MAX MIN NOM MAX D A - - .043 - - 1.10 N A1 .000 - .006 0.00 - 0.15 - - A2 .030 .037 0.75 0.95 - - b .007 .011 0.17 0.27 2X E/2 c - - .003 .009 0.08 0.23 D .114 .118 .122 2.90 3.00 3.10 E1 E PIN 1 E1 .114 .118 .122 2.90 3.00 3.10 E .193 BSC 4.90 BSC INDICATOR e .020 BSC 0.50 BSC L .016 .024 .032 0.40 0.60 0.80 ccc C 12 (.037) (.95) L1 N 10 10 2X N/2 TIPS B - - 01 0° 8° 0° 8° aaa .004 0.10 bbb .003 0.08 ccc .010 0.25 D aaa C H A2 A SEATING PLANE c A1 GAGE C PLANE bxN bbb C A-B D 0.25 L 01 (L1) DETAIL A SEE DETAIL A SIDE VIEW NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS AND TO BE DETERMINED AT DATUM PLANE -A- -B- -H- 3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 4. REFERENCE JEDEC STD MO-187, VARIATION BA. Land Pattern - MSOP-10 X DIMENSIONS DIM INCHES MILLIMETERS (.161) (4.10) C (C) G .098 2.50 G Z P .020 0.50 X .011 0.30 Y .063 1.60 Y Z .224 5.70 P NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. Contact Information Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804  2004 Semtech Corp. 13 www.semtech.com