SEMTECH SC2608

SC2608 Simple, Synchronous Voltage Mode PWM Controller POWER MANAGEMENT Description Features ‹ +3.3V or +5V or +12V input voltage The SC2608 is a versatile voltage-mode PWM controller designed for use in step down DC/DC power supply appli- ‹ 200kHz operation cations. A simple, fixed frequency, highly efficient buck ‹ High efficiency (>90%) regulator can be implemented using the SC2608 with mini- ‹ 1% Reference voltage accuracy mal external components. The input voltage range is from ‹ Hiccup mode over current protection +3.3V to +12V. Internal level shift and drive circuitry elimi- ‹ Robust output drive nates the need for an expensive P-channel, high-side ‹ R Current sensing for protection DS(ON) MOSFET. The small device footprint allows for compact ‹ Industrial temperature range circuit design. ‹ SO-8 package ‹ Integrated boot strap diode SC2608 features include temperature compensated volt- ‹ Thermal Shut down age reference, triangle wave oscillator, current limit com- ‹ Fully WEEE and RoHS Compliant parator, and an externally compensated error amplifier. Current limit is implemented by sensing the voltage drop across the bottom MOSFET R . DS(ON) Applications The SC2608 operates at a fixed frequency of 200kHz ‹ Termination supplies providing an optimum compromise between efficiency , ‹ Low cost microprocessor supplies external component size, and cost. ‹ Peripheral card supplies ‹ Industrial power supplies SC2608 has a thermal protection circuit, which is ‹ High density DC/DC conversion O activated if the junction temperature exceeds 150 C. Typical Application Circuit SC2608 sense COMP/SS SENSE +12V/+5V/+3.3V +12V GND VCC DL PHASE VOUT DH BST sense Figure 1 1 Revision 4: October, 2005 www.semtech.com SC2608 POWER MANAGEMENT Absolute Maximum Ratings Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied. Pr P PPr a a a ar r r ra a a am m m me e e et t t te e e er r SSl SlSm y y y ym m m mb b b bo o o oll Mm MMs Mm a a a ax x x xiiiim m m mu u u um UUs UUs n n n niiiit t t ts Parameter Symbol Maximum Units V to GND +V 20 CC BST to PHASE +V 15 BST to GND +V 35 (note1) PHASE to GND -V 1 to +24 DH to PHASE +V 15 (note1) DL to GND -V 1 to +15 COMP/SS to GND +V 7 SENSE to GND +V 7 O Thermal Resistance Junction to Case θ 40 C/W JC O Thermal Resistance Junction to Ambient 163 C/W θ JA O Operating Temperature Range T -40 to +125 C J O ST torage Temperature Range -65 to +150 C STG ESD Rating (Human Body Model) E2 SD kV Note 1: Under pulsing condition, the peak negative voltage can not be lower than -3.6V. Electrical Characteristics o Unless specified: V = 12V, V - V = 12 V, V = 3.3V, T = T = 25 C. CC BST Phase OUT J A Pr P PPl Pr a a a a ar r r r ra a a a am m m m me e e e et t t t te e e e er r r Sl S SSs Sl y y y y ym m m m mb b b b bo o o o oll Cs C CCn Cs o o o o on n n n nd d d d diiiiit t t t tiiiiio o o o on n n n ns s M M Mn MnMp iiiiin n T TTp TpTx y y y y yp p M MMx MxMs a a a a ax x U UUs Us Un n n n niiiiit t t t ts s Py P P PPy o o o o ow w w w we e e e er r r r r S S S S Su u u u up p p p pp p p p pllllly y y SV upply Voltage 44 .5 1V CC SI upply Current V<6 0.4V mA CC COMP Er E E EEr r r r r rr r r r ro o o o or r r r r A A A A Am m m m mp p p p pllllliiiiif f f f fiiiiie e e e er r r EG /A Transconductance 7S m m OA pen Loop DC Gain 6B 0 d O II nput Bias Current 13 uA FB OI utput Sink Current V > 0.9V; V=0 2.1V -A 70 u SINK SENSE COMP OI utput Source Current V < 0.7V; V=0 2.1V 1A 2 u SOURCE SENSE COMP Or O OOr s s s sc c c ciiiilllllllla a a at t t to o o or r Oscillator SF witching Frequency V0 cc =12V 10 8 20 0 2z 2 kH OSC 2 www.semtech.com © 2005 Semtech Corp. SC2608 POWER MANAGEMENT Electrical Characteristics o Unless specified: V = 12V, V - V = 12 V, V = 3.3V, T = T = 25 C. CC BST Phase OUT J A Pr P PPl Pr a a a a ar r r r ra a a a am m m m me e e e et t t t te e e e er r r Sl S SSs Sl y y y y ym m m m mb b b b bo o o o oll Cs C CCn Cs o o o o on n n n nd d d d diiiiit t t t tiiiiio o o o on n n n ns s M M Mn MnMp iiiiin n T TTp TpTx y y y y yp p M MMx MxMs a a a a ax x U UUs Us Un n n n niiiiit t t t ts s RV amp Peak Voltage 4.75V < V<8 12.6V 1V . P-K CC RV amp Valley Voltage 4.75V < V<8 12.6V 0V . V CC MD aximum Duty Cycle 20 00kHz 9% MAX Ms M M MMs O O O O OS S S S SF F F F FE E E E ET T T T T D D D D Dr r r r riiiiiv v v v ve e e e er r r r rs s s DI H Sink/Source Current t > 400nS 08 .60A . DH PW V = 4.5V (src) GS DI L Sink/Source Current 07 .6 0. V = 2.5V (snk) DL GS A Df H Rise/Fall Time tC r, t=0 3000pF, See Fig. 2 5s n L Df L Rise/Fall Time tC r, t=0 4000pF, See Fig. 2 5s n L Dt ead Time S0 ee Fig. 2 8s n dt Dt L Minimum On Time 40 .75V < Vcc < 12.6V 4s 0 n ON Rn R R RRn e e e e ef f f f fe e e e er r r r re e e e en n n n nc c c c ce e e e e S S S S Se e e e ec c c c ct t t t tiiiiio o o o on n n RV eference Voltage V=2 12V 08 .79 08 . 0V .80 REF CC O Temp Variance ∆V -40 < T < +125C5-5 1. 1% . REF J Line Variance ∆V 4.75V < V<4 12.6V mV CC REF C CCt Ct Cu u u u ur r r r rr r r r re e e e en n n n nt t t t t L L L L Liiiiim m m m miiiiit t t TV rip Voltage 4< .75V V< cc 12.6V -0 190-0 16 -V 13 m TRIP V = V - GND trip PHASE S SSt St So o o o of f f f ft t t t t-----S S S S St t t t ta a a a ar r r r rt t t SI S Source Current V<5 2.5V 1A . u SRC COMP SI S Sink Current V>5 0.5V -A 1. u SNK COMP Ut U U UUt n n n n nd d d d de e e e er r r r r v v v v vo o o o olllllt t t t ta a a a ag g g g ge e e e e L L L L Lo o o o oc c c c ck k k k ko o o o ou u u u ut t t O UV VLO Threshold -40< T < 85C143 . 45 . 4V . th J O UV VLO Hysterisis -40< T < 85C02V 0 m hys J Tn T T TTn h h h h he e e e er r r r rm m m m ma a a a alllll S S S S Sh h h h hu u u u ut t t t td d d d do o o o ow w w w wn n n o OT ver Temperature Trip Point 150 C OTP 3 www.semtech.com © 2005 Semtech Corp. SC2608 POWER MANAGEMENT Gate Drive Timing Diagram Figure 2 Block Diagram VCC BST LEVEL DH OSC SHIFT S PHASE REF 0.8V NON-OVERLAP RQ TIMING E/A + 0 PWM VCC - Vcc SENSE OCP & DL UVLO GND OCP PHASE 0 0 + - 0 COMP/SS Figure 3 4 www.semtech.com © 2005 Semtech Corp. - + SC2608 POWER MANAGEMENT Pin Configuration Ordering information (1) Top View Device PT ackage Temp Range ( ) J (2) O SC2608STRT S5 O-8 -40 to 12 C 8 1 BST PHASE Sd C2608EVB Evaluation Boar DH 2 7 COMP/SS Notes: (1) Only available in tape and reel packaging. A reel con- 3 SENSE GND 6 tains 2500 devices. (2) This device is fully WEEE and RoHS Compliant DL VCC 4 5 (8-Pin SO-8) Pin Descriptions PPn Pn Piiiin n Pin P PPe PePn iiiiin n n n n N N N N Na a a a am m m m me e e P PPn Pn Piiiiin n n n n F F F F Fu u u u un n n n nc c c c ct t t t tiiiiio o o o on n # # # # # 1TB. S Bootstrap for high side driver 2HD. High side driver output 3DG. N Ground 4LD. Low side driver output 5CV. C Chip bias supply pin 6eS. ens Output voltage sense input Error amplifier output. Connect compensation network to GND. The compensation capacitor COMP/SS 7 serves as soft start capacitor. By pulling this pin low will disable the output. 8E PHAS Connect this pin to the switching node between the MOSFETs. 5 www.semtech.com © 2005 Semtech Corp. SC2608 POWER MANAGEMENT Theory of Operation Synchr Synchr Synchr Synchr Synchronous Buck Con onous Buck Con onous Buck Con onous Buck Con onous Buck Conv v v v ver er er er ert t t t ter er er er er remain in the off state whenever the supply voltage drops The output voltage of the synchronous converter is set and below the set threshold. Lockout occurs if V falls below CC controlled by the output of the error amplifier. The invert- 4.3V typ. ing input of the error amplifier receives its voltage from the SENSE pin. The non-inverting input of the error amplifier is Sof Soft Star t Start t Sof Sof Soft Star t Star t Start t t connected to an internal 0.8V reference. The error ampli- The SC2608 provides a soft start function to prevent large fier output is connected to the compensation pin. The inrush currents upon power-up or hiccup retry. If both COMP error amplifier generates a current proportional to (Vsense and SENSE pins are low (<300mV), the device enters soft - 0.8V), which is the COMP pin output current start mode, and the compensation capacitor is slowly charged (Transconductance ~ 7mS). The voltage on the COMP by an internal 1.5uA current source. When the COMP pin pin is the integral of the error amplifier current. The COMP reaches 300mV, the low side FET is switched on in order to voltage is the non-inverting input of the PWM comparator refresh the bootstrap capacitor, and begin PWM from a known and controls the duty cycle of the MOSFET drivers. The state. As the COMP pin rises above 800mV, PWM begins at compensation network controls the stability and transient minimum duty cycle. response of the regulator. The larger the capacitor, the slower the COMP voltage changes, and the slower the duty COMP continues to charge, slowly sweeping the device cycle changes. through the duty cycle range until FB reaches the regulation point of 800mV. Once FB reaches the regulation point, the The non-inverting input voltage of the PWM comparator is soft start current is switched off, and the strong error amp is the triangular ramp signal generated from the oscillator. enabled, providing a glitch-free entrance into closed loop The peak-to-peak voltage of the ramp is 1V, this is a pa- operation. The overcurrent comparator is still active during rameter used in control loop calculation. When the oscil- soft start mode, and will override soft start in the event that lator ramp signal rises above the COMP voltage, the com- an overcurrent is detected, such as startup into a dead parator output goes high and the PWM latch is reset. This short. pulls DH low, turning off the high-side MOSFET. After a short delay (dead time), DL is pulled high, turning on the R R R R R Current Limiting Current Limiting Current Limiting Current Limiting Current Limiting DS(ON) DS(ON) DS(ON) DS(ON) DS(ON) low-side MOSFET. The oscillator also produces a set pulse In case of a short circuit or overload, the low-side (LS) FET for the PWM latch to turn off the low-side MOSFET, After a will conduct large currents. To protect the regulator in this delay time, DH is pulled high to turn on the high-side situation, the controller will shut down the regulator and be- MOSFET. The delay time is determined by a monostable gin a soft start cycle later. While the LS driver is on,the Phase on the chip. voltage is compared to the OCP trip voltage. If the phase voltage is lower than OCP trip voltage, an over current condi- The triangle wave minimum is about 0.8V, and the maxi- tion is detected. The low-side R sense is implemented at dson mum is about 1.8V. Thus, if Vcomp = 0.7V, high side duty end of each LS-FET turn-on duration. The minimum turn-on cycle is the minimum (~0%) , but if Vcomp is 1.8V, duty cycle time of the LS-FET is set to be 400nS. This will ensure the is at maximum ( ~90%).The internal oscillator uses an on- sampled signal is noise free by giving enough time for the chip capacitor and trimmed precision current sources to set switching noise to die down. the oscillation frequency to 200kHz. Figure 1 shows a 2.5V output converter. If the Vout <2.5V, then the SENSE voltage OCP Hiccup OCP Hiccup OCP Hiccup OCP Hiccup OCP Hiccup < 0.8V. In this case the error amplifier will be sourcing cur- In the event that an overcurrent is detected, the SC2608 rent into the COMP pin so that COMP voltage and duty cycle latches the fault and begins a hiccup cycle. Switching is will gradually increase.If Vout > 2.5V, the error amplifier will immediately stopped, and the drivers are set to a tristate sink current and reduce the COMP voltage, so that duty cycle condition (Both DH and DL are low). COMP is slowly will decrease.The circuit will be in steady state when Vout discharged to 300mV with an internal 1.5uA current source, =2.5V , Vsense = 0.8V, Icomp = 0. The COMP voltage and providing a long cooldown time to keep power dissipation duty cycle depend on Vin. low in the event of a continuous dead short. Once COMP and SENSE both fall below the 300mV threshold, the part U Under V nder Voltage Lock oltage Lockout out U U Under V nder V nder Voltage Lock oltage Lock oltage Lockout out out re-enables the 1.5uA soft start current , and the device begins The under voltage lockout circuit of the SC2608 assures a normal startup cycle again. that both high-side and low-side MOSFET driver outputs 6 www.semtech.com © 2005 Semtech Corp. SC2608 POWER MANAGEMENT Applications Information (Cont.) 1 G = A note to the user is needed: The device cannot restart until pwm V ramp both COMP and SENSE are low, to prevent start up into a where the ramp amplitude is fixed at 1 volts. charged output. In the event of an overcurrent condition, The total control loop-gain can then be derived as the output is quickly discharged by the load, therefore bringing follows: SENSE below the 300mV threshold. If the COMP pin is pulled V  1+sRC bg c o low by an external device (such as an open-drain logic gate   T() s =G •G •V • •H() s• m pwm in c   V     L R  o 2 c used for system shutdown), and SENSE is high(above 300mV) 1+sRC + +s LC1+  c o o     R R  o  o is high while COMP is low, then the SC2608 turns on the low 1 side FET to discharge the output before changing to shutdown H() s = c 1 or soft-start mode. The low side FET turns off when SENSE + sC i 1 R+ drops below 300mV and the converter remains in the tri- sC state condition until COMP is released. Although this The task here is to properly choose the compensation net- shutdown technique can be used successfully on the SC2608, work for a nicely shaped loop-gain Bode plot. The follow- the system designer using COMP for external shutdown will ing design procedures are recommended to accomplish need to consider the load on the low side FET when the goal: discharging the output capacitor bank. For large capacitor (1) Calculate the corner frequency of the output filter: bank, this peak current can be quite large as it is limited only 1 F = o by the R of the low side FET. Fortunately the duration of 2π LC DS(ON) o this event is quite short, and has been shown in the lab to (2) Calculate the ESR zero frequency of the output filter have no detrimental effect on the performance of the external capacitor: 1 FETs. F = esr 2πR C c o Disabling the output by pulling down COMP/SS pin is only recommended when the output capacitor bank is not too (3) Check that the ESR zero frequency is not too high. large. F SW F < esr 5 Compensation Network Design Compensation Network Design Compensation Network Design Compensation Network Design Compensation Network Design If this condition is not met, the compensation structure may not provide loop stability. The solution is to add some electrolytic capacitors to the output capacitor bank to cor- E/A G_PWM rect the output filter corner frequency and the ESR zero L R1 frequency. In some cases, the filter inductance may also VBG R Rc Ro need to be adjusted to shift the filter corner frequency. It 0.8V Ci VIN is not recommended to use only high frequency multi-layer Co R2 C ceramic capacitors for output filter. (4) Choose the loop gain cross over frequency (0 dB fre- quency). It is recommended that the crossover frequency is always less than one fifth of the switching frequency : Fig. 4. SC2608 small signal model. 1 F = •F X _OVER SW The control model of SC2608 is depicted in Fig. 4. This 5 model can also be used to generate loop gain Bode plots. If the transient specification is not stringent, it is better to The bandgap reference is 0.8V and trimmed to +/-1% choose a crossover frequency that is less than one tenth of accuracy. The desired output voltage can be achieved by the switching frequency for good noise immunity. The setting the resistive divider network, R1 and R2. The error resistor in the compensation network can then be calcu- amplifier is transconductance type with fixed gain of: lated as: 2 0.007 A F   1 F    V X _OVER G = esr o   m     R= • • • V       G •V •G F F V pwm in m  o  esr  bg   The compensation network includes a resistor and a ca- when pacitor in series, which terminates the output of the error F sw F < F < amplifier to the ground. o esr 5 The PWM gain is inversion of the ramp amplitude, and this gain is given by: 7 www.semtech.com © 2005 Semtech Corp. SC2608 POWER MANAGEMENT Applications Information (Cont.) (5) The compensation capacitor is determined by choosing An example is given below to demonstrate the procedure the compensator zero to be about one fifth of the output introduced above. filter corner frequency: C =4400uF V =12V o in F R =0.009Ω o V =2.5V c F = o zero 5 V =0.8V I =15A bg o V =1V F =200KHz 1 ramp sw C= L=2.2uH G =0.007A/V 2πR•F m zero SC2608 soft start time is determined by the set C =1nF i compensation capacitor. Capacitance can be adjusted to set to R =1.5KΩ R =1.33KΩ c c satisfy the soft start requirement. set to C=100nF C=327.95nF (6) The final step is to generate the Bode plot by using the for suitable soft start time simulation model in Fig. 4 or using the equations provided here with Mathcad. The phase margin can then be checked using the Bode plot. Loop Gain Mag (dB) 100 50 mag() i 0 50 3 4 5 6 . . . . 10 100 1 10 1 10 1 10 1 10 F i Loop Gain Phase (Degree) 0 45 phase() i 90 135 180 3 4 5 6 . . . . 10 100 1 10 1 10 1 10 1 10 F i Fig. 5. Bode plot of the loop 8 www.semtech.com © 2005 Semtech Corp. SC2608 POWER MANAGEMENT Typical Performance Characteristics Frequency vs. Temperature Vref vs. Temperature 210 0.83 0.82 200 0.81 190 0.80 180 0.79 170 -50 -25 0 25 50 75 100 125 -50 -25 0 255075 100 125 Temperature( ) Temperature(℃) ℃ I_limit vs. Temperature UVLO vs. Temperature 4.50 190 4.40 180 170 4.30 160 4.20 4.10 150 -50 -25 0 25 50 75 100 125 -50 -25 0 255075 100 125 Temperature( ) Temperarure( ) ℃ ℃ Icc vs. Temperature Gate driver dead time vs. Temperature 4.0 100 90 3.7 80 3.4 70 3.1 60 2.8 -50 -25 0 25 50 75 100 125 -50 -25 0 255075 100 125 Temperature(℃) Temperature(℃) Soft start sourcing vs. Temperature UVLO_Hysteresis vs. Temperature 1.65 200 1.55 150 1.45 100 1.35 50 1.25 0 -50 -25 0 255075 100 125 -50-25 0 25 50 75100 125 Temperature(℃) Temperature(℃) 9 www.semtech.com © 2005 Semtech Corp. Gate driver dead time(ns) I_limit trip(mV) Vref(V) Soft start souring current(uA) UVLO_Hysteresis(mV) Icc(mA) UVLO(V) Frequency(KHz) SC2608 POWER MANAGEMENT Application Information T T T T Typical Application Schematic ypical Application Schematic ypical Application Schematic ypical Application Schematic ypical Application Schematic +12V/+5V/+3.3V Q1 C1 C2 C3 R1 2R2 U1 1.6VOUT/20A C4 1n 8 1 Phase BST C5 L1 1.2uH R3 7 2 1uF/16V Q2 C7 C8 C9 C10 C11 COMP/SS DH R4 1K R2 1.5k C6 100n 6 3 1R Sense SENSE GND Sense 5 4 C12 +12V VCC DL R6 2.2nF R5 C13 SC2608 1K 1R 1uF/16V VOUT = 0.8V X (R3+R6)/R6 Bill of Materials Bill of Materials Bill of Materials Bill of Materials Bill of Materials Iy temQe uantitRt eferencPr ar Vende 11CV 1 4y .7uF/16 An 22CV 2,C31J 500uF/16 Panasonic F 31CV 4 1y nF/50 An 42CV 5,C13 1y uF/16 An 51CV 6 1y 00nF/25 An 62CV 7,C82J 200uF/6.3 Panasonic F 73CV 9,C10,C114y .7uF/6.3 An 81CF 12 2y .2n An 91LH 1 1y .2u An 11 0 QA 1 In PD09N03L Infineo 11 1 QA 2 In PD06N03L Infineo 11 2 R2 1 2y R An 11 3 RK 2 1y .5 An 12 4 R% 3,R6 1y K, 1 An 12 5 R0 4,R5 1y R An 11 6 U8 1 SH C260 SEMTEC 10 www.semtech.com © 2005 Semtech Corp. IP B 09N 03LA IP D 0 6N 03LA 4.7uF /16V 1500uF /16V 1500uF /16V 2200uF /6 .3V 2200uF /6 .3V 4.7uF /6 .3V 4 .7 u F /6 .3 V 4 .7 u F /6 .3 V SC2608 POWER MANAGEMENT Typical Performance Characteristics Start up Efficiency V.S. Load Current 92 90 Vin Vin Vin 88 86 Co Co Comp mp mp/ s / s / ss s s 84 82 DL DL DL 80 VOU VOU VOUT T T 78 1 2 3 4 5 6 7 8 9 10 1112 13 141516 171819 20 Load Current (A) Over Current Protection (33A DC tripped) Transient Response VIN CO COM MP P//S SS S VO VOU UT T Comp/ss DH IL ( IL (1 10A 0A/ /1 10m 0mV V) ) VOUT 0 -18 A step load OCP HICCUP Gate waveforms VIN DH DH Comp/SS Ph Phase node ase node DH DL DL VOUT 15 A sustain loading 11 www.semtech.com © 2005 Semtech Corp. Efficiency (%) SC2608 POWER MANAGEMENT Application Information T T T T Typical DDR VDDQ Application Schematic ypical DDR VDDQ Application Schematic ypical DDR VDDQ Application Schematic ypical DDR VDDQ Application Schematic ypical DDR VDDQ Application Schematic 5VDual C4 Q1 C1 C2 C3 R1 2.2R U1 C5 1.8VOUT/24A 330pF 8 1 Phase BST C7 C6 L1 R3 220nF 7 2 Q2 C8 C9 C10 C11 C12 C13 1uF/16V 1.2uH/40A 1.27k COMP/SS DH R2 6 3 R4 5.1k Sense SENSE GND 2R2 Sense 5 4 5VDual VCC DL R5 D1 C14 1k BAT54H SC2608 1n C15 D2 1uF/16V D1N4148 +12V Bill of Materials Bill of Materials Bill of Materials Bill of Materials Bill of Materials Iy temQe uantitRt eferencPr ar Vende 14CV 1,C11,C12,C134y .7uF/6.3 An 23CV 2,C3,C41J 500uF/6.3 Panasonic F 31CV 5 3y 30pF/50 An 42CV 6,C15 1y uF/16 An 51CV 7 2y 20nF/25 An 63CV 8,C9,C101J 800uF/6.3 Panasonic F 71CV 14 1y nF/50 An 81DH 1 By AT54 An 91D8 2 1y N414 An 11 0 LA 1 1y .2uH/40 An 11 1QA 1 In PD06N03L Infineo 11 2QA 2 In PD06N03L Infineo 12 3 R2 1,R4 2y R An 11 4 RK 2 5y .1 An 11 5 R% 3 1y .27K, 1 An 11 6 R% 5 1y K, 1 An 11 7 U8 1 SH C260 SEMTEC 12 www.semtech.com © 2005 Semtech Corp. IP D 06N 03LA IP D 06N 03LA 4.7uF /16V 1500uF /6.3V 1800uF /6.3V 1500uF /6.3V 1800uF /6.3V 1500uF /6.3V 1800uF /6.3V 4.7uF /6.3V 4.7uF /6.3V 4.7uF /6.3V SC2608 POWER MANAGEMENT Application Information T T T T Typical High In ypical High In ypical High In ypical High In ypical High Input V put V put V put V put Voltage Application Schematic oltage Application Schematic oltage Application Schematic oltage Application Schematic oltage Application Schematic 20VIN Q1 C1 C2 R1 0R U1 R2 5R1 C3 L1 5VOUT/8A 10pF/Opt. 8 1 Phase BST C4 2.2uH 7 2 1uF/16V Q2 R5 COMP/SS DH R3 R4 C6 C7 C8 1K C5 100n 5.25K 6 3 2R2 Sense SENSE GND R6 1KR/1206 5 4 C9 Vin VCC DL Sense 1n R7 SC2608 C10 C11 2.2nF 1k D1 1KR/1206 1uF/16V 8.2V R7 Bill of Materials Bill of Materials Bill of Materials Bill of Materials Bill of Materials Iy temQe uantitRt eferencPr ar Vende 11CV 1 4y .7uF/25 An 21CV 2 1J 000uF/25 Panasonic F 31C. 3 1y 0pF/50V , Opt An 42CV 4,C11 1y uF/16 An 51CV 5 1y 00nF/16 An 61CV 6 2J 200uF/6.3 Panasonic F 72CV 7,C8 4y .7uF/6.3 An 81CV 9 1y nF/50 An 91CV 10 2y .2nF/50 An 11 0 DV 1 Zy ener 8.2 An 11 1LA 1 2y .2uH/15 An 11 2QA 1 In PD13N03L Infineo 11 3QA 2 In PD13N03L Infineo 11 4 RR 1 0y An 11 5 RR 2 5y .1 An 12 6 R% 3,R7 1y .K, 1 An 11 7 R2 4 2y R An 11 8 R% 5 5y .25K, 1 An 12 9 R6 6,R7 1y KR, 120 An 21 0 U8 1 SH C260 SEMTEC 13 www.semtech.com © 2005 Semtech Corp. IPD13N03LA IPD13N03LA 4.7uF/25V 1000uF/25V 2200uF/6.3V 4.7uF/6.3V 4.7uF/6.3V SC2608 POWER MANAGEMENT Outline Drawing - SO-8 DIMENSIONS INCHES MILLIMETERS A DIM MIN NOM MAX MIN NOM MAX D e - - A .053 .069 1.35 1.75 N - - A1 .004 .010 0.10 0.25 - - A2 .049 .065 1.25 1.65 - - b .012 .020 0.31 0.51 2X E/2 c - - .007 .010 0.17 0.25 .189 .193 .197 4.80 4.90 5.00 E1 E D E1 .150 .154 .157 3.80 3.90 4.00 E .236 BSC 6.00 BSC e .050 BSC 1.27 BSC 12 h .010 - .020 0.25 - 0.50 ccc C L .016 .028 .041 0.40 0.72 1.04 2X N/2 TIPS e/2 L1 (.041) (1.04) N 8 8 - - B 01 0 8 0 8 aaa .004 0.10 bbb .010 0.25 D ccc .008 0.20 aaa C h A2 A SEATING PLANE h C A1 H bxN bbb C A-B D c GAGE PLANE 0.25 L 01 (L1) SEE DETAIL A DETAIL A SIDE VIEW NOTES: 1. CO NTRO LLING DIM ENSIO N S ARE IN M ILLIM ETERS (ANG LES IN DEG REES). 2. DATUM S -A- AND -B- TO BE DETERM INED AT DATUM PLANE -H- 3. DIM EN SION S "E1" AND "D" DO NO T INCLUDE M O LD FLASH, PR OTRUSIO NS O R G ATE BURRS. 14 www.semtech.com © 2005 Semtech Corp. SC2608 POWER MANAGEMENT Land Pattern - SO-8 X DIMENSIONS DIM INCHES MILLIMETERS (.205) (5.20) C G .118 3.00 (C) G Z P .050 1.27 X .024 0.60 Y .087 2.20 Y .291 7.40 Z P NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. 2. REFERENCE IPC-SM-782A, RLP NO. 300A. Contact Information Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804 15 www.semtech.com © 2005 Semtech Corp.