SEMTECH SC2440

SC2440 2.5 MHz Dual Switching Regulator with Integrated 2A Switches POWER MANAGEMENT Description Features The SC2440 is an adjustable frequency dual current- u Up to 2.5 MHz/Channel Programmable Switching mode switching regulator with 2A integrated switches. Frequency Its high frequency operation allows the use of small u Fixed Frequency Current-mode Control inductors and capacitors, resulting in very compact power u Wide Input Voltage Range 2.8V to 20V supplies. The SC2440 is suitable for next generation XDSL u Out of Phase Switching Reduces Ripple modems requiring operating frequencies in excess of 1.5 u Cycle-by-cycle Current-limiting MHz. The two channels operate at 180° out of phase u Independent Shutdown/soft-start Pins for reduced input voltage ripples. Separate soft start/ u Independent Hiccup Overload Protection shutdown pins allow independent control and output u Independent Power-Good Indicators sequencing for latch-up prevention. The SC2440 can also u Two 2A Integrated Switches be externally synchronized up to 2.5 MHz per channel. u External Synchronization u Thermal Shutdown Current-mode PWM control allows fast transient response with simple loop compensation. Cycle-by-cycle u Thermally Enhanced 16-pin TSSOP Package current limiting and hiccup overload protection reduce Applications power dissipation during overload. u XDSL and Cable Modems u Set-up Boxes u Point of Load Applications u CPE Equipment u DSP Power Supplies u Disk Drives Typical Application Circuit R6 100K D3 FB1 PGOOD1 BOOST1 Efficiency vs Load Current C5 R5 C2 1N4148 95 0.1mF 15.4K C6 470pF L1 OUT1 V = 12V IN V = 5V OUT2 COMP1 SW1 90 m 3.3 H R1 3.3V/2A C7 10pF VIN D1 23.3K SS1 12V UPS120 85 SC2440 C1 22nF C15 m 10 F SYNC R2 80 IN 10K R9 V = 3.3V 10mF ROSC OUT1 C10 15K D2 75 UPS120 SS2 C9 L2 OUT2 22nF 70 SW2 COMP2 m 4.4 H 5V/2A C8 C4 10pF R7 65 R3 0.1mF D4 40.2K 24.3K 220pF FB2 BOOST2 C3 60 10mF 1N4148 R8 R4 GND PGOOD2 55 10K 100K 50 0 0.5 1 1.5 2 L1: Sumida CR43 Load Current (A) L2: F alco D04012 Figure 1. 1.3MHz 12V to 3.3V and 5V Step-down Converter Revision: March 5, 2007 1 www.semtech.com Efficiency (%) SC2440 POWER MANAGEMENT Absolute Maximum Ratings Exceeding the specifications below may result in permanent damage to the device, or device malfunction. Operation outside of the parameters specified in the Electrical Characteristics section is not implied. Parameter Symbol Max Units Input Voltage V -0.3 to 20 V IN Boost Pin V 40 V BST Boost Pin Above SW V -V 20 V BST SW PGOOD Pin Voltage V V V PGOOD IN SS Pins V 3 V SS FB Pins V -0.3 to V V FB IN SYNC Pin Current I 5 mA SYNC SW Voltage V -0.6 to V V SW IN V +1.5 IN SW Transient Spikes (<10ns Duration) V V SW -2.5 Operating Ambient Temperature Range T -40 to 85 °C A Thermal Resistance Junction to Ambient q 45 °C/W JA Maximum Junction Temperature T 150 °C J Storage Temperature Range T -65 to +150 °C STG Lead Temperature (Soldering)10 sec T 300 °C LEAD Electrical Characteristics Unless specified: -40°C < T < 85°C, -40°C < T < 105°C, R = 12.1KW, V = 0, V = 5V, V = 8V A J OSC SYNC IN BOOST Parameter Conditions Min Typ Max Units V Start Voltage 2.45 2.62 2.78 V IN V Start Hysteresis 75 mV IN Quiescent Current Not switching, PGOOD Open 3.3 4.3 mA Shutdown Current V = V = 0V, PGOOD Open 38 60 µA SS1 SS2 Feedback Voltage 0.980 1.000 1.020 V Feedback Voltage Line V = 3V to 20V 0.005 %/V IN Regulation FB Pin Input Bias Current V = 1V, V = 1.5V -15 -30 nA FB COMP -1 Error Amplifier Transconductance 280 µW Error Amplifier Open-loop Gain 53 dB COMP Source Current V = 0.8V, V = 1.5V 20 µA FB COMP COMP Sink Current V = 1.2V, V = 1.5V 20 µA FB COMP COMP Pin to Switch Current Gain 5.7 A/V ã 2005 Semtech Corp. 2 www.semtech.com SC2440 POWER MANAGEMENT Electrical Characteristics (Cont.) Unless specified: -40°C < T < 85°C, -40°C < T < 105°C, R = 12.1KW, V = 0, V = 5V, V = 8V A J OSC SYNC IN BOOST Parameter Conditions Min Typ Max Units COMP Switching Threshold 0.7 1.1 1.3 V COMP Maximum Voltage V = 0.9V 2.2 V FB Channel Switching Frequecy 1.2 1.4 1.6 MHz Maximum Duty Cycle (Note 2) 80 90 % Switch Current Limit V = 0.9V, V = 2.3V, COMP Pin Open 2 2.6 A FB SS Switch Saturation Voltage I = -2A 0.3 0.48 V SW Switch Leakage Current 10 µA Minimum Boost Voltage I = -2A 1.8 2.5 V SW Boost Pin Current I = -0.5A 20 30 mA SW I = -2A 60 80 mA SW Minimum Soft-Start Voltage to Exit SS1 Tied to SS2 0.2 0.4 0.7 V Shutdown Soft-start Charging Current V = 0V 2 µA SS V = 1.5V 1.8 µA SS Soft-start Discharging Current V = 1.5V 0.8 µA SS Minimum Soft-start Voltage to V Rising 2 V SS Enable Overload Shutoff FB Overload Threshold V = 2.3V, V Falling 0.74 V SS FB Soft-start Voltage to Restart V Falling 0.7 1 1.3 V SS Switching After Overload Shutoff Power Good Threshold Below FB V Rising 80 100 120 mV FB Power Good Output Low Voltage V = 0.8V, I = 250µA 0.2 0.4 V FB PGOOD Power Good Pin Leakage Current V = 5V 0.1 1 µA PGOOD SYNC Input High Voltage 2 V SYNC Input Low Voltage (Note 1) 0.8 V SYNC Frequency SYNC Frequency = 2 X Channel 3.4 5 MHz Frequency. (Note 1) SYNC Pin Input Current V = 2V 60 75 µA SYNC Thermal Shutdown Temperature 155 °C Thermal Shutdown Hysteresis 10 °C Notes: (1) Guaranteed by design, not tested in production. (2) The maximum duty cycle specified corresponds to 1.4MHz switching frequency. Duty cycles higher than those specified can be achieved by lowering the operating frequency. (3) This device is ESD sensitive. Use of standard ESD handling precautions is required. ã 2005 Semtech Corp. 3 www.semtech.com SC2440 POWER MANAGEMENT Pin Configuration Ordering Information (1)(2) Part Number Package TOP VIEW SC2440TETRT TSSOP-16 EDP BOOST1 1 16 FB1 SC2440EVB Evaluation Board SW1 2 15 COMP1 Notes: IN 3 14 PGOOD1 (1) Only available in tape and reel packaging. A reel contains SYNC 4 13 SS1 2500 devices. ROSC 5 12 SS2 (2) Lead free product. This product is fully WEEE and RoHS compliant. IN 6 11 PGOOD2 SW2 7 10 COMP2 BOOST2 8 9 FB2 (16 Pin TSSOP-EDP) Underside metal must be soldered to ground. Pin Descriptions Pin # Pin Name Pin Function BOOST1, Supply pins to the power transistor drivers.Tie to external diode-capacitor charge pumps to 1, 8 BOOST2 generate drive voltages higher than V in order to fully saturate the internal NPN power switches. IN Emitters of the internal power NPN transistors. Connect to the inductors, the freewheeling diodes 2, 7 SW1, SW2 and the boost capacitors. Input power supply pins of the SC2440 and also the common collector of the internal power 3, 6 IN NPNs. Pins 3 and 6 are internally tied together and must be locally bypassed. Driving the SYNC pin with an external clock synchronizes both step-down converters. The 4 SYNC external clock frequency must be at least twice the individual regulator set (or free-running) frequency. Tie this pin to ground if not used. An external resistor between this pin and the ground sets the master oscillator free-running 5 ROSC frequency. The set frequency is twice that of the individual switching regulator. The inverting inputs of the error amplifiers. Each FB pin is tied to a resistive divider between its 9, 16 FB1, FB2 output and the ground for setting the channel output voltage. These are the outputs of the internal error amplifiers. The voltages on these pins control the peak COMP1, 10, 15 switch currents. RC networks at these pins compensate the control loops. Pulling either pin below COMP2 0.7V stops the corresponding switching regulator. Open collector outputs of the Power Good comparators. Tie to external pull-up resistors from the PGOOD1, input or the output of the converter. The PGOOD outputs become valid as soon as V rises IN 11, 14 PGOOD2 above 1 V during power-up. PGOOD is actively pulled low until the corresponding FB pin rises BE to within 10% of the final regulation voltage. A capacitor from either SS pin to the ground provides soft-start and overload hiccup functions for that channel. Pulling either SS pin below 0.8V with an open drain or collector transistor shuts 12, 13 SS1, SS2 off the corresponding regulator. To completely shut off the SC2440 to low-current state, pull both SS pins to the ground. Soft-start is recommended for all applications. The exposed pad at the bottom of the package is the electrical ground connection of the Underside GND SC2440. It also provides a thermal contact to the circuit board. It is to be soldered to the ground Metal plane of the board. ã 2005 Semtech Corp. 4 www.semtech.com SC2440 POWER MANAGEMENT Block Diagrams 3 IN PGOOD1 + + 14 S S ISEN - + - 7.7mW SLOPE + COMP 1 + 20mV ILIM POWER - GOOD 100mV BOOST1 COMP1 1 15 FB1 + S 16 - PWM Q POWER - EA R TRANSISTOR + SS1 13 FB1 2 SW1 Soft-Start And 1V 0.74V OVLD Overload Hiccup REFERENCE SS2 FAULT & THERMAL Control 1 12 SHUTDOWN SLOPE SLOPE COMP 2 COMP 1 ROSC SLOPE COMP 5 CLK1 FREQUENCY OSCILLATOR SYNC CLK2 DIVIDER 4 Figure 2. SC2440 Functional Diagram (One of Two Converters Shown) FB + - 0.74V S OVLD Q 1.8mA SS R 1V/2V FAULT 2.6mA Figure 3. Details of the Soft-Start and Overload Hiccup Control Circuit ã 2005 Semtech Corp. 5 www.semtech.com SC2440 POWER MANAGEMENT Typical Characteristics Frequency Setting Resistor Feedback Voltage vs Temperature Channel Frequency vs Temperature vs Channel Frequency 1000 1.02 1.6 V = 5V IN R =12.1KW OSC 1.01 1.5 V = 5V IN 100 1.00 1.4 0.99 10 1.3 0.98 1 0.97 1.2 0 0.5 1 1.5 2 2.5 3 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 Frequency (MHz) Temperature (°C) Temperature (°C) Boost Pin Current Switch Saturation Voltage V Start Threshold vs Temperature IN vs Switch Current vs Switch Current 2.8 400 80 V = 5V IN 125°C V = 8V BST 2.7 60 -40°C 300 -40°C 2.6 40 125°C 200 2.5 20 25°C 2.4 100 0 0.0 0.5 1.0 1.5 2.0 2.5 -50 -25 0 25 50 75 100 125 0.0 0.5 1.0 1.5 2.0 2.5 Temperature (°C) Switch Current (A) Switch Current (A) SS Shutdown Threshold Switch Current Limit SYNC Input Logic Thresholds vs Temperature vs Temperature vs Temperature 3.0 0.40 1.8 V = V SS1 SS2 2.8 0.35 1.6 2.6 V IH 0.30 1.4 2.4 V IL 0.25 1.2 2.2 2.0 1.0 0.20 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 Temperature (°C) Temperature (°C) Temperature (°C) ã 2005 Semtech Corp. 6 www.semtech.com V (V) FB V Threshold (V) Current Limit (A) IN SYNC Thresholds (V) ROSC (KW ) V (mV) W CESAT SS Threshold (V) Frequency (MHz) Boost Pin Current (mA) SC2440 POWER MANAGEMENT Typical Characteristics Soft-Start Pin Current V Shutdown Current vs V V Quiescent Current vs V IN IN IN IN vs Soft-Start Voltage 150 4 0 25°C T = 25°C -20 125 V =5V IN 3 105°C -40 100 105°C -40°C I of the SS Swept Channel 75 2 -60 -40°C 50 -80 1 I of the Other SS -100 25 Channel (V = 0) SS1 = SS2 = 0 SS 0 -120 0 0 5 10 15 20 0 5 10 15 20 0.0 0.5 1.0 1.5 2.0 V (V) SS V (V) V (V) IN IN V Supply Current FB Overload Threshold PGOOD Threshold to Feedback IN vs Soft-Start Voltage vs Temperature Difference Voltage vs Temperature 4 1.0 -90 T = 25°C A 0.9 -92 3 0.8 -94 2 V = 5V IN 0.7 -96 V = V SS1 SS2 1 V = 0 COMP1 0.6 -98 V = 0 COMP2 0 0.5 -100 0.0 0.5 1.0 1.5 2.0 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 V (V) SS Temperature (°C) Temperature (°C) ã 2005 Semtech Corp. 7 www.semtech.com V Current (mA) IN m I (mA) IN FB Threshold (V) VIN Current (mA) Voltage (mV) I ( A) SS m m SC2440 POWER MANAGEMENT Operation soft-start and overload shutoff times of the regulator (Figure The SC2440 is a 2-channel constant-frequency peak 3). The SS pin can also be used to shut off the corresponding current-mode step-down switching regulator with integrated 2A power transistors. Both regulators of the regulator. When either SS pin is pulled below 0.8V, that SC2440 operate from a common input power supply and regulator is turned off. If both SS pins are pulled below share the same voltage reference, the master oscillator 0.2V, then the SC2440 undergoes overall shutdown. The current draw from the input power supply reduces to 38µA. and the synchronizing circuit. Turn-on of the power When either SS pin is released, the corresponding soft- transistors are phase-shifted by 180°. The two regulators start capacitor is charged with a 2µA current source (not are otherwise completely identical, independent and are shown in Figure 3). As either SS voltage exceeds 0.3V, the capable of producing two separate outputs from the internal bias circuit of the SC2440 is enabled. The SC2440 same input. draws 3.3mA from V . An internal fast charge circuit IN quickly charges the soft-start capacitor to 1V. At this The master oscillator of the SC2440 runs at twice the juncture, the fast charge circuit turns off and the 1.8µA channel frequency. The free-running frequency of the current source slowly charges the soft-start capacitor. The master oscillator can be programmed with an external output of the error amplifier is forced to track the slow resistor from the ROSC pin to ground. Frequency soft-start ramp at the SS pin. When the COMP voltage adjustability makes switching regulator design flexible. exceeds 1.1V, the switching regulator starts to switch. During soft-start, the current limit of the converter is Peak current-mode control is utilized for the SC2440. gradually increased until the converter output comes into The double reactive poles of the output LC filter are regulation. reduced to a single real pole by the inner current loop, easing loop compensation. Fast transient response can Hiccup overload protection is utilized in the SC2440. be achieved with a simple Type-2 compensation network. Overload shutdown is disabled during soft-start (V < Switch collector current is sensed with an integrated 7.7mW SS 2V). In Figure 3 the reset input of the overload latch will sense resistor. The sensed current is summed with slope- remain high if the SS voltage is below 2V. Once the soft- compensating ramp before it is compared with the start capacitor is charged above 2V, the overload transconductance error amplifier output. The PWM shutdown latch is enabled. As the load draws more current comparator tripping instant determines the switch turn- from the regulator, the current-limit comparator will limit on pulse width (Figure 2). The current-limit comparator the peak inductor current. This is cycle-by-cycle current ILIM turns off the power switch when the sensed-signal limiting. Further increase in load current will cause the exceeds the 20mV current-limit threshold. ILIM therefore output voltage to decrease. If the output voltage falls provides cycle-by-cycle limit. Current-limit does not vary below 74% of its set point, then the overload latch will be with duty-cycle. set and the soft-start capacitor will be discharged with a net current of 0.8µA. The switching regulator is shut off Driving the base of the power transistor above the input until the soft-start capacitor is discharged below 1V. At power supply rail minimizes the power transistor turn-on this moment, the overload latch is reset. The soft-start voltage and maximizes efficiency. An external charge capacitor is recharged and the converter again undergoes pump (formed by the capacitor C and the diode D in 2 3 soft-start. The regulator will go through soft-start, overload Figure 1) generates a voltage higher than the input rail shutdown and restart until it is no longer overloaded. at the BOOST pin. The bootstrapped voltage generated becomes the supply voltage for the power transistor Each regulator of the SC2440 has its own power good driver. comparator. The open collector output of the power good comparator will be actively pulled low if the corresponding The SS pin is a multiple-function pin. An external capacitor feedback voltage is below 0.9V. connected from the SS pin to the ground together with the internal 1.8µA and 2.6µA current sources set the ã 2005 Semtech Corp. 8 www.semtech.com SC2440 POWER MANAGEMENT Applications Information Choosing the Operating Frequency Setting the Output Voltage The regulator output voltage is set with an external The free-running frequency of the master master master oscillator is master master resistive divider (Figure 4) with its center tap tied to the set with an external resistor from the ROSC pin to ground. FB pin. Channel frequency is one-half of that of the master VOUT oscillator. A graph of channel channel channel freq channel channel uency against R is OSC shown in the “Typical Performance Characteristics”. SC2440 R1 Before choosing the operating frequency, tradeoffs 15nA among efficiency, operating duty cycle, component size FB and EMI interferences must be considered. High frequency operation reduces the size of passive R2 components but switching losses are higher. Lowering the switching frequency improves efficiency. However the required inductor and capacitor are larger. Channel Figure 4. V is set with a Resistive Divider frequencies between 1 and 2MHz are good compromises. OUT In order to quantify the tradeoff between switching R = R (V −1) (1) 1 2 OUT frequency and efficiency, the 12V to 5V DC-DC converter in Figure 1 is modified to run at 500KHz and 2.5MHz The percentage error due the input bias current of the while keeping the inductor ripple current constant. The error amplifier is modified component values are tabulated in Table 1 and −15nA ⋅100 ⋅(R⎪⎢R ) ∆V 1 2 OUT efficiencies at these frequencies are shown in Figure 5. = . V 1V The efficiency of the 1.3MHz 5V regulator in Figure 1 is OUT also plotted for the ease of comparison. The efficiency Example: Determine the output voltage error of a at 500KHz is only marginally higher than that at 1.3MHz. V = 5V converter with R = 51.1KΩ . OUT 2 The peak efficiency at 2.5MHz is only 2% lower compared to those at lower frequencies. From (1), R = 51.1KΩ ⋅(5 −1) = 205KΩ 1 ∆V −15nA ⋅100 ⋅(51.1K⎪⎢205K) Efficiency vs Load Current OUT = = −0.061% . 90 V 1V OUT 500KHz This error is at least an order of magnitude lower than the ratio tolerance resulting from the use of 1% resistors 85 1.3MHz 2.5MHz in the divider string. 80 f(R MHz) (KΩ)L (µHR ) (KΩ)C(C pF) (pF) 9 2 7 8 9 V =12V IN 06 .55) 3.14 0 (Coiltronics DR73-10010 2. 42 7 2 V =5V OUT 10 .31) 5.43 .44 (Falco D04012 20 4. 20 2 1 75 22 .54) .024 .7 (Sumida CR43-2R730 2. 20 2 1 0.0 0.5 1.0 1.5 2.0 Load Current (A) Table 1. Figure 5. Efficiencies of 500KHz, 1.3MHz and 2.5MHz The 12V to 5V Converter in Figure 1 is modified 12V to 5V Step-down Converters. to run at Different Frequencies. © 2005 Semtech Corp. 9 www.semtech.com Efficiency (%) SC2440 POWER MANAGEMENT Applications Information 3.3 + 0.45 D = = 0.28 Minimum On Time Consideration 2 13.2 + 0.45 - 0.25 The operating duty cycle of a step-down switching regulator with diode rectifier in continuous-conduction Minimum On Time vs Temperature 130 mode (CCM) is given by 120 V + V OUT D D = (2) V + V - V 110 IN D CESAT 100 where V is the switch saturation voltage and V is CESAT D voltage drop across the rectifying diode. 90 V IN Duty cycle decreases with increasing ratio. In peak 80 V OUT -40 -20 0 20 40 60 80 100 current-mode control, the PWM modulating ramp is the Temperature (°C) sensed current ramp of the power switch. This current ramp is absent unless the switch is turned on. The Figure 6. Variation of Minimum On Time with intersection of this ramp with the output of the voltage Temperature. feedback error amplifier determines the switch pulse width. The propagation delay time required to immediately turn off the switch after it is turned on is If the ambient temperature can be as high as 85°C, then the minimum switch on time (T ). Closed-loop ON (MIN) the maximum operating frequencies of the 1.0V and the V OUT D 1 measurement of the SC2440 with low ratios shows 3.3V converters will be = 920KHz and V IN 120ns that the minimum on time is about 105ns at room D 2 respectively. . = 2.3MHz temperature. T also exhibits a slight positive ON (MIN) 120ns temperature coefficient (Figure 6). The power switch in the SC2440 is either not turned on at all or for at least Channel frequency should be set below 920KHz to allow D margin for load transient. T . If the required switch on time (= ) is shorter ON (MIN) f than the minimum on time, the regulator will either skip Minimum Off Time Limitation cycles or it will jitter. The PWM latch in Figure 2 is reset every period by the Example: Determine the maximum operating frequency clock. The clock also turns off the power transistor to of a dual 12V to 1.0V and 12V to 3.3V switching refresh the bootstrap capacitor. This minimum off time regulator using the SC2440. limits the attainable duty cycle of the regulator at a given switching frequency. Measurement shows that the power Assuming that V = 0.45V, V = 0.25V and V = 13.2V D CESAT IN transistor needs to be turned off for at least 120ns every (10% high line), the corresponding duty ratios, D and 1 switching period to properly reset the latch and to refresh D , of the 1.0V and 3.3V converters can be calculated 2 the bootstrap capacitor. For a step-down converter, D using (2). V OUT 1 + 0.45 increases with increasing ratio. If the required duty D = = 0.11 1 V IN 13.2 + 0.45 - 0.25 cycle is higher than the attainable maximum, then the ã 2005 Semtech Corp. 10 www.semtech.com T (ns) ON(MIN) SC2440 POWER MANAGEMENT Applications Information output voltage will not be able to reach its set value in the set frequency of master oscillator because the amplitudes of the internal sawtooth ramp and slope continuous-conduction mode. compensation ramp will both be significantly reduced. Example: Determine the maximum operating frequency Example: Choose the value of R to externally OSC of a dual 3.3V to 1.8V and 3.3V to 2.5V switching synchronize the SC2440 to 2MHz per channel channel. regulator using the SC2440. The required synchronizing clock frequency = 2 times Assuming that V = 0.45V, V = 0.25V and V = 2.97V D CESAT IN the channel frequency = 4MHz. (10% low line), the duty ratios and of the 1.8V D D 1 2 For a given R , the free-running channel channel frequency and 2.5V converters can be calculated using (2). OSC has a tolerance of ±15%. 1.8 + 0.45 D = = 0.71 Set the nominal free-running channel channel frequency to 1 2.97 + 0.45 - 0.25 2MHz = 1.73MHz to ensure locking. 1.15 2.5 + 0.45 D = = 0.93 . 2 2.97 + 0.45 - 0.25 Looking up the graph “Channel Frequency vs. R ” in OSC the Typical Characteristics, R = 9.31KW for a set OSC The maximum operating frequencies of the 1.8V and the frequency of 1.73MHz. 1 - D 1 2.5V converters are therefore = 2.4MHz and With ±15% tolerance, the set channel frequency can vary 120ns from ( ) to ( ) . 0.85 × 1.73 = 1.47MHz 1.15 × 1.73 = 2MHz 1 - D 2 respectively. . = 580KHz Therefore 120ns Transient headroom requires that channel frequency be Synchronizing Frequency 2 = = 1.36 . Lowest Free -running Frequency 1.47 lower than 580KHz. External Synchronization Inductor Selection The SYNC input buffer is positive-edge triggered and TTL- The inductor ripple current DI for a non-synchronous L step-down converter in continuous-conduction mode is compatible ( V < 0.8V and V > 2V ). The free-running IL IH master oscillator generates a periodic sawtooth ramp between two threshold voltages. A faster external clock (V + V )(1 - D) (V + V )(V - V - V ) OUT D OUT D IN OUT CESAT DI = = L applied to the SYNC pin discharges the internal ramp fL (V + V - V )fL IN D CESAT before it reaches its upper threshold, thus locking the (3) internal oscillator. As shown in Figure 2, the master oscillator is being synchronized not the individual phases where f is the switching frequency and L is the (see Figure 2). The synchronizing frequency should be inductance. twice twice the desired channel channel frequency. Bench test shows that an external clock with frequency ranging from slightly In current-mode control, the slope of the modulating below twice to at least 3.5 times the channel channel free- (sensed switch current) ramp should be steep enough running frequency is capable of locking the master to lessen jittery tendency but not so steep that large oscillator. To ensure frequency locking, the external clock flux swing decreases efficiency. Inductor ripple current frequency should be at least twice twice the highest highest free- DI between 25-40% of the peak inductor current limit is L running channel channel frequency. The frequency of the a good compromise. Inductors so chosen are optimized synchronizing clock should not be higher than 1.6 times ã 2005 Semtech Corp. 11 www.semtech.com SC2440 POWER MANAGEMENT Applications Information 2 in size and DCR. Setting DI = 0.3(2) = 0.6A , I × (ESR) L Power dissipated in the input capacitor is . RMS (CIN) V = 0.45V V = 0.25V and in (3), D CESAT I 1 OUT D = Equation (6) has a maximum value of ( at ), (V + 0.45)(V - V - 0.25) OUT In OUT 2 2 L = (4) (V + 0.2)(0.6)f corresponding to the worst-case power dissipation IN 2 I ×ESR where L is in mH and f is in MHz. OUT in C . IN 4 Equation (3) shows that for a given V , DI increases OUT L A dual-channel step-down converter with interleaved as D decreases. If V varies over a wide range, then IN switching reduces the RMS ripple current in the input choose L based on the nominal input voltage. Always capacitor to a fraction of that of a single-phase buck verify converter operation at the input voltage extremes. converter. If both power transistors in the SC2440 were to switch on in phase, the current drawn by the SC2440 The peak current limits of both SC2440 power transistors would consist of current pulses with amplitude equal to are internally set at 2.6A. The peak current limits are the sum of the channel output currents. If each channel duty-cycle invariant and are guaranteed higher than 2A. were delivering I and operating at 50% duty cycle, then OUT the input current would switch from zero to 2I . The The maximum load current is therefore conservatively OUT RMS ripple current in the input capacitor would then be DI DI 2 L L I = I - = 2A - I . Power dissipated in C would be I ×ESR, 4 times (5) OUT(MAX) LM OUT IN OUT 2 2 that of a single-channel converter. The SC2440 produces the highest RMS ripple current in C when only one IN If DI = 0.3×I , then L LM channel is running and delivering the maximum output DI 0.3I L LM current ( » 1.5 - 2A ). The input capacitor therefore should I = I - = I - = 0.85×I . OUT(MAX) LM LM LM 2 2 have a RMS ripple current rating of at least 1A. The saturation current of the inductor should be 20-30% Multi-layer ceramic capacitors, which have very low ESR higher than the peak current limit (2A). Low-cost powder (a few mW) and can easily handle high RMS ripple current, iron cores are not suitable for high-frequency switching are the ideal choice for input filtering. A single 4.7mF or power supplies due to their high core losses. Inductors 10mF X5R ceramic capacitor is adequate. For high voltage with ferrite cores should be used. applications, a small ceramic (1mF or 2.2mF) can be placed in parallel with a low ESR electrolytic capacitor to satisfy Input Capacitor both the ESR and bulk capacitance requirements. A buck converter draws pulse current with peak-to-peak Output Capacitor amplitude equal to its output current I from its input OUT supply. An input capacitor placed between the supply The output ripple voltage DV of a buck converter can and the buck converter filters the AC current and keeps OUT be expressed as the current drawn from the supply to a DC constant. The input capacitance C should be high enough to filter the IN æ ö 1 ç ÷ pulse input current. Its equivalent series resistance (ESR) DV = DI ESR + OUT L (7) ç ÷ 8fC OUT è ø should be low so that power dissipated in the capacitor does not result in significant temperature rise and degrade reliability. For a single channel buck converter, where C is the output capacitance. OUT the RMS ripple current in the input capacitor is Inductor ripple current DI increases as D decreases L (Equation (3)). The output ripple voltage is therefore the I = I D(1 -D) . (6) RMS OUT (CIN) highest when V is at its maximum. The first term in (7) IN ã 2005 Semtech Corp. 12 www.semtech.com SC2440 POWER MANAGEMENT Applications Information results from the ESR of the output capacitor while the higher in voltage than V . The required driver supply IN second term is due to the charging and discharging of voltage (at least 2.5V higher than the SW voltage over C by the inductor ripple current. Substituting DI = 0.6A, OUT L the industrial temperature range) is generated with a f = 1MHz and C = 10mF ceramic with ESR = 3mW in OUT bootstrap circuit (the diode D and the capacitor C in BST BST (7), Figure 8). The bootstrapped output (the common node DV = 0.6A ×(3mW + 12.5mW) OUT between D and C ) is connected to the BOOST pin of BST BST = 1.8mV + 7.5mV = 9.3mV the SC2440. The power transistor in the SC2440 is first switched on to build up current in the inductor. When Depending on operating frequency and the type of the transistor is switched off, the inductor current pulls capacitor, ripple voltage resulting from charging and the SW node low, allowing C to be charged through BST discharging of C may be higer than that due to ESR. A OUT 10mF or 22mF X5R ceramic capacitor is found adequate D . When the power switch is again turned on, the SW BST for output filtering in most applications. Ripple current voltage goes high. This brings the BOOST voltage to in the output capacitor is not a concern because the V + V , thus back-biasing D . C voltage increases SW C BST BST BST inductor current of a buck converter directly feeds C , OUT with each subsequent switching cycle, as does the resulting in very low ripple current. Avoid using Z5U and bootstrapped voltage at the BOOST pin. After a number Y5V ceramic capacitors for output filtering because these of switching cycles, C will be fully charged to a voltage types of capacitors have high temperature and high BST voltage coefficients. approximately equal to that applied to the anode of D . BST Figure 7 shows the typical minimum BOOST to SW voltage Freewheeling Diode required to fully saturate the power transistor. This = V differential voltage ( ) must be at least 1.8V at C BST Use of Schottky barrier diodes as freewheeling rectifiers room temperature. This is also specified in the “Electrical reduces diode reverse recovery input current spikes, Characteristics” as “Minimum Bootstrap Voltage”. The easing high-side current sensing in the SC2440. These minimum required V increases as temperature C BST diodes should have a RMS current rating between 1A decreases. The bootstrap circuit reaches equilibrium and 2A and a reverse blocking voltage of at least 5V when the base charge drawn from C during transistor BST higher than the input voltage. For switching regulators on time is equal to the charge replenished during the off operating at low duty cycles (i.e. low output voltage to interval. input voltage conversion ratios), it is beneficial to use freewheeling diodes with somewhat higher RMS current Minimum Bootstrap Voltage ratings (thus lower forward voltages). This is because the vs Temperature 2.4 diode conduction interval is much longer than that of the transistor. Converter efficiency will be improved if 2.2 the voltage drop across the diode is lower. 2.0 The freewheeling diodes should be placed close to the SW pins of the SC2440 to minimize ringing due to trace 1.8 inductance. Surface-mount equivalents of 1N5817 and 1N5819, MBRM120LT3 (ON Semi), UPS120 and 1.6 UPS140 (Micro-Semi) are all suitable. 1.4 Bootstrapping the Power Transistors -50 -25 0 25 50 75 100 Temperature (°C) To maximize efficiency, the turn-on voltage across the internal power NPN transistors should be minimized. If Figure 7. Typical Minimum Bootstrap Voltage Re- these transistors are to be driven into saturation, then quired to Maintain Saturation at I = 2A. SW their bases will have to be driven from a power supply ã 2005 Semtech Corp. 13 www.semtech.com Voltage (V) SC2440 POWER MANAGEMENT Applications Information MAX V = V + V DBST DBST MAX V = 2V BST IN OUT BST IN BOOST BOOST CBST CBST VIN VOUT VIN VOUT SW IN SW IN SC2440 SC2440 D D RECT RECT GND GND (a) (b) DBST MAX V = V + V DBST MAX V = V VS > 2.5V BST IN S VS > VIN + 2.5V BST S BOOST BOOST CBST VIN VOUT VIN VOUT IN SW IN SW SC2440 SC2440 D D RECT RECT GND GND (c) (d) Figure 8.Methods of Bootstrapping the SC2440. higher than the minimum shown in Figure 7 to maximize I I SW SW = » The switch base current , where I and b efficiency. D can be tied either to the input or to the SW BST â + 1 â output of the DC/DC converter. are the switch emitter current and current gain respectively, is drawn from the bootstrap capacitor C . BST If D is tied to the input, then the charge drawn from BST I T SW ON I T SW ON Charge is drawn from C during the switch on BST the input power supply will be (the base charge â b I T of the switch). The energy loss due to base charge per SW ON time, resulting in a voltage droop of . If I = 2A, SW âC BST I V T DI V I V SW IN ON SW IN SW OUT » cycle is for a power loss of . b b b V T = 1ms, b = 35 and C = 0.1mF, then the droop C BST ON BST V - V + V will be 0.57V. C is refreshed to every y A D D BST BST RECT If D is tied to the output, then the charge drawn from BST cycle, where V is the applied D anode voltage. Switch A BST I T SW ON the output capacitor will still be . The energy loss base current discharges the bootstrap capacitor to b I T SW ON V - V + V - at the end of conduction. The A D D I V T BST RECT SW OUT ON bC BST due to base charge per cycle is for a power b difference between this voltage and that at SW must be ã 2005 Semtech Corp. 14 www.semtech.com SC2440 POWER MANAGEMENT Applications Information BOOST pin can be somewhat higher than 2V . The BOOST DI V IN SW OUT loss of . pin voltage should not exceed its absolute maximum b rating of 40V. Since V < V , D should always be tied to V (if OUT IN BST OUT Figures 8(c) and (d) show how to bootstrap the SC2440 >2.5V) to maximize efficiency. Measurement of the 2- from a second independent power supply V with voltage S channel regulator in Figure 1 shows that the efficiency > 2.5V. D in Figure 8(d) prevents start up difficulty if BST penalties are about 1.3% (V = 5V) and 2.2% (V = OUT OUT V comes up before V . IN S 3.3V) with input bootstrapping. In general efficiency penalty increases as D decreases. Since the inductor current charges C , the bootstrap BST circuit requires some minimum load current to get going. Figure 8 summarizes various ways of bootstrapping the Figures 9(a) and 9(b) show the dependence of the SC2440. A fast switching PN diode (such as 1N4148 or minimum input voltage required to properly bootstrap a 1N914) and a small (0.1µF – 0.47µF) ceramic capacitor 5V and a 3.3V converters on the load current. Once can be used. In Figure 8(a) the power switch is started the bootstrap circuit is able to sustain itself down bootstrapped from the output. This is the most efficient configuration and it also results in the least voltage stress to zero load. at the BOOST pin. The maximum BOOST pin voltage is about V +V . If the output is below 2.8V, then D IN OUT BST T Shutdown and Soft-Start will preferably be a small Schottky diode (such as BAT- 54) to maximize bootstrap voltage. A 0.33-0.47µF Each regulating channel of the SC2440 has its own soft- bootstrap capacitor may be needed to reduce droop. start circuit. Pulling its soft-start pin below 0.8V with an Bench measurement shows that using Schottky open-collector NPN or an open-drain NMOS transistor bootstrapping diode has no noticeable efficiency benefit. turns off the corresponding regulator. The other regulator continues to operate. With one channel turned off, the The SC2440 can also be bootstrapped from the input internal bias circuit is kept alive. In the “Typical (Figure 8(b)). This configuration is not as efficient as Figure Characteristics”, the soft-start pin current is plotted 8(a). However this may be only option if the output against the soft-start voltage with V = 5V. When one of IN voltage is less than 2.5V and there is no other supply with voltage higher than 2.5V. Voltage stress at the Minimum Starting and Minimum Starting and Sustaining V vs Load Current Sustaining V vs Load Current IN IN 7.5 5.5 D TIED V = 5V BST OUT V = 3.3V OUT D TIED TO OUTPUT BST MA729 MA729 7.0 TO OUTPUT 5.0 6.5 STARTING STARTING 6.0 4.5 D TIED BST TO INPUT 5.5 4.0 5.0 D TIED SUSTAINING BST TO INPUT SUSTAINING 4.5 3.5 1 10 100 1000 0.1 1.0 10.0 100.0 1000.0 Load Current (mA) Load Current (mA) (a) (b) Figure 9. Minimum Input Voltage Required to Start and to Maintain Bootstrap.(T = 25°C). A ã 2005 Semtech Corp. 15 www.semtech.com Minimum Input Voltage (V) Minimum Input Voltage (V) SC2440 POWER MANAGEMENT Applications Information the soft-start pins is pulled low, 105µA flows out of that disabled. A 1.8µA current source continues to charge pin. Pulling both soft-start pins below 0.2V shuts off the the soft-start capacitor (Figure 3). The soft-start voltage ramp at the SS pin clamps the error amplifier output internal bias circuit of the SC2440. The total V current IN (Figure 2). During regulator start-up, COMP voltage follows decreases to 38µA. In shutdown either SS pin sources the SS voltage. The converter starts to switch when its only 2µA. A fast charging circuit (enabled by the internal COMP voltage exceeds 1.1V. The peak inductor current bias circuit), which charges the soft-start capacitor below gradually increases until the converter output comes into 1V, causes the difference in the soft-start pin currents. regulation. Proper soft-start prevents output overshoot during start-up. Current drawn from the input supply is also well controlled. Notice that the inductor current, not If either SS pin is released in shutdown, the internal the converter output voltage, is ramped during soft-start. current source pulls up on the SS pin. When this SS voltage reaches 0.3V, the SC2440 turns on and the V IN Both soft-start capacitors are charged to a final voltage quiescent current increases to 3.3mA. The current flowing out of the other SS pin (which is still pulled low) of about 2.4V. increases to 105µA. The fast charging circuit quickly pulls the released soft-start capacitor to 1V (slightly below the switching threshold). The fast charging circuit is then 2.4V 2V V SS Hiccup Enabled 1V 0.3V Fast 0 V Charge FB 1V 1V 0.74V Switc hing Starts Output must be at Figure 10(a).Normal Soft-start. 0 least 74% of its set voltage in this interval or the regulator will undergo shutdown and restart (hiccup). 2V V SS V COMP 1V 0.3V 0 Switc hing Not Switchi ng Switc hing Not Switchi ng 1V 0.74V V FB 0 Figure 10(b). Start-up Fails due to (i) Short Soft-start Duration or (ii) Output Overload or (iii) Output Short-circuited. ã 2005 Semtech Corp. 16 www.semtech.com SC2440 POWER MANAGEMENT Applications Information Overload / Short-Circuit Protection When starting into a shorted output, the SC2440 will repeatedly start and shut off (“hiccup”). V and V SS COMP Each current limit comparator in the SC2440 limits the will appear as asymmetrical triangular waves [Figure peak inductor current to 2.6A. The regulator output 10(b)]. voltage will fall if the load is increased above the current limit. If overload is detected (the output voltage falls Power Good Indicators below 74% of the set voltage), then the regulator will be shut off. An internal 0.8µA current sink starts to The PGOOD pins (Pins 11 and 14) are the open-collector discharge the soft-start capacitor. As the soft-start outputs of the power good comparators. These slow capacitor is discharged below 1V, the discharge current comparators are incorporated with small amount of source turns off and the soft-start capacitor is recharged hysteresis. The FB low-to-high trip voltage of the power with a 1.8µA current source. The regulator undergoes good comparators is 90% of the final regulation voltage. soft-start. During soft-start (1V < V < 2V), the overload SS A pull-up resistor from each PGOOD pin to the input supply shutdown latch in Figure 3 cannot be set. When V SS or the regulator output set the logic high level of the exceeds 2V, the set input of the overload latch is no comparator. longer blanked. If V is still below 0.74V, then the FB regulator will undergo shutdown and restart. The soft- The power good comparator output becomes valid start process should allow the output voltage to reach provided that V is above 0.9V. In shutdown the power IN 74% of its final value before C is charged above 2V. SS good output is actively pulled low. A power good pull-up Figures 10(a) and 10(b) show the timing diagrams of resistor tied to the input will therefore increase current successful and failed start-up waveforms respectively. drain during shutdown. Tying the power good pull-up The soft-start interval should also be made sufficiently resistor to the regulator output is preferred, as this will long so that the output voltage rises monotonically and minimize the shutdown supply current. In shutdown there it does not overshoot its final voltage by more than 5%. SS1 PGOOD1 SS1 CONTROL1 CSS1 SC2440 SC2440 OFF ON CSS1 PGOOD1 SS2 PGOOD2 SS2 PGOOD2 CSS2 CONTROL2 CSS2 CONTROL1 OFF ON CONTROL2 OFF ON T D (a) (b) Figure 11. Sequencing the Outputs by (a) Delaying Release of one Channel Relative to the Other and (b) Using the PGOOD of one Channel to Control the Other. ã 2005 Semtech Corp. 17 www.semtech.com SC2440 POWER MANAGEMENT Applications Information current-mode PWM comparator, the power switch, the is no voltage at the switching regulator output or current freewheeling diode and the inductor, feeds the output in the PGOOD pull-up resistor. If the PGOOD output high level (= V ) is unacceptably low, then power good pull- network. The power stage can be modeled as a voltage- OUT up from the input or a separate power supply will be the controlled current source, producing an output current only choice. proportional to its controlling input V . Its COMP -1 transconductance G is 5.7W . With the current loop MP v Sequencing the Outputs OUT closed, the control-to-output transfer function has v COMP As mentioned above, pulling either soft-start pin low with a dominant-pole p located at a frequency slightly higher 2 an external transistor shuts off the corresponding than that of the output filter pole. regulator (Figure 11). Releasing the soft-start pin enables that channel and allows it to start. Delaying the release nI n OUT of the soft-start pin of one channel with respect to the w » - = - p2 (8) V C R C other is a straightforward way of sequencing the outputs. OUT 1 OUT 1 Figure 11(a) shows this method using two external transistors M and M . M is turned off first, allowing 1 2 1 where C is the output capacitor, R is the equivalent 1 OUT channel 1 to start. Channel 2 is then enabled after time load resistance and n (depending on duty ratio, slope T . D compensation, frequency and passive components) is usually between 1 and 2. The PGOOD output of one channel can also be used in conjunction with the soft-start pin of the other channel If C is ceramic, then its ESR zero can be neglected as it 1 to delay start of that regulator. This method is depicted situates well beyond half the switching frequency. The in Figure 11(b). SS2 is pulled low and channel 2 is kept low frequency gain of the control-to-output transfer off until channel 1 output rises to 90% of its set voltage. function is simply the product of power stage A drawback of this approach is that only PGOOD2 is transconductance and the equivalent load resistance available as a logic output. (Figure 13). Loop Compensation The transfer functions of the feedback network and the error amplifier are: Figure 12 shows a simplified equivalent circuit of a step- down converter. The power stage, which consists of the I OUT POWER V IN STAGE V -1 OUT GMP = 5.7W ESR R C11 R1 OUT C1 FB V - COMP GMA = -1 280mW + R5 1V C6 RO R2 VOLTAGE C5 REFERENCE Figure 12. Simplified Control Loop Equivalent Circuit ã 2005 Semtech Corp. 18 www.semtech.com SC2440 POWER MANAGEMENT Applications Information forms a high frequency pole p with R . Using the 3 5 component values shown in Figure 1 for the 12V to 3.3V é ù æ ö v R 1 + sC R FB 2 11 1 regulator (1.3MHz), ç ÷ = ê ú (9) ç ÷ v R + R 1 + s(R ïêR )C OUT è 1 2 ø 1 2 11 ë û AmplifierOpenLoop Gain 53dB R = = = 1.6MW O -1 and Transconduc tance 280 mW v G R (1 + sC R ) COMP MA O 5 5 1 1 » (10) w = - = - v (1 + sC R )×(1 + sC R ) p1 FB 5 O 6 5 R C 1.6MW · 470pF O 5 -1 = -1.3Krads = -210Hz provided that C >> C and R >> R . 5 6 O 5 1 1 w = - = - p3 R C 15.4KW ·10pF In Equation (10), C forms a low frequency pole p with 5 6 5 1 -1 the output resistance R of the error amplifier and C O 6 = -6.5Mrads = -1.0MHz Gain T(jw) æ R ö 2 ç ÷ G R MA O ç ÷ R + R è 1 2 ø v COMP v æ R ö OUT 2 G R ç ÷ MA 5 ç ÷ R + R è 1 2 ø w C R C 1 OUT n G R MP OUT 1 1 n 1 R C R C R C R C O 5 5 5 OUT 1 5 6 w w w w w w w p1 Z1 p2 p3 C S 2 Control-to-Output Transfer Function Figure 13. Bode Plots of Control-to-Ouput, Output-to-Control and the Overall Loop Gain. Control-to-output transfer function is shown with two poles near half the switching frequency w . S ã 2005 Semtech Corp. 19 www.semtech.com SC2440 POWER MANAGEMENT Applications Information In addition C and R form a zero with angular frequency: the crossover frequency. However it reduces the phase 5 5 margin. An estimate of R and C can be obtained from 5 5 1 1 (11) and (12) with n=1. The compensation is then checked w = - = - Z1 by measuring the loop gain and the phase or by observing R C 15.4KW ×470pF 5 5 the inductor current and the output voltage during load -1 = -140 Krads = -22KHz transient. Choose the largest R and the smallest C to 5 5 give at least 45° of phase margin. The corresponding The output-to-control transfer function load transient should not show any ringing or excessive overshoot (see Figures 14(c), 14(d), 17(b) and 17(c)). C v v v 6 COMP COMP FB = × is also shown in Figure 13. Its mid- is a small ceramic capacitor (10-47pF) to roll off the loop v v v OUT FB OUT gain at high frequency. Feedforward capacitor C boosts 11 phase margin over a limited frequency range and is æ R ö 2 G R ç ÷ band gain (between z and p ) is . The MA 5 1 3 sometimes used to improve loop response. C will be ç ÷ 11 R + R è 1 2 ø more effective if R >> R ïêR . 1 1 2 overall loop gain T(s) is the product of the control-to- output and the output-to-control transfer functions. To Example: Determine the compensation components for T(jw) simplify Bode plot, the feedback network is the 1.3MHz 12V to 5V and 3.3V converter in Figure 1. assumed to be resistive. If the overall loop gain is to -1 For both channels, w = 8.2Mrads , I = 2A and S OUT (MAX) cross 0dB at one tenth of the switching frequency C = 10mF . n is assumed to be 1 in (11) and (12). w pf 1 S w = = ( ) at –20dB/decade, then its mid-band gain C 10 5 For the 3.3V output: (between z and p ) will be 1 2 6 -5 23.3K 8.2´10 ×10 æ ö R = 1 + ç ÷ 5 w -4 S 10K 10×(1)×(5.7)×(2.8 ´10 ) è ø w w C R c 10 S 1 OUT = = = 16.9KW n w 10n . p2 C R 1 OUT -5 10 × 3.3V C = = 1nF 5 æ ö R (1) ×16.9K × (2A) 2 ç ÷ G R G R This is also equal to . Therefore MP OUT MA 5 ç ÷ R + R è 1 2 ø For the 5V channel: æ ö R wC R 2 1 OUT 6 -5 G R G R ç ÷ = 40.2K 8.2´10 ×10 MP OUT MA 5 . æ ö ç ÷ R + R 10n R = 1 + ç ÷ è 1 2 ø 7 -4 è 10K ø 10 ×(1)×(5.7)×(2.8 ´10 ) = 25.5KW Re-arranging, æ R ö w C -5 1 S 1 10 ×5V R = ç1 + ÷ 5 (11) ç ÷ C = = 1nF R 10nG G 8 2 MP MA è ø (1)×25.5K ×(2A) w is shown to be less than w in Figure 13. Making z1 p2 w = w gives a first-order estimate of C : z1 p2 5 C and C (both 10pF) are then added to increase gain 6 9 margin. Load transient responses of both channels are C R 1 OUT(MIN) C = 5 (12) observed using these values. There is very little inductor nR 5 current overshoot even with C and C reduced to 470pF 5 8 and 220pF respectively (Figure 14). The measured overall Notice that R determines the mid-band loop gain of the 5 loop gain and phase plots of the converter are also converter. Increasing R increases the mid-band gain and 5 shown. ã 2005 Semtech Corp. 20 www.semtech.com SC2440 POWER MANAGEMENT Applications Information For jitter-free operation, the size of the loop formed by these components should be minimized. Since the power Board Layout Considerations switches are already integrated within the SC2440, connecting the anodes of both freewheeling diodes close In a step-down switching regulator, the input bypass to the negative terminal of the input bypass capacitor capacitor, the main power switch and the freewheeling minimizes size of the switched current loop. The input di bypass capacitors should also be placed close to the diode carry switched currents with high (Figure 15). dt V =12V, V =3.3V at 1.7A, V =12V, V =5V at 1.7A, IN OUT IN OUT C =220pF, R =24.3KW and C =10pF C =470pF, R =15.4KW and C =10pF 5 5 6 7 8 9 (a) (b) V =3.3V OUT V =5V OUT 40ms/div 40ms/div Upper Trace : OUT1 Voltage, AC Coupled, 0.5V/div Upper Trace : OUT2 Voltage, AC Coupled, 0.5V/div Lower Trace : L Inductor Current, 0.5A/div Lower Trace : L Inductor Current, 0.5A/div 1 2 (c) (d) Figure 14. Overall Loop Gain and Phase versus Frequency for (a) Channel 1 and (b) Channel 2 of the Dual DC-DC Converter in Figure 1. (c) Channel 1 Load Transient Response, I is switched between OUT1 0.3A and 1.7A. (d) Channel 2 Load Transient Response, I is switched between 0.45A and OUT2 1.7A. ã 2005 Semtech Corp. 21 www.semtech.com SC2440 POWER MANAGEMENT Applications Information input pins. Shortening the traces of the SW and BOOST nodes reduces the parasitic trace inductance at these nodes. This not only reduces EMI but also decreases switching voltage spikes at these nodes. V IN Figures 16(a) and 16(b) shows how various external components are placed around the SC2440. The frequency-setting resistor is placed next to the ROSC pin on the backside. The resistor is grounded to the ground V OUT plane, which is then tied to anodes of the freewheeling diodes with vias. These precautions reduce switching noise pickup at the ROSC pin. Z L To ensure proper adhesion to the ground plane, avoid using vias directly under the device. In figure 15 two 12mil vias are placed at the edge of the underside pad. Figure 15. Fast Switching Current Paths in a Buck Regulator. Minimize the size of this loop to reduce parasitic trace inductance. GND GND R7 R7 R5 R5 C5 C5 C8 C8 R6 R6 C7 C7 C10 C10 R8 R8 R1 R1 R2 R2 R4 R4 R3 R3 C9 C9 C6 C6 GND GND U1 U1 R9 R9 D3 D3 D4 D4 C2 C2 C4 C4 GND GND VIN VIN D1 D1 D2 D2 L1 L1 L2 L2 C15 C15 VOUT1 VOUT1 C1 C1 C3 C3 VOUT2 VOUT2 GND GND (a) (b) Figure 16. Suggested PCB Layout for the SC2440. Notice that there is no via directly under the device and that the only component on the backside is the frequency-setting resistor. All vias are 12mil in diameter. ã 2005 Semtech Corp. 22 www.semtech.com VIN or VOUT1 VIN or VOUT1 VIN or VOUT2 VIN or VOUT2 SC2440 POWER MANAGEMENT Typical Application Circuits R6 100K D3 Efficiency vs Load Current FB1 PGOOD1 BOOST1 95 C2 1N4148 C5 V = 5V IN R5 0.1mF V = 3.3V 90 OUT1 L1 COMP1 OUT1 15.4K SW1 390pF m 1.4 H R1 3.3V/2A 85 C7 VIN D1 23.2K SS1 5V SC2440 UPS120 80 C1 V = 1.8V OUT2 22nF C15 10mF SYNC R2 IN 10K 75 R9 ROSC 4.7mF C10 D2 70 15K D4 UPS120 1N4148 SS2 C9 L2 OUT2 65 22nF SW2 COMP2 1.8mH 1.8V/2A 60 C8 C4 22pF R7 R3 0.1mF 8.06K 55 13.4K 390pF FB2 BOOST2 C3 20mF 50 R8 R4 GND PGOOD2 10K 0 0.5 1 1.5 2 100K Load Current (A) L1 & L2: Sumi da CR43 Figure 17(a). 1.3MHz 5V to 3.3V and 1.8V Step-down Converter OUT1 OUT2 20ms/div 20ms/div Upper Trace : OUT1 Voltage, AC Coupled, 0.2V/div Upper Trace : OUT2 Voltage, AC Coupled, 0.2V/div Lower Trace : L Inductor Current, 0.5A/div Lower Trace : L Inductor Current, 0.5A/div 1 2 (b) (c) Figures 17(b) and 17(c). Load Transient Response. I is switched between 0.3A and 1.75A. OUT ã 2005 Semtech Corp. 23 www.semtech.com Efficiency (%) SC2440 POWER MANAGEMENT Typical Application Circuits D3 C5 FB1 R5 COMP1 BOOST1 14.7K 470pF C2 BAT-54 C6 0.1mF L1 OUT1 C7 10pF SW1 1.8 mH 2.5V/2A SS1 R1 VIN D1 30.1K 5V R10 22nF UPS120 PGOOD1 C1 30.1K C15 10mF R2 SYNC IN 20K R9 R11 4.7mF ROSC D2 4.02K C10 12. 1K D4 SC2440 UPS120 1N4148 SS2 L2 OUT2 C9 22nF SW2 COMP2 1mH 0.8V/2A C8 10pF C4 R7 0.1mF 11.8K 470pF FB2 C3 BOOST2 R3 m 8.06K 22 F R8 GND PGOOD2 100K L1 & L2: Sumi da CR43 Figure 18(a). Producing an Output Lower than FB Voltage. 1.5MHz 5V to 2.5V and 0.8V Step-down Converter R is a pre-load to shunt the current from R and R before PGOOD1 releases SS2. 3 10 11 Load Regulation 0.0 OUT1 CH1 CH4 -0.5 OUT2 CH3 -1.0 CH2 -1.5 -2.0 2ms/div 0.0 0.5 1.0 1.5 2.0 CH1 : OUT1 Voltage, 0.5V/div Load Current (A) CH2 : OUT2 Voltage, 1V/div CH3 : SS2 Voltage, 1V/div CH4 : PGOOD2, 1V/div Figure 18(b). V Start-up Transient (I = I = 1A). IN OUT1 OUT2 ã 2005 Semtech Corp. 24 www.semtech.com Percentage Deviation (%) SC2440 POWER MANAGEMENT Typical Application Circuits R6 100K D3 FB1 C5 PGOOD1 BOOST1 R5 C2 1N4148 22.1K C6 2.2nF 0.1mF L1 OUT1 COMP1 SW1 15m H 10pF C11 5V/2A R1 C7 VIN D1 33pF 205K UPS140 SS1 20V C15 C1 SC2440 33nF 10mF C12 R2 SYNC 47mF X 2 10pF IN 51.1K C16 R9 ROSC C10 51.1K D4 D2 1mF 1N4148 UPS140 SS2 L2 C9 OUT2 33nF SW2 COMP2 6.8mH 1.8V/2A C8 C13 10pF C4 R7 R3 68pF 0.1mF 40.2K C3 11.8K 4.7nF FB2 BOOST2 10mF X 2 R8 R4 GND PGOOD2 49.9K 100K C15 : 25V El ectrol ytic L1 : Coiltronic DR74 All Other Capacitor are C eramic. L2 : Coiltronic DR73 Figure 19(a). 540KHz 20V to 5V and 1.8V Step-down Converter. Notice that Channel 2 is Bootstrapped from OUT1. This Bootstrapping Scheme Requires OUT1 to be Present at All Times (i.e. No Hiccup or Shutdown). Channel 2 will still Run if OUT1 is Absent. However its Power Disspation will be High. V = 20V I = 1A IN OUT1 I = 1A OUT2 CH2 CH1 1ms/div 4ms/div CH1 : SW1 Voltage, 10V/div Upper Trace : V , 10V/div IN CH2 : SW2 Voltage, 10V/div Middle Trace : V , 2V/div OUT1 Lower Trace : V , 1V/div OUT2 Figure 19(c). V Start Up Transient. I = I = 1.5A. Figure 19(b). Switching Waveforms. IN OUT1 OUT2 ã 2005 Semtech Corp. 25 www.semtech.com SC2440 POWER MANAGEMENT Outline Drawing - TSSOP-16 w/EDP A D e N DIMENSIONS INCHES MILLIMETERS DIM 2X E/2 MIN NOM MAX MIN NOM MAX - - - - A .047 1.20 - - A1 .002 .006 0.05 0.15 E1 E - - A2 .031 .042 0.80 1.05 PIN 1 - - b .007 .012 0.19 0.30 INDICATOR c .003 - .007 0.09 - 0.20 D .193 .197 .201 4.90 5.00 5.10 E1 .169 .173 .177 4.30 4.40 4.50 ccc C 1 2 3 e/2 E .252 BSC 6.40 BSC 2X N/2 TIPS e .026 BSC 0.65 BSC B F .112 .118 .122 2.85 3.00 3.10 L .018 .024 .030 0.45 0.60 0.75 L1 (.039) (1.0) N 16 16 D - - aaa C 01 0° 8° 0° 8° aaa .004 0.10 A2 A bbb .004 0.10 SEATING ccc .008 0.20 PLANE C A1 bxN bbb C A-B D H c GAGE SEE DETAIL A PLANE SIDE VIEW F 0.25 L 01 (L1) EXPOSED PAD DETAIL A F BOTTOM VIEW NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS AND TO BE DETERMINED AT DATUM PLANE -A- -B- -H- 3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 4. REFERENCE JEDEC STD MO-153, VARIATION AB. Land Pattern - TSSOP-16 w/EDP X F DIMENSIONS DIM INCHES MILLIMETERS C (.222) (5.65) (C) F .126 3.20 F G Z G .161 4.10 P .026 0.65 X .016 0.40 Y Y .061 1.55 Z .283 7.20 P NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. Contact Information Semtech Corporation Power Management Products Division 200 Flynn Road, Camarillo, CA 93012-8790 Phone: (805)498-2111 FAX (805)498-3804 ã 2005 Semtech Corp. 26 www.semtech.com