SEMTECH SC1458

SC1458 Dual Output Low Noise LDO Linear Regulator POWER MANAGEMENT Features Description „ Input voltage range — 2.5 to 5.5V The SC1458 is a family of dual output, ultra-low dropout „ Output voltages — 2.8V and 1.8V (SC1458A), 2.85V linear voltage regulators designed for use in battery and 2.85V (SC1458B) powered wireless applications. Both versions of the „ Maximum output current — 300mA (each LDO) SC1458 require an input voltage level between 2.5V and „ Low 200mV maximum dropout at 200mA load 5.5V. The SC1458A supplies 2.5V on OUTA and 1.8V on „ Quiescent current — 100μA (both LDOs enabled) OUTB, while SC1458B supplies 2.85V on both outputs. „ Shutdown current — 100nA (For other voltage options see the SC560). „ Output noise < 50μV (SC1458B) RMS „ PSRR > 65dB at 1kHz (SC1458B) The SC1458A provides a PGOOD output to hold a processor „ Space saving package — MLPD-W6, 3mm x 3mm in reset when the voltage on OUTA is not in regulation. „ Over-temperature protection The SC1458B provides superior low-noise performance by „ Short-circuit protection using an external bypass capacitor to fi lter the bandgap „ Under-voltage lockout reference. Both versions have a single enable pin that „ Reset monitor for output A (SC1458A) controls both LDO outputs. The startup sequence delays the start of OUTB by 128μs after OUTA is enabled. Applications Each version also provides protection circuitry such as „ PDAs and cellular phones current limiting, under-voltage lockout, and thermal „ GPS devices protection to prevent device failures. Stability is „ Palmtop computers and handheld instruments maintained by using 1μF capacitors on the output pins. „ TFT/LCD applications The MLPD package and 0402 ceramic capacitors minimize „ Wireless handsets the required PCB area. „ Digital cordless phones and PCS phones „ Personal communicators „ Two-way pagers „ Wireless LAN Typical Application Circuit SC1458A VIN To μP VIN PGOOD OUTA OUTA From μP EN 2.5V, 300mA OUTB GND OUTB 1.8V, 300mA C C C IN OUTB OUTA 1μF 2.2μF 1μF September 12, 2007 1 SC1458 Pin Confi guration Ordering Information Device Package (1)(2) SC1458AWLTRT MLPD-W6 3x3 (1)(2) SC1458BWLTRT MLPD-W6 3x3 SC1458AEVB Evaluation Board 6 1 TOP SC1458BEVB Evaluation Board VIEW Notes: 2 5 (1) Available in tape and reel only. A reel contains 3,000 devices. (2) Available in lead-free package only. Device is WEEE and RoHS compliant. T 4 3 MLPD-W6; 3x3, 6 LEAD θ = 50°C/W JA Marking Information Voltage Options Device Marking ID V V LDOA LDOB SC1458A BROA 2.5V 1.8V SC1458B BROB 2.85V 2.85V BROn yyww xxxx BROn = See Voltage Options Table for Details yyww = Datecode xxxx = Semtech Lot Number 2 SC1458 Absolute Maximum Ratings Recommended Operating Conditions V (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.5 Ambient Temperature Range (°C) . . . . . . . . -40 < T < +85 IN A V (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (V + 0.3) VIN (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 < V < 5.5 EN IN IN V (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to (V + 0.3) PGOOD IN Pin Voltage — All Other Pins (V) . . . . . . . . . -0.3 to (V + 0.3) IN V , V , Short Circuit Duration . . . . . . . . . .Continuous OUTA OUTB Thermal Information (1) ESD Protection Level (kV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 (2) Thermal Resistance, Junction to Ambient (°C/W) . . . . 50 Maximum Junction Temperature (°C) . . . . . . . . . . . . . . +150 Storage Temperature Range (°C) . . . . . . . . . . . . -65 to +150 Peak IR Reflow Temperature (10s to 30s) (°C) . . . . . . . +260 Exceeding the above specifi cations may result in permanent damage to the device or device malfunction. Operation outside of the parameters specifi ed in the Electrical Characteristics section is not recommended. NOTES: (1) Tested according to JEDEC standard JESD22-A114-B. (2) Calculated from package in still air, mounted to 3” x 4.5”, 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards. Electrical Characteristics Unless otherwise noted V = 3.6V, C = 2.2μF, C = C = 1μF, V = V , T = -40 to +85°C. Typical values are at T = 25°C. All specifi cations IN IN OUTA OUTB EN IN A A apply to both LDOs unless otherwise noted. Parameter Symbol Conditions Min Typ Max Units Input Supply Voltage Range V 2.5 5.5 V IN Output Voltage Accuracy ΔV V = V + 0.3V to 5.5V, I = 0 to 300mA -3 3 % OUT IN OUT OUT Maximum Output Current I 300 mA MAX (1) Dropout Voltage V I = 200mA, V = 2.5V 100 200 mV D OUT OUT Shutdown Current I T = 25°C 0.1 1 μA SD A Quiescent Current I I = I = 0mA, T = 25°C 100 μA Q OUTA OUTB A Load Regulation V I = 1mA to I 20 mV LOAD OUT MAX Line Regulation V I = 1mA -6 6 mV LINE OUT Current Limit I 350 850 mA LIM V = 3.7V, I = 50mA , 10Hz < f < 100kHz, IN OUT 50 μV RMS C = 22nF (2) BYP Noise e N V = 3.7V, I = 50mA , 10Hz < f < 100kHz 300 μV IN OUT RMS 3 SC1458 Electrical Characteristics (continued) Parameter Symbol Conditions Min Typ Max Units V = 3.7V, I = 50mA, f = 1kHz, IN OUT 65 dB C = 22nF (2) BYP Power Supply Rejection Ratio PSRR V = 3.7V, I = 50mA, f = 1kHz 40 IN OUT (3) PGOOD Delay t 160 200 240 ms PGOOD (3) PGOOD Threshold V V falling 82 87 92 % TH(PGOOD) OUT(LDOA) From OFF to 87% V , I = 50mA, OUT OUT Start-Up Time t 1ms SU C = 22nF BYP Power Up Delay Between LDOA t Delay between 0.87V and V start-up 128 μs DELAY OUTA OUTB and LDOB Under Voltage Lockout V V Rising 2.15 2.25 2.35 V UVLO IN UVLO Hysteresis V 100 mV UVLO-HYS Over Temperature Protection T Rising threshold 160 °C OT Threshold Over Temperature T 20 °C OT-HYS Hysteresis Digital Inputs Logic Input High Threshold V V = 5.5V 1.25 V IH IN Logic Input Low Threshold V V = 2.5V 0.4 V IL IN Logic Input High Current I V = 5.5V 1 μA IH IN Logic Input Low Current I V = 5.5V 1 μA IL IN Digital Outputs PGOOD Output Voltage Low V I = 500μA, V = 3.7V 7 20 mV OL SINK IN Notes: (1) Dropout voltage is defi ned as V - V , when V is 100 mV below the value of V for V = V +0.5V. IN OUT OUT OUT IN OUT (2) SC1458B only (3) SC1458A only 4 SC1458 Typical Characteristics Load Regulation LDOA Load Regulation LDOB V = 2.85V, V = 3.6V OUTB IN V = 2.5V, V = 3.6V OUTA IN 4 4 3.5 3.5 3 3 T =85°C A T =85°C A 2.5 2.5 2 2 T =25°C A T =25°C A 1.5 1.5 T =-40°C A T =-40°C A 1 1 0.5 0.5 0 0 0 50 100 150 200 250 0 50 100 150 200 250 Output Current (mA) Output Current (mA) Line Regulation LDOA Line Regulation LDOB V = 2.5V, I = 1mA V = 2.85V, I = 1mA OUTA OUTA OUTB OUTB 1 1.2 1 0.8 0.8 0.6 0.6 0.4 0.4 0.2 0.2 0 T =-40°C A 0 -0.2 TA=-40°C TA=25°C -0.2 -0.4 -0.4 T =25°C A -0.6 -0.6 T =85°C A T =85°C A -0.8 -0.8 -1 -1 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 Input Voltage (V) Input Voltage (V) Dropout Voltage LDOA Dropout Voltage LDOB V = 2.85V, I = 200mA OUTB OUTB V = 2.5V, I = 200mA OUTA OUTA 300 300 250 250 T=85°C T =85°C A 200 200 150 150 T =25°C A T =-40°C A T=25°C T=-40°C 100 100 50 50 0 0 2.2 2.25 2.3 2.35 2.4 2.45 2.5 2.55 2.6 2.65 2.7 2.75 2.8 2.2 2.25 2.3 2.35 2.4 2.45 2.5 2.55 2.6 2.65 2.7 2.75 2.8 Input Voltage (V) Input Voltage (V) 5 Output Voltage Variation (mV) V - V (mV) IN OUTA Output Voltage Variation (mV) Output Voltage Variation (mV) VIN - V (mV) Output Voltage Variation (mV) OUT SC1458 Typical Characteristics (continued) PSRR vs. Frequency PSRR vs. Frequency V = 2.5V, I = 50mA OUT OUT V = 2.85V, I = 50mA, C =22nF OUT O BYP 0 0 -10 -10 -20 -20 -30 -30 -40 -40 -50 -50 -60 -60 -70 -70 10 100 1000 10000 10 100 1000 10000 Frequency (Hz) Frequency (Hz) Output Noise vs. Load Current Output Noise vs. Load Current V = 2.85V, I = 50mA, C =22nF V = 2.5V, V = 3.6V, no C OUTB O BYP OUT IN BYP 400 90 80 350 T=85°C TA=85°C 70 T =25°C 300 A T=25°C T =-40°C 60 A 250 50 T=-40°C 200 40 150 30 100 20 50 10 0 0 0 50 100 150 200 250 0 50 100 150 200 250 Output Current (mA) Output Current (mA) Load Transient Response (Falling Edge) Load Transient Response (Rising Edge) V = 2.5V, V = 3.6V V = 2.5V, V = 3.6V OUT IN OUT IN (0.1A/div) (0.1A/div) (20mV/div) (20mV/div) Time (1ms/div) Time (1ms/div) 6 Output Voltage Noise (uV) PSRR (dB) PSRR (dB) Output Voltage Noise (uV) SC1458 Pin Descriptions Pin # Pin Name Pin Function SC1458A SC1458B 1 1 OUTB Output for LDOB 2 2 VIN Input supply voltage terminal 3 3 OUTA Output for LDOA 4 4 GND Analog and digital ground 5 5 EN Logic Input — active high enables the SC1458. Open drain logic output — monitors output of LDOA, switches low when the output drops out 6 PGOOD of regulation. 6 BYP LDO bypass output — bypass with a 22nF capacitor. Thermal Pad is for heatsinking purposes — not connected internally. Connect exposed pad to ground TT Pad using multiple vias. 7 SC1458 Block Diagram VIN 2 5 EN Power On And SC1458B Bandgap Control Reference Logic BYP or 6 PGOOD SC1458A ENA LDOA 3 OUTA ENB GND 4 LDOB 1 OUTB 8 SC1458 Applications Information General Description Active Shutdown The SC1458 is a dual output linear regulator intended The SC1458 has internal active shutdown circuitry for applications where low dropout voltage, low supply included for both LDOs. Shutdown behavior is controlled current, and low output noise are critical. The device by discharging the output capacitor on the LDO output provides a very simple, low cost solution for two separate by an on-chip FET when the LDO is disabled. regulated outputs using very little PCB area due to its small package size and the need for only three external Protection Circuitry capacitors. The device provides the following protection features to ensure that no damage is incurred in the event of a fault Both linear regulators are powered from a single input condition. voltage supply rail, and each provides 300mA of output • Under-Voltage Lockout current. Output voltages are set internally, eliminating the • Over-Temperature Protection need for external resistors. • Short-Circuit Protection An active high enable pin (EN) controls operation of both Under-Voltage Lockout regulators. Pulling this pin low causes the device to enter a The Under-Voltage LockOut (UVLO) circuit protects the very low power shutdown mode, where it typically draws device from operating in an unknown state if the input 100nA from the input supply. voltage supply is too low. The device is available in two versions: SC1458A and When the V drops below the UVLO threshold, the IN SC1458B. The SC1458A version has pin 6 confi gured as a LDOs are disabled and discharged — PGOOD is held power good signal (PGOOD), which monitors the output low (SC1458A only). When V is increased above the IN of LDOA. The SC1458B device has pin 6 confi gured as an hysteresis level, the LDOs are enabled into their previous external bypass pin (BYP). This is suitable for applications states (timing described in Figure 1), provided EN has which require low output noise and excellent PSRR remained high. When powering-up with V below the IN characteristics. UVLO threshold, the LDOs will remain off and PGOOD will be held low (SC1458A only). Power-On Control When EN transitions high, the output of LDOA is enabled. Over-Temperature Protection After a delay of 128μs, the output of LDOB is enabled. An internal over-temperature (OT) protection circuit is In the case of the SC1458A, when the output voltage of provided that monitors the internal junction temperature. LDOA reaches 87% of its regulation point, the delay timer When the temperature exceeds the OT threshold as starts and the PGOOD signal transitions high after a delay defi ned in the Electrical Characteristics section, the OT of 200ms. The power up/down sequence is shown in protection disables all the LDO outputs and holds the Figure 1. PGOOD signal low. When the junction temperature drops below the hysteresis level, the LDOs are re-enabled into EN their previous states and PGOOD is set high, provided EN has remained high (SC1458A only). 87% 87% OUTA 200 ms Short-Circuit Protection Each LDO output has short-circuit protection. If the PGOOD output current exceeds the current limit, the output voltage will drop and the output current will be limited 128μs until the short is removed. If a short-circuit occurs on the OUTB output of LDOA, the output of LDOB will also be disabled Figure 1 — Timing Diagram 9 Maximum Recommended Input Voltage SC1458 Applications Information (continued) 1.8 until the fault is removed and the load current returns to a specifi ed level. 1.5 T (Max)=150°C J Component Selection 1.2 A capacitance of 1μF or larger on each output is TJ(Max)=125°C recommended to ensure stability. Ceramic capacitors 0.9 of type X5R or X7R should be used because of their low ESR and stable temperature coeffi cients. It is also 0.6 recommended that the input be bypassed with a 2.2μF, low ESR X5R or X7R capacitor to minimize noise and 0.3 improve transient response. Note: Tantalum and Y5V capacitors are not recommended. 0 -40 -20 0 20 40 60 80 100 o Ambient Temperature ( C) A bypass capacitor (minimum of 22nF) should be Figure 3 — Maximum P vs. T D A connected between the BYP and GND pins to meet all noise-sensitive requirements. Increasing the capacitance The following procedure can be followed to determine if to 100nF will further improve PSRR and output noise the thermal design of the system is adequate. The junction temperature of the SC1458 can be determined in known (SC1458B only). operating conditions using the following equation: Thermal Considerations T = T +(P x θ ) Although each of the two LDOs in the SC1458 can J A D JA where provide 300mA of output current, the maximum power T = Junction Temperature (°C) dissipation in the device is restricted by the miniature J T = Ambient Temperature (°C) package size. The graphs in Figure 2 and Figure 3 can A be used as a guideline to determine whether the input P = Power Dissipation (W) D voltage, output voltages, output currents, and ambient θ = Thermal Resistance Junction to Ambient (°C/W) JA temperature of the system result in power dissipation within the operating limits or if further thermal relief is Example required. An SC1458A is used to provide outputs of 2.5V, 150mA from LDOA and 1.8V, 200mA from LDOB. The input 0.6 voltage is 4.2V, and the ambient temperature of the system is 60°C. 0.5 P = 0.15(4.2 – 2.5) + 0.2(4.2 – 1.8) D 0.4 = 0.74W 0.3 and 0.2 T = 60 + (0.74 x 50) = 97°C J 0.1 Figure 3 shows that the power dissipation is within limits ______ T =+25°C, P = 1.9W A D(MAX) - - - - T =+85°C, P = 1.0W A D(MAX) at T = 60°C and calculation of T shows that it is within the A J 0 specifi ed limit of 150°C. 3 3.5 4 4.5 5 5.5 6 Input Voltage (V) Figure 2 — Safe Operating Limit This means that operation of the SC1458 under these conditions is within the specifi ed limits and the device would not require further thermal relief measures. 10 Maximum Total Output Current (A) Maximum Power Dissipation (W) SC1458 Applications Information (continued) • Connect all ground connections directly to the PCB Layout Considerations ground plane whenever possible to minimize While layout for linear devices is generally not as critical ground potential diff erences on the PCB. as for a switching application, careful attention to detail • Ensure that the feedback resistors are placed as will ensure reliable operation. close as possible to the feedback pins. • Attach the part to a large copper footprint, particularly the thermal pad on the underside of the device, to enable better heat transfer, particularly on PCBs where there are internal power and ground planes. • Place the input, output, and bypass capacitors close to the device for optimal transient response and device behavior. C SC1458B OUTB C C IN BYP C OUTA 11 SC1458 Outline Drawing — MLPD-W6 3x3 DIMENSIONS A D B INCHES MILLIMETERS DIM MIN NOM MAX MIN NOM MAX A .028 .030 .031 0.70 0.75 0.80 A1 .000 .001 .002 0.00 0.02 0.05 A2 (.008) (0.20) b .012 .016 .018 0.30 0.40 0.45 E D .114 .118 .122 2.90 3.00 3.10 E .114 .118 .122 2.90 3.00 3.10 PIN 1 INDICATOR D1 .087 .091 .094 2.20 2.30 2.40 (LASER MARK) E1 .055 .059 .063 1.40 1.50 1.60 e .037 BSC 0.95 BSC L .012 .014 .016 0.30 0.35 0.40 N 6 6 aaa .003 0.08 bbb .004 0.10 A SEATING PLANE aaa C C A1 A2 D1 1 2 LxN E/2 E1 N bxN bbb C A B e D/2 NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS TERMINALS. 3. REFERENCE JEDEC STANDARD VARIATION WEEA-2. 12 SC1458 Land Pattern — MLPD-W6 3x3 DIMENSIONS H DIM INCHES MILLIMETERS (.116) (2.95) C G .087 2.20 H .094 2.40 (C) G K Z K .063 1.60 P .037 0.95 Y R .009 0.225 X .018 0.45 X Y .030 0.75 P .146 3.70 Z NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. 2. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. 3. THERMAL VIAS IN THE LAND PATTERN OF THE EXPOSED PAD SHALL BE CONNECTED TO A SYSTEM GROUND PLANE. FAILURE TO DO SO MAY COMPROMISE THE THERMAL AND/OR FUNCTIONAL PERFORMANCE OF THE DEVICE. Contact Information Semtech Corporation Power Mangement Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805) 498-2111 Fax: (805) 498-3804 www.semtech.com 13