ON SEMICONDUCTOR MC10EP139DTR2

MC10EP139, MC100EP139 3.3V / 5V�ECL ÷2/4, ÷4/5/6 Clock Generation Chip The MC10/100EP139 is a low skew ÷2/4, ÷4/5/6 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common http://onsemi.com output edges are all precisely aligned. The device can be driven by either a differential or single−ended ECL or, if positive power supplies are used, MARKING LVPECL input signals. In addition, by using the V output, a sinusoidal BB DIAGRAMS* source can be AC coupled into the device. If a single−ended input is to be used, the V output should be connected to the CLK input and bypassed BB 20 to ground via a 0.01 �F capacitor. 20 The common enable (EN) is synchronous so that the internal dividers HEP or KEP 1 139 will only be enabled/disabled when the internal clock is already in the ALYW TSSOP−20 LOW state. This avoids any chance of generating a runt clock pulse on DT SUFFIX the internal clock when the device is enabled/disabled as can happen with CASE 948E 1 an asynchronous control. The internal enable flip−flop is clocked on the falling edge of the input clock, therefore, all associated specification 20 limits are referenced to the negative edge of the clock input. Upon start−up, the internal flip−flops will attain a random state; 20 MCXXXEP139 therefore, for systems which utilize multiple EP139s, the master reset AWLYYWW 1 (MR) input must be asserted to ensure synchronization. For systems SOIC−20 which only use one EP139, the MR pin need not be exercised as the DW SUFFIX 1 internal divider design ensures synchronization between the ÷2/4 and the CASE 751D ÷4/5/6 outputs of a single device. All V and V pins must be CC EE externally connected to power supply to guarantee proper operation. HEP = MC10EP The 100 Series contains temperature compensation. KEP = MC100EP XXX = 10 or 100 • Maximum Frequency > 1.0 GHz Typical A = Assembly Location • 50 ps Output−to−Output Skew L,WL = Wafer Lot Y, YY = Year • PECL Mode Operating Range: V = 3.0 V to 5.5 V CC W, WW = Work Week with V = 0 V EE • NECL Mode Operating Range: V = 0 V CC *For additional marking information, refer to with V = −3.0 V to −5.5 V EE Application Note AND8002/D. • Open Input Default State • Safety Clamp on Inputs ORDERING INFORMATION See detailed ordering and shipping information in the package • Synchronous Enable/Disable dimensions section on page 11 of this data sheet. • Master Reset for Synchronization of Multiple Chips • V Output BB  Semiconductor Components Industries, LLC, 2004 1 Publication Order Number: April, 2004 − Rev. 5 MC10EP139/D MC10EP139, MC100EP139 V Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 V CC EE Table 1. PIN DESCRIPTION 20 19 18 17 16 15 14 13 12 11 PIN FUNCTION CLK*, CLK* ECL Differential Clock Inputs EN* ECL Sync Enable MR* ECL Master Reset 1 2 3 4 5 678 9 10 V ECL Reference Output BB Q0, Q1, Q0, Q1 ECL Differential �2/4 Outputs Q2, Q3, Q2, Q3 ECL Differential �4/5/6 Outputs DIVSELa* ECL Frequency Select Input �2/4 Warning: All V and V pins must be externally connected to CC EE Power Supply to guarantee proper operation. DIVSELb0* ECL Frequency Select Input �4/5/6 DIVSELb1 ECL Frequency Select Input �4/5/6 Figure 1. 20−Lead Pinout (Top View) V ECL Positive Supply CC V ECL Negative Supply EE *Pins will default low when left open. DIVSELa Q0 CLK ÷2/4 Q0 R CLK Q1 Q1 Q2 EN ÷4/5/6 Q2 R Q3 MR Q3 DIVSELb0 DIVSELb1 V EE Figure 2. Logic Diagram Table 2. FUNCTION TABLES CLK EN MR Function Z L L Divide ZZ H L Hold Q0:3 X X H Reset Q0:3 Z = Low−to−High Transition ZZ = High−to−Low Transition DIVSELa Q0:1 Outputs L Divide by 2 H Divide by 4 DIVSELb0 DIVSELb1 Q2:3 Outputs L L Divide by 4 H L Divide by 6 L H Divide by 5 H H Divide by 5 http://onsemi.com 2 V CC EN DIVSELb0 CLK CLK V BB MR V CC DIVSELb1 DIVSELa MC10EP139, MC100EP139 CLK Q (÷2) Q (÷4) Q (÷5) Q (÷6) Figure 3. Timing Diagram CLK t RR RESET Q (÷n) Figure 4. Timing Diagram http://onsemi.com 3 MC10EP139, MC100EP139 Table 3. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor 75 k� Internal Input Pullup Resistor N/A ESD Protection Human Body Model > 2 kV Machine Model > 100 V Charged Device Model > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Level 1 Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in Transistor Count 758 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Table 4. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit V PECL Mode Power Supply V = 0 V 6 V CC EE V NECL Mode Power Supply V = 0 V −6 V EE CC V PECL Mode Input Voltage V = 0 V V � V 6 V I EE I CC NECL Mode Input Voltage V = 0 V V � V −6 V CC I EE I Output Current Continuous 50 mA out Surge 100 mA I V Sink/Source ± 0.5 mA BB BB T Operating Temperature Range −40 to +85 °C A T Storage Temperature Range −65 to +150 °C stg � Thermal Resistance (Junction−to−Ambient) 0 lfpm TSSOP−20 140 °C/W JA 500 lfpm TSSOP−20 100 °C/W � Thermal Resistance (Junction−to−Case) Standard Board TSSOP−20 23 to 41 °C/W JC � Thermal Resistance (Junction−to−Ambient) 0 lfpm SOIC−20 90 °C/W JA 500 lfpm SOIC−20 60 °C/W � Thermal Resistance (Junction−to−Case) Standard Board SOIC−20 33 to 35 °C/W JC T Wave Solder <2 to 3 sec @ 248°C 265 °C sol Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. http://onsemi.com 4 MC10EP139, MC100EP139 Table 5. 10EP DC CHARACTERISTICS, PECL V = 3.3 V, V = 0 V (Note 2) CC EE −40°C 25°C 85°C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit I Power Supply Current 65 82 105 65 83 105 65 84 105 mA EE V Output HIGH Voltage (Note 3) 2165 2290 2415 2230 2355 2480 2290 2415 2540 mV OH V Output LOW Voltage (Note 3) 1365 1490 1615 1430 1555 1680 1490 1615 1740 mV OL V Input HIGH Voltage (Single−Ended) 2090 2415 2155 2480 2215 2540 mV IH V Input LOW Voltage (Single−Ended) 1365 1690 1460 1755 1490 1815 mV IL V Output Voltage Reference 1790 1890 1990 1855 1955 2055 1915 2015 2115 mV BB V Input HIGH Voltage Common Mode 2.0 3.3 2.0 3.3 2.0 3.3 V IHCMR Range (Differential Configuration) (Note 4) I Input HIGH Current 150 150 150 �A IH I Input LOW Current 0.5 0.5 0.5 �A IL NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Input and output parameters vary 1:1 with V . V can vary +0.3 V to −2.2 V. CC EE 3. All loading with 50 � to V − 2.0 V. CC 4. V min varies 1:1 with V , V max varies 1:1 with V . The V range is referenced to the most positive side of the differential IHCMR EE IHCMR CC IHCMR input signal. Table 6. 10EP DC CHARACTERISTICS, PECL V = 5.0 V, V = 0 V (Note 5) CC EE −40°C 25°C 85°C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit I Power Supply Current 65 82 105 65 83 105 65 84 105 mA EE V Output HIGH Voltage (Note 6) 3865 3990 4115 3930 4055 4180 3990 4115 4240 mV OH V Output LOW Voltage (Note 6) 3065 3190 3315 3130 3255 3380 3190 3315 3440 mV OL V Input HIGH Voltage (Single−Ended) 3790 4115 3855 4180 3915 4240 mV IH V Input LOW Voltage (Single−Ended) 3065 3390 3130 3455 3190 3515 mV IL V Output Voltage Reference 3490 3590 3690 3555 3655 3755 3615 3715 3815 mV BB V Input HIGH Voltage Common Mode 2.0 5.0 2.0 5.0 2.0 5.0 V IHCMR Range (Differential Configuration) (Note 7) I Input HIGH Current 150 150 150 �A IH I Input LOW Current 0.5 0.5 0.5 �A IL NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. Input and output parameters vary 1:1 with V . V can vary +2.0 V to −0.5 V. CC EE 6. All loading with 50 � to V − 2.0 V. CC 7. V min varies 1:1 with V , V max varies 1:1 with V . The V range is referenced to the most positive side of the differential IHCMR EE IHCMR CC IHCMR input signal. http://onsemi.com 5 MC10EP139, MC100EP139 Table 7. 10EP DC CHARACTERISTICS, NECL V = 0 V, V = −5.5 V to −3.0 V (Note 8) CC EE −40°C 25°C 85°C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit I Power Supply Current 65 82 105 65 83 105 65 84 105 mA EE VOH Output HIGH Voltage (Note 9) −1135 −1010 −885 −1070 −945 −820 −1010 −885 −760 mV V Output LOW Voltage (Note 9) −1935 −1810 −1685 −1870 −1745 −1620 −1810 −1685 −1560 mV OL V Input HIGH Voltage (Single−Ended) −1210 −885 −1145 −820 −1085 −760 mV IH V Input LOW Voltage (Single−Ended) −1935 −1610 −1870 −1545 −1810 −1485 mV IL V Output Voltage Reference −1510 −1410 −1310 −1445 −1345 −1245 −1385 −1285 −1185 mV BB V Input HIGH Voltage Common Mode V +2.0 0.0 V +2.0 0.0 V +2.0 0.0 V IHCMR EE EE EE Range (Differential Configuration) (Note 10) I Input HIGH Current 150 150 150 �A IH I Input LOW Current 0.5 0.5 0.5 �A IL NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 8. Input and output parameters vary 1:1 with V . CC 9. All loading with 50 � to V − 2.0 V. CC 10.V min varies 1:1 with V , V max varies 1:1 with V . The V range is referenced to the most positive side of the differential IHCMR EE IHCMR CC IHCMR input signal. Table 8. 100EP DC CHARACTERISTICS, PECL V = 3.3 V, V = 0 V (Note 11) CC EE −40°C 25°C 85°C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit I Power Supply Current 70 83 100 70 87 105 75 90 110 mA EE V Output HIGH Voltage (Note 12) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mV OH V Output LOW Voltage (Note 12) 1355 1480 1605 1355 1480 1605 1355 1480 1605 mV OL V Input HIGH Voltage (Single−Ended) 2075 2420 2075 2420 2075 2420 mV IH V Input LOW Voltage (Single−Ended) 1355 1675 1355 1675 1355 1675 mV IL V Output Voltage Reference 1775 1875 1975 1775 1875 1975 1775 1875 1975 mV BB V Input HIGH Voltage Common Mode 2.0 3.3 2.0 3.3 2.0 3.3 V IHCMR Range (Differential Configuration) (Note 13) I Input HIGH Current 150 150 150 �A IH I Input LOW Current 0.5 0.5 0.5 �A IL NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 11. Input and output parameters vary 1:1 with V . V can vary +0.3 V to −2.2 V. CC EE 12.All loading with 50 � to V − 2.0 V. CC 13.V min varies 1:1 with V , V max varies 1:1 with V . The V range is referenced to the most positive side of the differential IHCMR EE IHCMR CC IHCMR input signal. http://onsemi.com 6 MC10EP139, MC100EP139 Table 9. 100EP DC CHARACTERISTICS, PECL V = 5.0 V, V = 0 V (Note 14) CC EE −40°C 25°C 85°C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit I Power Supply Current 70 85 100 70 90 105 75 95 110 mA EE V Output HIGH Voltage (Note 15) 3855 3980 4105 3855 3980 4105 3855 3980 4105 mV OH V Output LOW Voltage (Note 15) 3055 3180 3305 3055 3180 3305 3055 3180 3305 mV OL V Input HIGH Voltage (Single−Ended) 3775 4120 3775 4120 3775 4120 mV IH V Input LOW Voltage (Single−Ended) 3055 3375 3055 3375 3055 3375 mV IL V Output Voltage Reference 3475 3575 3675 3475 3575 3675 3475 3575 3675 mV BB V Input HIGH Voltage Common Mode 2.0 5.0 2.0 5.0 2.0 5.0 V IHCMR Range (Differential Configuration) (Note 16) I Input HIGH Current 150 150 150 �A IH I Input LOW Current 0.5 0.5 0.5 �A IL NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 14.Input and output parameters vary 1:1 with V . V can vary +2.0 V to −0.5 V. CC EE 15.All loading with 50 � to V − 2.0 V. CC 16.V min varies 1:1 with V , V max varies 1:1 with V . The V range is referenced to the most positive side of the differential IHCMR EE IHCMR CC IHCMR input signal. Table 10. 100EP DC CHARACTERISTICS, NECL V = 0 V, V = −5.5 V to −3.0 V (Note 17) CC EE −40°C 25°C 85°C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit I Power Supply Current 70 85 100 70 90 105 75 95 110 mA EE V Output HIGH Voltage (Note 18) −1145 −1020 −895 −1145 −1020 −895 −1145 −1020 −895 mV OH V Output LOW Voltage (Note 18) −1945 −1820 −1695 −1945 −1820 −1695 −1945 −1820 −1695 mV OL V Input HIGH Voltage (Single−Ended) −1225 −880 −1225 −880 −1225 −880 mV IH V Input LOW Voltage (Single−Ended) −1945 −1625 −1945 −1625 −1945 −1625 mV IL V Output Voltage Reference −1525 −1425 −1325 −1525 −1425 −1325 −1525 −1425 −1325 mV BB V Input HIGH Voltage Common Mode V +2.0 0.0 V +2.0 0.0 V +2.0 0.0 V IHCMR EE EE EE Range (Differential Configuration) (Note 19) I Input HIGH Current 150 150 150 �A IH I Input LOW Current 0.5 0.5 0.5 �A IL NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 17.Input and output parameters vary 1:1 with V . CC 18.All loading with 50 � to V − 2.0 V. CC 19.V min varies 1:1 with V , V max varies 1:1 with V . The V range is referenced to the most positive side of the differential IHCMR EE IHCMR CC IHCMR input signal. http://onsemi.com 7 MC10EP139, MC100EP139 Table 11. AC CHARACTERISTICS V = 0 V; V = −3.0 V to −5.5 V or V = 3.0 V to 5.5 V; V = 0 V (Note 20) CC EE CC EE −40°C 25°C 85°C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit f Maximum Frequency > 1 > 1 > 1 GHz max (See Figure 5 F /JITTER) max t , Propagation Delay CLK, Q (Diff) 550 700 800 600 750 900 675 825 975 ps PLH t 700 800 900 700 850 1000 800 950 1100 MR, Q PHL t Reset Recovery 200 100 200 100 165 100 ps RR t Setup Time EN, CLK 200 120 200 120 200 120 ps s 400 180 400 180 400 180 DIVSEL, CLK t Hold Time CLK, EN 100 50 100 50 100 50 ps h 200 140 200 140 200 140 CLK, DIVSEL t Minimum Pulse Width MR 550 450 550 450 550 450 ps PW t Within Device Skew Q, Q 50 100 50 100 50 100 ps SKEW 200 300 200 300 200 300 Device−to−Device Skew (Note 21) t Random Clock Jitter (RMS) 0.2 < 1.0 0.2 < 1.0 0.2 < 1.5 ps JITTER (See Figure 5 F /JITTER) max V Input Voltage Swing (Differential Con- 150 800 1200 150 800 1200 150 800 1200 mV PP figuration) t Output Rise/Fall Times Q, Q 110 180 250 125 190 275 150 215 300 ps r t f (20% − 80%) NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 20.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 � to V − 2.0 V. CC 21.Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays are measured from the cross point of the inputs to the cross point of the outputs. http://onsemi.com 8 MC10EP139, MC100EP139 900 8 800 7 700 6 600 5 500 4 400 3 300 ÉÉ 2 ÉÉ 200 (JITTER) 100 1 ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ 0 ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ 0 200 400 600 800 1000 1200 1400 1600 1800 2000 FREQUENCY (MHz) Figure 5. �2, F /Jitter max 900 8 800 7 700 6 600 5 500 4 400 3ÉÉ 300 ÉÉ 2 200 ÉÉ (JITTER) 1 100ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ 0 0 200 400 600 800 1000 1200 1400 1600 1800 2000 ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ FREQUENCY (MHz) Figure 6. �5, F /Jitter max http://onsemi.com 9 V (mV) V (mV) OUTpp OUTpp JITTER ps (RMS) JITTER ps (RMS) OUT OUT MC10EP139, MC100EP139 900 8 800 7 700 6 600 5 500 4 400 3 300 ÉÉ 2 ÉÉ 200 (JITTER) 100 1 ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ 0 ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ 0 200 400 600 800 1000 1200 1400 1600 1800 2000 FREQUENCY (MHz) Figure 7. �4, F /Jitter max 900 8 800 7 700 6 600 5 500 4 400 3ÉÉ 300 ÉÉ 2 200 ÉÉ (JITTER) 1 100ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ 0 0 200 400 600 800 1000 1200 1400 1600 1800 2000 ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ FREQUENCY (MHz) Figure 8. �6, F /Jitter max http://onsemi.com 10 V (mV) V (mV) OUTpp OUTpp JITTER ps (RMS) JITTER ps (RMS) OUT OUT MC10EP139, MC100EP139 Z = 50 � QD o Receiver Driver Device Device Q Z = 50 � D o 50 � 50 � V TT V = V − 2.0 V TT CC Figure 9. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) ORDERING INFORMATION † Device Package Shipping MC10EP139DT TSSOP−20 75 Units / Rail MC10EP139DTR2 TSSOP−20 2500 / Tape & Reel MC10EP139DW SOIC−20 38 Units / Rail MC10EP139DWR2 SOIC−20 1000 / Tape & Reel MC100EP139DT TSSOP−20 75 Units / Rail MC100EP139DTR2 TSSOP−20 2500 / Tape & Reel MC100EP139DW SOIC−20 38 Units / Rail MC100EP139DWR2 SOIC−20 1000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 11 MC10EP139, MC100EP139 Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPS� I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1642/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices http://onsemi.com 12 MC10EP139, MC100EP139 PACKAGE DIMENSIONS SOIC−20 DW SUFFIX PLASTIC SOIC PACKAGE CASE 751D−05 ISSUE F D A � NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 20 11 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. E 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT 1 10 MAXIMUM MATERIAL CONDITION. MILLIMETERS DIM MIN MAX B 20X B A 2.35 2.65 A1 0.10 0.25 M S S 0.25 T A B B 0.35 0.49 C 0.23 0.32 D 12.65 12.95 E 7.40 7.60 e 1.27 BSC A H 10.05 10.55 h 0.25 0.75 L 0.50 0.90 SEATING � 0 7 PLANE �� 18X e A1 C T http://onsemi.com 13 10X H M M 0.25 B h X 45 � L MC10EP139, MC100EP139 PACKAGE DIMENSIONS TSSOP−20 DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948E−02 ISSUE A 20X REF K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI M S S 0.10 (0.004) T U V Y14.5M, 1982. S 0.15 (0.006) T U 2. ICONTROLLING DIMENSION: MILLIMETER. K 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH K1 OR GATE BURRS SHALL NOT EXCEED 0.15 20 11 2X L/2 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD ÍÍÍÍ FLASH OR PROTRUSION. INTERLEAD FLASH OR JJ1 B PROTRUSION SHALL NOT EXCEED 0.25 (0.010) ÍÍÍÍ L PER SIDE. −U− 5. DIMENSION K DOES NOT INCLUDE DAMBAR PIN 1 IDENT ÍÍÍÍ SECTION N−N PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM 110 MATERIAL CONDITION. 0.25 (0.010) 6. TERMINAL NUMBERS ARE SHOWN FOR N REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED S 0.15 (0.006) T U AT DATUM PLANE -W-. M A MILLIMETERS INCHES DIM MIN MAX MIN MAX −V− A 6.40 6.60 0.252 0.260 B 4.30 4.50 0.169 0.177 N C --- 1.20 --- 0.047 D 0.05 0.15 0.002 0.006 F F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC DETAIL E H 0.27 0.37 0.011 0.015 J 0.09 0.20 0.004 0.008 −W− J1 0.09 0.16 0.004 0.006 C K 0.19 0.30 0.007 0.012 K1 0.19 0.25 0.007 0.010 L 6.40 BSC 0.252 BSC G D M 0 8 0 8 H �� � � DETAIL E 0.100 (0.004) −T− SEATING PLANE ECLinPS is a trademark of Semiconductor Components INdustries, LLC (SCILLC). ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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