DTA144TT1 Preferred Device Bias Resistor Transistor PNP Silicon Surface Mount Transistor with Monolithic Bias Resistor Network This new series of digital transistors is designed to replace a single http://onsemi.com device and its external resistor bias network. The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter PNP SILICON resistor. The BRT eliminates these individual components by BIAS RESISTOR integrating them into a single device. The use of a BRT can reduce both system cost and board space. The device is housed in the SC–59 TRANSISTOR package which is designed for low power surface mount applications. PIN 3 • Simplifies Circuit Design COLLECTOR • Reduces Board Space (OUTPUT) • Reduces Component Count R1 • Moisture Sensitivity Level: 1 PIN 1 R2 • ESD Rating – Human Body Model: Class 1 BASE ESD Rating – Machine Model: Class B (INPUT) • The SC–59 package can be soldered using wave or reflow. PIN 2 EMITTER The modified gull–winged leads absorb thermal stress during (GROUND) soldering eliminating the possibility of damage to the die. • Available in 8 mm embossed tape and reel Use the Device Number to order the 7 inch/3000 unit reel. 3 MAXIMUM RATINGS (T = 25°C unless otherwise noted) A 1 2 Rating Symbol Value Unit SC–59 Collector-Base Voltage V 50 Vdc CBO CASE 318D Collector-Emitter Voltage V 50 Vdc PLASTIC CEO Collector Current I 100 mAdc C MARKING DIAGRAM THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Total Device Dissipation P 230 (Note 1.) mW D 6T M T = 25°C 338 (Note 2.) A Derate above 25°C 1.8 (Note 1.) °C/W 2.7 (Note 2.) 6T = Specific Device Code Thermal Resistance – R 540 (Note 1.) °C/W M = Date Code θJA Junction-to-Ambient 370 (Note 2.) Thermal Resistance – R 264 (Note 1.) °C/W θJL Junction-to-Lead 287 (Note 2.) ORDERING INFORMATION Junction and Storage T , T –55 to +150 °C J stg Device Package Shipping Temperature Range DTA144TT1 SC–59 3000/Tape & Reel DEVICE MARKING AND RESISTOR VALUES Device Marking R1 (K) R2 (K) Shipping Preferred devices are recommended choices for future use and best overall value. DTA144TT1 6T 47 ∞ 3000/Tape & Reel 1. FR–4 @ Minimum Pad 2. FR–4 @ 1.0 x 1.0 inch Pad  Semiconductor Components Industries, LLC, 2002 1 Publication Order Number: May, 2002 – Rev. 1 DTA144TT1/D DTA144TT1 ELECTRICAL CHARACTERISTICS (T = 25°C unless otherwise noted) A Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Collector–Base Cutoff Current I – – 100 nAdc CBO (V = 50 V, I = 0) CB E Collector–Emitter Cutoff Current I – – 500 nAdc CEO (V = 50 V, I = 0) CE B Emitter–Base Cutoff Current I – – 0.2 mAdc EBO (V = 6.0 V, I = 0) EB C Collector–Base Breakdown Voltage V 50 – – Vdc (BR)CBO (I = 10 μA, I = 0) C E Collector–Emitter Breakdown Voltage (Note 1) V 50 – – Vdc (BR)CEO (I = 2.0 mA, I = 0) C B ON CHARACTERISTICS (Note 1) DC Current Gain h 160 350 – FE (V = 10 V, I = 5.0 mA) CE C Collector–Emitter Saturation Voltage V – – 0.25 Vdc CE(sat) (I = 10 mA, I = 1.0 mA) C B Output Voltage (on) V – – 0.2 Vdc OL (V = 5.0 V, V = 3.5 V, R = 1.0 kΩ) CC B L Output Voltage (off) V 4.9 – – Vdc OH (V = 5.0 V, V = 0.25 V, R = 1.0 kΩ) CC B L Input Resistor R1 32.9 47 61.1 kΩ 1. Pulse Test: Pulse Width < 300 μs, Duty Cycle < 2.0% 350 300 250 200 150 R = 370°C/W θJA 100 50 0 –50 0 50 100 150 T , AMBIENT TEMPERATURE (5°C) A Figure 1. Derating Curve http://onsemi.com 2 P POWER DISSIPATION (mW) D, DTA144TT1 INFORMATION FOR USING THE SC–59 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total interface between the board and the package. With the design. The footprint for the semiconductor packages must correct pad geometry, the packages will self align when be the correct size to insure proper solder connection subjected to a solder reflow process. 0.037 0.037 0.95 0.95 0.094 2.4 0.039 1.0 0.031 inches 0.8 mm SC–59 POWER DISSIPATION The power dissipation of the SC–59 is a function of the the equation for an ambient temperature T of 25°C, one A pad size. This can vary from the minimum pad size for sol- can calculate the power dissipation of the device which in dering to the pad size given for maximum power dissipa- this case is 338 milliwatts. tion. Power dissipation for a surface mount device is deter- mined by T , the maximum rated junction temperature 150°C – 25°C J(max) P = = 338 milliwatts D 370°C/W of the die, Rθ , the thermal resistance from the device JA junction to ambient; and the operating temperature, T . Us- A The 370°C/W assumes the use of the recommended foot- ing the values provided on the data sheet, P can be calcu- D print on a glass epoxy printed circuit board to achieve a lated as follows. power dissipation of 338 milliwatts. Another alternative T – T J(max) A would be to use a ceramic substrate or an aluminum core P = D R θJA board such as Thermal Clad. Using a board material such as Thermal Clad, the power dissipation can be doubled us- The values for the equation are found in the maximum ing the same footprint. ratings table on the data sheet. Substituting these values into SOLDERING PRECAUTIONS The melting temperature of solder is higher than the rated • The soldering temperature and time should not exceed temperature of the device. When the entire device is heated 260°C for more than 10 seconds. to a high temperature, failure to complete soldering within • When shifting from preheating to soldering, the a short time could result in device failure. Therefore, the maximum temperature gradient should be 5°C or less. following items should always be observed in order to • After soldering has been completed, the device should minimize the thermal stress to which the devices are be allowed to cool naturally for at least three minutes. subjected. Gradual cooling should be used as the use of forced • Always preheat the device. cooling will increase the temperature gradient and • The delta temperature between the preheat and result in latent failure due to mechanical stress. soldering should be 100°C or less.* • Mechanical stress or shock should not be applied dur- • When preheating and soldering, the temperature of the ing cooling leads and the case must not exceed the maximum * Soldering a device without preheating can cause exces- temperature ratings as shown on the data sheet. When sive thermal shock and stress which can result in damage using infrared heating with the reflow soldering to the device. method, the difference should be a maximum of 10°C. http://onsemi.com 3 DTA144TT1 SOLDER STENCIL GUIDELINES Prior to placing surface mount components onto a printed The stencil opening size for the surface mounted package circuit board, solder paste must be applied to the pads. A should be the same as the pad size on the printed circuit solder stencil is required to screen the optimum amount of board, i.e., a 1:1 registration. solder paste onto the footprint. The stencil is made of brass or stainless steel with a typical thickness of 0.008 inches. TYPICAL SOLDER HEATING PROFILE For any given circuit board, there will be a group of The line on the graph shows the actual temperature that control settings that will give the desired heat pattern. The might be experienced on the surface of a test board at or operator must set temperatures for several heating zones, near a central solder joint. The two profiles are based on a and a figure for belt speed. Taken together, these control high density and a low density board. The Vitronics settings make up a heating “profile” for that particular SMD310 convection/infrared reflow soldering system was circuit board. On machines controlled by a computer, the used to generate this profile. The type of solder used was computer remembers these profiles from one operating 62/36/2 Tin Lead Silver with a melting point between session to the next. Figure 7 shows a typical heating profile 177–189°C. When this type of furnace is used for solder for use when soldering a surface mount device to a printed reflow work, the circuit boards and solder joints tend to circuit board. This profile will vary among soldering heat first. The components on the board are then heated by systems but it is a good starting point. Factors that can conduction. The circuit board, because it has a large surface affect the profile include the type of soldering system in area, absorbs the thermal energy more efficiently, then use, density and types of components on the board, type of distributes this energy to the components. Because of this solder used, and the type of board or substrate material effect, the main body of a component may be up to 30 being used. This profile shows temperature versus time. degrees cooler than the adjacent solder joints. STEP 5 STEP 6 STEP 7 STEP 1 STEP 2 STEP 3 STEP 4 HEATING VENT COOLING PREHEAT VENT HEATING HEATING ZONES 4 & 7 ZONE 1 �SOAK" ZONES 2 & 5 ZONES 3 & 6 205° TO 219 °C �SPIKE" �RAMP" �RAMP" �SOAK" PEAK AT 200°C 170°C SOLDER JOINT DESIRED CURVE FOR HIGH MASS ASSEMBLIES 160°C 150°C 150°C SOLDER IS LIQUID FOR 40 TO 80 SECONDS 140°C (DEPENDING ON 100°C MASS OF ASSEMBLY) 100°C DESIRED CURVE FOR LOW MASS ASSEMBLIES 50°C TIME (3 TO 7 MINUTES TOTAL) T MAX Figure 2. Typical Solder Heating Profile http://onsemi.com 4 DTA144TT1 PACKAGE DIMENSIONS SC–59 CASE 318D–04 ISSUE F A NOTES: ��1. DIMENSIONING AND TOLERANCING PER ANSI L Y14.5M, 1982. ��2. CONTROLLING DIMENSION: MILLIMETER. MILLIMETERS INCHES 3 DIM MIN MAX MIN MAX S B A 2.70 3.10 0.1063 0.1220 2 1 B 1.30 1.70 0.0512 0.0669 C 1.00 1.30 0.0394 0.0511 D 0.35 0.50 0.0138 0.0196 D G 1.70 2.10 0.0670 0.0826 H 0.013 0.100 0.0005 0.0040 G J 0.09 0.18 0.0034 0.0070 K 0.20 0.60 0.0079 0.0236 L 1.25 1.65 0.0493 0.0649 S 2.50 3.00 0.0985 0.1181 J C K H STYLE 1: STYLE 2: STYLE 3: PIN 1. EMITTER PIN 1. N.C. PIN 1. ANODE 2. BASE 2. ANODE 2. ANODE 3. COLLECTOR 3. CATHODE 3. CATHODE STYLE 4: STYLE 5: STYLE 6: PIN 1. N.C. PIN 1. CATHODE PIN 1. CATHODE 2. CATHODE 2. CATHODE 2. ANODE 3. ANODE 3. ANODE 3. ANODE/CATHODE http://onsemi.com 5 DTA144TT1 Notes http://onsemi.com 6 DTA144TT1 Notes http://onsemi.com 7 DTA144TT1 Thermal Clad is a trademark of the Bergquist Company. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION Literature Fulfillment: JAPAN: ON Semiconductor, Japan Customer Focus Center Literature Distribution Center for ON Semiconductor 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031 P.O. Box 5163, Denver, Colorado 80217 USA Phone: 81–3–5740–2700 Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada Email: r14525@onsemi.com Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada ON Semiconductor Website: http://onsemi.com Email: ONlit@hibbertco.com For additional information, please contact your local N. American Technical Support: 800–282–9855 Toll Free USA/Canada Sales Representative. DTA144TT1/D http://onsemi.com 8