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MICRON PC2-5300

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Description

Micron PC2-5300 Single DDR2 667MHz CL5 Unbuffered UDIMM 240-Pin Desktop Memory

Part Number

PC2-5300

Price

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Manufacturer

MICRON

Lead Time

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Category

PRODUCTS - P

Specifications

CL

5

Comp. Config

128 Meg x 4

Comp. Count

36

Data Rate

667 MT/s

Density

2GB

Depth

256Mb

ECC

ECC

Module Rank

Dual Rank

Op Temp

0C to +95C

Part Status

Obsolete

Pin Count

240-pin

Register

Non Parity

Speed

PC2 5300

Technology

DDR2 SDRAM

Voltage

1.8V

Width

X 72

Features

Datasheet

pdf file

Micron-DDR2-SDRAM-Desktop Memory Module-datasheet1-1764085399.pdf

300 KiB

Extracted Text

4GB (x72, DR) 240-Pin DDR2 SDRAM FBDIMM Features 1.55V DDR2 SDRAM FBDIMM MT36RTF51272FY – 4GB Information in the 1.8V DDR2 FBDIMM data sheet is Features directly applicable to this 1.55V DDR2 FBDIMM, ex- 240-pin, fully buffered DIMM (FBDIMM) • cept where stated otherwise in this data sheet. Very low-power DDR2 operation • Figure 1: 240-Pin FBDIMM (MO-256 R/C H) • 1.5V ≤ V ≤ 1.9V for DDR2 SDRAM DD • 1.5V ≤ V ≤ 1.9V for advanced memory buffer DD Module height: 30.35mm (1.19in) (AMB) DRAM I/O V = 1.55V • DD Backward compatible with systems designed for the • standard (1.8V) FBDIMM Dual rank • Component configuration: 256 Meg x 4 • Options Marking Functionality Package • 240-pin DIMM (lead-free) Y – This 1.55V FBDIMM consumes less power than a stand- 1 Frequency/CL • ard 1.8V FBDIMM. However, it has the same timing 3.0ns @ CL = 5 (DDR2-667) -667 – and operating parameters as a standard FBDIMM. This enables backward compatibility with systems de- Note: 1. CL = CAS (READ) latency. signed for use with standard FBDIMMs. Table 1: Key Timing Parameters Data Rate (MT/s) t t t Speed Industry RCD RP RC Grade Nomenclature CL = 5 CL = 4 CL = 3 (ns) (ns) (ns) -667 PC2-5300 667 553 400 15 15 55 -53E PC2-4200 553 400 15 15 55 – Table 2: Addressing Parameter 4GB Refresh count 8K Device bank address 8 BA[2:0] Device page size per bank 1KB Device configuration 1Gb (256 Meg x 4) Row address 16K A[13:0] Column address 2K A[11, 9:0] Module rank address 2 S#[1:0] PDF: 09005aef82b5dfb9 Micron Technology, Inc. reserves the right to change products or specifications without notice. 1 rtf36c512x72fy.pdf - Rev. C 12/09 EN © 2007 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice. 4GB (x72, DR) 240-Pin DDR2 SDRAM FBDIMM Features Table 3: Part Numbers and Timing Parameters – 4GB 1 Base device: MT47R256M4, 1Gb DDR2 SDRAM Module Module Memory Clock/ Clock Cycles Link 2 t t Part Number Density Configuration Bandwidth Data Rate (CL - RCD - RP) Transfer Rate MT36RTF51272FY-667__ 4GB 512 Meg x 72 PC2-5300 3.0ns/667 MT/s 5-5-5 4.0 GT/s 1. Data sheets for the base device can be found on Micron’s Web site. Notes: 2. All part numbers end with a four-place code that designates component, AMB vendor, and PCB revisions. Consult factory for current revision codes. Example: MT36RTF51272FY-667E1D4. PDF: 09005aef82b5dfb9 Micron Technology, Inc. reserves the right to change products or specifications without notice. 2 rtf36c512x72fy.pdf - Rev. C 12/09 EN © 2007 Micron Technology, Inc. All rights reserved. 4GB (x72, DR) 240-Pin DDR2 SDRAM FBDIMM Pin Assignments and Descriptions Pin Assignments and Descriptions Table 4: Pin Assignments 240-Pin FBDIMM Front 240-Pin FBDIMM Back Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol Pin Symbol 1 1 1 V 31 PN3 61 PN9# 91 PS9# 121 V 151 SN3 181 SN9# 211 SS9# DD DD 2 V 32 PN3# 62 V 92 V 122 V 152 SN3# 182 V 212 V DD SS SS DD SS SS 3 V 33 V 63 PN10 93 PS5 123 V 153 V 183 SN10 213 SS5 DD SS DD SS 4 V 34 PN4 64 PN10# 94 PS5# 124 V 154 SN4 184 SN10# 214 SS5# SS SS 5 V 35 PN4# 65 V 95 V 125 V 155 SN4# 185 V 215 V DD SS SS DD SS SS 6 V 36 V 66 PN11 96 PS6 126 V 156 V 186 SN11 216 SS6 DD SS DD SS 7 V 37 PN5 67 PN11# 97 PS6# 127 V 157 SN5 187 SN11# 217 SS6# DD DD 8 V 38 PN5# 68 V 98 V 128 V 158 SN5# 188 V 218 V SS SS SS SS SS SS 9 V 39 V 69 V 99 PS7 129 V 159 V 189 V 219 SS7 CC SS SS CC SS SS 1 1 10 V 40 PN13 70 PS0 100 PS7# 130 V 160 SN13 190 SS0 220 SS7# CC CC 1 1 11 V 41 PN13# 71 PS0# 101 V 131 V 161 SN13# 191 SS0# 221 V SS SS SS SS 12 V 42 V 72 V 102 PS8 132 V 162 V 192 V 222 SS8 CC SS SS CC SS SS 13 V 43 V 73 PS1 103 PS8# 133 V 163 V 193 SS1 223 SS8# CC SS CC SS 14 V 44 DNU 74 PS1# 104 V 134 V 164 DNU 194 SS1# 224 V SS SS SS SS 15 V 45 DNU 75 V 105 DNU 135 V 165 DNU 195 V 225 DNU TT SS TT SS 16 DNU 46 V 76 PS2 106 DNU 136 DNU 166 V 196 SS2 226 DNU SS SS 17 RESET# 47 V 77 PS2# 107 V 137 M_TEST 167 V 197 SS2# 227 V SS SS SS SS (DNU) 1 1 18 V 48 PN12 78 V 108 V 138 V 168 SN12 198 V 228 SCK SS SS DD SS SS 1 1 19 DNU 49 PN12# 79 PS3 109 V 139 DNU 169 SN12# 199 SS3 229 SCK# DD 20 DNU 50 V 80 PS3# 110 V 140 DNU 170 V 200 SS3# 230 V SS SS SS SS 21 V 51 PN6 81 V 111 V 141 V 171 SN6 201 V 231 V SS SS DD SS SS DD 22 PN0 52 PN6# 82 PS4 112 V 142 SN0 172 SN6# 202 SS4 232 V DD DD 23 PN0# 53 V 83 PS4# 113 V 143 SN0# 173 V 203 SS4# 233 V SS DD SS DD 24 V 54 PN7 84 V 114 V 144 V 174 SN7 204 V 234 V SS SS SS SS SS SS 25 PN1 55 PN7# 85 V 115 V 145 SN1 175 SN7# 205 V 235 V SS DD SS DD 26 PN1# 56 V 86 DNU 116 V 146 SN1# 176 V 206 DNU 236 V SS DD SS DD 27 V 57 PN8 87 DNU 117 V 147 V 177 SN8 207 DNU 237 V SS TT SS TT 28 PN2 58 PN8# 88 V 118 SA2 148 SN2 178 SN8# 208 V 238 V SS SS DDSPD 29 PN2# 59 V 89 V 119 SDA 149 SN2# 179 V 209 V 239 SA0 SS SS SS SS 1 1 30 V 60 PN9 90 PS9 120 SCL 150 V 180 SN9 210 SS9 240 SA1 SS SS 1. The following signals are cyclical redundancy code (CRC) bits and thus appear out of the Note: normal sequence: PN12/PN12#, SN12/SN12#, PN13/PN13#, SN13/SN13#, PS9/PS9#, and SS9/ SS9#. PDF: 09005aef82b5dfb9 Micron Technology, Inc. reserves the right to change products or specifications without notice. 3 rtf36c512x72fy.pdf - Rev. C 12/09 EN © 2007 Micron Technology, Inc. All rights reserved. 4GB (x72, DR) 240-Pin DDR2 SDRAM FBDIMM Pin Assignments and Descriptions Table 5: Pin Descriptions Symbol Type Description PS[9:0] Input Primary southbound data, positive lines. PS#[9:0] Input Primary southbound data, negative lines. SCK Input System clock input, positive line. SCK# Input System clock input, negative line. SCL Input Serial presence-detect (SPD) clock input. SS[9:0] Input Secondary southbound data, positive lines. SS#[9:0] Input Secondary southbound data, negative lines. PN[13:0] Output Primary northbound data, positive lines. PN#[13:0] Output Primary northbound data, negative lines. SN[13:0] Output Secondary northbound data, positive lines. SN#[13:0] Output Secondary northbound data, negative lines. VID0 Output Voltage identification, connected to V . Indicates 1.5V DRAM present on module. SS SA[2:0] I/O SPD address inputs, also used to select the FBDIMM number in the AMB. SDA I/O SPD data input/output. RESET# Supply AMB reset signal. V Supply AMB core power and AMB channel interface power (1.5V). CC V Supply DRAM power and AMB DRAM I/O power (1.5V). DD V Supply DRAM clock, command, and address termination power (V /2). TT DD V Supply SPD/AMB SMBus power. DDSPD V Supply Ground. SS M_TEST The M_TEST pin provides an external connection for testing the margin of V , which is pro- – REF duced by a voltage divider on the module. It is not intended to be used in normal system operation and must not be connected (DNU) in a system. This test pin may have other fea- tures on future card designs and will be included in this specification at that time. DNU Do not use. – PDF: 09005aef82b5dfb9 Micron Technology, Inc. reserves the right to change products or specifications without notice. 4 rtf36c512x72fy.pdf - Rev. C 12/09 EN © 2007 Micron Technology, Inc. All rights reserved. 4GB (x72, DR) 240-Pin DDR2 SDRAM FBDIMM Functional Block Diagram Functional Block Diagram Figure 2: Functional Block Diagram V SS RS0# RS1# DQS0 DQS9 DQS0# DQS9# DM CS# DQS DQS# DM CS# DQS DQS# DM CS# DQS DQS# DM CS# DQS DQS# DQ DQ DQ DQ0 DQ DQ4 DQ DQ DQ DQ1 DQ U37 DQ5 U36 U2 U1 DQ2 DQ DQ6 DQ DQ DQ DQ DQ DQ DQ3 DQ DQ7 DQS1 DQS10 DQS10# DQS1# DM CS# DQS DQS# DM CS# DQS DQS# DM CS# DQS DQS# DM CS# DQS DQS# DQ8 DQ DQ DQ DQ DQ12 DQ DQ DQ DQ9 DQ U35 DQ13 U34 U4 U3 DQ10 DQ DQ DQ14 DQ DQ DQ11 DQ DQ DQ DQ DQ15 DQS2 DQS11 DQS2# DQS11# DM CS# DQS DQS# DM CS# DQS DQS# DM CS# DQS DQS# DM CS# DQS DQS# DQ DQ20 DQ DQ DQ16 DQ DQ DQ DQ DQ17 DQ U32 DQ21 U33 U5 U6 DQ DQ22 DQ DQ DQ18 DQ DQ DQ DQ DQ19 DQ DQ23 DQS12 DQS3 DQS3# DQS12# DM CS# DQS DQS# DM CS# DQS DQS# DM CS# DQS DQS# DM CS# DQS DQS# DQ DQ DQ DQ24 DQ DQ28 DQ25 DQ DQ29 DQ DQ DQ U7 U30 U8 U31 DQ DQ DQ DQ26 DQ DQ30 DQ DQ27 DQ DQ DQ31 DQ DQS4 DQS13 DQS4# DQS13# DM CS# DQS DQS# DM CS# DQS DQS# DM CS# DQS DQS# DM CS# DQS DQS# DQ32 DQ DQ36 DQ DQ DQ DQ DQ37 DQ DQ DQ33 DQ U11 U25 U10 U24 DQ DQ34 DQ DQ DQ38 DQ DQ DQ39 DQ DQ DQ35 DQ DQS14 DQS5 DQS14# DQS5# DM CS# DQS DQS# DM CS# DQS DQS# DM CS# DQS DQS# DM CS# DQS DQS# DQ DQ DQ DQ40 DQ DQ44 DQ DQ45 DQ DQ DQ41 DQ U13 U23 U12 U22 DQ DQ DQ DQ42 DQ DQ46 DQ DQ43 DQ DQ DQ47 DQ DQS15 DQS6 DQS6# DQS15# DM CS# DQS DQS# DM CS# DQS DQS# DM CS# DQS DQS# DM CS# DQS DQS# DQ DQ DQ DQ48 DQ DQ52 DQ DQ DQ DQ49 DQ U14 U20 DQ53 U15 U21 DQ DQ DQ54 DQ DQ DQ50 DQ DQ DQ DQ51 DQ DQ55 DQS7 DQS16 DQS16# DQS7# DM CS# DQS DQS# DM CS# DQS DQS# DM CS# DQS DQS# DM CS# DQS DQS# DQ DQ DQ DQ60 DQ DQ56 DQ DQ DQ DQ57 DQ U16 U18 DQ61 U17 U19 DQ DQ DQ DQ58 DQ DQ62 DQ DQ DQ63 DQ DQ DQ59 DQS8 DQS17 DQS8# DQS17# DM CS# DQS DQS# DM CS# DQS DQS# DM CS# DQS DQS# DM CS# DQS DQS# DQ DQ DQ CB0 DQ CB4 DQ CB1 DQ DQ CB5 DQ U28 U29 U26 U27 CB2 DQ CB6 DQ DQ DQ DQ DQ DQ CB3 DQ CB7 U9 U38 V Terminators Out to PN[13:0] SN[13:0] TT In from controller adjacent FBDIMM PN#[13:0] SN#[13:0] SPD EEPROM V SPD EEPROM, AMB SDA SCL DDSPD In from PS[9:0] SS[9:0] Out to WP A0 A1 A2 controller V AMB PS#[9:0] adjacent FBDIMM SS#[9:0] CC V SA0 SA1 SA2 SS DQ[63:0] A[15:0] Data input/output V DD DDR2 SDRAM signals to DDR2 channel DQS[17:0] A RAS#, CAS# U1–U4, U6–U37 Command, address, and V DQS#[17:0] WE#, ODT0 REF DDR2 SDRAM M clock signals to DDR2 channel CB[7:0] CS0#, CS1# B U1–U4, U6–U37 DDR2 SDRAM V SS CKE0, CKE1 SPD EEPROM, AMB Command, address, and clock line terminations: SCL CK0, CK0# SDA RAS#, CAS#, A[15:0], V ODT0, WE#, BA[2:0], TT CK1, CK1# SA0 CK2, CK2# SA[2:1] CK0, CK0#, CK1, CK1#, V TT CK2, CK2#, CK3, CK3# CK3, CK3# SCK, SCK# CS0#, CS1#, V RESET# TT CKE0, CKE1 PDF: 09005aef82b5dfb9 Micron Technology, Inc. reserves the right to change products or specifications without notice. 5 rtf36c512x72fy.pdf - Rev. C 12/09 EN © 2007 Micron Technology, Inc. All rights reserved. 4GB (x72, DR) 240-Pin DDR2 SDRAM FBDIMM Electrical Specifications Electrical Specifications Stresses greater than those listed may cause permanent damage to the module. This is a stress rating only, and functional operation of the module at these or any other condi- tions outside those indicated in the device data sheet is not implied. Exposure to absolute maximum rating conditions for extended periods may adversely affect reliability. Table 6: Absolute Maximum Ratings Parameter Symbol Min Max Units Notes Voltage on any signal pin relative to V V , V –0.3 1.75 V 1 SS IN OUT Voltage on V pin relative to V V –0.3 1.75 V CC SS CC Voltage on V pin relative to V V –0.5 2.3 V DD SS DD Voltage on V pin relative to V V –0.5 2.3 V TT SS TT DDR2 SDRAM device operating case temperature T 0 95 °C 2, 3 C AMB device operating case temperature 0 110 °C 1. V should not be greater than V . Notes: IN CC t 2. T is specified at 95°C only when using 2X refresh timing ( REFI = 7.8µs at or below 85°C; C t REFI = 3.9µs above 85°C); DDR2 SDRAM component data sheet. t 3. See applicable DDR2 SDRAM component data sheet for REFI and extended mode regis- t ter settings. The REFI parameter is used to specify the doubled refresh interval necessa- ry to sustain <85°C operation. Table 7: Input DC Voltage and Operating Conditions Parameter Symbol Min Nom Max Units Notes AMB supply voltage V 1.455 1.50 1.575 V CC DDR2 SDRAM supply voltage V 1.5 1.55 1.9 V DD Termination voltage V 0.48 × V 0.50 × V 0.52 × V V TT DD DD DD EEPROM supply voltage V 3.0 3.6 V 1 – DDSPD SPD input high (logic 1) voltage V 2.1 V V 2 – IH(DC) DDSPD SPD input low (logic 0) voltage V –0.6 0.8 V 2 – IL(DC) RESET input high (logic 1) voltage V 1.0 V 3 – – IH(DC) RESET input low (logic 0) voltage V 0.5 V 2 – – IL(DC) Leakage current (RESET) I –90 90 µA 3 – L Leakage current (link) I –5 5 µA 4 – L 1. Applies to AMB and SPD. Notes: 2. Applies to SMBus and SPD bus signals. 3. Applies to AMB CMOS signal RESET#. 4. For all other AMB related DC parameters, refer to the high-speed differential link inter- face specification. Serial Presence-Detect Data For the latest serial presence-detect data, refer to Micron’s SPD page: www.micron.com/ SPD. PDF: 09005aef82b5dfb9 Micron Technology, Inc. reserves the right to change products or specifications without notice. 6 rtf36c512x72fy.pdf - Rev. C 12/09 EN © 2007 Micron Technology, Inc. All rights reserved. 4GB (x72, DR) 240-Pin DDR2 SDRAM FBDIMM Module Dimensions Module Dimensions Figure 3: 240-Pin DDR2 FBDIMM Front view 5.1 (0.201) 133.5 (5.256) MAX 133.2 (5.244) 66.68 (2.63) TYP 0.595 (0.0234) R 0.75 (0.03) R 8X 0.5 (0.02) R 2 (0.079) (4X) U1 U3 U5 U7 U10 U12 U14 U16 TYP 1.5 (0.059) R 30.5 (1.201) U9 (4X) 30.2 (1.189) U2 U4 U6 U8 U11 U13 U15 U17 17.3 (0.681) 2.6 (0.102) D TYP (2X) 9.5 (0.374) 5.2 (0.205) TYP TYP 1.37 (0.054) 1.25 (0.0492) Pin 1 Detail A 0.0295 (0.75) R 1.17 (0.046) TYP 3.9 (0.153) 1 (0.039) 0.8 (0.031) TYP TYP TYP (x2) 74.68 (2.94) Pin 120 TYP 123 (4.843) TYP 45° x 0.18 (0.0071) 9.9 (0.39) TYP 1.06 (0.042) 5.48 (0.216) 1.19 (0.047) (x4) Back view TYP 1.06 (0.042) U26 U28 U18 U20 U22 U24 U30 U32 U34 U36 Detail A 3.1 (0.122) TYP 24.95 (0.982) TYP U27 U29 U19 U21 U23 U25 U31 U33 U35 U37 U38 3.05 (0.12) TYP 120° (2X) Pin 240 2.18 (0.086) TYP 5 (0.197) TYP Pin 121 51 (2.01) 67 (2.638) TYP TYP 66.68 (2.63) 7.68 (0.302) TYP MAX* Front view with heat spreader U1 U3 U5 U7 U10 U12 U14 U16 U9 U2 U4 U6 U8 U11 U13 U15 U17 1.37 (0.054) 1.17 (0.046) Back view with heat spreader *Including clip radius 7.92 (0.312) MAX U26 U28 U18 U20 U22 U24 U30 U32 U34 U36 U27 U29 U19 U21 U23 U25 U31 U33 U35 U37 U38 1. All dimensions are in millimeters (inches); MAX/MIN or typical (TYP) where noted. Notes: 2. The dimensional diagram is for reference only. PDF: 09005aef82b5dfb9 Micron Technology, Inc. reserves the right to change products or specifications without notice. 7 rtf36c512x72fy.pdf - Rev. C 12/09 EN © 2007 Micron Technology, Inc. All rights reserved. 4GB (x72, DR) 240-Pin DDR2 SDRAM FBDIMM Module Dimensions 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 www.micron.com/productsupport Customer Comment Line: 800-932-4992 Micron and the Micron logo are trademarks of Micron Technology, Inc. All other trademarks are the property of their respective owners. This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein. Although considered final, these specifications are subject to change, as further product development and data characterization some- times occur. PDF: 09005aef82b5dfb9 Micron Technology, Inc. reserves the right to change products or specifications without notice. 8 rtf36c512x72fy.pdf - Rev. C 12/09 EN © 2007 Micron Technology, Inc. All rights reserved.

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