P518 Data Sheet - 2009-02-05 P518 - Frame Buffer Interface PMC n Frame buffer functionality in FPGA n FPGA 12,000 LEs (approx.144,000 gates) n Color depth 16-bit RGB n 640 x 480 up to 1280 x 1024 pixels resolution n Frequencies 60 Hz and 75 Hz n 32 MB integrated graphics RAM n DVI digital video output (DVI-I front connector) n LVDS TFT via rear-I/O or on-board connector n -40 to +85°C with qualified components The P518 comes with frame buffer functionality and is Multiple display modes are configurable by updating a typically used as an extension card for PCI-based configuration Flash. The graphics controller itself systems. The complete set of graphics instructions is will be loaded with the new Flash data via a small realized inside an FPGA, with the FPGA acting as a PCI configuration PLD after restart. target (32-bit/33-MHz or 32-bit/66-MHz). Using FPGA The graphics controller video outputs are flat panel technology to implement graphics in a system provides signals. Conversion to both VGA and DVI is done by the advantage of nearly unlimited availability - which separate hardware. is ideal for industrial applications. And since the The graphics clock is supplied directly by a 48-MHz FPGA is available in -40 to +85°C operation oscillator. temperature from the chip manufacturer, the complete The same functionality is also available on PC-MIP®, a P518 module is delivered in this extended temperature PCI-based mezzanine card in a smaller form factor. range.The P518 is a PMC mezzanine card suitable for any PMC The P518 is equipped with a DVI digital video output compliant host carrier board in any type of bus connector. An LVDS TFT interface is accessible via the system, i.e. CPCI, VME or on any type of stand-alone on-board connector or the rear-I/O connector. A 32-MB, SBC. Appropriate PMC carrier cards in 3U, 6U and other 133-MHz SDRAM is implemented as a local frame buffer. formats are available from MEN or other manufacturers. Its data bus width is 32 bits. ® 1 Embedded Solutions P518 Data Sheet - 2009-02-05 Technical Data Video Signals Environmental Specifications n DVI interface; FP to DVI conversionn Temperature range (operation): n VGA interface; FP to VGA conversiono -40..+85°C n LVDS TFT interface via rear I/Oo Airflow: min. 10m³/h n Color depth 16-bit RGB n Temperature range (storage): -40..+85°C n Resolutions DVI/VGA (change only by FPGA update)n Relative humidity (operation): max. 95% non-condensing o 640 x 480n Relative humidity (storage): max. 95% non-condensing o 800 x 600n Altitude: -300m to + 3,000m o 1024 x 768n Shock: 15g/11ms o 1280 x 1024n Bump: 10g/16ms n Resolutions LVDS (change only by FPGA update)n Vibration (sinusoidal): 2g/10..150Hz o 640 x 480, 800 x 600 or 1024 x 768 with one or two n Conformal coating on request LVDS connections o 1280 x 1024 with two LVDS connections onlyMTBF n Frequencies: DVI/VGA 60Hz or 75Hz; LVDS 60Hzn MTBF: 426,000h @ 40°C (derived from MIL-HDBK-217F) MemorySafety n 32MB/133MHz SDRAM with 32-bit memory interfacen PCB manufactured with a flammability rating of 94V-0 by UL recognized manufacturers FPGA n Standard FPGA graphics configurationEMC o Main bus interfacen Tested according to EN 55022 (radio disturbance), o 16Z044_DISP - Display controller IEC1000-4-2 (ESD) and IEC1000-4-4 (burst) o 16Z043_SDRAM - SDRAM controller o 16Z045_FLASH - Flash interface Software Support n The FPGA offers the possibility to add customized I/O n Windows® functionality. See FPGA. n Linux n Examples of graphics extensions:n VxWorks® (WindML) o Video compressionn For more information on supported operating system o Bit blitterversions and drivers see Software. o Rendering o Pattern recognition o ... Peripheral Connection n Flat-panel and VGA signals via DVI-I front connector n LVDS signals via Pn4 rear I/O or P1 onboard connector PMC Characteristics (PCI) n Compliant with PCI Specification 2.2 n 32-bit/33-MHz, 3.3V V(I/O); 66MHz on request n Target Electrical Specifications n Supply voltage/power consumption: o +5V (4.85V..5.25V), 10mA max. o +3.3V (3.0V..3.6V), 300mA typ. Mechanical Specifications n Dimensions: conforming to IEEE 1386.1 n Weight: 70g ® 2 Embedded Solutions P518 Data Sheet - 2009-02-05 Diagram ® 3 Embedded Solutions P518 Data Sheet - 2009-02-05 Configuration & Options Standard Configurations Article No. Resolution SGRAM Operation Temperature 15P518-00 800 x 600 32 MB -40..+85°C Options Resolution n 640 x 480 n 800 x 600 n 1024 x 768 n 1280 x 1024 (two LVDS connections needed for LVDS support!) SGRAM n 16 MB or 32 MB Operation Temperature n -40..+85°C Please note that some of these options may only be available for large volumes. Please ask our sales staff for more information. ® 4 Embedded Solutions P518 Data Sheet - 2009-02-05 FPGA Flexible Configuration n This MEN board offers the possibility to add customized I/O functionality in FPGA. n It depends on the board type, pin counts and number of logic elements which IP cores make sense and/or can be implemented. Please contact MEN for information on feasibility. n You can find more information on our web page "User I/O in FPGA" FPGA Capabilities n FPGA Altera® Cyclone® EP1C12 o 12,060 logic elements o 239,616 total RAM bits n Configuration data stored in 2MB Flash n MEN offers Flash update tools for different operating systems. ® 5 Embedded Solutions P518 Data Sheet - 2009-02-05 Ordering Information Standard Hardware Documentation 15P518-02 FPGA-based frame buffer interface, 20P518-00 P518 User Manual resolution 800x600, 32MB integrated SGRAM, without rear I/O, -40..+85°C with qualified componentsFor the most up-to-date ordering information and direct links to other data sheets and downloads, see the P518 online data sheet under » www.men.de. Miscellaneous 05F007-02 DVI-to-VGA cable, DVI plug to 15-pin HD-Sub plug, 2m, -20..+70°C 05F007-03 Adapter, DVI analog plug to VGA 15-pin HD-Sub receptacle, -20..+70°C FPGA Packages 16P018-00 P518/P18 FPGA file for frame buffer functionality (PCI, SDRAM, 18-bit TTL RGB, LVDS, Flash) Software: Linux 13Z044-90 Linux native driver (MEN) for 16Z044_DISP (frame buffer) 13Z100-91 Linux FPGA update tool (MEN) Software: Windows 13Z044-70 Windows native driver (MEN) for 16Z044_DISP (frame buffer) 13Z100-70 Windows FPGA update tool (MEN) Software: VxWorks 13Z044-60 VxWorks driver (MEN) for 16Z044_DISP (frame buffer) 13Z100-60 VxWorks FPGA update tool (MEN) Software: QNX 13Z044-40 QNX native driver (MEN) for 16Z044_DISP (frame buffer) 13Z100-40 QNX FPGA update tool (MEN) Software: FPGA 16P018-00 P518/P18 FPGA file for frame buffer functionality (PCI, SDRAM, 18-bit TTL RGB, LVDS, Flash) ® 6 Embedded Solutions P518 Data Sheet - 2009-02-05 Contact Information Germany France USA MEN Mikro Elektronik GmbHMEN Mikro Elektronik SAMEN Micro, Inc. Neuwieder Straße 5-718, rue René Cassin24 North Main Street 90411 NurembergZA de la ChâtelaineAmbler, PA 19002 Phone +49-911-99 33 5-074240 GaillardPhone (215) 542-9575 Fax +49-911-99 33 5-901Phone +33 (0) 450-955-312Fax (215) 542-9577 E-mail info@men.deFax +33 (0) 450-955-211E-mail sales@menmicro.com www.men.deE-mail info@men-france.frwww.menmicro.com www.men-france.fr The date of issue stated in this data sheet refers to the Technical Data only. Changes in ordering information given herein do not affect the date of issue. All brand or product names are trademarks or registered trademarks of their respective holders. Information in this document has been carefully checked and is believed to be accurate as of the date of publication; however, no responsibility is assumed for inaccuracies. MEN Mikro Elektronik accepts no liability for consequential or incidental damages arising from the use of its products and reserves the right to make changes on the products herein without notice to improve reliability, function or design. MEN Mikro Elektronik does not assume any liability arising out of the application or use of the products described in this document. The products of MEN Mikro Elektronik are not suited for use in nuclear reactors or for application in medical appliances used for therapeutical purposes. Application of MEN's products in such plants is only possible after the user has precisely specified the operation environment and after MEN Mikro Elektronik has consequently adapted and released the product. Copyright © 2010 MEN Mikro Elektronik GmbH. All rights reserved. ® 7 7 Embedded Solutions